Scribd
Upload
8 views

Lecture 05

This document provides an overview of basic electronic devices and circuits. It discusses direct current (DC) load lines, including defining the cut-off and saturation points and drawing the load line. It explains that the quiescent point lies on the load line and represents the transistor circuit values with no input signal. It also discusses how the position of the quiescent point determines the maximum undistorted output and describes different types of transistor bias circuits including fixed bias, emitter-stabilized bias, voltage divider bias, and voltage feedback. Finally, it briefly mentions transistor switching networks.

Uploaded by

Atika Mustari Sami
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
8 views

Lecture 05

This document provides an overview of basic electronic devices and circuits. It discusses direct current (DC) load lines, including defining the cut-off and saturation points and drawing the load line. It explains that the quiescent point lies on the load line and represents the transistor circuit values with no input signal. It also discusses how the position of the quiescent point determines the maximum undistorted output and describes different types of transistor bias circuits including fixed bias, emitter-stabilized bias, voltage divider bias, and voltage feedback. Finally, it briefly mentions transistor switching networks.

Uploaded by

Atika Mustari Sami
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 19

Basic Electronic Devices and Circuits

EEE 2201

Md. Sahabuddin
Assistant Professor
Dept. of Biomedical Engineering (BME)
Jashore University of Science and Technology (JUST)
References:
 Electronic Devices and Circuit Theory
Robert L. Boylestad
Louis Nashelsky
 Principles of Electronics
V.K. Mehta
Rohit Mehta
 A Text Book of Electrical Technology Volume IV
B.L Theraja
A.K Theraja
 Microelectronic Circuts
Sedra and Smith
 Op – Amps and Linear Integrated Circuits
Ramakant A. Gayakward
D.C. Load Line
For drawing the dc load line of a transistor, one need to know only its cut-off and saturation points. It is a straight line
jointing these two points. For the CE circuit the load line is drawn in Figure . A is the cut-off point and B is the
saturation point.
Active Region
 All operating points (like C, D, E etc. ) lying between cut-off and saturation
points form the active region of the transistor. In this region, E/B junction is
forward-biased and C/B junction is reverse-biased—conditions necessary
for the proper operation of a transistor.

Quiescent Point
 It is a point on the dc load line, which represents the values of IC and VCE that
exist in a transistor circuit when no input signal is applied. It is also known as
the dc operating point or working point. The best position for this point is
midway between cut-off and saturation points where VCE= (1/2) VCC (like point
D in Figure ).
Example 58.3. For the CE circuit shown in Figure draw the dc load line and mark the dc working
point on it. Assume β=100 .

Hence, Q–point is (20 V ; 2 mA)


Q-Point and Maximum Undistorted Output
 Position of the Q-point on the dc load line determines the maximum signal that we can get from the circuit before
clipping occurs.
 In Figure (a), when Q is located near cut-off point, signal first starts to clip at A.
It is called cut-off clipping because the positive swing of the signal drives the
transistor to cut-off. In fact, as seen from Figure (a), maximum positive swing
is = ICQRac.
 If the Q-point Q2 is located near saturation point, then clipping first starts at point
B as shown in Figure (b). It is caused by saturation. The maximum negative
swing = VCEQ.
 In Figure (c), the Q-point Q3 is located at the centre of the
load line. In this condition, we get the maximum possible
output signal. The point Q3 gives the optimum Q-point.
The maximum undistorted signal = 2VCEQ.
 Since A < B, maximum possible peak-to-peak output signal = 2 A.

 If the operating point is so located that A > B, then maximum possible peak-to-
peak output signal = 2B.

 When operating point is located at the centre of the load line, then maximum
undistorted peak-to-peak signal is = 2 A = 2 B = VCC = 2 V CEQ.

 Under optimum working conditions ICQ is half the saturation value given by
VCC/RL
FIXED-BIAS CIRCUIT
 Forward Bias of Base–Emitter

 Collector–Emitter Loop
EMITTER-STABILIZED BIAS CIRCUIT
 Base–Emitter Loop

 Collector–Emitter Loop
VOLTAGE-DIVIDER BIAS
DC BIAS WITH VOLTAGE FEEDBACK  Base–Emitter Loop

 Collector–Emitter Loop
TRANSISTOR SWITCHING NETWORKS

You might also like