REPORT ON PAGING

Name : NURIN KHATOON

Roll Number : 10200222059
REG NO: 221020120324
Year : 3rd
Semester : 5th
Department of Information Technology
Subject : OPERATING SYSTEMS (PCC-CS502) CA1

Kalyani Government Engineering College

Kalyani – 741235, West Bengal, India
 ABSTRACT
The basic purpose of paging is to separate each procedure into pages.
Additionally, frames will be used to split the main memory. This
scheme permits the physical address space of a process to be non –
contiguous.
In paging, the physical memory is divided into fixed-size blocks
called page frames, which are the same size as the pages used by the
process. The process’s logical address space is also divided into
fixed-size blocks called pages, which are the same size as the page
frames. When a process requests memory, the operating system
allocates one or more page frames to the process and maps the
process’s logical pages to the physical page frames.
The mapping between logical pages and physical page frames is
maintained by the page table, which is used by the memory
management unit to translate logical addresses into physical
addresses. The page table maps each logical page number to a
physical page frame number.

Paging is a storage mechanism that allows OS to retrieve processes

from the secondary storage into the main memory in the form of
pages .The paging process should be protected by using the concept
of insertion of an additional bit called Valid/Invalid bit . The biggest
advantage of paging is that it is easy to use memory management
algorithm . Paging may cause Internal fragmentation . Paging and
segmentation both are the memory management schemes. Paging
allows the memory to be divided into fixed sized block whereas the
segmentation, divides the memory space into segments of the variable
block size. Where the paging leads to internal fragmentation the
segmentation leads to external fragmentation. Paging divides memory
into sections or paging files. When a computer uses up its available
RAM, pages not in use are transferred to the hard drive using a swap
file. A swap file is a space set aside on the hard drive to be used as the
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virtual memory extension for the computer's RAM. Page tables are
used to map virtual memory addresses to physical memory addresses.
When a program accesses a memory location, the virtual memory
address is looked up in the page table to determine its corresponding
physical memory address. Paging the page tables allows the computer
to keep only the necessary parts of the page table in physical memory
at any given time. This is important because page tables can be quite
large, and keeping the entire table in physical memory would be
wasteful of resources.

When a process needs to access a memory location that is not in

physical memory, the page table entry for that location indicates that a
page fault has occurred. The operating system can then load the
necessary page into physical memory from disk, updating the page
table accordingly.

Overall, paging the page tables allows the operating system to make
efficient use of memory by allocating it as needed and only keeping
necessary portions of the page table in physical memory.

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 INTRODUCTION
Most OS’s allocate a page table for each process. A pointer to the
page table is stored with the other register values in the process
control block. When the dispatcher is told to start a process, it must
reload the user registers and define the correct hardware page table
values from the stored user page table.

In the hardware implementation of the page table, it can be

implemented as a set of dedicated registers. These registers should be
built with very high speed logic to make the paging address
translation efficient. Every access to memory must go through the
paging map. The use of registers is satisfactory if the page table is
small. For contemporary computers, where page table is very large,
the use of fast registers to implement the page table is not feasible.
Hence, the page table is kept in main memory and a page table base
register (PTBR) points to the page table. Changing the page tables
requires changing only this one register reducing context switch time.

But the time required for accessing the user location is too large. The
solution to this problem is to use a special small fast lookup hardware
cache called translation look aside buffer (TLB). The TLB is
associative, high-speed memory. Each entry in the TLB consists of
two parts a key (or a tag) and a value.

The TLB contains only a few of the page table entries. When a logical
address is generated by the CPU its page number is presented to the
TLB. If the page number is found, its frame number is immediately
available and is used to access memory. If the page number is not in
the TLB known as TLB miss, a memory reference to the page table
must be made. When the frame number is obtained, it can be used to
access memory. Some TLB’s allow entries to be wired down, that is
they cannot be removed from the TLB. TLB entries for kernel code
are wired down.

Some TLB’s store address space identifiers (ASIDS) in each TLB

entry. An ASID uniquely identifies each process and is used to
provide address space protection for that process. An ASID allows the
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TLB to contain entries for several different processes simultaneously.
If the TLB does not support separate ASIDs, then every time a new
page table is selected, the TLB must be flushed or erased to ensure
that the next executing process does not use the wrong translation
information.

The percentage of times that a particular page number is found in the

TLB is called the hit ratio. To find the effective memory access time,
each case is weighted by its probability.

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Paging in Operating System
 Paging is a memory management scheme that eliminates the
need for a contiguous allocation of physical memory. The
process of retrieving processes in the form of pages from the
secondary storage into the main memory is known as paging.
The basic purpose of paging is to separate each procedure into
pages. Additionally, frames will be used to split the main
memory. This scheme permits the physical address space of a
process to be non – contiguous.

 In paging, the physical memory is divided into fixed-size blocks

called page frames, which are the same size as the pages used by
the process. The process’s logical address space is also divided
into fixed-size blocks called pages, which are the same size as
the page frames. When a process requests memory, the operating
system allocates one or more page frames to the process and
maps the process’s logical pages to the physical page frames.

 The mapping between logical pages and physical page frames is

maintained by the page table, which is used by the memory
management unit to translate logical addresses into physical
addresses. The page table maps each logical page number to a
physical page frame number.
How paging works
Paging works by writing data to, and reading it from, secondary
storage for use in primary storage. Paging is a basic function in
memory management for a computer's operating system (OS) as well
-- this includes Windows, Unix, Linux and mac OSs.

In a memory management system that takes advantage of paging, the

OS reads data from secondary storage in blocks called pages, all of
which have identical size. The physical region of memory containing
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a single page is called a frame. When paging is used, a frame does not
have to comprise a single physically contiguous region in secondary
storage. This approach offers an advantage over earlier memory
management methods, because it facilitates more efficient and faster
use of storage.

Important Points About Paging in Operating

Systems

 Reduces internal fragmentation: Paging facilitates

lessening internal fragmentation by using allocating memory in
fixed-size blocks (pages), which might be usually a whole lot
smaller than the size of the process’s facts segments.
 Enables reminiscence to be allotted on call for: Paging enables
memory to be allocated on call for, this means that memory is
most effectively allocated when it’s far needed. This allows for
extra efficient use of memory in view that only the pages that
are absolutely used by the manner want to be allocated inside
the physical memory.
 Protection and sharing of memory: Paging allows for the
protection and sharing of reminiscence between methods, as
each procedure has its own web page table that maps its logical
deal with area to its physical address space. This permits
techniques to proportion facts at the same time as preventing
unauthorized get right of entry to every other’s memory.
 External fragmentation: Paging can result in outside
fragmentation, wherein memory turns fragmented into small,
non-contiguous blocks. This can make it difficult to allocate
massive blocks of reminiscence to a method seeing that there
may not be enough contiguous free memory to be had.
 Overhead: Paging involves overhead because of the renovation
of the web page table and the translation of logical addresses to
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physical addresses. The working device must maintain the page
table for each manner and perform a deal with translation
whenever a procedure accesses memory, which can slow down
the machine.
Hardware Support in paging
In the hardware implementation of the page table, it can be
implemented as a set of dedicated registers. These registers
should be built with very high speed logic to make the paging
address translation efficient. Every access to memory must go
through the paging map. The use of registers is satisfactory if
the page table is small. For contemporary computers, where
page table is very large, the use of fast registers to implement
the page table is not feasible. Hence, the page table is kept in
main memory and a page table base register (PTBR) points to
the page table. Changing the page tables requires changing only
this one register reducing context switch time.
But the time required for accessing the user location is too large.
The solution to this problem is to use a special small fast lookup
hardware cache called translation look aside buffer (TLB). The
TLB is associative, high-speed memory. Each entry in the TLB
consists of two parts a key (or a tag) and a value.
The TLB contains only a few of the page table entries. When a
logical address is generated by the CPU its page number is
presented to the TLB. If the page number is found, its frame
number is immediately available and is used to access memory.
If the page number is not in the TLB known as TLB miss, a
memory reference to the page table must be made. When the
frame number is obtained, it can be used to access memory.
Some TLB’s allow entries to be wired down, that is they cannot
be removed from the TLB. TLB entries for kernel code are
wired down.

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Some TLB’s store address space identifiers (ASIDS) in each
TLB entry. An ASID uniquely identifies each process and is
used to provide address space protection for that process. An
ASID allows the TLB to contain entries for several different
processes simultaneously. If the TLB does not support separate
ASIDs, then every time a new page table is selected, the TLB
must be flushed or erased to ensure that the next executing
process does not use the wrong translation information.
The percentage of times that a particular page number is found
in the TLB is called the hit ratio. To find the effective memory
access time, each case is weighted by its probability.
What is Paging Protection?
Memory protection in a paged environment is accomplished by
protection bits associated with each frame. These bits are kept in
the page table. One bit can define a page to be read – write or
read – only. Every reference to memory goes through the page
table to find the correct frame number. When the physical
address is being computed, the protection bits can be checked to
verify that no writes are being made to a read- only page. An
attempt to write to a read – only page causes a hardware trap to
the OS.
One additional bit is generally attached to each entry in the page
table – a valid – invalid bit. When this bit is set to valid, the
associated page is in the process’s logical address space and is
thus a legal page. When the bit is set to invalid, the page is not
in the process’s logical address space. OS sets this bit for each
page to allow or disallow access to the page.
Some systems provide hardware in the form of a page table
length register (PTLR) to indicate the size of the page table.
This value is checked against every logical address to verify that
the address is in the valid range for the process. Failure of this
test causes an error trap to the OS.

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Example of Paging
Here is an example. Let’s say the main memory size is 64B and the
frame size is 4B then, the number of frames would be 64/4 = 16.
There are 4 processes. The size of each process is 16B and the page
size is also 4B then, the number of pages in each process = 16/4 = 4.
These pages may be stored in the main memory frames in a non-
contiguous form, depending on their availability.

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Paging in OS: Page Table
If we speak of paging in the operating system, the logical and
physical memory addresses are separated. As a result, an address
translation mechanism is required to convert the logical address into a
physical address. The physical address is the actual address of the
frame where each page will be placed, whereas the logical address
space is the address created by the CPU for each page.

The CPU generates a logical address that is made up of two parts-

 Page Number (p): Determines which page of the process the

CPU wishes to read the data from.
 Page Offset (d): Defines which word on the page the CPU
wants to read.
When the CPU generates a page number, the page table displays the
relevant frame number (frame base address) for each page in the
main memory.

The required physical address is formed by multiplying the frame

number by the page offset. The frame number identifies the frame in
which the required page is stored. Page Offset provides the precise
word from that page that must be read.

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Every new process creates a separate page table (stored in physical
memory). A page table entry contains a variety of page-related
information. The information contained in the page table item differs
from one operating system to another. PTE has the following
information:

 Frame Number: It is the most crucial piece of information in a

page table entry. The frame number identifies the memory
frames in the paging in which the page is stored. The size of the
frame number is determined by the number of frames in the
main memory.
The number of bits for frame = Size of Physical memory/Frame size.

 Present/Absent Bit: This is also referred to as the valid/invalid

bit. This bit indicates whether or not the page is in the main
memory space. This bit is set to 0 if the page is not available in
the main memory; otherwise, it is set to 1.
 Protection bit: This bit is also known as the 'Read / Write bit.'
This bit is about page security. It determines whether or not the
user has permission to read and write to the page. This bit is set
to 0 if only read operations are allowed and no writing
operations are allowed. If both read and write operations are
permitted, this bit will be set to 1.
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  Reference bit: The reference bit indicates whether or not the
page was referred to in the previous clock cycle. If the page has
recently been referenced, this bit is set to 1, otherwise, it is set
to 0.
 Caching Enabled/Disabled: The reference bit indicates
whether or not the page was referred to in the previous clock
cycle. If the page has recently been referenced, this bit is set to
1, otherwise, it is set to 0.
 Dirty bit: This bit is also known as the "Modified bit." This bit
indicates whether or not the page has been changed. This bit is
set to 1 if the page has been updated; otherwise, it is set to 0.

Advantages of Paging
Paging allows operating systems to use physical memory more
efficiently and improves system performance. Key paging advantages
are:

 Reducing external fragmentation. Paging allows the operating

system to use more memory than possible if all pages are
simultaneously resident in memory. The OS moves pages not

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 currently in use onto the disk and then swaps them back in when
needed.
 Improving memory usage. Paging improves performance by
reducing the time the CPU waits for pages to load from the disk.
The operating system keeps the most frequently used pages in
memory and only swaps out the pages not used as often.
 Simplifying memory management. Paging streamlines
memory management for the operating system. Therefore, the
OS only has to keep track of the pages currently in memory
rather than the entire address space of each process.
 Efficient swapping. With paging, the operating system does not
have to consider fragmentation when swapping out a page.
Moreover, the OS chooses the page least likely to be used.
 Supports virtual memory. Virtual memory support means each
process has its own address space, even if the physical memory
is not large enough to accommodate all the processes.

Disadvantages of Paging
Paging is a very effective way to use physical memory, but it also
adds complexity to the OS and causes page faults. While the
advantages outweigh the disadvantages, the following list represents
key drawbacks:

 Increased overhead. Paging introduces overhead, as the

operating system has to track which pages are in memory and
which are on disk. Therefore, this overhead reduces
performance, especially on systems with slow disks.
 Page faults. Paging can lead to page faults. The faults occur
when the operating system needs to load a page from the disk
into memory. When they happen frequently, the system slows
down.
 Complexity. Paging is a complex and challenging system to
implement and debug.
 Internal fragmentation. Paging increases internal
fragmentation, as the last page of a process is not fully used,
leading to wasted memory.

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  Page table overhead: Paging requires page tables, which
consume significant memory. Multilevel page tables and
variable page sizes (super-pages) mitigate the issue.

CONCLUSION
Paging is a storage mechanism that allows OS to retrieve processes
from the secondary storage into the main memory in the form of
pages .The paging process should be protected by using the concept
of insertion of an additional bit called Valid/Invalid bit . The biggest
advantage of paging is that it is easy to use memory management
algorithm. Paging may cause Internal fragmentation.
Paging helps in improving the performance of the system by
improving the utilization of the memory and accessing the available
memory present there. Paging and segmentation both are the memory
management schemes. Paging allows the memory to be divided
into fixed sized block whereas the segmentation, divides the memory
space into segments of the variable block size. Where the paging leads
to internal fragmentation the segmentation leads to external
fragmentation. Paging divides memory into sections or paging files.
When a computer uses up its available RAM, pages not in use are
transferred to the hard drive using a swap file. A swap file is a space
set aside on the hard drive to be used as the virtual memory extension
for the computer's RAM.

REFERENCE
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 I. Alderson, W. C. Lynch and B. Randell. "Thrashing in a
Multiprogram Paging System", from Operating Systems
Techniques, ed. Hoare and Perrott, Academic Press, pp. 152—
167,1968.

II. Radha Krishnan Arora and R. K. Subramanian, "Exploiting the

Optimal Paging Algorithms", Info. Proc. Letters, pp. 233—
236,7, 5, August, 1978.

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