Mosfet Part 1
Mosfet Part 1
SKEE 1073
Chapter 4
Introduction
• Calculators, cell phones, and personal computers are made using VLSI
(very large scale integrated) circuits. These circuits contain up to
hundreds of thousands of components that are all etched on a single
piece of semiconductor material.
• The goal of IC design has always been to fit the max number of
components in the smallest amount of space possible.
• MOSFET circuits can be made much smaller than BJT. For these
reasons, MOSFET technology has come to dominate most of the VLSI
circuit market.
FET Organization Chart
Comparison of BJT and FET
• Similarities:
– Amplifiers
– Switching devices
– Impedance matching circuits
• Differences:
there is no actual pn junction in FET as the p and n materials are insulated
from each other
FET is unipolar because the current conduction uses only majority carriers
either electrons or holes, whereas BJT is bipolar because the current
conduction uses both majority carriers and minority carriers such as
electrons and holes.
FETs are voltage controlled devices whereas BJTs are current controlled
devices.
FETs also have a higher input impedance, but BJTs have higher gains.
FETs are less sensitive to temperature variations and because of their
construction they are more easily integrated on ICs.
FETs are also generally more static sensitive than BJTs.
Comparison of BJT and FET
Advantages:
• FET has a higher input impedance (MΩ).
• FET is less sensitive to temperature variations. (Q-point more stable)
• Because of their construction (where their size are smaller), they are more
easily integrated (compact size) on ICs.
• Less affected by noise.
• More suitable use as logic switch due to no offset voltage.
Disadvantages:
• FET is generally more static sensitive than BJT.
• Low gain-bandwidth product.
• Low high-speed switching performance at high frequencies.
• Low high power handling capability.
• Easy to damage (burn out).
Basic Construction of MOSFET
• MOSFET transistor have metal gates which are insulated from
semiconductor by a layer of SiO2 or other dielectric.
• The insulated gate prevented the current from applied gate voltage flowing
through the gate.
Metal terminal
Oxide insulator
Semiconductor
material creating
the source-drain
channel
6
N and P channel of MOSFET
• If the MOSFET is an N-channel or N-MOSFET , then the source
and drain are 'n+' regions and the body is a 'p' region.
• If the MOSFET is a p-channel or P-MOSFET , then the source
and drain are 'p+' regions and the body is a 'n' region.
Enhancement Mode MOSFET
(E-MOSFET)
• The Drain (D) and Source (S) connect to the to n-doped regions
• These n-doped regions are not connected via an n-channel without an external voltage
• The Gate (G) connects to the p-doped substrate via a thin insulating layer of SiO2
SYMBOL
N-CHANNEL
•Arrow pointing position indicate
the MOSFET type (n or p)
• The dotted line with arrow
indicate connection between
source and drain. 8
E-MOSFET Biasing Operation
• When positive gate voltage is applied, the gate capacitance charges to the value of the
gate to source voltage.
• The +VGG will attract electron and accumulate in the region near the surface of the SiO2
• The holes repelled by the positive voltage to the p-subtrate.
• As the magnitude of the bias increase, the concentration near the SiO2 surface increase
thus induce the n-type material called n-inversion layer region to bridge the source and
drain Current flow from source to drain.
9
E-MOSFET Biasing Operation
• When the value of VGS is increased, the newly formed channel becomes wider,
allowing ID to increase. When the value of VGS decreases, the channel becomes
narrower, and ID decreases.
E-MOSFET transconductance curve
• Transconductance curve as
shown in Figure.
The p-channel Enhancement mode MOSFET is similar to the n-channel except that the
voltage polarities and current directions are reversed.
14
E-MOSFET Symbols
conventional
simplified
*SS - substrates
Summary of E-MOSFET
Transfer Curve
I D k (VGS VT ) 2
Where:
VT = threshold voltage or
voltage at which the
MOSFET turns on
DR.N '09 17
N-Channel E-MOSFET
•VGS is always positive I D k (VGS VT ) 2
•ID = 0 when VGS< VT
•As VGS increases above VT, ID increases I D(ON)
k
•If VGS is kept constant and VDS is increased, then ID (VGS(ON) VT) 2
saturates (IDSS)
•The saturation level, VDSsat is reached. VDsat VGS VT
Locus VDsat
P-Channel E-MOSFET
•VGS is always negative I D k (VGS VT ) 2
•ID = 0 when VGS > VT
•As VGS decreases below VT, ID increases I D(ON)
k
•If VGS is kept constant and VDS is increased, then ID (VGS(ON) VT) 2
saturates (IDSS)
•The saturation level, VDSsat is reached. VDsat VGS VT
Locus VDsat
19
Equation for E-MOSFET
I D K VGS VT
2
Example – Sketch the transfer characteristic graph (ID vs VGS Graph. Given;
n-channel enhancement-type MOSFET with K 0.5 103 AV2 and VT 4V
Example
DR.N '09 21
Specification Sheet
Maximum Ratings
Specification Sheet
Electrical Characteristics
Handling MOSFETs
MOSFETs are very sensitive to static electricity. Because of the very thin SiO2
layer between the external terminals and the layers of the device, any small
electrical discharge can create an unwanted conduction.
Protection:
• Apply voltage limiting devices between the gate and source, such as
back-to-back Zeners to limit any transient voltage.