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The document describes the pin assignments and functions of the PMI8952 power management integrated circuit. It includes a diagram showing the 144 pin assignments of the chip. The document then provides tables that describe the purpose and function of each pin, organized by category such as input power management, user interfaces, ground pins, and more. It aims to specify the pin definitions and descriptions for the PMI8952 device.

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Mohamed Rafa
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0% found this document useful (0 votes)
142 views

Document

The document describes the pin assignments and functions of the PMI8952 power management integrated circuit. It includes a diagram showing the 144 pin assignments of the chip. The document then provides tables that describe the purpose and function of each pin, organized by category such as input power management, user interfaces, ground pins, and more. It aims to specify the pin definitions and descriptions for the PMI8952 device.

Uploaded by

Mohamed Rafa
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 15

The PMI8952 is available in the 144 WLNSP. See Chapter 4 for package details.

Figure 2-1 shows

a high-level view of the pin assignments for the PMI8952.

Figure 2-1 PMI8952 pin assignments (top view)

VDIS_

N_OUT

VSW_

DIS_N

VDD_

DIS_N

GND_

DIS_P

VDIS_

P_OUT

VREG_

WLED

VDD_

WLED

GND_

WLED
9

VSW_

WLED

10

MPP_3

11

HAP_

PWM_IN

12

HAP_

PWM_IN

13

VDIS_

N_OUT

14

VSW_

DIS_N

15

DIS_N_

CAP_REF

16

VSW_

DIS_P

17

VSW_

DIS_P

18
NC

19

NC

20

WLED_

SINK2

21

WLED_

SINK1

22

MPP_1

23

GNDC

24

HAP_

OUT_N

25

VDD_1P8

_DIS_N

26

GND_

DIS_N

_REF

27

VDIS_

N_FB

28
VDD_

DIS_P

29

VDIS_

P_FB

30

WLED_

CABC

31

GND_

WLED_I

32

WLED_

SINK3

33

WLED_

SINK4

34

MPP_2

35

HAP_

OUT_P

36

GND_

HAP

37

GNDC
38

SPMI_

CLK

39

SPMI_

DATA

40

NC

41

NC

42

VDD_

MSM_IO

43

BUA

44

NC

45

GNDC

46

VREG_

ADC_LDO

47

MPP_4

48

VDD_

HAP
49

GNDC

50

CLK_IN

51

DIS_

SCTRL

52

GNDC

53

AVDD

_BYP

54

DVDD

_BYP

55

SHDN_N

56

GNDC

57

VDD_

ADC_LDO

58

REF_

BYP

59

GND_
REF

60

VDD_

TORCH

61

CS_

PLUS

62

BATT_

PLUS

63

GPIO_2

64

GNDC

65

GNDC

66

GNDC

67

GNDC

68

RESIN_N

69

PS_HOLD

70

GNDC

71
FLASH

_LED1

72

VDD_

FLASH

73

CS_

MINUS

74

BATT_

MINUS

75

GPIO_1

76

GNDC

77

GNDC

78

GNDC

79

GNDC

80

USB_ID

81

WIPWR_

DIV2_EN

82
GNDC

83

FLASH

_LED2

84

VDD_

FLASH

85

R_BIAS

86

BATT_ID

87

GNDC

88

DC_EN

89

WIPWR

_RST_N

90

USB_ID

_RVAL1

91

CHG_LED

92

USB_SNS

93

SYSON
94

FLASH

_OUT

95

FLASH

_OUT

96

FLASH

_OUT

97

BATT_

THERM

98

VAA_

CAP

99

GNDC

100

USB_EN

101

USB_CS

102

CHG_EN

103

PGOOD

_SYSOK

104
DC_SNS

105

BOOT_

CAP

106

VSW_

CHG

107

VSW_

CHG

108

VSW_

CHG

109

GNDC

110

GND_FG

111

USB_DP

112

USB_ID

_RVAL2

113

CHG_OUT

114

VPH_

PWR
115

GNDC

116

VSW_

CHG

117

VSW_

CHG

118

VSW_

CHG

119

VSW_

CHG

120

VSW_

CHG

121

GNDC

122

GND_

REF_CHG

123

USB_DM

124

CHG_

VBAT
_SNS

125

CHG_OUT

126

CHG_OUT

127

VPH_

PWR

128

GND_

CHG

129

GND_

CHG

130

USB_

MID

131

USB_

MID

132

USB_

MID

133

GNDC

134

KYPD_
PWR_N

135

V_ARB

136

GNDC

137

CHG_OUT

138

VPH_

PWR

139

VPH_

PWR

140

WIPWR_

CHG_OK

141

GND_

CHG

142

USB_IN

143

USB_IN

144

USB_IN

User

Interfaces
Input Power

Management Power IC-level

Interfaces Ground General

Housekeeping No Connect Configurable

IOs

80-NT391-1 Rev. H Confidential and Proprietary – Qualcomm Technologies, Inc. 19

MAY CONTAIN U.S. AND INTERNATIONAL EXPORT CONTROLLED INFORMATION

PMI8952 Power Management IC Device Specification Pin definitions

2.1 I/O parameter definitions

2.2 Pin descriptions

Descriptions of all pins are presented in the following tables, organized by functional group:

Table 2-2 Input power management

Table 2-3 General housekeeping

Table 2-4 User interfaces

Table 2-5 IC-level interfaces

Table 2-6 Configurable input/output – MPPs and GPIOs

Table 2-7 No connect pins

Table 2-8 Power supply pins

Table 2-9 Ground pins

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