14/4/09

NAND and NOR

Implementation
This Lecture will cover
How the digital circuits use NAND and NOR gates
rather than AND and OR gates to fabricate the
electronic components
p such IC digital
g logic
g families

14 April 2009
Dr. Saied M. Abd El‐atty Soliman [email protected]

Graphic Symbols

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NAND Implementation
Inverter

AND

OR
Bubble denotes
complementation
Logic Operations with NAND gates

AND‐ Invert Invert‐ OR

14 April 2009
Two graphic symbols for the NAND gates Page 3
Dr. Saied M. Abd El‐atty Soliman [email protected]

Two Level Implementation

The Rule
The implementation of Boolean functions with NAND gates requires that the functions be in
sum of products (SOP) form.
Example1: implement the following function F = AB + CD
This function can be implemented by three different ways as shown in the circuit
diagram a, b, c

( )
The function is implemented in
(a) With AND and OR gates F = AB .CD
(b) The AND gates are replaced by NAND gates and the OR gate is F = AB + CD
replaced by a NAND gate with invert‐OR graphic.
(c) It is similar to case b) but the output NAND gate is redrawn
with the AND‐invert.

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Example2 Cont.

implement the following Boolean function with NAND gates F (x , y , z ) = (1,2,3,4,5,7)

The first step is to simplify the function into SOP form, we can use k‐map to find the
simplified function as follows:

F(x , y , z ) = x y +xy +z

The two level NAND implementation is shown in Fig 2.a) and b).
Z

b)
a)

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Procedures of Implementation with

two levels of NAND gates
1. Express simplified function in sum of products

2. Draw a NAND gate for each product term that has at least
two literals to constitute a group of first-level gates

3. Draw a single gate using AND-invert or invert-OR in the

second level

4. A term with a single literal requires an inverter in the first

level

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Multilevel NAND Circuits

• 1. Convert all AND gates to NAND gates with AND‐invert graphic symbols
• 2. Convert all OR gates to NAND gates with invert‐OR graphic symbols
• 3. Check all the bubbles in the diagrams. For a single bubble, insert an
inverter (one‐input NAND gate) or complement the input literal
Example 1: Consider the Boolean function, implement the circuit diagram by using multilevel
NAND gate.
F = A (CD + B ) + BC ′

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Example 2
Example 2: Consider the following Boolean function, implement the circuit diagram by using
multilevel NAND gate. F = (AB ′ + A ′B )i(C + D ′)

AND‐OR gates

NAND gates

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NOR Implementation
•The NOR operation is the dual of the NAND operation
•The NOR gate is another universal gate to implement any Boolean function
•Easy for OR‐AND (product of sums)

Logic Operations with NOR gates

OR‐ Invert
Invert‐AND

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Two graphic symbols for the NOR gates Page 9
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The Rule Example 1

The implementation of Boolean functions with NOR gates requires that the
functions be in product of sums (POS) form.

Example1: Consider the following Boolean function, implement the circuit diagram by using two
l;evel NOR gate.
gate
F = ( A + B ) i (C + D ) i E
Transformation from OR‐AND diagram to NOR diagram
•OR gates => OR‐invert
•AND gate => invert‐AND

OR‐AND gate NOR gate

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Example 2
Example 2: Consider the following Boolean function, implement the circuit diagram by using
multilevel NOR gate. F = (AB ′ + A ′B )i(C + D ′)

AND‐OR gates

NOR gates

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Dr. Saied M. Abd El‐atty Soliman [email protected]

Nondegenerate Forms
16 possible combinations of two‐level forms with 4 types of
gates:
t AND,
AND OR
OR, NAND
NAND, andd NOR

– 8 degenerate forms: degenerate to a single operation

– 8 generate forms
Forms Implementation method
• NAND‐AND = AND‐NOR = AND‐OR‐INVERT

• OR‐NAND = NOR‐OR = OR‐AND‐INVERT

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AND‐OR‐INVERT Implementation
AND‐NOR = NAND‐AND = AND‐OR‐INVERT

F = (AB + CD + E)’

Similar
Si il to AND
AND‐OR,
OR AND‐OR‐INVERT
AND OR INVERT requires
i an expression
i ini sum off products
d
Given F, we can implement F’ with AND‐OR‐INVERT

AND‐NOR AND‐NOR NAND‐AND

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OR‐AND‐INVERT Implementation
OR‐NAND = NOR‐OR = OR‐AND‐INVERT
F = [ (A+B) (C+D) E ] ’

Similar to OR‐AND, OR‐AND‐INVERT requires an expression in products of sum

Given FF, we can implement
Gi i l F’ with
i h OR
OR‐AND‐INVERT
AND INVERT

OR‐NAND OR‐NAND NOR‐OR

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Example: Implement the function in Fig.1 with the four two level
form.
F = x’y’z’ + xyz’
F’ = x’y + xy’ + z
F = (F’)’ = (x’y + xy’ + z)’
= (x + y’)(x’ + y)z
F’ = (F)’ = (x’y’z’ + xyz’)’
Fig.1
= (x + y + z)(x’ + y’ + z)

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Exclusive‐OR (XOR) Function

XOR: x ْ y = xy’ + x’y Exclusive‐NOR = equivalence
(x ْ y)’ = (xy’ + x’y)’
= (x
(x’ + y)(x + yy’)) = xx’y’
y + xy

Communtative: A ْ B = B ْ A
Associative: (A ْ B) ْ C = A ْ
(B ْ C) = A ْ B ْ C
Only a limited number of Boolean functions can be
expressed in terms of XOR operations, but it is particularly
useful in arithmetic operations and error‐detection and
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Odd Function
• The 3‐variable XOR function is equal to 1 if only one variable is equal to 1 or if all
three variables are equal to 1
• Multiple‐variable exclusive OR operation = odd function : odd number of variables be
equal to 1

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Odd Function
• The 3‐variable XOR function is equal to 1 if only one variable is equal to 1 or if all
three variables are equal to 1
• Multiple‐variable exclusive OR operation = odd function : odd number of variables be
equal to 1

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Map for a 4‐variable XOR Function

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Exercises
1) Simplify the following expressions and implement them with two level NAND gate
a) A B + ABD + AB D + AC D + ABC
b) BD + BC D + A BC D
2) Draw a NAND logic diagram that implement the complement of the following function
F (A , B ,C , D ) = ∑ (0,1, 2,3, 4,8,9,12)
3) Draw a logic diagram using only two‐input NAND gates to implement the of following
expression :
( A B + A B )(C D + C D )
4) Draw the multilevel NOR and multilevel NAND circuit for the following expression:

(A B + C D )E + BC (A + B )
5) Implement the following Boolean function (F), using the two level forms of logic
a)NAND‐AND b)AND‐NOR c)OR‐NAND d)NOR‐OR

F (W , X ,Y , Z ) = ∑ (0, 4,8,9,10,11,12,14)

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