VLSI ARCHITECTURE OF ENERGY_EFFICIENT

KALMAN FILTER
BATCH-1
Team members:
1. Maddimsetti Manjusha Devi - 18B01A0439
2. Cheedella Lasya Priya - 18B01A0411
3. Vajipeyayajula Sri Sai Tejaswini - 18B01A04A9
4. Pitta Mahalakshmee - 18B01A04H0
5. Bommineni Sasya Dhathri - 18B01A0407

Guided by:
DR. K. Padma Vasavi
Professor & HOD of ECE Department
Department of Electronics and Communication Engineering
SHRI VISHNU ENGINEERING COLLEGE FOR WOMEN(AUTONOMOUS)-BHIMAVARAM
ABSTRACT :
• Efficient Kalman filter (KF) designs for real-time mobile applications, such as nano drones
navigation, robots localization, spacecraft orbit control, GPS positioning, image
recognition, and multi-sensor data fusion for wearable systems are key technology goals.
The KF is a compute-intensive kernel composed of consecutive complex matrix
operations, like multiplications and matrix inversions. The complex block in the KF is the
Kalman gain (KG) function, which involves matrices inversion at each iteration, applying
the determinant matrix calculation and division operations.
• In our project, we used different architectures, for which balancing conflicting low-power
and high-performance requirements aiming at real-time KF processing. The main aim of
our project is that the KF architecture in parallel form offer the best balance of circuit
area size, power dissipation.
MOTIVATION:
 Kalman filter plays an essential role in spaceship orbit control, GPS positioning, image
recognition, object tracking etc.,.

 These applications design needs to be battery-driven with limited energy capacity while
still demanding a reliable real-time performance.
 So, this motivated us to work on energy efficient Kalman filter.
OBJECTIVES:

 To model the VLSI architecture of Kalman filter using Verilog HDL.

 To make the Kalman filter energy-efficient using Goldschmidt

Division Algorithm.
BACKGROUND:
Kalman Filter equations:

A matrix system consisting of the state equation

x(k) = Ax(k−1) + BuT (k) + w(k)

and observation equation

z(k) = H T (k)x(k) + r(k)
BACKGROUND:

Goldschmidt Division Algorithm:

• The Goldschmidt Division algorithm is a iterative division algorithm.
• The Goldschmidt Division algorithm operations are based on three
equations:

Qc(i+1) = Qc(i) × F(i)

D(i+1) = D(i) × F(i)
F(i+1) = 2 − D(i+1)
 LITERATURE SURVEY1:

TITLE YEAR AUTHOR METHODOLOGY DISADVANTAGE

Real-time FPGA- 2017 C. Wang, E. D. The work in real time FPGA-based This work does not
based Kalman Burnham-Fay, kalman filter, only the coefficients provide the power
filter for and J. D. Ellis estimation and error correction dissipation analysis.
constant and are FPGA-based. It presented an
non-constant approach to estimate and correct
velocity periodic periodic error in real-time based
error correction on extended kalman filter
algorithm.
 LITERATURE SURVEY2:

TITLE YEAR AUTHOR METHODOLOGY DISADVANTAGE

A scalable, 2018 J. Soh and X. Wu. This work used the unscented This work does not
FPGA-based kalman filter algorithm which is provide the
implementation much better than the extended error analysis.
of the kalman filter algorithm when
unscented the system models are highly
Kalman filter nonlinear.
 LITERATURE SURVEY3:

TITLE YEAR AUTHOR METHODOLOGY DISADVANTAGE

Exploring 2019 P. T. L. Pereira, G. This work explored dedicated There was no detailed
architectural Paim, P. Ucker, E. architecture for the kalman implementation of the
solutions for a Costa, S. Almeida, gain equation aiming at the kalman filter.
Kalman filter and S. Bampi best combination of power
gain realization dissipation, circuit area and
speed processing
PROBLEM IDENTIFICATION:
• In tunnels, it gets harder
to estimate your position
through GPS, since the
receiver's line of sight to
satellites is blocked.
• No previous work for
kalman filter used the
divider circuit in the
internal block for matrix
inversion.

SOLUTION: energy efficient kalman filter

using Goldschmidt Division Algorithm.
BLOCK DIAGRAM:
MATHEMATICAL BACKGROUND:
Prior State Vector:
MATHEMATICAL BACKGROUND:
Prior system error covariance:
MATHEMATICAL BACKGROUND:
KG hardware architecture:
MATHEMATICAL BACKGROUND:
Estimated output:
MATHEMATICAL BACKGROUND:
System noise covariance:
MATHEMATICAL BACKGROUND:
Measurement noise covariance:
MATHEMATICAL BACKGROUND:
Posterior state vector:
MATHEMATICAL BACKGROUND:
Posterior system error covariance:
TOOLS USED:

To Model the Architecture of kalman filter using HDL

To simulate and verify the functionality of the VLSI architecture
PRIOR STATE VECTOR:

INPUT
7
X0 =
3

OUTPUT
^- 115 Click to add text
X(k) =
115
 ESTIMATED OUTPUT:

INPUT
^- 3
X(k) =
3
Click to add text

OUTPUT
^ 9
Z(k) =
33
 SYSTEM NOISE COVARIANCE:

INPUT
^- 3
X(k) =
3

OUTPUT
8 0
Q(k) =
0 0
MEASUREMENT NOISE COVARIANCE:

INPUT
^ 9
Z(k) =
1

OUTPUT
4 0
R(k) =
0 15
PRIOR SYSTEM ERROR COVARIANCE:
INPUT
2 4
P0 =
6 4

OUTPUT
- 5 14
P(K) =
5 14
 KALMAN GAIN:

INPUTS
5 14
P(k) =
5 14

4 0
R(k-1) =
0 15

OUTPUT

K(k) = 180 180

180 180
 POSTERIOR STATE VECTOR:
INPUTS
3
^-
X(k) =
3

K(k) = 4 4

4 4 Click to add text

^ 9
Z(k) =
1
OUTPUT
^ 59
X(k) =
59
 POSTERIOR SYSTEM ERROR COVARIANCE:

INPUTS
- 5 14
P(k) =

5 14

K(k) =
4 4

4 4
OUTPUT

P(k) = -5 -14

-5 -14
PRIOR STATE VECTOR POWER:
ESTIMATED OUTPUT POWER:
SYSTEM NOISE COVARIANCE POWER:
MEASUREMENT NOISE COVARIANCE POWER:
PRIOR SYSTEM ERROR COVARIANCE POWER:
KALMAN GAIN POWER:
POSTERIOR STATE VECTOR POWER:
POSTERIOR SYSTEM ERROR COVARIANCE POWER:
KALMAN FILTER POWER:
POWER RESULTS:
Subsystems Static power Dynamic power Static power(%) Dynamic power(%) Applied voltage

Prior state vector 0.099W 7.123W 1% 99% 3.3 v

power
Prior system error 0.107W 9.363W 1% 99% 3.3 v
covariance power
Measurement noise 0.079W 0.000W 100% 0% 3.3 v
covariance power
Estimated output 0.102W 8.103W 1% 99% 3.3 v
power
Posterior state vector 0.137W 15.45W 1% 99% 3.3 v
power
Posterior system error 0.242W 26.537W 1% 99% 3.3 v
covariance power
System noise 0.085W 1.923W 4% 96% 3.3 v
covariance power
Kalman gain power 0.974W 51.106W 2% 98% 3.3 v

Kalman filter power 1.029W 90.737W 1% 99% 3.3 v

CONCLUSION:
• This project presented dedicated architectures implementing the entire KF process. Eight
different architectures were developed, one for each equation of the filter, configured in fully
parallel form.
• Such wide design exploration enabled us to determine configuration leads to the best
compromise or balance between circuit area, power dissipation, and processing speed. Our
KG proposal uses the iterative-based Goldschmidt divider for the matrix inversions.
• Our results pointed to parallel architecture as the best trade-off between power dissipation,
and high processing speed for the KF equations.
• This best-balanced VLSI implementation of the entire KF architecture is a comprehensive and
new solution for VLSI DSP applications.
•Finally, we explored the VLSI KF circuit in application scenarios of systems identification, and
systems estimation to show its end-user performance.
REFERENCES:
[1] C. Wang, E. D. Burnham-Fay, and J. D. Ellis, “Real-time FPGA-based Kalman
filter for constant and non-constant velocity periodic error correction,” Precis. Eng.,
vol. 48, pp. 133–143, Apr. 2017.

[2] J. Soh and X. Wu, “A scalable, FPGA-based implementation of the unscented

Kalman filter,” in Introduction and Implementations of the Kalman Filter. Rijeka,
Croatia: InTechOpen, 2018.

[3] P. T. L. Pereira, G. Paim, P. Ucker, E. Costa, S. Almeida, and S. Bampi, “Exploring

architectural solutions for a Kalman filter gain realization,” in Proc. 26th IEEE Int.
Conf. Electron., Circuits Syst. (ICECS), Nov. 2019, pp. 650–653