Module 4
Module 4
Embedded System Components: Embedded Vs General computing system, History of embedded systems,
Classification of Embedded systems, Major applications areas of embedded systems, purpose of embedded
systems.
Core of an Embedded System including all types of processor/controller, Memory, Sensors, Actuators, LED, 7
segment LED display, stepper motor, keyboard, Push button switch, Communication Interface (onboard and
external types), Embedded firmware, Other system components.
Textbook 2: Chapter 1 (Sections 1.2 to 1.6), Chapter 2 (Sections 2.1 to 2.6)
Text book: Shibu K V, “Introduction to Embedded Systems”, Tata McGraw Hill Education Private Limited, 2nd
Edition
Every embedded system is unique, and the hardware as well as the firmware is highly specialized to the
application domain. Embedded systems are becoming an inevitable part of any product or equipment in all
fields including household appliances, telecommunications, medical equipment, industrial control, consumer
products, etc.
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1. On generation
First generation (1G):
Built around 8bit microprocessor & microcontroller.
Simple in hardware circuit & firmware developed.
Examples: Digital telephone keypads.
Second generation (2G):
Built around 16-bit μp & 8-bit μc.
They are more complex & powerful than 1G μp & μc.
Examples: SCADA systems
Third generation (3G):
Built around 32-bit μp & 16-bit μc.
Concepts like Digital Signal Processors(DSPs), Application Specific Integrated Circuits(ASICs)
evolved.
Examples: Robotics, Media, etc.
Fourth generation:
Built around 64-bit μp & 32-bit μc.
The concept of System on Chips (SoC), Multicore Processors evolved.
Highly complex & very powerful.
Examples: Smart Phones.
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3. On deterministic behaviour
This classification is applicable for “Real Time” systems.
The task execution behaviour for an embedded systemmay be deterministic or non-deterministic.
Based on execution behaviour Real Time embeddedsystems are divided into Hard and Soft.
4. On triggering
Embedded systems which are “Reactive” in nature canbe based on triggering.
Reactive systems can be:
Event triggered
Time triggered
The application areas and the products in the embedded domain are countless.
1. Data collection/Storage/Representation
2. Data communication
3. Data (signal) processing
4. Monitoring
5. Control
6. Application specific user interface
1. Data Collection/Storage/Representation:
Embedded system designed for the purpose of data collection performs acquisition of data from the
external world.
Data collection is usually done for storage, analysis, manipulation and transmission.
Data can be analog or digital.
Embedded systems with analog data capturing techniques collect data directly in the form of analog signal
whereas an embedded system with digital data collection mechanism converts the analog signal to the
digital signal using analog to digital converters.
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2. Data communication:
Embedded data communication systems are deployed in applications from complex satellite
communication to simple home networking systems.
The transmission of data is achieved either by a wire-line medium or by a wire-less medium.
Data can either be transmitted by analog means or by digital means.
Wireless modules-Bluetooth, Wi-Fi.
Wire-line modules-USB, TCP/IP.
Network hubs, routers, switches are examples of dedicated data transmission embedded systems.
4. Monitoring:
All embedded products coming under the medical domain are with monitoring functions.
Electro cardiogram machine is intended to do the monitoring of the heartbeat of a patient but it cannot
impose control over the heartbeat.
Other examples with monitoring function are digital CRO, digital multi-meters, and logic analyzers.
5. Control:
A system with control functionality contains both sensors and actuators.
Sensors are connected to the input port for capturing the changes in environmental variable and the
actuators connected to the output port are controlled according to the changes in the input variable.
Air conditioner system used to control the room temperature to a specified limit is a typical example
for CONTROL purpose.
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Embedded systems are basically designed to regulate a physical variable (such Microwave Oven) or to
manipulate the state of some devices by sending some signals to the actuators or devices connected to the output
port system (such as temperature in Air Conditioner), in response to the input signal provided by the end users
or sensors which are connected to the input ports.
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Embedded systems are domain and application specific and are built around a central core. The core of the
embedded system falls into any of the following categories:
1. General purpose and Domain Specific Processors
Microprocessors
Microcontrollers
Digital Signal Processors
2. Application Specific Integrated Circuits. (ASIC)
3. Programmable logic devices(PLD‟s)
4. Commercial off-the-shelf components (COTs)
1.1 Microprocessors
A microprocessor is a silicon chip representing a central processing unit. · A microprocessor is a
dependent unit and it requires the combination of other hardware like memory, timer unit, and interrupt
controller, etc. for proper functioning. · Developers of microprocessors.
o Intel – Intel 4004 – November 1971(4-bit).
o Intel – Intel 4040.
o Intel – Intel 8008 – April 1972.
o Intel – Intel 8080 – April 1974(8-bit).
o Motorola – Motorola 6800.
o Intel – Intel 8085 – 1976.
o Zilog - Z80 – July 1976.
1.2 Microcontrollers
A microcontroller is a highly integrated chip that contains a CPU, scratch pad RAM, special and general
purpose register arrays ,on chip ROM/FLASH memory for program storage , timer and interrupt control
units and dedicated I/O ports.
Texas Instrument‟s TMS 1000 Is considered as the world‟s first microcontroller.
Some embedded system application require only 8 bit controllers whereas some requiring superior
performance and computational needs demand 16/32 bit controllers.
The instruction set of a microcontroller can be RISC or CISC
Microcontrollers are designed for either general purpose application requirement or domain specific
application requirement.
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Microprocessors/controllers based on the von-neumann architecture shares a single common bus for fetching
both instructions and data. Program instructions and data are stored in a common main memory. Von-Neumann
architecture based processors/controllers first fetch an instruction and them fetch the data to support the
instruction from code memory. The two separate fetches slows down the controller‟s operation. Von-Neumann
architecture is also referred as Princeton architecture, since it was developed by the Princeton University.
Microprocessors/controllers based on the Harvard architecture will have separate data bus and instruction bus.
This allows the data transfer and program fetching to occur simultaneously on both buses. With Harvard
architecture, the data memory can be read and written while the program memory is being accessed. These
separated data memory and code memory buses allow one instruction to execute while the next instruction is
fetched (“pre-fetching”). The pre-fetch theoretically allows much faster execution than Von-Neumann
architecture. Since some additional hardware logic is required for the generation of control signals for this type
of operation it adds silicon complexity to the system. Fig 2.2 explain the Harvard and Von-Neumann
architecture concept.
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Endianness specifies the order in which the data is stored in the memory by processor operations in a multi byte
system (Processors whose word size is greater than one byte). Suppose the word length is two byte then data can
be stored in memory in two different ways:
(1) Higher order of data byte at the higher memory and lower order of data byte at location just below the higher
memory.
(2) Lower order of data byte at the higher memory and higher order of data byte at location just below the
higher memory.
Little-endian (Fig. 2.3) means the lower-order byte of the data is stored in memory at the lowest address, and the
higher-order byte at the highest address. (The little end comes first.)
For example, a 4 byte long integer Byte3 Byte2 Byte1 Byte0 will be stored in the memory as shown below:
Big-endian (Fig. 2.4) means the higher-order byte of the data is stored in memory at the lowest address, and the
lower-order byte at the highest address. (The big end comes first.) For example, a 4 byte long integer Byte3
Byte2 Byte1 Byte0 will be stored in the memory as follows :
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Advantages of PLDs :-
1) PLDs offer customer much more flexibility during the design cycle.
2) PLDs do not require long lead times for prototypes or production parts because PLDs are already on a
distributors shelf and ready for shipment.
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Stepper Motor:
Stepper motor is an electro mechanical device which generates discrete displacement (motion) in response
to dc electrical signals.
It differs from the normal dc motor in its operation. The dc motor produces continuous rotation on applying
dc voltage whereas a stepper motor produces discrete rotation in response to the dc voltage applied to it.
Stepper motors are widely used in industrial embedded applications, consumer electronic products and
robotics control systems.
The paper feed mechanism of a printer/fax makes use of stepper motors for its functioning.
Based on the coil winding arrangements, a two phase stepper motor is classified into
Unipolar
Bipolar
Unipolar:
A unipolar stepper motor contains two windings per phase. The direction of rotation (clockwise or
anticlockwise) of a stepper motor is controlled by changing the direction of current flow. Current in one
direction flows through one coil and in the opposite direction flows through the other coil. It is easy to shift the
direction of rotation by just switching the terminals to which the coils are connected .
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Bipolar:
A bipolar stepper motor contains single winding per phase. For reversing the motor rotation the current flow
through the windings is reversed dynamically. It requires complex circuitry for current flow reversal.
In the wave step mode only one phase is energized at a time and each coils of the phase is energized alternatively. The
coils A, B, C, and D are energized in the following order:
The rotation of the stepper motor can be reversed by reversing the order in which the coil is energised.
Two-phase unipolar stepper motors are the popular choice for embedded applications. The current requirement for stepper
motor is little high and hence the port pins of a microcontroller/processor may not be able to drive them directly. Also the
supply voltage required to operate stepper motor varies normally in the range 5V to 24 V. Depending on the current and
voltage requirements, special driving circuits are required to interface the stepper motor with microcontroller/processors.
Commercial off-the-shelf stepper motor driver ICs are available in the market and they can be directly interfaced to the
microcontroller port. ULN2803 is an octal peripheral driver array available from Texas Instruments and ST
microelectronics for driving a 5V stepper motor. Simple driving circuit can also be built using transistors. The following
circuit diagram (Fig. 2.20) illustrates the interfacing of a stepper motor through a driver circuit connected to the port pins
of a microcontroller/processor.
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Keyboard
Keyboard is an input device for user interfacing. If the number of keys required is very limited, push
button switches can be used and they can be directly interfaced to the port pins for reading.
However, there may be situations demanding a large number of keys for user input. In such situations it
may not be possible to interface each keys to a port pin due to the limitation in the number of general
purpose port pins available for the processor/controller in use and moreover it is wastage of port pins.
Matrix keyboard is an optimum solution for handling large key requirements.
It greatly reduces the number of interface connections.
In a matrix keyboard, the keys are arranged in matrix fashion (i.e. they are connected in a row and column
style).
For detecting a key press, the keyboard uses the scanning technique, where each row of the matrix is pulled
low and the columns are read.
After reading the status of each columns corresponding to a row, the row is pulled high and the next row is
pulled low and the status of the columns are read. This process is repeated until the scanning for all rows are
completed.
When a row is pulled low and if a key connected to the row is pressed, reading the column to which the key
is connected will give logic 0.
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MEMORY
Memory is an important part of a processor/controller based embedded systems. Some of the
processors/controllers contain built in memory and this memory is referred as on-chip memory. Others do not
contain any memory inside the chip and requires external memory to be connected with the controller/processor
to store the control algorithm. It is called off-chip memory. Also some working memory is required for
holding data temporarily during certain operations. This section deals with the different types of memory used
in embedded system applications.
The code memory retains its contents even after the power to it is turned off. It is generally known as
non-volatile storage memory. Depending on the fabrication, erasing, and programming techniques they are
classified into the following types.
Masked ROM (MROM) Masked ROM is a one-time programmable device. Masked ROM makes use of
the hardwired technology for storing data. The device is factory programmed by masking and metallisation
process at the time of production itself, according to the data provided by the end user. The primary
advantage of this is low cost for high volume production. They are the least expensive type of solid state
memory. Different mechanisms are used for the masking process of the ROM, like
(1) Creation of an enhancement or depletion mode transistor through channel implant.
(2) By creating the memory cell either using a standard transistor or a high threshold transistor. In the high
threshold mode, the supply voltage required to turn ON the transistor is above the normal ROM IC
operating voltage. This ensures that the transistor is always off and the memory cell stores always logic 0.
Masked ROM is a good candidate for storing the embedded firmware for low cost embedded devices.
Once the design is proven and the firmware requirements are tested and frozen, the binary data (The firmware
cross compiled/assembled to target processor specific machine code) corresponding to it can be given to the
MROM fabricator. The limitation with MROM based firmware storage is the inability to modify the device
firmware against firmware upgrades. Since the MROM is permanent in bit storage, it is not possible to alter
the bit information.
Read/Write
Memory (RAM)
Static RAM (SRAM) Static RAM stores data in the form of voltage. They are made up of flip- flops.
Static RAM is the fastest form of RAM available. In typical implementation, an SRAM cell (bit) is realised
using six transistors (or 6 MOSFETs). Four of the transistors are used for building the latch (flip- flop) part
of the memory cell and two for controlling the access. SRAM is fast in operation due to its resistive
networking and switching capabilities. In its simplest representation an SRAM cell can be visualised as
shown in Fig. 2.10.
Q5 Q6
Q2 Q4
Vcc
Word Line
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This implementation in its simpler form can be visualised as two-cross coupled inverters with read/write
control through transistors. The four transistors in the middle form the cross-coupled inverters. This can be
visualised as shown in Fig. 2.11.
From the SRAM implementation diagram, it is clear Write control Read control
that access to the memory cell is controlledby the
line Word Line, which controls the access
transistors (MOSFETs) Q5 and Q6. The access Data to Data
transistors control the connection to bit lines B & B\. write read
In order to write a value to the memory cell, apply the
desired value to the bit control lines (For writing 1,
make B = 1 and B\ =0; For writing 0, make B = 0 and Fig. 2.11 Visualisation of SRAM cell
B\ =1) and assert the Word Line (Make Word line
high). This operation latches the bit written in the flip-flop. For reading the content of the memory cell, assert
both B and B\ bit lines to 1 and set the Word line to 1.
The major limitations of SRAM are low capacity and high cost. Since a minimum of six transistors
are required to build a single memory cell, imagine how many memory cells we can fabricate on a silicon
wafer.
Dynamic RAM (DRAM) Dynamic RAM stores data in the form of Bit line B
charge. They are made up of MOS transistor gates. The advantages of
DRAM are its high density and low cost compared to SRAM. The
disadvantage is that since the information is stored as charge it gets leaked
off with time and to prevent this they need to be refreshed periodically. Word line
Special circuits called DRAM controllers are used for the refreshing
operation. The refresh operation is done periodically in milliseconds +
interval. Figure 2.12 illustrates the typical implementation of a DRAM –
cell.
The MOSFET acts as the gate for the incoming and outgoing data
whereas the capacitor acts as the bit storage unit. Table given below Fig. 2.12 DRAM cell implementation
summarises the relative merits and demerits of SRAM and DRAM
technology.
NVRAM Non-volatile RAM is a random access memory with battery backup. It contains static RAM based
memory and a minute battery for providing supply to the memory in the absence of external power supply.
The memory and battery are packed together in a single package. NVRAM is used for the non- volatile
storage of results of operations or for setting up of flags, etc. The life span of NVRAM is expected to be
around 10 years. DS1744 from Maxim/Dallas is an example for 32KB NVRAM.
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COMMUNICATION INTERFACES
Developed and patented by Philips for connecting low speed peripherals to a motherboard, embedded
system or cell phone
Two wire bus , Half duplex, Serial communication, Synchronous, data up to 100 kbits/sec
Serial data line (SDA)
Serial clock line (SCL)
Master controls clock for slaves
Each connected slave has a unique 7-bit address
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BLUETOOTH
1. Low cost, Low power, short range wireless technology for data and audio communication.
2. Proposed by Ericsson in 1994.
3. Operates at 2.4Ghz and uses frequency hopping spread spectrum(FHSS).
4. Data rate 1Mbps to 24Mbps.
5. Data range 30 to 100 feet.
6. Two layers: Physical layer & Protocol layer (User defined protocols).
7. Each bluetooth device will have a 48 bit unique identification number.
8. P-P (Master-slave), P-MP( Piconet- Max. slaves 7).
9. File transfer in mobiles, Medical sectors.
For communicating with devices over a Wi-Fi network, the device when its Wi-Fi radio is turned ON,
searches the available Wi- Fi network in its vicinity and lists out the Service Set Identifier (SSID) of the
available networks. If the network is security enabled, a password may be required to connect to a particular
SSID. Wi-Fi employs different security mechanisms like Wired Equivalency Privacy (WEP) Wireless
Protected Access (WPA), etc. for securing the data communication.
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ZIGBEE
ZigBee Coordinator (ZC)/Network Coordinator: The ZigBee coordinator acts as the root of the ZigBee
network. The ZC is responsible for initiating the ZigBee network and it has the capability to store
information about the network.
ZigBee Router (ZR)/Full func on Device (FFD): Responsible for passing information from device to
another device or to another ZR.
ZigBee End Device (ZED) /Reduced Function on Device (RFD): End device containing ZigBee
functionality for data communication. It can talk only with a ZR or ZC and doesn’t have the capability to act
as a mediator for transferring data from one device to another. The diagram shown in Fig. 2.34 gives an
overview of ZC, ZED and ZR in a ZigBee network.
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Universal Asynchronous Receiver Transmitter (UART) based data transmission is an asynchronous form
of serial data transmission.
The serial communication settings (Baud rate, number of bits per byte, parity, number of start bits and stop
bit and flow control) for both transmitter and receiver should be set as identical.
The start and stop of communication is indicated through inserting special bits in the data stream. While
sending a byte of data, a start bit is added first and a stop bit is added at the end of the bit stream. The least
significant bit of the data byte follows the ‘start’ bit.
The ‘start’ bit informs the receiver that a data byte is about to arrive. The receiver device starts polling its
‘receive line’ as per the baudrate settings. If the baudrate is ‘x’ bits per second, the time slot available for
one bit is 1/x seconds. If parity is enabled for communication, the UART of the transmitting device adds a
parity bit (bit value is 1 for odd number of 1s in the transmitted bit stream and 0 for even number of 1s).
The UART of the receiving device calculates the parity of the bits received and compares it with the
received parity bit for error checking.
The UART of the receiving device discards the ‘Start’, ‘Stop’ and ‘Parity’ bit from the received bit stream
and converts the received serial bit data to a word (In the case of 8 bits/byte, the byte is formed with the
received 8 bits with the first received bit as the LSB and last received data bit as MSB).
For proper communication, the ‘Transmit line’ of the sending device should be connected to the ‘Receive
line’ of the receiving device.
RS-232 C
RS-232 C (Recommended Standard number 232, revision C) is a full duplex, wired, asynchronous serial
communication interface.
The RS-232 interface is developed by the Electronics Industries Association (EIA) during the early 1960s.
RS-232 extends the UART communication signals for external data communication.
UART uses the standard TTL/CMOS logic (Logic ‘High’ corresponds to bit value 1 and Logic ‘Low’
corresponds to bit value 0) for bit transmission whereas RS-232 follows the EIA standard for bit
transmission.
As per the EIA standard, a logic ‘0’ is represented with voltage between +3 and +25V and a logic ‘1’ is
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RS-232 is a point-to-point communication interface and the devices involved in RS-232 communication are
called ‘Data Terminal Equipment (DTE)’ and ‘Data Communication Equipment (DCE)’.
If no data flow control is required, only TXD and RXD signal lines and ground line (GND) are required for
data transmission and reception. The RXD pin of DCE should be connected to the TXD pin of DTE and vice
versa for proper data transmission.
As per the EIA standard RS-232 C supports baudrates up to 20Kbps (Upper limit 19.2 Kbps) The commonly
used baudrates by devices are 300bps, 1200bps, 2400bps, 9600bps, 11.52Kbps and 19.2Kbps. 9600 is the
popular baudrate setting used for PC communication. The maximum operating distance supported by RS-
232 is 50 feet at the highest supported baudrate.
Embedded devices contain a UART for serial communication and they generate signal levels conforming to
TTL/CMOS logic. A level translator IC like MAX 232 from Maxim Dallas semiconductor is used for
converting the signal lines from the UART to RS-232 signal lines for communication. On the receiving side
the received data is converted back to digital logic level by a converter IC. Converter chips contain
converters for both transmitter and receiver.
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EMBEDDED FIRMWARE
Embedded firmware refers to the control algorithm (Program instructions) and or the configuration settings
that an embedded system developer dumps into the code (Program) memory of the embedded system.
There are various methods available for developing the embedded firmware. They are listed below.
(1) Write the program in high level languages like Embedded C/C++ using an Integrated Development
Environment. (2) Write the program in Assembly language using the instructions supported by your
application’s target processor/controller.
The process of converting the program written in either a high level language or processor/controller
specific Assembly code to machine readable binary code is called ‘HEX File Creation’.
The methods used for ‘HEX File Creation’ is different depending on the programming techniques used. If
the program is written in Embedded C/C++ using an IDE, the cross compiler included in the IDE converts it
into corresponding processor/controller understandable ‘HEX File’.
If you are following the Assembly language based programming technique (method 2), you can use the
utilities supplied by the processor/controller vendors to convert the source code into ‘HEX File’. Also third
party tools are available, which may be of free of cost, for this conversion.
For a beginner in the embedded software field, it is strongly recommended to use the high level language
based development technique. The reasons for this being: writing codes in a high level language is easy, the
code written in high level language is highly portable
The embedded software development process in assembly language is tedious and time consuming. The
developer needs to know about all the instruction sets of the processor/controller or at least s/he should carry
an instruction set reference manual with her/him.
Two types of control algorithm design exist in embedded firmware development.
o The first type of control algorithm development is known as the infinite loop or ‘super loop’ based
approach, where the control flow runs from top to bottom and then jumps back to the top of the
program in a conventional procedure. It is similar to the while (1) { }; based technique in C.
o The second method deals with splitting the functions to be executed into tasks and running these
tasks using a scheduler which is part of a General Purpose or Real Time Embedded Operating
System (GPOS/RTOS).
RESET CIRCUIT
The reset circuit is essential to ensure that the device is not operating at a voltage level where the device is
not guaranteed to operate, during system power ON.
The reset signal brings the internal registers and the different hardware systems of the processor/ controller
to a known state and starts the firmware execution from the reset vector (Normally from vector address
0x0000 for conventional processors/controllers.
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The reset signal can be either active high (The processor undergoes reset when the reset pin of the processor
is at logic high) or active low (The processor undergoes reset when the reset pin of the processor is at logic
low).
Since the processor operation is synchronised to a clock signal, the reset pulse should be wide enough to
give time for the clock oscillator to stabilise before the internal reset state starts.
The Zener diode Dz and transistor Q forms the heart of this circuit. The transistor conducts always when the
supply voltage Vcc is greater than that of the sum of VBE and Vz (Zener voltage).
The transistor stops conducting when the supply voltage falls below the sum of VBE and Vz. Select the
Zener diode with required voltage for setting the low threshold value for Vcc.
Microprocessor Supervisor ICs like DS1232 from Maxim Dallas, provides Brown-out protection
OSCILLATOR UNIT
Oscillator unit of the embedded system is responsible for generating the precise clock for the processor.
Certain processors/controllers integrate a built-in oscillator unit and simply require an external ceramic
resonator/quartz crystal for producing the necessary clock signals.
The speed of operation of a processor is primarily dependent on the clock frequency. However we cannot
increase the clock frequency blindly for increasing the speed of execution.
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The total system power consumption is directly proportional to the clock frequency. The power consumption
increases with increase in clock frequency.
The accuracy of program execution depends on the accuracy of the clock signal.
WATCHDOG TIMER
In desktop Windows systems, if we feel our application is behaving in an abnormal way or if the system
hangs up, we have the ‘Ctrl + Alt + Del’ to come out of the situation.
In Embedded system, we have a watchdog to monitor the firmware execution and reset the system
processor/microcontroller when the program execution hangs up.
A watchdog timer is a hardware timer for monitoring the firmware execution.
Depending on the internal implementation, the watchdog timer increments/decrements a free running
counter with each clock pulse and generates a reset signal to reset the processor.
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