New Products MB39A125/MB39A126

DC/DC Converter IC for

Charging Li-ion Batteries
MB39A125/MB39A126
DC/DC converter IC for charging that is capable of controlling the output voltage and
output current independently; it utilizes the pulse-width modulation type. With a
built-in comparator for AC adapter voltage detection, power supply can be switched
automatically between an AC adapter and a battery. A wide power-supply voltage
range, low standby current, and high efficiency are now realized.

Overview Since MB39A125 has an external output voltage setting

resistor, the output voltage can be set from 1 cell to 4 cells
FUJITSU has been devoting its energy to developing power- optionally. MB39A126 has a built-in output voltage setting
supply ICs to charge notebook PCs. We have now succeeded in resistor and corresponds to 3 or 4 cells. It also incorporates the
developing a new DC/DC converter IC that uses the pulse- AC adapter detection function that sets the ACOK terminal to
width modulation (PWM type) type and can be used to charge “Hi-Z”and outputs an“L”signal to the XACOK terminal
Li-ion batteries. This product,“ MB39A125/MB39A126,” when the AC adapter voltage drops below the preset voltage.
controls the output voltage and output current independently As with our other existing charging ICs, it is possible to detect
and contains an AC adapter detector function. voltage lowering in the AC adapter to dynamically control the

Photo 1 MB39A125 External View Photo 2 MB39A126 External View

24 FIND Vol.23 No.2 2005

 New Products MB39A125/MB39A126

charging current for the secondary battery so that the voltage Circuit Configuration
decrease is stable (Dynamically controlled charging). It is also
equipped with an additional protective function, the soft-start Figs.1 to 4 show the pin assignments, and Figs.5 and 6
function, which prevents excessive charging current from the present the block diagram.
inrush current. Furthermore, because it supports a wide range of This product consists of the following function blocks.
power-supply voltage and a low standby current while realizing
high efficiency, this product is optimal for use as a built-in ■ DC/DC Converter Function
charger in notebook PCs. Reference Voltage Block (REF)
The reference voltage circuit generates the reference voltage
(5.0V Typ.) for which temperature compensation has been
Product Features conducted by the voltage supplied from the VCC terminal. It is
used as the reference voltage for internal circuits in IC. It is
■ High conversion efficiency: 97% (Max.) possible to extract up to 1 mA of load current from the reference
voltage at the VREF terminal to an external destination.
■ Built-in two constant current control circuit systems
Triangular Wave Oscillator Block (OSC)
■ Analog control on charging current value possible With a built-in capacitor for setting the triangular wave
(＋INE1, 2 terminals) oscillation frequency, the triangular wave oscillator block
generates triangular wave oscillation waveforms by connecting a
■ Built-in AC adapter detection function (ACOK terminal resistor for setting the triangular wave oscillation frequency at
and XACOK terminal) the RT terminal. The triangular wave is input into the PWM
comparator inside the IC.
■ External output voltage setting resistor (corresponds to 1
to 4 cells: MB39A125) Error Amplifier Block (Error Amp1)
The error amplifier (Error Amp1) controls the charging
■ Built-in output voltage setting resistor (corresponds to 3 current by detecting the output signals from the current
or 4 cells: MB39A126) detection amplifier (Current Amp1) and comparing them with
the signals from the ＋INE1 terminal to output the PWM
■ Built-in charging stop function at low input control signal. In addition, stable phase compensation against
the system can be attained by setting up the optional loop gain
■ Output voltage setting precision through a connection of the capacitor and the feedback resistor
●MB39A125: 4.2V±0.74％ (Ta＝−10℃ to 85℃) from the FB123 terminal to the −INE1 terminal.
●MB39A126: 12.6V/16.8V±0.8％ (Ta＝−10℃ to 85℃)
Error Amplifier Block (Error Amp2)
■ Built-in high-precision current detection amplifier: ±5% The error amplifier (Error Amp2) controls the charging
(at 100 mV input voltage difference) and ±15% (at 20 current by detecting the output signals from the current
mV input voltage difference) detection amplifier (Current Amp2) and comparing them with
the signals from the ＋INE2 terminal to output the PWM
■ Prevention of reactive current possible (Icc = 0μA) by control signal. In addition, stable phase compensation against
opening the output voltage setting resistor during IC the system can be attained by setting up the optional loop gain
standby. through a connection of the capacitor and the feedback resistor
from the FB123 terminal to the −INE2 terminal.
■ Built-in soft-start function
Error Amplifier Block (Error Amp3): MB39A125
■ Built-in totem-pole-type output for Pch MOS FET The error amplifier (Error Amp3) detects the output voltage
from the DC/DC converter and outputs the PWM control
■ Package: SSOP24, QFN28 signal. Output voltage can be optionally set up for 1 to 4 cells
by connecting an external resistor for output voltage setup at the
inverted input terminal for the error amplifier. Stable phase

2005 No.2 FIND Vol.23 25

 New Products MB39A125/MB39A126

compensation against the system can be attained by setting up Error Amplifier Block (Error Amp3): MB39A126
the optional loop gain through a connection of the capacitor and The error amplifier (Error Amp3) detects the output voltage
the feedback resistor from the FB123 terminal to the −INE3 from the DC/DC converter and outputs the PWM control
terminal. signal. Output voltage can be set up from 3 to 4 cells using the
SEL terminal. In addition, stable phase compensation against

Figure 1 Pin Assignments for SSOP24 (MB39A125) Figure 3 Pin Assignments for SSOP24 (MB39A126)

（TOP VIEW） （TOP VIEW）

-INC2 1 24 +INC2 -INC2 1 24 +INC2

OUTC2 2 23 GND OUTC2 2 23 GND
+INE2 3 22 CS +INE2 3 22 CS
-INE2 4 21 VCC -INE2 4 21 VCC
ACOK 5 20 OUT ACOK 5 20 OUT
VREF 6 19 VH VREF 6 19 VH
ACIN 7 18 XACOK ACIN 7 18 XACOK
-INE1 8 17 RT -INE1 8 17 RT
+INE1 9 16 -INE3 +INE1 9 16 -INE3
OUTC1 10 15 FB123 OUTC1 10 15 FB123
OUTD 11 14 CTL SEL 11 14 CTL
-INC1 12 13 +INC1 -INC1 12 13 +INC1
（FPT-24P-M03） （FPT-24P-M03）

Figure 2 Pin Assignments for QFN28 (MB39A125) Figure 4 Pin Assignments for QFN28 (MB39A126)

（TOP VIEW） （TOP VIEW）

XACOK

XACOK
-INE3

-INE3
VCC

OUT

VCC

OUT
CS

VH

CS

VH
RT

RT

28 27 26 25 24 23 22 28 27 26 25 24 23 22

N.C 1 21 FB123 N.C 1 21 FB123

GND 2 20 CTL GND 2 20 CTL
+INC2 3 19 +INC1 +INC2 3 19 +INC1
N.C 4 18 N.C N.C 4 18 N.C
-INC2 5 17 -INC1 -INC2 5 17 -INC1
OUTC2 6 16 OUTD OUTC2 6 16 SEL
+INE2 7 15 N.C +INE2 7 15 N.C
8 9 10 11 12 13 14 8 9 10 11 12 13 14
-INE2

ACOK

VREF

ACIN

-INE1

+INE1

OUTC1

-INE2

ACOK

VREF

ACIN

-INE1

+INE1

OUTC1

（LCC-28P-M11） （LCC-28P-M11）

26 FIND Vol.23 No.2 2005

 New Products MB39A125/MB39A126

the system can be attained by setting up the optional loop gain to the OUTC1 terminal.
through a connection of the capacitor and the feedback resistor
from the FB123 terminal to the −INE3 terminal. Current Detection Amplifier Block (Current Amp2)
The current detection amplifier (Current Amp2) detects the
Current Detection Amplifier Block (Current Amp1) voltage drop occurring at both ends of the output sense resistor
The current detection amplifier (Current Amp1) detects the (Rs2) by the charging current at the ＋INC2 and −INC2 terminals
voltage drop occurring at both ends of the output sense resistor and then outputs a signal with 20 times amplification to the
(Rs1) by the charging current at the ＋INC1 and −INC1 OUTC2 terminal.
terminals and then outputs a signal with 20 times amplification

Figure 5 Block Diagram (MB39A125)

IIN
to System

RS2

ACIN ACOK XACOK

7 5 18

＜ ACComp. ＞

＋
-INE1
8 −
1.4 V
OUTC1 ＜ CurrentAmp 1 ＞ VREF
10
+INC1
A 13 ＋
×20 ＜ ErrorAmp 1 ＞ 0.2 V ＜ UVComp. ＞
B 12 −
-INC1 − ＋
＋ −

+INE1 -INC1
9 （Vo）
Chg_ctr -INE2 VCC
VIN 4 ＜ PWMComp. ＞ 21

OUTC2 ＋
（8 to 25 V） ＜ CurrentAmp 2 ＞
2 ＜ ErrorAmp 2 ＞ −
＜ OUT ＞
+INC2 OUT A B
24 ＋ − Drive 20
×20
1 − ＋
-INC2 ICHG
3 −2.5 V
+INE2
−1.5 V VH RS1 Battery
15 19
FB123 （VCC
VH − 6 V）
Bias
＜ ErrorAmp 3 ＞ Voltage
R1 -INE3
16 −
＋
R2
11 4.2 V ＜ UVLO ＞
OUTD
VREF
UVLO

＜ SOFT ＞ 4.2 V
VREF Slope bias VCC
Control
10μA
＜ OSC ＞ CTL
500 kHz Max ＜ REF ＞ ＜ CTL ＞ 14
CS
Cs 22
CT VREF
（45 pF） 5.0 V
（24 pins）
17 6 23
RT VREF GND
RT

2005 No.2 FIND Vol.23 27

 New Products MB39A125/MB39A126

PWM Comparator Block (PWM Comp.) Output Block (OUT)

It is the voltage pulse-width modulator that controls the The output circuit has a totem-pole-type construction and is
output duty according to the output voltage for error amplifiers capable of driving an external Pch MOS FET. The output“L”level
(ErrorAmp1, ErrorAmp2, and ErrorAmp3). It compares the sets the output amplitude to 6V (Typ.) by using the voltage
triangular wave voltage generated at the triangular wave generated at the bias voltage block (VH). This will increase the
oscillator and the error amplifier output voltage, and turns ON conversion efficiency and enable suppression of the external
,
the external output transistor when the triangular wave voltage transistor s withstand voltage even under a wide range of input
is lower. voltage.

Figure 6 Block Diagram (MB39A126)

IIN
to System

RS2

ACIN ACOK XACOK

7 5 18

＜ ACComp. ＞

＋
-INE1
8 −
1.4 V
OUTC1 ＜ CurrentAmp 1 ＞ VREF
10
+INC1
A 13 ＋
×20 ＜ ErrorAmp 1 ＞ 0.2 V ＜ UVComp. ＞
B 12 −
-INC1 − ＋
＋ −

+INE1 -INC1
9 （Vo）
Chg_ctr -INE2 VCC
VIN 4 ＜ PWMComp. ＞ 21

OUTC2 ＋
（8 to 25 V） ＜ CurrentAmp 2 ＞
2 ＜ ErrorAmp 2 ＞ −
＜ OUT ＞
+INC2 OUT A B
24 ＋ − Drive 20
×20
1 − ＋
-INC2 ICHG
3 −2.5 V
+INE2
−1.5 V VH RS1 Battery
15 19
FB123 （VCC
VH − 6 V）
Bias
R1 ＜ ErrorAmp 3 ＞ Voltage
-INE3
16 −
R2 ＋

4.2 V/3.15 V ＜ UVLO ＞

VREF
UVLO

SEL
11
Hi：4Cell 4.2 V
Lo：3Cell ＜ SOFT ＞
VREF Slope bias VCC
Control
10μA
＜ OSC ＞ CTL
500 kHz Max ＜ REF ＞ ＜ CTL ＞ 14
CS
Cs 22
CT VREF
（45 pF） 5.0 V
（24 pins）
17 6 23
RT VREF GND
RT

28 FIND Vol.23 No.2 2005

 New Products MB39A125/MB39A126

Power-Supply Control Block (CTL) Table 1 CTL Functions (MB39A125)

The product enters standby status by setting the CTL terminal CTL Power OUTD
to“L”level (maximum power-supply voltage at standby 10μA). L OFF (standby) Hi-Z
Tables 1 and 2 present the CTL functions.
H ON (in operation) L

Bias Voltage Block (VH)

Table 2 CTL functions (MB39A126)
This block outputs Vcc-6V (Typ.) as the minimum potential
of the output circuit. The same potential as Vcc is output on CTL Power

standby. L OFF (standby)

H ON (in operation)
■ Protective Circuit Functions
Undervoltage Lockout Circuit Block (UVLO) Table 3 Functions under Protection Circuit (UVLO) Operation (MB39A125)
The transit state at normal power (VCC) startup and The logics of the following terminals are fixed when UVLO operates
momentary drops in the power-supply voltage or internal (VREF voltage is lower than the UVLO threshold voltage):
reference voltage (VREF) may induce malfunction in the control OUTD OUT CS ACOK XACOK
IC and lead to system deterioration or destruction. To prevent Hi-Z H L Hi-Z L
such malfunctions, the undervoltage lockout (UVLO) circuit
detects the voltage levels in the internal reference voltage to fix Table 4 Functions under Protection Circuit (UVLO) Operation (MB39A126)
the OUT terminal at“H”level. The system restores itself once The logics of the following terminals are fixed when UVLO operates
the internal reference voltage exceeds the threshold voltage of (VREF voltage is lower than the UVLO threshold voltage):
the undervoltage lockout circuit. OUT CS ACOK XACOK
Tables 3 and 4 present the functions under the protective circuit H L Hi-Z L
(UVLO) operation.
Table 5 Functions under Protection Circuit (UV Comp.) Operation (MB39A125)
Low Input Voltage Detection Block (UV Comp.)
The logics of the following terminals are fixed when UV Comp. operates
This block detects when the power-supply voltage (VCC) is (VCC voltage is lower than the UV Comp. threshold voltage):
lower than ＋0.2 V (Typ.) and fixes the OUT terminal to“H” OUTD OUT CS
level. The system restores itself once the power-supply voltage L H L
exceeds the threshold voltage of the AC adapter detection block.
Tables 5 and 6 present the functions under the protective circuit
Table 6 Functions under Protection Circuit (UV Comp.) Operation (MB39A126)
(UV Comp.) operation.
The logics of the following terminals are fixed when UV Comp. operates
(VCC voltage is lower than the UV Comp. threshold voltage):
■ Detective Function OUT CS
AC adapter voltage detection block (AC Comp.)
H L
The AC adapter voltage detection block (AC Comp.) detects
when the ACIN terminal voltage falls to 1.3 V (Typ.) or lower,
Table 7 Functions under Detection Circuit (AC Comp.) Operation
and sets the ACOK terminal, which is the output terminal for
the AC adapter voltage detection block to Hi-Z, and output ACIN ACOK XACOK

“L”level to the XACOK terminal. When the CTL terminal is H L Hi-Z

set to “L”level both the ACOK terminal and the XACOK L Hi-Z L
terminal are fixed to Hi-Z.
Table 7 presents the functions under the protective circuit (AC Table 8 SEL Functions
Comp.) operation.
SEL DC/DC output setting voltage

H 16.8V
■ Switching Function: MB39A126
L 12.6V
This enables to set charging voltage up to 16.8V / 12.6V
using SEL terminal. Table 8 presents the SEL functions. ✱

2005 No.2 FIND Vol.23 29