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Definition
Chapter 4
• Most signals we want to process are analog
• i.e.: they are continuous and can take an
Converters inifinity of values

x(t)

Definition Conversion process

• Digital systems require discrete digital data 3 steps:

• ADC converts an analog information into a • Sampling
digital information • Quantification
• Coding

These operations are all performed in a same

Analog ? Digital Digital System element: the A to D Converter

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Conversion process: Sampling Conversion process: Quantification

The signal can only take determined values
Belonging to a range of conversion (ΔVr)
• Digital system works with discrete states
• Based on number of bit combinations that the
• The signal is only defined at determined times converter can output
• The sampling times are proportional to the • Number of possible states:
sampling period (Ts) N=2n where n is number of bits
• Resolution: Q= ΔVr/N
x(t) xs(t)
xs(t) xq(t)
Ts
Q
x(t) xs(t=k*Ts) ΔVr

Ts t t
Ts

Conversion process: Coding Accuracy

• Assigning a unique digital word to each sample

The accuracy of an ADC can be improved by
• Matching the digital word to the input signal
increasing:
• The sampling rate (Ts)
• The resolution (Q)
xq(t)
N-1
N-2

Q
ΔVr
2
1
0

t
Ts

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Accuracy Sampling rate

xq(t)
Nyquist-Shannon theorem: Minimum
Q sampling rate should be at least twice the
highest data frequency of the analog signal
fs>2*fmax
t
Ts

Higher Sampling rate Higher Resolution

xq(t) xq(t)

t t
Ts

Sampling rate ADC vs DAC

•Analog signals are composed of an infinity of
harmonics
•Need to limit the frequency band to its useful part
•Use of an analog filter

Analog Analog
Filter
Analog ADC Digital

In practice: fs ≈ (3…5)*ffilter

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 Types of ADCs

• Flash
• Integrating (Single & Dual slope converter)
• Successive approximation converter
• Sigma-delta ADC
Flash ADC

• “parallel A/D”
• Uses a series of
comparators
• Each comparator
compares Vin to a
different reference
voltage, starting w/
Vref = 1/2 lsb
 Comparator & Priority Encoder

VIN
+ VOUT
VREF -

If Output
VIN > VREF High
VIN < VREF Low

Comparator is one use of an Op-Amp

 Flash ADC………

• It works by comparing the input voltage of the analog

signal to a reference voltage, which would be the
maximum value achieved by the analog signal. For
example, if the reference voltage is of 5 volts, this
means that the peak of the analog signal would be 5
volts. On an 8-bit ADC when the input signal reached 5
volts we would find a 255 (11111111) value on the
ADC output, i.e. the maximum possible value.
 Flash ADC

Advantages Disadvantages
• Very fast • Needs many parts
(255 comparators
for 8-bit ADC)
• Lower resolution
• Expensive
• Large power
consumption
 Op-Amp Introduction
• There are two inputs
– inverting and non-inverting
• And one output
• Also power connections

divot on pin-1 end

V+

2 7
inverting input  6
output
non-inverting input +
3 4

V

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 Inverting amplifier example

• Applying the rules: “” terminal at “virtual ground”

• so current through R1 is If = Vin/R1
• Current does not flow into op-amp (one of our rules)
• so the current through R1 must go through R2
• voltage drop across R2 is then IfR2 = Vin(R2/R1)
• So Vout = 0  Vin(R2/R1) = Vin(R2/R1)
• Thus we amplify Vin by factor R2/R1
• negative sign earns title “inverting” amplifier
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 Summing Amplifier
Rf
R1
V1


R2
Vout
V2 +

• Much like the inverting amplifier, but with two

input voltages
• inverting input still held at virtual ground
• I1 and I2 are added together to run through Rf
• so we get the (inverted) sum: Vout = Rf(V1/R1 + V2/R2)
• if R2 = R1, we get a sum proportional to (V1 + V2)
• Can have any number of summing inputs
• we’ll make our D/A converter this way
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 Integrator (Low-pass filter)
C

R
Vin 
Vout
+

• If = Vin/R, so C·dVcap/dt = Vin/R

• and since left side of capacitor is at virtual ground:
dVout/dt = Vin/RC
• so

• and therefore we have an integrator (low pass)

What will be the expression for Vout if Vin is a DC?

 Comparator: Symbol & Transfer
Characteristics
Vin
Vout
Vref

Vout Vout

VH VH

Vin Vin
0 Vref 0 Vref
VL VL

Ideal transfer characteristic Practical transfer characteristic

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Basic Ccomparator Circuits
 Comparator with ZERO reference
 Comparator with NON ZERO reference
Vout
+V
Vin +Vsat
Vout
Vin
0
-V
-Vsat
a) Comparator with zero
reference b) Input/output response

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Comparator with NON ZERO reference
+V Vout

R1 +V
Vref +Vsat
Vout
R2 Vin
Vref
-Vsat

R2 •When Vin > Vref, Vout is High (+Vsat)

Vref  (V )
R1  R2 •When Vin < Vref, Vout is Low (-Vsat)
Integrating Type Analog to Digital Converters (ADC)

Typical waveforms of integrating ADC

 Integrating ADC (Single slope)
• The basic idea behind the single-slope, referred to as
an integrating ADC is as follows:

• Here an op-amp circuit is configured as an integrator

to generate a ramp waveform which is then
compared against the analog input by a comparator.

• The time it takes for the ramp waveform to exceed

the input signal voltage level is measured by means
of a digital counter clocked with a precise-frequency
square wave (usually from a crystal oscillator). The
basic schematic diagram is shown here:
Advantages and disadvantages of
Integrating type ADCs
• The integrating ADC is a high-resolution converter, ranging from 12
bits and up.
• These ADCs are highly linear. Essentially, the input is compared to an
integrated reference voltage to determine the output, so the
linearity will be based on the precision of the comparator.
• There are relatively few components used to implement these
devices, thus the circuitry is relatively simple and low-cost to
produce.

The main drawback of the integrating ADC is the slow conversion speed.
As will be discussed, the output can take as long as 2N clock cycles to
convert a single value!
 Single slope….
• The integrator produces a sawtooth waveform on its output,
from zero to the maximum possible analog voltage to be
sampled, set by -Vref.
• The minute the waveform is started, the counter starts
counting from 0 to (2^n-1).
• When the voltage found at Vin is equal to the voltage
achieved by the triangle waveform generated by the
integrator, the control circuit captures the last value
produced by the counter, which will be the digital
correspondent of the analog sample being converted.
Problems with Single Slope ADC
• The accuracy of Single-slope ADC depends on
• Linearity of the ramp generator
• Stability of clock frequency
• Response of the comparator
Dual-slope ADC
Dual Slope ADC
• The Dual Slope Integrating ADC is divided into three
phases:
• Phase I is the Auto zero phase: switches are set to
zero out the integrator capacitor and prepare device
to integrate signal
• Phase II is the signal integrate phase: Signal is
integrated for a predetermined # of clock pulses
• Phase III is the reference integrate phase: A
reference signal is applied to the integrator and
integrated down while clock pulses are counted
 Dual Slope operation
Phase I Phase II Phase III

VA/RC×t1=

In dual slope type ADC, the integrator generates two different ramps,
one with the known analog input voltage VA and another with a
known reference voltage –Vref. Hence it is called a s dual slope A to
D converter.

The Dual Slope Integrating ADC charges a capacitor for a fixed amount
of time, then discharge while counting output bits.
 Dual slope operation

Vref/RC×t2=-VA/RC×t1
∴t2=-t1×VA/Vref
∴VA=-Vref×t1/t2
 Dual Slope converter

Advantages Disadvantages

• Input signal is • Slow

averaged • High precision
• Greater noise external components
immunity than other required to achieve
ADC types accuracy
• High accuracy
Analog-to-Digital Conversion Methods

The successive approximation ADC:

1. Starting with the MSB, each bit in the successive approximation
register (SAR) is activated and tested by the digital-to-analog converter
(DAC). Vout
DAC
2. After each test, the DAC
produces an output voltage that
D0
represents the bit.
D1 Parallel
3. The comparator compares Comparator D2
binary
– output
this voltage with the input Input + D3
signal. If the input is larger, signal (MSB) (LSB)
the bit is retained; otherwise D
SAR Serial
binary
it is reset (0). output
CLK C

The method is fast and has a fixed conversion time for all inputs.
 DAC vs. ADC Vmax

DAC: x0
n digital inputs for digital encoding d x1
DAC
analog input for Vmax …
a
analog output a Xn-1

ADC:

Given a Vmax analog input and an analog input a, how does the
converter know what binary value to assign to d in order to
satisfy the ratio?
• may use DAC to generate analog values for comparison with a
• ADC “guesses” an encoding d, then checks its guess by inputting d
into the DAC and comparing the generated analog output a’ with
original analog input a
• How does the ADC guess the correct encoding?

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Purpose
• To convert digital values to analog voltages
• Performs inverse operation of the Analog-to-Digital Converter (ADC)
•
VOUT  Digital Value

Reference Voltage

Digital Value DAC Analog Voltage

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DACs
• Types
• Binary Weighted Resistor
• R-2R Ladder

• Characteristics
• Comprised of switches, op-amps, and resistors
• Provides resistance inversely proportion to significance of
bit
Binary Representation
SET CLEARED
Most
Significant Bit

Least
-VREF Significant Bit

( 1 1 1 1 )2 = ( 15 )10
Binary Weighted Resistor
• “Weighted Rf = R
Resistors” based
on bit I
i

• Reduces current
by a factor of 2 R 2R 4R 8R Vo
for each bit
MSB

LSB

-VREF

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Binary Weighted Resistor
• Result:
 B3 B2 B1 B0 
 I  VREF  R  2 R  4 R  8R 
 B2 B1 B0 
VOUT  I  R f  VREF  B3    
 2 4 8 
• Bi = Value of Bit i

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Binary Weighted Resistor
• More Generally:
Bi
VOUT  VREF 
2 n i 1
 VREF  Digital Value  Resolution
• Bi = Value of Bit i
• n = Number of Bits

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R-2R Ladder
VREF
MSB

LSB

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R-2R Ladder
• The less significant the bit, the more resistors the signal must
pass through before reaching the op-amp
• The current is divided by a factor of 2 at each node

LSB MSB

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R-2R Ladder
• The current is divided by a factor of 2 at each node
• Analysis for current from (001)2 shown below
I0 I0 I0
2 4 8
R R R 2R
R 2R 2R 2R

I0
B2 Op-Amp input
VREF B1 “Ground”

B0  VREF VREF
I0  
2 R  2 R 2 R 3R 34
R-2R Ladder
• Result:
VREF  B2 B1 B0 
I    
3R  2 4 8 
Rf  B2 B1 B0 
VOUT  VREF    
R  2 4 8 
• Bi = Value of Bit i

Rf

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R-2R Ladder
• Same input switch setup as Binary Weighted Resistor DAC
• All bits pass through resistance of 2R

VREF
MSB

LSB
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R-2R Ladder
• If Rf = 6R, VOUT is same as Binary Weighted:
VREF Bi
I
3R
 2 n i
Bi
VOUT  VREF 
2 n i 1
• Bi = Value of Bit i

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Pros & Cons

Binary Weighted R-2R

Only 2 resistor values
Easier implementation
Pros Easily understood
Easier to manufacture
Faster response time

Limited to ~ 8 bits
Large # of resistors
Cons Susceptible to noise More confusing analysis
Expensive
Greater Error
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 Digital to Analog Converters

• Performance Specifications

• Common Applications

Presented by: Mark Hunkele

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 Digital to Analog Converters
-Performance Specifications

• Resolution
• Reference Voltages
• Settling Time
• Linearity
• Speed
• Errors

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 Digital to Analog Converters
-Performance Specifications
-Resolution

• Resolution: is the amount of variance in output

voltage for every change of the LSB in the digital input.
• How closely can we approximate the desired output
signal(Higher Res. = finer detail=smaller Voltage
divisions)
• A common DAC has a 8 - 12 bit Resolution

VRef
Resolution  VLSB  N N = Number of bits
41 2
 Digital to Analog Converters
-Performance Specifications
-Resolution

Poor Resolution(1 bit) Better Resolution(3 bit)

Vout Vout
Desired Analog Desired Analog signal
signal
111

110 110

8 Volt. Levels
2 Volt. Levels

101 101

100 100

011 011

010 010

001 001

0 0 000
000

Digital Input Approximate Digital Input

Approximate 42
output output
 Digital to Analog Converters
-Performance Specifications
-Reference Voltage
• Reference Voltage: A specified voltage used to determine how each
digital input will be assigned to each voltage division.
• Types:
• Non-multiplier: internal, fixed, and defined by manufacturer
• Multiplier: external, variable, user specified

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 Digital to Analog Converters
-Performance Specifications
-Reference Voltage

Non-Multiplier: (Vref = C) Multiplier: (Vref = Asin(wt))

Voltage Voltage

11
11
10 10
10 10

01 01
01 01

0 0
00 00 00 00
Digital Input Digital Input

Assume 2 44
bit DAC
 Digital to Analog Converters
-Performance Specifications
-Settling Time

• Settling Time: The time required for the input signal voltage to settle
to the expected output voltage(within +/- VLSB).
• Any change in the input state will not be reflected in the output state
immediately. There is a time lag, between the two events.

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 Digital to Analog Converters
-Performance Specifications
-Settling Time

Analog Output Voltage

+VLSB
Expected
Voltage -VLSB

Time
Settling time
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 Digital to Analog Converters
-Performance Specifications
-Linearity
• Linearity: is the difference between the desired analog output and
the actual output over the full range of expected values.
• Ideally, a DAC should produce a linear relationship between a digital
input and the analog output, this is not always the case.

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