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CSE 231L Lab Report 6

The report summarizes an experiment on decoders and multiplexers. It introduces decoders and multiplexers, explaining that decoders are used to decode binary information into outputs while multiplexers are used to combine multiple input signals into a single output channel. The report describes implementing decoders and multiplexers using logic gates and performing an experiment to observe their functions.
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100% found this document useful (2 votes)
969 views

CSE 231L Lab Report 6

The report summarizes an experiment on decoders and multiplexers. It introduces decoders and multiplexers, explaining that decoders are used to decode binary information into outputs while multiplexers are used to combine multiple input signals into a single output channel. The report describes implementing decoders and multiplexers using logic gates and performing an experiment to observe their functions.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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MarkLab

Report
[15)
Engineering Obtained
Mark
Obtained
Simulation
(5]
RSITY UNIV Computer
North
South
University
LAB
REPORT-
06 and

Decoders
and
Multiplexers
Decoders.
2211513642
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2122343642 2212923042
2212623042
Multiplexers
OW & (Azz)
KN K 1999 SOUTH Electrical
ID Razzak
to
Introduction 2023 05 Abdur
Lab 2023 Number:
of May
Dhar
Department Logic May IslamGhoshAlam Md.
Hossain
231L 15
Group Tashriful Dr. Pritthika
Digital 08 Submission: Hasan Rafawat
1.Sazid
CSE Name: Date: members:
Group Kumar Instructor:
06Lab
Number: Nifat
Code:Title: by Md. Joy Syed Md.
To:
Experiment
Section: Experiment
08 SubmittedName
2. 3. 4. 5.
Submitted
CourseCourse of Course
Date
Deeodorg be fonwards ohanasingle
cotions
to systems
mltipees. ks
to a signals pi
in
Mutiplazing
the 3 is ehann ine. matuor a ap
Ovl
& 'MUx",
and
Mulbipleers tal tte digitad digital other
igi eation
output
usingof a gnals tansmited
cations
of as im ous
operatHons gates). mliple
logie know eommuni vau
funetons le used
to der). sing eommuni
input
Muiplen).
(NoT gates. alsoalows in
Irodueion
eoneat
of intena es many
dneuits. th
qat Deeo
plenen,single a eommonly aa used
Imveter to tale to
logieanalye ANDOR
Line that thy eed
2-Imput
Input (3:1) multi input amd aso
about
the digital 3:%
oe mullipla
sigrals
-Undorstnd
theof Hen 3- daviee of Muiplyes
Namma digitul
logie ae
Qnd A0440737432
Traie
Boand
1[e24138
74151 A
Muipleen;
one salectedeomputers
Implament transmited une.
They
Espoumants Aporahusi leetonie
salets
|Objeetive Leann seUVe
-Ob
De
eo
da Ie 1e lx1e
LxIe -WiresTheony
-1x2x a
It the oS
- - - -
ealme Shot by Legend_ T.JOY
Such as n digitu audio amâ video Sytem, ohere multi ple
ba trams mtto
data ahamels need to lo0 over a mited

bandwidth.
A bloek diagram and truth table for a 4:1 Mlipleer
C4 input and i output) is givam laalou:

I,
I 4:1
MUX

S; S

1 1

I
1
utput Eqyaton:
Y-L.s(5 + I,s(s.+ S,S, + I3sSo

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realme GT NEØ2 2023 05 22 13:15
Deaode: A deco dor is a igital eleetronie deviee tat talkes
an înput eode amd proues one or mone outputs based
Dn the input eode .Deeo ders Commony used in
digital systems sueh as Computers, eommuieaion systens
K mulhmedia dovieos to doaode sata amd perform vai ous
openations.
deeo dor,
The most eommon type of decoder is a biary
oieh nhas n input imes and 2 output ines.Bimay
deto dors ane usad to decode leimay ata, sueh as digitel
|Signols Par manoty addusses.Eaeh înput Une of a
bimany daeoden neprusent a binay digit &the corespohliy
output ire is sat to a logieal louo (D) tor the înput
eode that matehes the înput inas e all otther output inas
e st to a logieoal gh ).

1
2

3×8 3
2 dLROderL 4
5
Cireuit Diagnam:

S
S

Vee I4 Is I, I So Si S

74LS151

Pinout of 1e74151

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realme GT NEO2|2023 05 22 13:15
Yo Y
A 10 74138
D2 G2A 620 G

A B G2A G2B G1 Y7 GND


SELE&T ENABLE 1
OUTPUT

Expeimal Proeo dwre:


4:1 Multipleex usina basi e dogie gatesi
1, Finst eomplete tha truth table tor the givan eqution,
we
F(AB,) = (0,2,3, 6)
2. Than, dsker mine the inputs far I, to I, using Qe shont
table mathod, Aften tot we stt to buld tte in euit
shown in the inet dagrarn
3. Atter that we test the praeti eal owput ith te
theoneti eal output of the data table.
Implemantaion of a Boo leam tuneion using 8:4 Mulkiplexe
given
1.Finst, we eompleted the truth table. for the
equahon F(A, B,D) -(1,2, 3, 6,9, 12 ,13)on Table F. 2.1,
2. Them aqain using a table mathod we datermn te
inputs for Io to Ia,In this ease ue use A,0 as
salection înputs S,, S, S. naspa tivaly. Than we dhao the
Ie dagnam with pim d i a datails in figwe F. 2.1
3. Affer that we folloo ouwr droun figura F.2.1 6&
build the cinet. Than oc test o ou eieit
with the thonati cal output from tabla. F2.1

Analyaing the bahavion of a 3to 8 Line Deco dor (1< 4133):


1. First, we give the aomaion as shown in the Figwe
of Pin diagnam B3.
2. Then, we give the eonetion kigh to G1 and too to

3.Then we connat the input A, B,e to


he pin 1,2,3
Taspetively
4. Thern w2 testo t inct and wúte don the output
value om Tabl F31.

Simwaion :
Ataehes

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2023 05 22 13:15
Experimantal Data Tabla

Experomenal Data (Gmplamentirg a Boo lasn fneien


fumeion using a 4:1 MUx)
A B
F (Thaorheal) Data Tabla

1 1
I 1
1 1

1
I, =0
1

1 1 1

1 1,

Table E.1 .1

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Experimantal Data (Tmplamening a Boo laam funtion using an 8:1 MUX L)
A B FCTheoretieal) Data Inputs

1 1
1
1

1
1

1
1
I,:D
4

1 1
1 1
1 1 1
I 1

Table F.2.1

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ealme GT
NEO 2 2023 05 22 13:16
tSva

GND
LED

Figwe F.2.1

Experimntal Data (3 to 8 Line Deeodr)


Erable Seleet nput Outputs
Inputs
A Yo Y Y Y3 Y4 Ys Yo Y
Xt
ttt X H
H H t H H H
X
I ttItI
HHt IH
LL L
L L H HH H|H
H HH H
L L H|L
H| H H H H
L
L L|L HHI H HH
L LH| t H|H LH H
H
H t H
H H H H HL
H L

Table F.3.1

e Shot by Legend T.JOY


b23 O522 13:16
Rasuls:
As the ouput data mat ehed wtthe th theorei eal dato
on table F.1.1, we say teat we sueeesstuly
build a muliplaxer usbng the basi e logie gates, Also,
Dwr 8:1 Mutipler's output matehe oi th the theoratical
vdue of the aiven Boo laam funtion, imaly,frorn the
3 to &-ine daeo e we found that tha docp do daesdas

the bimary um her whn both o2A and G2B


to louo and Gi is sat to high,& daeo dor hahaves ike
an aative louo do coder.

Luesion &Answers (EA):


E.L: Sinlation attoehad with tho eport,

E2: Ie diagram ton the implamertation of the folaing


tuneion using Ie 74S1
Eq uation: FA,B, D) =I(1,2,3, 6, 9, 12,43)
Sala etion Inputs re A,,D.
Table:

B 2 3
B 4 S 14 o

Lnputs

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realme GT NEO2 2023 05 22 13:16
Diagram:

hND
LED

AB eD

E3:
The torms "aetive-kigh" and"aetive -louo' ane used to deseuba.
the bahavion of digital eletro nie deviees oith respeet
to thain input &otpt signas.
Aeive 'High: An ative high doviee gives output as high
Voltage (); if there are multiple cutput pins, otters
pin oill give tow vollaqe otput.
Aehive. LouJ; Active lous deviee giues output as ca low
voltage ((0) ; o if there re multiple outputs pins, others
pin will giue wighen volta ge output.
In a deeo dar Ie, the output sigros ae usualy
active louo , maani ng they ane at a logieal- loo level
ohan the eoespondimg input eode is dete ted, The
output signals ae typically conmated to oth
om po nents in a ig tal systam, sueh as a mneny
hip on a mù co contno lor, to emable te dor des) no
fumehon.
It's impontant to mote that the maufaetuer
speeies a do co dor's Ie's acHve-igh oon ache-lo
haraeuishes and ís usually inicated in the
data sheat, hen desuqning a digi tol system, tts
essemil to use the
the ap propru ate type of deeo der tt
matches the logie lavel rog uiremats ot te
sytem.
Diseussi oni Afte completing thase three
we completely undor stoe d the ezperiment
amd do eodor,We l e t about coneept of MudiMultiplaxar
the Logie behinds a
miple and learn to buld mulhiplaer oith basie
Logi e gates.we also learnt to tmplemant digi tal togie
Sunetions ujng multiple
We also obsarwed the behavien
of a 3 to ine de eo dor. We eam also implenot a
Booleam funeion using deco dr with the halp of some
AND Gates (for aetiv2 lo de eo der) , As bafone, in
tis
aqain taee problams oith the NOT Ie.
we

Its always ash duwingq ez peri mants. Af ter


Suceessfuly bult out n uits .we batts al so taee
problems oith muiplaze, We know
2nabe
by input gh, but auk ow mutiplener oll
multiplezer
enabling on low imput, Finally oe eomplete ou
was

emperime nt suee ssfully

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realme GT NEO 2 2023 05 22 13:16
Department of Electrical &Computer Engineering, NSU Digital Logic Design Lab

F. Data Sheet: Instructor's Signature:


Group: 0S Date: 0%/0S /202 3
Section: 3 Report:

F.IExperimental Data (Implementing a Boolean function using a 4:1 MUX):


A B C F (Theoretjeal) Data Inputs F (Practical)
0 0
0 -ooo
0
Io =

0
Ii= 4
0 1

1 0
b= 0
0

1 1

Table F.1.1

function using an 8:1 MUX IC):


F.2 Experimental Data (Implementing a Boolean
D F(Theoretical) Data Inputs F(Practical)
A
a"---|----- oB - |
0
0 1
1 D
I|=
0 0 1 1
1 L=
0 1
1 1 0
I,= D
0 1

L4 = D
1 0 1
1 0 1 I5 = D
1

1 0

1 1 0
0
I, = 1
1

Table F.2.1

ita harz
08/05/03
Page 5 of 6
Lab-5
EEE21 1L/ETE2 1 IL

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Department of Electrical &Computer Engineering, NSU Digital Logic Design Lab

LEp

74151

3404

Figure F.2.1

F.3 Experimental Data (3 to 8 Line Decoder):

Enable Outputs
Select Inputs
Inputs
G2 C B A Yo Y Y2 Y3 Y4 Y5 Y6 Y7
G1
X X X H H H H
X H
H H H H H H H
X X X X
H
H L L L
H L L H L
H L H L
H L L H H
H H L L H
H H L
H
H L H
H H H H

Table F.3.1
ralbik Dhare
I1/05/23
Bonus-|
Lab-5 Page 6 of 6
EEE211L/ETE211IL
B::

Name:Sazid
Hasan:
2211513642
ID:
Group:
05::

Ime
Shot by Legend T.JOY.
ne GT NEO 2 -2023 05 22 13:17
D

Group: 5:Name:
2122343642:
Lab6::
1D:

Md.

Rafawat

Islam

Ime Shot by Legend T.JOY


ne GT NEC:2 2023 Ö5 2213:17
BO A
O

13 2 I1

Group: 05ID:Name:
2211424642

Joy
Kumar

Ghosh
ID:2212623042.Name:

Syed

TAshriful

Alam.

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ealme GT NEO 2 2023 05 22 13:18
11 10
13 12

HOSSAIN
2212923042ID:
Group: 05
NIFAT
MD.

D D D

KB/St:0.00
L:0.00 KB/s

ENG
US

023

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