0% found this document useful (0 votes)
32 views

New H-Bridge Multilevel Current-Source PWM Inverter With Reduced Switching Device Count

This document summarizes a research paper presented at the 2010 International Power Electronics Conference about a new circuit configuration for a multilevel current-source inverter (CSI) that reduces the number of switching devices. The proposed topology connects an H-bridge CSI with current-cell circuits to generate intermediate level output currents. This reduces the number of isolated gate drive circuits and inductors needed compared to previous multilevel CSI topologies. Computer simulations and experimental results demonstrate the feasibility of the proposed multilevel CSI to generate multilevel current waveforms with low harmonics and small inductors.

Uploaded by

Rodovar
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
32 views

New H-Bridge Multilevel Current-Source PWM Inverter With Reduced Switching Device Count

This document summarizes a research paper presented at the 2010 International Power Electronics Conference about a new circuit configuration for a multilevel current-source inverter (CSI) that reduces the number of switching devices. The proposed topology connects an H-bridge CSI with current-cell circuits to generate intermediate level output currents. This reduces the number of isolated gate drive circuits and inductors needed compared to previous multilevel CSI topologies. Computer simulations and experimental results demonstrate the feasibility of the proposed multilevel CSI to generate multilevel current waveforms with low harmonics and small inductors.

Uploaded by

Rodovar
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 8

The 2010 International Power Electronics Conference

New H-Bridge Multilevel Current-Source PWM


Inverter with Reduced Switching Device Count
Suroso*,**, and Toshihiko Noguchi***
* University of Jenderal Soedirman, Purwokerto, Jawa Tengah 53122, Indonesia
** Nagaoka University of Technology, Nagaoka, Niigata 940-2188, Japan
*** Shizuoka University, Hamamatsu, Shizuoka 432-8561, Japan

Abstract--This paper introduces a novel circuit loops to control the AC current, which is indispensable in
configuration of multilevel current-source inverter (CSI) the VSI. Its output current is less dictated by the grid
that has many steps with fewer power switches. In this new voltage. Moreover, the discrete diodes connected in series
topology, an H-bridge CSI is connected with current-cell with the power switches to obtain unidirectional power
circuits working to generate the intermediate level currents
switches used in CSI will be unnecessary in the very near
of multilevel current waveform. Using the proposed topology,
the switching power device count, isolated gate drive circuits future because reverse-blocking IGBTs are emerging [5].
and inductor conduction losses can be reduced. Moreover, in A few topologies of the multilevel CSIs have been
order to reduce the inductor size of the multilevel CSI, proposed by researchers and engineers. A conventional
chopper based DC current sources are presented. Five-level method to generate the multilevel current waveforms is
and seven-level PWM inverter configurations are examined by paralleling some H-Bridge CSIs as shown in Fig. 1
through computer simulations. Furthermore, an which is the dual circuit of a cascade multilevel VSI
experimental prototype of a five-level CSI is setup and is [6]-[8]. However, the requirement of isolated DC current
tested. The results show that the circuit works properly to sources, a large number of power switching devices and
generate the multilevel output current waveform with low
their gate drive circuits are fatal drawbacks brought by
harmonic currents and small inductors which proves
feasibility of the proposed multilevel CSI. this configuration. Another topology of the multilevel
CSI was proposed by applying a multicell topology of the
Index Terms--current-source inverter, gate drive circuit, multilevel CSI (or a multi-rating inductor multilevel CSI
H-Bridge, multilevel. [6]), which is the dual converter of a flying capacitor
multilevel VSI [9]-[11]. This topology is shown in Fig. 2.
I. INTRODUCTION Control complexity for balancing control of the
In general, the inverter topologies can be classified intermediate level currents is a problem of this topology.
into voltage source inverters (VSI) and their dual circuits, Some control methods have been proposed for balancing
i.e., current source inverters (CSI) [1]. The VSI has a DC control of the intermediate level currents in [10] and [11],
voltage power source and generates AC voltage but very large in size of the intermediate inductors (100
waveforms to the load, while the CSI delivers AC current mH) are still used. These cumbersome inductors will be
waveforms from a DC current source to the load. The costly and limit the application of the inverter. Reference
latter features high capability of short-circuit protection [6] presented the configuration of single-rating inductor
because of its high impedance DC power source. cell multilevel CSI, which is the dual structure of
Compared with the conventional two-level inverters, improved diode-clamped multilevel CSI. The circuit
multilevel inverters have various advantages such as configuration of a five-level single-rating inductor cell
lower dv/dt or lower di/dt, and less distorted output CSI is shown in Fig. 3. Both multicell and single-rating
waveforms resulting in reduction of output filter size [2]. inductor cell topologies use very large intermediate
In distributed power generation applications, as most inductors added in the inverter circuit to obtain the
renewable energy sources, such as photovoltaic system, intermediate level currents instead of the smoothing
deliver DC power, the generated power is fed into the grid inductor used for DC current source generation. These
through a grid connected inverter. Various international intermediate inductors will give additional losses to the
standards, like IEEE-1547, IEEE-929 and EN-61000-3-2, inverter instead of losses caused by the main smoothing
impose requirements on output power quality of the inductor and power devices. The more intermediate
inverters, such as harmonic currents and total harmonics inductors will cause the lower efficiency of the multilevel
distortion (THD) of the output current [3], [4]. Multilevel CSI.
CSI is a key solution to tackle such problems. Control of In this paper, a new configuration of the multilevel
the grid connected CSI is comparatively simpler than VSI, CSI with fewer switches, reduced gate drive circuits and
as CSI can buffer the output from grid voltage fluctuation, small inductors, are presented. The operation
generates a predetermined magnitude of the current to the performance of the proposed multilevel CSI is examined
grid and can achieve a high power factor operation [3], through computer simulations and laboratory
[4]. A grid connected CSI doesn’t need current minor experiments.

978-1-4244-5393-1/10/$26.00 ©2010 IEEE 1228


The 2010 International Power Electronics Conference

II. CIRCUIT CONFIGURATION AND PRINCIPLE 4) Current level –I/2: Q1 and Q3 are turned off, while
OPERATION Q2, Q4 and Q5 are turned on, making the current
A. Operation Principle of Inverter Circuit –I/2 flows to the load.
5) Current level -I: Q1, Q3 and Q5 are turned off, while
Fig. 4 shows the configuration of a proposed Q2 and Q4 are turned on, making the current –I
current-cell circuit and its operation principle. The flows to the load.
current-cell is composed by a current source,
unidirectional power switch and a connecting diode. The
newly proposed configuration of the multilevel CSI is
obtained by connecting the H-Bridge CSI and a single or
more current-cells as shown in Fig. 5. The current-cells
work generating intermediate level currents for multilevel
output current waveform generation. The number of the
DC current sources is n, which is equal to the number of
the smoothing inductors in the circuit. The amplitudes of
the parallel DC current sources in the proposed multilevel
CSI are I/n, which are smaller than the amplitude of the
DC current source in three-level H-Bridge CSI.
Furthermore, all DC current sources are connected at the
same point, which make the isolated DC current sources
used in the conventional circuits are no longer necessary
in this topology. The DC current source generation will
be explained in detail in the next section.
A five-level CSI is obtained by connecting a single Fig. 1. Five-level paralleled H-Bridge CSI
current-cell, a seven-level CSI configuration is achieved
by connecting two current-cells with the H-Bridge CSI,
and so forth. The relation between the level number of
the output current waveform (M), and the number of the
current-cell circuits (N) can be expressed as the equation
below:
M = 3 + 2N . (1)
As can be seen in the proposed configuration of the
M-level CSI in Fig. 5, the power switches Q3, Q4, and
the power switches of the current-cell circuits Q5 to Qk
are connected at the common-emitter point or at the same Fig. 2. Five-level multicell CSI
potential level. Hence, no matter how many current-cells
are connected, the whole circuit needs only three isolated
gate drive circuits. Two isolated gate drive circuits are
used to drive switches Q1 and Q2, and one to drive Q3,
Q4, Q5 to Qk.
Fig. 6 shows an example of a five-level CSI
configuration. The switching state combinations required
to generate a five-level current waveform are listed in
TABLE I. The more detailed operation modes for
five-level output current generation is shown in Figs. 7(a)
to (e). The required five-level output current (+I, +I/2, 0,
-I/2 and -I current-levels) are generated as follows: Fig. 3. Five-level single-rating inductor cell CSI
1) Current level +I: Q2, Q4 and Q5 are turned off,
while Q1 and Q3 are turned on, making the current
+I flow to the load. The two DC current sources are
summed up to fed the load.
2) Current level +I/2: Q2 and Q4 are turned off, while
Q5 is turned on, making the current +I/2 flows to the
load. The current-cell is circulating its current.
3) Current level 0: Q1, Q4, and Q5 are turned on, and
Q2 and Q3 are turned off making the current loops
for every DC current sources. No current flows to the
load. (a) (b)
Fig. 4. (a) Proposed current-cell circuit, (b) Typical output current
waveform

1229
The 2010 International Power Electronics Conference

(a) Current +I

Fig. 5. Proposed configuration of multilevel CSI

(b) Current +I/2

Fig. 6. Proposed five-level CSI

TABLE I
SWITCH STATES OF FIVE-LEVEL CSI
Q1 Q2 Q3 Q4 Q5 Output current
1 0 1 0 0 +I
1 0 1 0 1 +I/2
1 0 0 1 1 0
0 1 0 1 1 -I/2
0 1 0 1 0 -I

(c) Current 0
To probe the reduction in component numbers
achieved by proposed configuration, TABLE II presents
the number of the components required to implement a
newly proposed five-level CSI, and three other topologies
previously defined. In the table, the number of the
inductors includes the inductors used to generate the DC
current sources and the intermediate current levels. As
can be found in the table, the proposed five-level CSI has
the most significant advantage over other conventional
CSIs in every aspect.
B. DC Current Source Circuit (d) Current –I/2

In the proposed multilevel CSI, the DC current sources


are indispensable. In order to test the proposed
configuration of the multilevel CSI, a DC current source
is obtained by employing a DC voltage source fed
chopper as shown in Figs. 8 and 9. The chopper works as
a regulated DC current source for the inverter and the
current-cell circuits. The chopper simply consists of a
controlled power switch, a smoothing inductor and a free
wheeling diode. The chopper switch functions regulating
the DC current flowing through the smoothing inductor,
and reducing the smoothing inductor size, owing to the (e) Current –I
high-switching-frequency operation. Free-wheeling diode Fig. 7. Five-level output current generation

1230
The 2010 International Power Electronics Conference

TABLE II TABLE III


COMPARISON BETWEEN FOUR TYPES OF FIVE-LEVEL CSI CONDUCTION LOSSES OF THE SMOOTHING INDUCTORS
Multilevel Multicell Paralleled Single Proposed Inverter circuit Conduction losses of the
CSI Type multilevel H-bridge rating Multilevel smoothing inductors
CSI CSI inductor CSI Three-level H-Bridge CSI 2
cell CSI PLc − 3 = I RL
Power Five-level CSI 1 2 P
switches 8 8 8 5 PLc−5 = I RL = Lc −3
Diodes 8 8 8 6 2 2
Inductors 3 2 5 2 Seven-level CSI 1 P
Isolated PLc−7 = I 2 RL = Lc−3
gate drive 3 3
circuits 4 6 4 3 Nine-level CSI 1 2 P
PLc−9 = I RL = Lc −3
4 4

(DF) is used to keep continuous current flowing through


the smoothing inductor. For M level CSI with N
current-cells, if the amplitude of M-level output current is
I, the current flowing through each smoothing inductor
ILN is expressed as
I . (2)
I LN =
( N + 1)
If the smoothing inductor has resistance RL, the
inductor conduction losses (PLc) caused by this current is
expressed as
2
Fig. 8. CSI with chopper based DC current source § I ·
PLc = ¨ ¸ RL . (3)
© N +1¹
The total conduction losses due to the inductors in a
M-level CSI (PLc-M) can be expressed as
2
§ I ·
PLc −M = ¦ ¨ ¸ RL . (4)
© N +1¹
For five-level CSI, the current amplitude flowing
through the smoothing inductors is half the amplitude of
the five-level output current. For seven-level CSI
configuration, the amplitude of the smoothing inductor
currents is one third of the amplitude of seven-level
output current, and so forth. The higher the level-number
of the output current leads the smaller currents flowing
through the smoothing inductors as expressed in (2).
Fig. 9. Current-cell with chopper based DC current source Therefore, the total conduction losses of the smoothing
inductors can be effectively reduced as shown in Fig 10
and TABLE III. The total conduction losses of the
inductors for five-level CSI (PLc-5) is half the inductor
conduction losses of the three-level H-Bridge CSI (PLc-3).
The total inductor conduction losses of the seven-level
CSI (PLc-7) is one third of the inductor conduction losses
of the three-level H-Bridge CSI, and so forth.
Figs. 11 and 12 show the configurations of a five-level
and a seven-level CSIs with chopper based DC
current-sources. It should be noted that only a single DC
voltage source (Vin) is connected to the choppers to
obtain multiple DC current-sources. The DC voltage
source can be a photovoltaic system, a fuel-cell, a battery
system or a rectifier.
C. Chopper Controller and PWM Modulation Strategy
Fig. 10. Conduction losses characteristics of smoothing inductors

1231
The 2010 International Power Electronics Conference

In the proposed five-level CSI, proportional integral TABLE IV


(PI) regulators are independently applied to regulate the TEST PARAMETERS
DC currents flowing through the smoothing inductors L1 Smoothing inductors 1 mH
and L2. The amplitude of the smoothing inductor current Power source voltage 160 V
is 50 % of the peak value of the five-level current Switching frequency 22 kHz
waveform. The switching gate signals of the chopper Filter capacitor 5 μF
switches are generated by comparing the current error
Load R = 6.5 Ω , L =1.2 mH
signals after passing through the PI regulator with a
triangular waveform. These signals are used to adjust Output current frequency 60 Hz
duty cycles of the chopper switches to achieve the
balanced and stable DC current sources IL1 and IL2.
In order to obtain a better output current waveform
with low distortion, a pulse width modulation (PWM)
technique is applied, instead of a staircase waveform
operation. The staircase waveform can easily be obtained
in terms of the fundamental switching frequency, so
switching losses can be negligibly reduced. However,
more distortion of the output waveform is generated and
a larger filter is needed as a result.
In this paper, a level-shifted multi-carrier based
sinusoidal PWM technique is employed to generate the
gate signals for the CSI power switches to obtain the
PWM current waveforms as shown in Fig. 13. All carrier
waveforms are in phase with each other at an identical
frequency. The frequency of the modulated signal (a
reference sinusoidal waveform) determines the
Fig. 11. Chopper based DC current sources of five-level CSI with a
fundamental frequency of the output current waveform, single current-cell
while the frequency of triangular carrier waves gives the
switching frequency of the CSI power switches. An
M-level output current waveform using this modulation
requires M-1 triangular carriers with the same frequency
[12]. Fig. 14 shows an overall control diagram of the
proposed five-level CSI including the chopper and
inverter circuit controllers.
III. COMPUTER SIMULATION RESULTS
In order to test the proper operation of the proposed
multilevel CSI topology, the five-level and the
seven-level CSI configurations shown in Figs. 11 and 12
are tested by using computer simulations with a PSIM
software. The test parameters are listed in TABLE IV. Fig.
15(a) shows the computer simulation result of the
proposed five-level CSI, where the five-level and the load
current waveforms are presented. Fig. 15(b) shows the Fig. 12. Chopper based DC current sources of seven-level CSI with two
current waveforms flowing through the smoothing current-cells
inductors L1, L2 respectively. The amplitudes of the DC
current sources are well balanced for both smoothing
inductors IL1, IL2 at 50 % of the output current peak
value.
Fig. 16(a) shows another computer simulation result of
the proposed seven-level CSI showing the seven-level
and the load current waveforms. Fig. 16(b) shows the
currents flowing through the smoothing inductors L1, L2
and L3. The amplitudes of the smoothing inductor
currents IL1, IL2, and IL3 are one third of the current of 8
A. As indicated in every simulation result, the proper
operation of the proposed multilevel CSI has been
confirmed.

Fig. 13. Multi-carrier based sinusoidal PWM

1232
The 2010 International Power Electronics Conference

[2] J. Rodiguez, J. S. Lai, and F. Z. Peng, “Multilevel inverter:


a survey of topologies, controls, and application,” IEEE
Trans. on Industrial Electronics,” vol. 49, no. 4, p.p.
724-738, August 2002.
[3] P. G. Barbosa, H. A. C. Braga, M. C. Barbosa, and E. C.
Teixeria, “Boost current multilevel inverter and its
application on single phase grid connected photovoltaic
system,” IEEE Trans. on Power Electronic, vol. 21, no. 4,
p.p. 1116-1124, July 2006.
[4] R. T. H. Li, H. S. Chung and T. K. M. Chan, “An active
modulation technique for single-phase grid connected
CSI,” IEEE Trans. on Power Electronic, vol. 22, p.p.
1373-1380, July 2007.
[5] C. Klumpner, and F. Blaajerg, “Using reverse blocking
IGBTs in power converters for adjustable-speed drives,”
IEEE Trans. on Inductry Applications, vol. 42, no. 3, p.p.
807-816, May/June 2006.
[6] Z H. Bai, Z. C. Zhang, “Conformation of multilevel
Fig. 14. Control diagram of five-level CSI current source converter topologies using the duality
principle, IEEE Trans. on Power Electronic, vol. 23, p.p.
2260-2267, September 2008.
IV. EXPERIMENTAL TEST RESULTS
[7] S. Kwak, and H. A. Toliyat, “Multilevel converter
In order to verify and to prove feasibility of the topology using two types of current-source inverters,”
proposed multilevel CSI configuration experimentally, a IEEE Trans. on Inductry Applications, vol. 42, p.p.
laboratory prototype of the five-level CSI was 1558-1564, November/December 2006.
constructed with IXFK90N30 power MOSFETs in series [8] D. Xu, N.R. Zargari, B. Wu, J. Wiseman, B. Yuwen and S.
with DSEI120-06A fast recovery diodes. The Rizzo, “A medium voltage AC drive with parallel current
implemented circuit specifications are identical with the source inverters for high power application, in Proc. of
computer simulation parameters listed in TABLE IV. The IEEE PESC2005, p.p. 2277-2283.
control circuits were configured using analog Op-Amps [9] F. L. M. Antunes, A. C. Braga, and I. Barbi, “Application
of a generalized current Multilevel cell to current source
and logic ICs. The opto-isolator based gate drive circuits inverters,” IEEE Trans. on Power Electronic,” vol. 46,
are used in the prototype. As described before, only three no.1, p.p. 31-38, February 1999.
isolated gate drive circuits are required to drive all the [10] J. Y. Bao, D. G. Holmes, Z. H. Bai, Z. C. Zhang and D. H.
power MOSFETs of the inverter. Xu, “PWM control of a 5-level single-phase current-source
Fig. 17(a) shows the experimental waveforms of the inverter with controlled intermediate DC link current, in
proposed five-level CSI, i.e., showing the five-level and Proc. of IEEE PESC2006, p.p. 1633-1638.
load current waveforms for modulation index of 0.95. As [11] B. P. McGrath, and D. G. Holmes, “Natural current
shown in the figure, a low distorted sinusoidal load Balancing of Multicell Current Source Inverter,” IEEE
Trans. on Power Electronic, vol. 23, no. 3, p.p. 1239-1246,
current waveform is observed after filtering by a small May 2008.
5-μF filter capacitor, which is connected in parallel with [12] B. Wu, High Power Converters and AC Drives, IEEE
the load. The measured THD value of the five-level Press 2006, Chap. 10.
PWM current waveform is 2.6 %. Fig. 17(b) shows the
current waveforms flowing through the 1 mH smoothing
inductors L1, and L2. The experimental result shows that
the prototype multilevel CSI works properly generating a
five-level PWM output current waveform. All of the
experimental waveforms agree very well with those of
the computer simulation results.
V. CONCLUSION
In this paper a new circuit configuration of a multilevel
CSI applying an H-bridge and current-cells has been
proposed. Using the proposed multilevel CSI, a low
distortion of output current with fewer power switches,
reduced gate drive circuits and smaller inductors has been
achieved. Validity of the proposed topology has been
confirmed through computer simulations and
experimental tests.
REFERENCES
[1] S. D. Freeland, “Techniques for the practical application of
duality to power circuits, IEEE Trans. on Power
Electronic, vol. 7, p.p. 374-384, April 1992.

1233
The 2010 International Power Electronics Conference

(a) Five-level and load currents (a) Seven-level and load currents

(b) Smoothing inductor currents IL1 and IL2 (b) Smoothing inductor currents IL1, IL2 and IL3
Fig. 15. Simulation result of five-level CSI Fig. 16. Simulation result of seven-level CSI

1234
The 2010 International Power Electronics Conference

(a) Five-level and load currents

(b) Smoothing inductor currents IL1 and IL2


Fig. 17. Experimental result of five-level CSI

1235

You might also like