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Coa 2020

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0% found this document useful (0 votes)
15 views

Coa 2020

Ok

Uploaded by

Mirror Leech
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Reg No. Course Name: COMPUTER ORGANISATION AD Max. Marks: 100 2 3 4 Ho) ») 6 a) ») 7.3) by 8 9 10 u 12 ay ») APJ ABDUL KALAM TECHNOLOGICAL UNIVERSITY Fourth semester B.Tech examinations (S), September 2020 Course Code: C202 (D ARCHITECTURE (CS, IT) PART A Answer all questions, each carries 3 marks What is meant by zero- address instruction? Design 2x2 array multiplier. Autoincrement mode is useful for accessing data items in successive memory locations. Justify the statement. Draw the flowchart for Booth’s Multiplication algorithm, PART B Answer any two questions, each carries 9 marks How the byte addresses are assigned across word? Explain the execution ofa complete instruction, Specify the actions needed to exeeute the instruction Move (RI), R2 ‘What isthe role of processor stack in subroutine call and return? Explain restoring method of division with the help of a flow chart, Compare and contrast single bus and multiple bus organization of processor. PART C Answer all question, each carries 3 marks ‘What is the function of interrupt-service routine? How the time involved in polling process is reduced in interrupted /0? Write notes on synchronous DRAM. Hlustrate LRU cache replacement algorithm, PART D Answer any two questions, each carries 9 marks Differentiate the data transfer in programmed I/O and interrupt driven VO Write about the DMA controller registers that are accessed by the processor to initiate data transfer. Page 1 of 2 Duration: 3 Hours @ (3) a O) @) @) @) @) @) 6) “ a) b a ») a) » a) » 02000€8202052001 Differentiate between associative mapping and set associative mapping. Illustrate the operation of the Small Computer System Interface bus, Describe different types of ROM ‘A computer system uses 32-bit memory addresses and it has a main memory consisting of 1G bytes, It has a 4K-byte cache organized in the set-associative manner, with 4 blocks per set and 64 bytes per block. Calculate the number of bits in each of the Tag, Set, and Word fields of the main memory address. PARTE Answer any four questions, each carries 10 marks What are conditional control statements? Represent the following conditional control statement by two register transfer statements with control functions. I(P=1) then (RL = R2) else if (O=I) then (Rl R3) Write notes on status register Explain horizontal and vertical micro instructions, with suitable examples. Explain how control signals are generated in one flip flop per state control logic with the help of a diagram ‘Outline the organisation of a full processor unit showing the control inputs to all components. Show with the help of an example, how an instruction is implemented by giving necessary control inputs to different parts of the processor. IMlustrate the basic arithmetic microoperations in a 4 bit ALU with the help of a parallel adder. Explain with the help of an example how control signals are generated using hardwired control Describe the purpose of microprogram sequencing. How is it earried out? Page 2 of 2 6) a «) “

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