8085 is pronounced as "eighty-eighty-five" microprocessor.

It is an 8-bit microprocessor
designed by Intel in 1977 using NMOS technology.
It has the following configuration −

 8-bit data bus

 16-bit address bus, which can address upto 64KB
 A 16-bit program counter
 A 16-bit stack pointer
 Six 8-bit registers arranged in pairs: BC, DE, HL
 Requires +5V supply to operate at 3.2 MHZ single phase clock
It is used in washing machines, microwave ovens, mobile phones, etc.

8085 Microprocessor – Functional Units

8085 consists of the following functional units −
Accumulator
It is an 8-bit register used to perform arithmetic, logical, I/O & LOAD/STORE operations.
It is connected to internal data bus & ALU.
Arithmetic and logic unit
As the name suggests, it performs arithmetic and logical operations like Addition,
Subtraction, AND, OR, etc. on 8-bit data.
General purpose register
There are 6 general purpose registers in 8085 processor, i.e. B, C, D, E, H & L. Each
register can hold 8-bit data.
These registers can work in pair to hold 16-bit data and their pairing combination is like
B-C, D-E & H-L.
Program counter
It is a 16-bit register used to store the memory address location of the next instruction to
be executed. Microprocessor increments the program whenever an instruction is being
executed, so that the program counter points to the memory address of the next
instruction that is going to be executed.
Stack pointer
It is also a 16-bit register works like stack, which is always incremented/decremented by
2 during push & pop operations.
Temporary register
It is an 8-bit register, which holds the temporary data of arithmetic and logical
operations.
Flag register
It is an 8-bit register having five 1-bit flip-flops, which holds either 0 or 1 depending upon
the result stored in the accumulator.
These are the set of 5 flip-flops −

 Sign (S)
 Zero (Z)
 Auxiliary Carry (AC)
 Parity (P)
 Carry (C)
Its bit position is shown in the following table −

D7 D6 D5 D4 D3 D2 D1 D0

S Z AC P CY

Instruction register and decoder

It is an 8-bit register. When an instruction is fetched from memory then it is stored in the
Instruction register. Instruction decoder decodes the information present in the
Instruction register.
Timing and control unit
It provides timing and control signal to the microprocessor to perform operations.
Following are the timing and control signals, which control external and internal circuits
−

 Control Signals: READY, RD’, WR’, ALE

 Status Signals: S0, S1, IO/M’
 DMA Signals: HOLD, HLDA
 RESET Signals: RESET IN, RESET OUT
Interrupt control
As the name suggests it controls the interrupts during a process. When a
microprocessor is executing a main program and whenever an interrupt occurs, the
microprocessor shifts the control from the main program to process the incoming
request. After the request is completed, the control goes back to the main program.
There are 5 interrupt signals in 8085 microprocessor: INTR, RST 7.5, RST 6.5, RST
5.5, TRAP.
Serial Input/output control
It controls the serial data communication by using these two instructions: SID (Serial
input data) and SOD (Serial output data).
Address buffer and address-data buffer
The content stored in the stack pointer and program counter is loaded into the address
buffer and address-data buffer to communicate with the CPU. The memory and I/O
chips are connected to these buses; the CPU can exchange the desired data with the
memory and I/O chips.
Address bus and data bus
Data bus carries the data to be stored. It is bidirectional, whereas address bus carries
the location to where it should be stored and it is unidirectional. It is used to transfer the
data & Address I/O devices.

8085 Architecture
We have tried to depict the architecture of 8085 with this following image −

Addressing Modes in 8085

These are the instructions used to transfer the data from one register to another
register, from the memory to the register, and from the register to the memory without
any alteration in the content. Addressing modes in 8085 is classified into 5 groups −
Immediate addressing mode
In this mode, the 8/16-bit data is specified in the instruction itself as one of its
operand. For example: MVI K, 20F: means 20F is copied into register K.
Register addressing mode
In this mode, the data is copied from one register to another. For example: MOV K, B:
means data in register B is copied to register K.
Direct addressing mode
In this mode, the data is directly copied from the given address to the register. For
example: LDB 5000K: means the data at address 5000K is copied to register B.
Indirect addressing mode
In this mode, the data is transferred from one register to another by using the address
pointed by the register. For example: MOV K, B: means data is transferred from the
memory address pointed by the register to the register K.
Implied addressing mode
This mode doesn’t require any operand; the data is specified by the opcode itself. For
example: CMP.

Interrupts in 8085
Interrupts are the signals generated by the external devices to request the
microprocessor to perform a task. There are 5 interrupt signals, i.e. TRAP, RST 7.5,
RST 6.5, RST 5.5, and INTR.
Interrupt are classified into following groups based on their parameter −
 Vector interrupt − In this type of interrupt, the interrupt address is known to the
processor. For example: RST7.5, RST6.5, RST5.5, TRAP.
 Non-Vector interrupt − In this type of interrupt, the interrupt address is not
known to the processor so, the interrupt address needs to be sent externally by
the device to perform interrupts. For example: INTR.
 Maskable interrupt − In this type of interrupt, we can disable the interrupt by
writing some instructions into the program. For example: RST7.5, RST6.5,
RST5.5.
 Non-Maskable interrupt − In this type of interrupt, we cannot disable the
interrupt by writing some instructions into the program. For example: TRAP.
 Software interrupt − In this type of interrupt, the programmer has to add the
instructions into the program to execute the interrupt. There are 8 software
 interrupts in 8085, i.e. RST0, RST1, RST2, RST3, RST4, RST5, RST6, and
RST7.
 Hardware interrupt − There are 5 interrupt pins in 8085 used as hardware
interrupts, i.e. TRAP, RST7.5, RST6.5, RST5.5, INTA.
Note − NTA is not an interrupt, it is used by the microprocessor for sending
acknowledgement. TRAP has the highest priority, then RST7.5 and so on.
Interrupt Service Routine (ISR)
A small program or a routine that when executed, services the corresponding
interrupting source is called an ISR.
TRAP
It is a non-maskable interrupt, having the highest priority among all interrupts. Bydefault,
it is enabled until it gets acknowledged. In case of failure, it executes as ISR and sends
the data to backup memory. This interrupt transfers the control to the location 0024H.
RST7.5
It is a maskable interrupt, having the second highest priority among all interrupts. When
this interrupt is executed, the processor saves the content of the PC register into the
stack and branches to 003CH address.
RST 6.5
It is a maskable interrupt, having the third highest priority among all interrupts. When
this interrupt is executed, the processor saves the content of the PC register into the
stack and branches to 0034H address.
RST 5.5
It is a maskable interrupt. When this interrupt is executed, the processor saves the
content of the PC register into the stack and branches to 002CH address.
INTR
It is a maskable interrupt, having the lowest priority among all interrupts. It can be
disabled by resetting the microprocessor.
When INTR signal goes high, the following events can occur −
 The microprocessor checks the status of INTR signal during the execution of
each instruction.
 When the INTR signal is high, then the microprocessor completes its current
instruction and sends active low interrupt acknowledge signal.
 When instructions are received, then the microprocessor saves the address of
the next instruction on stack and executes the received instruction.

8086
8086 Microprocessor is an enhanced version of 8085Microprocessor that was designed
by Intel in 1976. It is a 16-bit Microprocessor having 20 address lines and16 data lines
that provides up to 1MB storage. It consists of powerful instruction set, which provides
operations like multiplication and division easily.
It supports two modes of operation, i.e. Maximum mode and Minimum mode. Maximum
mode is suitable for system having multiple processors and Minimum mode is suitable
for system having a single processor.

Features of 8086
The most prominent features of a 8086 microprocessor are as follows −
 It has an instruction queue, which is capable of storing six instruction bytes from
the memory resulting in faster processing.
 It was the first 16-bit processor having 16-bit ALU, 16-bit registers, internal data
bus, and 16-bit external data bus resulting in faster processing.
 It uses two stages of pipelining, i.e. Fetch Stage and Execute Stage, which
improves performance.
 Fetch stage can prefetch up to 6 bytes of instructions and stores them in the
queue.
 Execute stage executes these instructions.
 It has 256 vectored interrupts.
 It consists of 29,000 transistors.
8086 Microprocessor is divided into two functional units, i.e., EU (Execution Unit)
and BIU (Bus Interface Unit).

EU (Execution Unit)
Execution unit gives instructions to BIU stating from where to fetch the data and then
decode and execute those instructions. Its function is to control operations on data
using the instruction decoder & ALU. EU has no direct connection with system buses as
shown in the above figure, it performs operations over data through BIU.
Let us now discuss the functional parts of 8086 microprocessors.
ALU
It handles all arithmetic and logical operations, like +, −, ×, /, OR, AND, NOT operations.
Flag Register
It is a 16-bit register that behaves like a flip-flop, i.e. it changes its status according to
the result stored in the accumulator. It has 9 flags and they are divided into 2 groups −
Conditional Flags and Control Flags.
Conditional Flags
It represents the result of the last arithmetic or logical instruction executed. Following is
the list of conditional flags −
 Carry flag − This flag indicates an overflow condition for arithmetic operations.
 Auxiliary flag − When an operation is performed at ALU, it results in a
carry/barrow from lower nibble (i.e. D0 – D3) to upper nibble (i.e. D4 – D7), then
this flag is set, i.e. carry given by D3 bit to D4 is AF flag. The processor uses this
flag to perform binary to BCD conversion.
 Parity flag − This flag is used to indicate the parity of the result, i.e. when the
lower order 8-bits of the result contains even number of 1’s, then the Parity Flag
is set. For odd number of 1’s, the Parity Flag is reset.
 Zero flag − This flag is set to 1 when the result of arithmetic or logical operation
is zero else it is set to 0.
 Sign flag − This flag holds the sign of the result, i.e. when the result of the
operation is negative, then the sign flag is set to 1 else set to 0.
 Overflow flag − This flag represents the result when the system capacity is
exceeded.
Control Flags
Control flags controls the operations of the execution unit. Following is the list of control
flags −
 Trap flag − It is used for single step control and allows the user to execute one
instruction at a time for debugging. If it is set, then the program can be run in a
single step mode.
 Interrupt flag − It is an interrupt enable/disable flag, i.e. used to allow/prohibit the
interruption of a program. It is set to 1 for interrupt enabled condition and set to 0
for interrupt disabled condition.
 Direction flag − It is used in string operation. As the name suggests when it is
set then string bytes are accessed from the higher memory address to the lower
memory address and vice-a-versa.
General purpose register
There are 8 general purpose registers, i.e., AH, AL, BH, BL, CH, CL, DH, and DL.
These registers can be used individually to store 8-bit data and can be used in pairs to
store 16bit data. The valid register pairs are AH and AL, BH and BL, CH and CL, and
DH and DL. It is referred to the AX, BX, CX, and DX respectively.
 AX register − It is also known as accumulator register. It is used to store
operands for arithmetic operations.
 BX register − It is used as a base register. It is used to store the starting base
address of the memory area within the data segment.
 CX register − It is referred to as counter. It is used in loop instruction to store the
loop counter.
 DX register − This register is used to hold I/O port address for I/O instruction.
Stack pointer register
It is a 16-bit register, which holds the address from the start of the segment to the
memory location, where a word was most recently stored on the stack.
BIU (Bus Interface Unit)
BIU takes care of all data and addresses transfers on the buses for the EU like sending
addresses, fetching instructions from the memory, reading data from the ports and the
memory as well as writing data to the ports and the memory. EU has no direction
connection with System Buses so this is possible with the BIU. EU and BIU are
connected with the Internal Bus.
It has the following functional parts −
 Instruction queue − BIU contains the instruction queue. BIU gets upto 6 bytes of
next instructions and stores them in the instruction queue. When EU executes
instructions and is ready for its next instruction, then it simply reads the instruction
from this instruction queue resulting in increased execution speed.
 Fetching the next instruction while the current instruction executes is
called pipelining.
 Segment register − BIU has 4 segment buses, i.e. CS, DS, SS& ES. It holds the
addresses of instructions and data in memory, which are used by the processor
to access memory locations. It also contains 1 pointer register IP, which holds the
address of the next instruction to executed by the EU.
o CS − It stands for Code Segment. It is used for addressing a memory
location in the code segment of the memory, where the executable
program is stored.
o DS − It stands for Data Segment. It consists of data used by the program
andis accessed in the data segment by an offset address or the content of
other register that holds the offset address.
o SS − It stands for Stack Segment. It handles memory to store data and
addresses during execution.
o ES − It stands for Extra Segment. ES is additional data segment, which is
used by the string to hold the extra destination data.
 Instruction pointer − It is a 16-bit register used to hold the address of the next
instruction to be executed.
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