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Lecture1 Chapter4 - Introduction To Combinational Circuits, Analysis of Combinational Circuits

This document discusses the analysis of combinational logic circuits. It begins by listing the chapter contents, which include combinational circuits, binary adders, decoders, encoders, and multiplexers. It then describes combinational circuits and differentiates them from sequential circuits. The document outlines the procedure for analyzing combinational circuits, which involves determining the Boolean functions of gates and outputs. An example analysis is shown, where intermediate symbols are assigned and substitutions are made to obtain the output functions. Finally, the derivation of a truth table from the logic diagram is described.

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Ayesha Hussain
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Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
29 views

Lecture1 Chapter4 - Introduction To Combinational Circuits, Analysis of Combinational Circuits

This document discusses the analysis of combinational logic circuits. It begins by listing the chapter contents, which include combinational circuits, binary adders, decoders, encoders, and multiplexers. It then describes combinational circuits and differentiates them from sequential circuits. The document outlines the procedure for analyzing combinational circuits, which involves determining the Boolean functions of gates and outputs. An example analysis is shown, where intermediate symbols are assigned and substitutions are made to obtain the output functions. Finally, the derivation of a truth table from the logic diagram is described.

Uploaded by

Ayesha Hussain
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Chapter4: Combinational Logic

Lecture1- Analysis of Combinational Circuits


Engr. Arshad Nazir, Asst Prof
Dept of Electrical Engineering
EE-221 Digital Logic Design Fall 2023 SEECS 1
EE-221 Digital Logic Design Fall 2023 2
Objectives

• Introduction to Combinational Circuits


• Analyze Combinational Logic Circuits of Moderate
Complexity

EE-221 Digital Logic Design Fall 2023 3


Chapter Contents
Combinational Circuits
Analysis Procedure
Design Procedure
Binary Adder-Subtractor
Decimal Adder
Binary Multiplier
Magnitude Comparator
Decoders
Encoders
Priority Encoder
Multiplexers
Tri-state gates

EE-221 Digital Logic Design Fall 2023 4


EE-221 Digital Logic Design Fall 2023 5
Combinational Circuits
• Logic circuits for digital system may be combinational or sequential
➢ A combinational circuit consists of logic gates whose outputs are a
function of the current inputs
➢ Sequential circuits 1
7
o contain storage elements in addition to logic gates 3

o the outputs are a function of the current inputs and


the state of the memory (storage) elements
o The state of storage elements, in turn, is a function of
previous inputs so outputs also depend on past inputs
o They have feedback connection

EE-221 Digital Logic Design Fall 2023 6


Combinational Circuits
• For n input variables there are 2n possible binary input
combinations
• For each possible input combination there is one possible output
value
• The most important standard MSI combinational circuits (discussed
in this chapter) are adders, sub tractors, comparators, decoders/
demultiplexers, encoders, multiplexers, and tri-state gates.
• If the storage registers are included with the combinational gates
then this circuit is considered as sequential circuit

EE-221 Digital Logic Design Fall 2023 7


Analysis Procedure
• The analysis of a combinational circuit requires that we determine
function that the circuit implements
• The first step in analysis procedure is to make sure that the given
circuit is combinational and not sequential (No feedback path)
• To obtain the output Boolean function from a logic diagram we
proceed as follows
➢ Label all gate outputs that are a function of input variables with
arbitrary symbols. Determine the Boolean function for each gate
output
➢ Label the gates that are a function of input variables and
previously labeled gates with other arbitrary symbols. Find the
Boolean function of these gates
➢ Repeat the above process (step 2) until the outputs of the circuit
are obtained
➢ By repeated substitution of previously defined functions, obtain
the output Boolean functions in terms of input variables

EE-221 Digital Logic Design Fall 2023 8


Analysis Procedure-Example

EE-221 Digital Logic Design Fall 2023 9


Analysis Procedure Example
• The circuit has three binary inputs- A, B and C and two binary
outputs- F1 and F2
• The outputs of various gates are labeled with intermediate symbols
• The output of gates that are a function of input variables are T1 and
T2
• Output F2 can be easily derived from the input variables
• The Boolean function for these three outputs are:
➢ F2 = AB + AC + BC
➢ T1 = A + B + C
➢ T2 = ABC
• Next we consider output of gates that are a function of already
defined symbols
➢ T3 = F'2T1
➢ F1 = T3+T2

EE-221 Digital Logic Design Fall 2023 10


Analysis Procedure Example Cont…
• To obtain F1 as a function of A,B and C, from a series of substitutions
proceed as follows
F1 = T3+T2
= F2'T1+ABC
=(AB+AC+BC)'(A+B+C)+ABC
=(A'+B')(A'+C')(B'+C')(A+B+C)+ABC
=(A'+B'C')(AB'+AC'+BC'+B'C)+ABC
=A'BC'+A'B'C+AB'C'+ABC=∑(1,2,4,7)
• These functions F1 and F2 implement circuit of a Full-Adder (FA).
Where:
➢ F1 is the sum
➢ F2 is the carry

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Derivation of the Truth Table
• The derivation of the truth table for the circuit is a straightforward
process once the output Boolean functions are known
• To obtain the truth table directly from the logic diagram without
going through the derivations of the Boolean functions, we proceed
as follows:
➢ Determine the number of input variables in the circuit. For n
inputs, form the 2n possible input combinations and list binary
numbers from 0 to 2n – 1 in a table
➢ Label the outputs of selected gates with arbitrary symbols
➢ Obtain the truth table for the outputs of those gates that are a
function of the input variables only
➢ Proceed to obtain the truth table for the outputs of those gates
that are function of previously defined values until the columns
for all outputs are determined

EE-221 Digital Logic Design Fall 2023 12


Truth Table for Figure 4-2
• F2 equal to 1 for any combination that has 2 or 3 inputs equal to 1
• F2' is the complement of F2
• T1 and T2 are the OR and AND functions of input variables
respectively
• T3 = 1, when T1 and F2' are equal to 1
• F1 = 1, when either T2 or T3 or both are equal to 1

EE-221 Digital Logic Design Fall 2023 13


The End

EE-221 Digital Logic Design Fall 2023 14

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