Opa 743
Opa 743
OPA
OPA2743
743
OPA4743
OPA
743
OPA
743
OPA ®
743
NC 1 8 NC
OPA743
–In 2 7 V+
OPA4743
Out 1 5 V+ +In 3 6 Out
Out A 1 14 Out D
V– 2 V– 4 5 NC
–In A 2 13 –In D
+In 3 4 –In
OPA2743 SO-8, DIP-8 A D
+In A 3 12 +In D
SOT23-5 Out A 1 8 V+ V+ 4 11 V–
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Copyright © 2001, Texas Instruments Incorporated
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
www.ti.com
ABSOLUTE MAXIMUM RATINGS(1) ELECTROSTATIC
Supply Voltage, V+ to V– ................................................................. 13.2V
Signal Input Terminals, Voltage(2) ............................. (V–) –0.3V to (V+) +0.3V DISCHARGE SENSITIVITY
Current(2) .................................................... 10mA
Output Short-Circuit(3) ....................................................................................... Continuous This integrated circuit can be damaged by ESD. Texas Instru-
Operating Temperature .................................................. –55°C to +125°C ments recommends that all integrated circuits be handled with
Storage Temperature ..................................................... –65°C to +150°C appropriate precautions. Failure to observe proper handling
Junction Temperature .................................................................... +150°C
Lead Temperature (soldering, 10s) ............................................... +300°C and installation procedures can cause damage.
NOTES: (1) Stresses above these ratings may cause permanent damage. ESD damage can range from subtle performance degrada-
Exposure to absolute maximum conditions for extended periods may degrade tion to complete device failure. Precision integrated circuits
device reliability. (2) Input terminals are diode-clamped to the power supply
may be more susceptible to damage because very small
rails. Input signals that can swing more than 0.3V beyond the supply rails
should be current-limited to 10mA or less. (3) Short-circuit to ground, one parametric changes could cause the device not to meet its
amplifier per package. published specifications.
PACKAGE/ORDERING INFORMATION
PACKAGE
DRAWING PACKAGE ORDERING TRANSPORT
PRODUCT PACKAGE NUMBER MARKING NUMBER(1) MEDIA
Single
OPA743NA SOT23-5 331 D43 OPA743NA/250 Tape and Reel
" " " " OPA743NA/3K Tape and Reel
OPA743UA SO-8 182 OPA743UA OPA743UA Rails
" " " " OPA743UA/2K5 Tape and Reel
OPA743PA DIP-8 006 OPA743PA OPA743PA Rails
Dual
OPA2743EA MSOP-8 337 E43 OPA2743EA/250 Tape and Reel
" " " " OPA2743EA/2K5 Tape and Reel
OPA2743UA SO-8 182 OPA2743UA OPA2743UA Rails
" " " " OPA2743UA/2K5 Tape and Reel
OPA2743PA DIP-8 006 OPA2743PA OPA2743PA Rails
Quad
OPA4743EA TSSOP-14 357 OPA4743EA OPA4743EA/250 Tape and Reel
" " " " OPA4743EA/2K5 Tape and Reel
OPA4743UA SO-14 235 OPA4743UA OPA4743UA Rails
" " " " OPA4743UA/2K5 Tape and Reel
NOTE: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /3K indicates 3000 devices per reel). Ordering 3000
pieces of “OPA743NA/3K” will get a single 3000-piece Tape and Reel.
2
OPA743
SBOS201
ELECTRICAL CHARACTERISTICS: VS = 3.5V to 12V
Boldface limits apply over the specified temperature range, TA = –40°C to +85°C
At TA = +25°C, RL = 10kΩ connected to VS / 2 and VOUT = VS / 2, unless otherwise noted.
OPA743NA, UA, PA
OPA2743EA, UA, PA
OPA4743EA, UA
PARAMETER CONDITION MIN TYP MAX UNITS
OFFSET VOLTAGE
Input Offset Voltage VOS VS = ±5V, VCM = 0V ±1.5 ±7 mV
Drift dVOS / dT TA = –40°C to +85°C ±8 µV/°C
vs Power Supply PSRR VS = ±1.75V to ±6V, VCM = –0.25 10 100 µV/V
Over Temperature VS = ±1.75V to ±6V, VCM = –0.25 200 µV/V
Channel Separation, dc 1 µV/V
f = 10kHz 110 dB
INPUT VOLTAGE RANGE
Common-Mode Voltage Range VCM (V–) – 0.1 (V+) + 0.1 V
Common-Mode Rejection Ratio CMRR VS = ±5V, (V–) – 0.1V < VCM < (V+) + 0.1V 66 84 dB
over Temperature VS = ±5V, (V–) < VCM < (V+) 60 dB
VS = ±5V, (V–) – 0.1V < VCM < (V+) – 2V 70 90 dB
over Temperature VS = ±5V, (V–) < VCM < (V+) – 2V 70 dB
VS = ±1.75V, (V–) – 0.1V < VCM < (V+) + 0.1V 60 dB
INPUT BIAS CURRENT
Input Bias Current IB VS = ±6V, VCM = 0V ±1 ±10 pA
Input Offset Current IOS VS = ±6V, VCM = 0V ±0.5 ±10 pA
INPUT IMPEDANCE
Differential 4 • 109 || 4 Ω || pF
Common-Mode 5 • 1012 || 4 Ω || pF
NOISE
Input Voltage Noise, f = 0.1Hz to 10Hz VS = ±6V, VCM = 0V 11 µVp-p
Input Voltage Noise Density, f = 10kHz en VS = ±6V, VCM = 0V 30 nV/√Hz
Current Noise Density, f = 1kHz in VS = ±6V, VCM = 0V 2.5 fA/√Hz
OPEN-LOOP GAIN
Open-Loop Voltage Gain AOL RL = 100kΩ, (V–)+0.1V < VO < (V+)–0.1V 106 120 dB
over Temperature RL = 100kΩ, (V–)+0.125V < VO < (V+)–0.125V 100 dB
RL = 1k, (V–)+0.325V < VO < (V+)–0.325V 86 100 dB
over Temperature RL = 1k, (V–)+0.450 < VO < (V+)–0.450V 96 dB
OUTPUT
Voltage Output Swing from Rail RL = 100kΩ, AOL > 106dB 75 100 mV
over Temperature RL = 100kΩ, AOL > 100dB 100 125 mV
RL = 1kΩ, AOL > 86dB 300 325 mV
over Temperature RL = 1kΩ, AOL > 96dB 425 450 mV
Output Current IOUT |VS – VOUT| < 1V ±20 mA
Short-Circuit Current ISC ±30 mA
Capacitive Load Drive CLOAD See Typical Characteristics
FREQUENCY RESPONSE CL = 15pF
Gain-Bandwidth Product GBW G = +1 7 MHz
Slew Rate SR VS = ±6V, G = +1 10 V/µs
Settling Time, 0.1% tS VS = ±6V, 5V Step, G = +1 9 µs
0.01% VS = ±6V, 5V Step, G = +1 15 µs
Overload Recovery Time VIN • Gain = VS 200 ns
Total Harmonic Distortion + Noise THD+N VS = ±6V, VO = 1Vrms, G = +1, f = 6kHz 0.0008 %
POWER SUPPLY
Specified Voltage Range, Single Supply VS 3.5 12 V
Specified Voltage Range, Dual Supplies VS ±1.75 ±6 V
Quiescent Current (per amplifier) IQ IO = 0 1.1 1.5 mA
over Temperature 1.7 mA
TEMPERATURE RANGE
Specified Range –40 85 °C
Operating Range –55 125 °C
Storage Range –65 150 °C
Thermal Resistance θJA
SOT23-5 Surface-Mount 200 °C/W
MSOP-8 Surface-Mount 150 °C/W
TSSOP-14 Surface-Mount 100 °C/W
SO-8 Surface Mount 150 °C/W
SO-14 Surface Mount 100 °C/W
DIP-8 100 °C/W
OPA743 3
SBOS201
TYPICAL CHARACTERISTICS
At TA = +25°C, VS = ±6V, and RL = 10kΩ, unless otherwise noted.
120 120
100
100 100
80
CMRR (dB)
80 80
Phase (º)
Gain (dB)
60 60 60
40 40
40
20 20 ((V–) – 100mV) ≤ VCM ≤ (V+) – 2V
20
0 0
–20 –20 0
10 100 1k 10k 100k 1M 10M 100M 10 100 1k 10k 100k 1M
Frequency (Hz) Frequency (Hz)
V– 5
80
Amplitude (V)
PSRR (dB)
4
60 VS = ± 6V
3
40
2
20
1
0 0
10 100 1k 10k 100k 1M 10 100 1k 10k 100k 1M 10M
Frequency (Hz) Frequency (Hz)
120
1k 1k
Channel Separation (dB)
100
80 100 100
60
10 10
40
1 1
20
0 0.1 0.1
10 100 1k 10k 100k 1M 10M 0.1 1 10 100 1k 10k 100k 1M
Frequency (Hz) Frequency (Hz)
4
OPA743
SBOS201
TYPICAL CHARACTERISTICS (Cont.)
At TA = +25°C, VS = ±6V, and RL = 10kΩ, unless otherwise noted.
INPUT BIAS CURRENT (IB) vs COMMON-MODE INPUT BIAS CURRENT (IB) vs COMMON-MODE
VOLTAGE (VCM) TEMPERATURE = 25ºC VOLTAGE (VCM) TEMPERATURE = 85°C
15 500
400
10
300
VS = ±5V VS = ±5V
200
5
100
IB (pA)
IB (pA)
0 0
–100
–5 –200
–300
–10
–400
–15 –500
–6 –5 –4 –3 –2 –1 0 1 2 3 4 5 6 –6 –5 –4 –3 –2 –1 0 1 2 3 4 5 6
VCM (V) VCM (V)
10k 130
IB
RL = 100kΩ
1k
Bias Current (pA)
120
AOL (dB)
100
110
10
100
1.0
RL = 1kΩ
90
0.1
IOS
0.01 80
–50 –25 0 25 50 75 100 125 150 175 –100 –75 –50 –25 0 25 50 75 100 125 150 175
Temperature (°C) Temperature (°C)
100 80
CMRR (dB)
PSRR (dB)
90 60
(V–) ≤ VCM ≤ V+
80 40
70 20
60 0
–100 –75 –50 –25 0 25 50 75 100 125 150 175 –100 –75 –50 –25 0 25 50 75 100 125 150 175
Temperature (°C) Temperature (°C)
OPA743 5
SBOS201
TYPICAL CHARACTERISTICS (Cont.)
At TA = +25°C, VS = ±6V, and RL = 10kΩ, unless otherwise noted.
1.5 1.5
IQ per Amplitude (mA)
0.5 0.5
0.0 0.0
–100 –75 –50 –25 0 25 50 75 100 125 150 175 2 3 4 5 6 7 8 9 10 11 12 13 14
Temperature (°C) Supply Voltage (V)
40 40
Short-Circuit Current (mA)
Sourcing
Sourcing
30 30
Sinking
20 20
Sinking
10 10
0 0
–100 –75 –50 –25 0 25 50 75 100 125 150 175 2 3 4 5 6 7 8 9 10 11 12 13 14
Temperature (°C) Supply Voltage
4 25°C
THD Plus Noise (%)
Output Voltage (V)
2 0.01 RL = 1kΩ
125°C
0
125°C
–2 0.001
25°C
–4 RL = 10kΩ
–55°C
–6 0.0001
0 10 20 30 40 50 1 10 100 1k 10k 100k
Output Current (±mA) Frequency (Hz)
6
OPA743
SBOS201
TYPICAL CHARACTERISTICS (Cont.)
At TA = +25°C, VS = ±6V, and RL = 10kΩ, unless otherwise noted.
0.01%
Overshoot (%)
60
15 G = +1
50
40
10
30
20 G = +5
5
0.1% 10
0
0
10 100 1k 10k
1 10 100
Load Capacitance Value (pF)
Noninverting Gain (V/V)
25
10 20
Frequency (%)
Frequency (%)
15
5 10
0 0
–7.0
–6.0
–5.0
–4.0
–3.0
–2.0
–1.0
0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
–50
–40
–30
–20
–10
10
20
30
40
50
60
Voltage Offset (mV) Voltage Offset Drift (µV/°C)
10mV/div
100ns/div 1µs/div
NOTE: CF is used to optimize settling time.
OPA743 7
SBOS201
TYPICAL CHARACTERISTICS (Cont.)
At TA = +25°C, VS = ±6V, and RL = 10kΩ, unless otherwise noted.
2V/div
2V/div
1µs/div 1µs/div
8
OPA743
SBOS201
APPLICATIONS INFORMATION
OPA743 series op amps can operate on 1.1mA quiescent
current from a single (or split) supply in the range of 3.5V +V
to 12V (±1.75V to ±6V), making them highly versatile and IOVERLOAD
easy to use. The OPA743 is unity-gain stable and offers 10mA max
OPA743 VOUT
7MHz bandwidth and 10V/µs slew rate.
VIN
Rail-to-rail input and output swing helps maintain dynamic R
range, especially in low supply applications. Figure 1 shows V–
–6
Output (Inverted on osciloscope)
–8
20µs/div
VS = ±6V, VIN = 13Vp-p, G = +1
FIGURE 1. Rail-to-Rail Input and Output.
OPERATING VOLTAGE
OPA743 series op amps are fully specified and guaranteed
2V/div
OPA743 9
SBOS201
CAPACITIVE LOAD AND STABILITY Figure 5 shows the OPA743 in a dual supply buffered
The OPA743 series op amps can drive up to 1000pF pure reference configuration for the DAC7644.
capacitive load. Increasing the gain enhances the amplifier’s
ability to drive greater capacitive loads (see the typical REFERENCE BUFFER FOR LCD SOURCE DRIVERS
performance curve “Small Signal Overshoot vs Capacitive
Load”). In modern high resolution TFT LCD displays, gamma cor-
rection must be performed to correct for nonlinearities in the
One method of improving capacitive load drive in the unity- glass transmission characteristics of the LCD panel. The
gain configuration is to insert a 10Ω to 20Ω resistor inside typical LCD source driver for 64 Bits of Grayscale uses
the feedback loop, as shown in Figure 4. This reduces internal DAC to convert the 6-Bit data into analog voltages
ringing with large capacitive loads while maintaining DC applied to the LCD. These DAC typically require external
accuracy. voltage references for proper operation. Normally these ex-
ternal reference voltages are generated using a simple resis-
tive ladder, like the one shown in Figure 6.
Typical laptop or desktop LCD panels require 6 to 8 of the
source driver circuits in parallel to drive all columns of the
RS
20Ω panel. Although the resistive load of one internal string DAC
OPA743 VOUT is only around 10kΩ, 6 to 8 in parallel represent a very
VIN substantial load. The power supply used for the LCD source
CL RL
drivers for laptops is typically in the order of 10V. To
maximize the dynamic range of the DAC, rail-to-rail output
performance is required for the upper and lower buffer. The
OPA4743’s ability to operate on 12V supplies, to drive
heavy resistive loads (as low as 1kΩ), and to swing to within
FIGURE 4. Series Resistor in Unity-Gain Buffer Configura-
325mV of the supply rails, makes it very well suited as a
tion Improves Capacitive Load Drive.
buffer for the reference voltage inputs of LCD source drivers.
During conversion, the DAC’s internal switches create cur-
APPLICATION CIRCUITS rent glitches on the output of the reference buffer. The
The OPA743 series op amps are optimized for driving capacitor CL (typically 100nF) functions as a charge reser-
medium-speed sampling data converters. The OPA743 op voir that provides/absorbs most of the glitch energy. The
amps buffer the converter’s input capacitance and resulting series resistor RS isolates the outputs of the OPA4743 from
charge injection while providing signal gain. the heavy capacitive load and helps to improve settling time.
NC 48
NC 47
DAC7644
NC 46
NC 45
+V
VOUTA Sense 44
V–
VOUTA 43 VOUT
VREFH AB Sense 39 V+
500pF 1/2
VOUTB Sense 38 OPA2743
+2.5V Positive
Ref
VOUTB 37 VOUT Reference
–V
10
OPA743
SBOS201
VCC
GMA1
RS
1/4 20Ω
GMA2
OPA4743
CL
100nF
GMA3
GMA4
RS
20Ω
1/4
OPA4743 GMA5
CL
100nF
GMA6
RS
20Ω
1/4 GMA7
OPA4743
CL
100nF
GMA8
GMA9
RS
20Ω
1/4
OPA4743 GMA10
CL
100nF LCD Source Driver
NOTE: The actual values of RS and CL are application specific and may not be needed.
OPA743 11
SBOS201
PACKAGE OPTION ADDENDUM
www.ti.com 14-Oct-2022
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)
OPA2743EA/250 ACTIVE VSSOP DGK 8 250 RoHS & Green Call TI | NIPDAUAG Level-2-260C-1 YEAR -40 to 85 E43 Samples
OPA2743EA/2K5 ACTIVE VSSOP DGK 8 2500 RoHS & Green Call TI | NIPDAUAG Level-2-260C-1 YEAR -40 to 85 E43 Samples
OPA2743UA ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA Samples
2743UA
OPA2743UA/2K5 ACTIVE SOIC D 8 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA Samples
2743UA
OPA4743EA/250 ACTIVE TSSOP PW 14 250 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA Samples
4743EA
OPA4743UA ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 OPA4743UA Samples
OPA4743UA/2K5 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 OPA4743UA Samples
OPA743NA/250 ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 D43 Samples
OPA743NA/250G4 ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 D43 Samples
OPA743NA/3K ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 D43 Samples
OPA743NA/3KG4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 D43 Samples
OPA743UA ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA Samples
743UA
OPA743UAG4 ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA Samples
743UA
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 14-Oct-2022
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 3-Jun-2022
B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers
Sprocket Holes
Q1 Q2 Q1 Q2
Pocket Quadrants
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 3-Jun-2022
Width (mm)
H
W
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 3-Jun-2022
TUBE
T - Tube
height L - Tube length
W - Tube
width
Pack Materials-Page 3
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