Aec EEC533 Microprocessor Manual
Aec EEC533 Microprocessor Manual
PROGRAM:
Addition:
2000 LXI H,2501 Load the address of first number in H-L pair.
2003 MOV A,M Get first number in accumulator.
2004 INX H Get address of second number in H-L pair.
2005 ADD M Add two numbers.
2006 STA 2503H Store result at specified memory location.
2009 RST 5 To set Breakpoint
Subtraction:
2000 LXI H,2501 Load the address of first number in H-L pair.
2003 MOV A,M Get first number in accumulator.
2004 INX H Get address of second number in H-L pair.
2005 SUB M Subtract two numbers.
2006 STA 2503H Store result at specified memory location.
2009 RST 5 To set Breakpoint
Addition:
2000 LXI H,2501 Load the address of first number in H-L pair.
2003 MOV A,M Get first number in accumulator.
2004 INX H Get address of second number in H-L pair.
2005 ADD M Add two numbers.
2006 DAA Convert to decimal
2007 STA 2503H Store result at specified memory location.
200A RST 5 To set Breakpoint
Subtraction:
2000 LXI H,2501 Load the address of first number in H-L pair.
2003 MOV A,M Get first number in accumulator.
2004 INX H Get address of second number in H-L pair.
2005 SUB M Subtract two numbers.
2006 DAA Convert to decimal
2007 STA 2503H Store result at specified memory location.
200A RST 5 To set Breakpoint
Start
Stop
Start
EXPERIMENT 2
OBJECT: To perform addition and subtraction of two BCD numbers using 8085 microprocessor.
PROGRAM:
2000 LXI H,2501H Load the address of first number in H-L pair.
2003 MOV C,M Get first number in Register C.
2004 SUB A
2005 MOV B,A
2006 INX H
2007 ADD M
2008 DAA
2009 JNC NOF
200C PUSH PSW
200 MOV A,B
200 ADI 01H
200 DAA
MOV B,A
POP PSW
NOF: DCR C
JNZ 2006
MOV L,A
MOV H,B
OBJECT: To convert given Hexadecimal number into its equivalent ASCII number and vice versa
using 8085 instruction set.
PROGRAM:
ALGORITHM:
PROGRAM:
SUB1: CPI 0A
JC SKIP
ADI 07
SKIP: ADI 30
RET
OBSERVATION:
RESULT:
Thus the given Hex decimal number was converted into its equivalent ASCII Code.
ALGORITHM:
PROGRAM:
LDA 4500
SUI 30
CPI 0A
JC SKIP
SUI 07
SKIP: STA 4501
HLT
OBSERVATION:
Input: 4500 31
Output: 4501 0B
RESULT:
Thus the given ASCII character was converted into its equivalent Hex Value.
EXPERIMENT 2
OBJECT: Write a program using 8085 Microprocessor for addition and subtraction of two BCD
numbers.
BCD ADDITION
ALGORITHM:
1. Initialize memory pointer to data location.
2. Get the first number from memory in accumulator.
3. Get the second number and add it to the accumulator
4. Adjust the accumulator value to the proper BCD value using DAA instruction.
5. Store the answer at another memory location.
OBSERVATION:
INPUT OUTPUT
3500 3502
3501 3503
RESULT:
Thus the 8 bit BCD numbers stored at 3500 & 3501 are added and the result stored at 3502 & 3503.
BCD SUBTRACTION
ALGORITHM:
OBSERVATION:
INPUT OUTPUT
3500 3502
3501 3503
RESULT:
Thus the 8 bit BCD numbers stored at 3500 & 3501 are subtracted and the result stored at 3502 & 3503.
FLOW CHART FOR BCD ADDTION:
START
[C] 00H
[HL] 3500H
[A] [M]
[HL][HL]+1
[A][A]+[M]
Decimal Adjust Accumulator
Is there a
Carry?
[C][C]+1
[HL][HL]+1
[M] [A]
[HL][HL]+1
[M] [C]
STOP
FLOW CHART FOR BCD SUBTRACTION:
START
[D] 00H
HL 3500
B M
HL HL+ 1
C M
A 99
[A][A]+[B]
DAA
Is there a
Carry?
[D][D]+1
[HL][HL]+1
[3502] A
[3503] D
STOP
EXPERIMENT 3
OBJECT: To perform Multiplication and Division of two 8 bit numbers using 8085
PRECAUTION: Before executing the program make sure that it is entered properly.
Flow chart for multiplication 8- bit numbers
Flow chart for division of two 8-bit numbers
Division program
Stepwise procedure:
Program for binary division (successive subtraction method)
1 Program statement:
Dividend is stored a t memory location 20C2 H. The Divisor is stored a t memory location
20C3 H. Store the Quotient at 20C0 H and Remainder at memory location 20C1 H.
2 Algorithm:
1. Initialize the C register with 00H as a counter for Quotient.
2. Get dividend in Accumulator from memory.
3. Get the address of divisor.
4. Subtract the divisor from dividend.
5. If dividend is greater than divisor, Increment register C
6. Store remainder in register B for result, and repeat step 4.
7. Otherwise store the contents of accumulator as Remainder in memory location.
8. Store the content of C register as Quotient in memory.
4. Result:
EXPERIMENT 6
OBJECT: To convert given Hexa decimal number into its equivalent ASCII number and vice versa using
8085 instruction set.
PROGRAM:
SUB1: CPI 0A
JC SKIP
ADI 07
SKIP: ADI 30
RET
OBSERVATION:
RESULT: Output: 3501 34(ASCII Code for 4) Thus the given Hexa decimal number
was converted into its 3502 45(ASCII Code for E) equivalent ASCII Code.
ALGORITHM:
PROGRAM:
LDA 3000
SUI 30
CPI 0A
JC SKIP
SUI 07
SKIP: STA 3001
HLT
OBSERVATION:
Input: 3000 31
Output: 3001 0B
RESULT:
Thus the given ASCII character was converted into its equivalent Hexa Value.
EXPERIMENT 9
OBJECT: To interface DAC with 8085 to demonstrate the generation of square, saw tooth and
triangular wave.
EQUIPMENT USED: 8085 microprocessor training kit, keyboard, DAC Interface Board, CRO
THEORY:
DAC 0800 is an 8 – bit DAC and the output voltage variation is between – 5V and +
5V.The output voltage varies in steps of 10/256 = 0.04 (appx.). The digital data input and
the corresponding output voltages are presented in the Table1.
Input Output
Data in Voltage
HEX
00 - 5.00
01 - 4.96
02 - 4.92
… …
7F 0.00
… …
FD 4.92
FE 4.96
FF 5.00
Referring to Table1, with 00 H as input to DAC, the analog output is – 5V. Similarly, with FF H as input, the
output is +5V. Outputting digital data 00 and FF at regular intervals, to DAC, results in different wave forms
namely square, triangular, etc,. The port address of DAC is 08 H.
ALGORITHM:
(a) Square Wave Generation
PROGRAM:
(a) Square Wave Generation
RESULT: Thus the square, triangular and saw tooth wave form were generated by interfacing
DAC with 8085 trainer kit.
EXPERIMENT 8
OBJECT: To interface 8253 programmable interval timer to 8085 and verify the operation of 8253 in
six different modes.
EQUIPMENT USED:
The output will be initially low after mode set operation. After loading the counter, the
output will remain low while counting and on terminal count, the output will become high
until reloaded again.
Let us see the channel in mode0. Connect the CLK 0 to the debounce circuit and
execute the following program.
PROGRAM:
It is observed in CRO that the output of channel 0 is initially low. After giving ‘x’ clock
pulses, we may notice that the output goes high.
After loading the count, the output will remain low following the rising edge of the
gate input. The output will go high on the terminal count. It is retriggerable; hence the
output will remain low for the full count after any rising edge of the gate input.
The following program initializes channel 0 of 8253 in Mode 1 and also initializes triggering
of gate. OUT 0 goes low as clock pulses and after triggering it goes back to high level after
five clock pulses. Execute the program and give clock pulses through the debounce logic and
verify using CRO.
PROGRAM:
MVI A, 32H ;Channel 0 in mode 1. OUT
CEH ;
MVI A, 05H ;LSB of count. OUT
C8H
MVI A, 00H ;MSB of count. OUT
C8H
OUT DOH ;Trigger Gate 0. RST 5
It is a simple divide by N counter. The output will be low for one period of the input
clock. The period from one output pulse to next equals the number of input count in the
count register. If the count register is reloaded between output pulses, the present period will
not be affected, but the subsequent period will reflect a new value.
It is similar to mode 2 except that the output will remain high until one half of the
count and goes low for the other half provided the count is an even number. If the count is
odd the output will be high for (count +1)/2 counts. This mode is used for generating baud
rate of 8251.
PROGRAM:
We utilize mode 3 to generate a square wave of frequency 150 kHz at Channel 0.Set the jumper so that
the clock of 8253 is given a square wave of Frequency 1.5 MHz. This program divides the program
clock by 10 and thus the Output at channel 0 is 150 KHz.
The output is high after the mode is set and also during counting. On Terminal
count, the output will go low for one clock period and becomes high again. This mode can
be used for interrupt generation.
Counter starts counting after rising edge of trigger input and the output goes low for
one clock period. When the terminal count is reached, the counter is retrigerrable. On
terminal count, the output will go low for one clock period and becomes high again. This
mode can be used for interrupt generation.
RESULT:
Thus the 8253 PIT was interfaced to 8085 and the operations for mode 0, Mode 1 and mode 3 was
verified