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An Analog Front-End Using Feedback Compensation Technique For Thermistor Linearization

This document discusses a circuit design for linearizing the nonlinear temperature response of thermistors. Thermistors are widely used for temperature sensing but have a nonlinear transfer characteristic that needs to be linearized for many industrial applications. The paper proposes an analog front-end circuit that uses a dual-mode feedback compensation technique to linearize the thermistor response. In simulations and experiments, the circuit achieved a nonlinearity of less than 0.35% over a wide temperature range and 0.57% nonlinearity over a 120 degree Celsius temperature span when tested with an actual thermistor.

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Felipe Feitosa
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0% found this document useful (0 votes)
91 views

An Analog Front-End Using Feedback Compensation Technique For Thermistor Linearization

This document discusses a circuit design for linearizing the nonlinear temperature response of thermistors. Thermistors are widely used for temperature sensing but have a nonlinear transfer characteristic that needs to be linearized for many industrial applications. The paper proposes an analog front-end circuit that uses a dual-mode feedback compensation technique to linearize the thermistor response. In simulations and experiments, the circuit achieved a nonlinearity of less than 0.35% over a wide temperature range and 0.57% nonlinearity over a 120 degree Celsius temperature span when tested with an actual thermistor.

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Felipe Feitosa
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© © All Rights Reserved
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An Analog Front-End Using Feedback

Compensation Technique for Thermistor


Linearization
2022 IEEE 19th India Council International Conference (INDICON) | 978-1-6654-7350-7/22/$31.00 ©2022 IEEE | DOI: 10.1109/INDICON56171.2022.10040033

Thomaskutty Mathew Manvendra Sharma


Dept. of Avionics Dept. of Avionics
Indian Institute of Space Science and Technology Indian Institute of Space Science and Technology
Thiruvananthapuram, India Thiruvananthapuram, India
[email protected] [email protected]

British Ashok Sontakke Anoop C. S.


MEMS Fabrication Division Dept. of Avionics
Semi-Conductor Laboratory (SCL), Indian Institute of Space Science and Technology
Sahibzada Ajit Singh Nagar, India. Thiruvananthapuram, India
[email protected] [email protected]

Abstract—Thermistors are widely employed for temperature ative Temperature Coefficient (NTC) thermistors are used
sensing in a number of industrial scenarios. The transfer char- for sensing applications. Thermistors posses, many merits
acteristics of thermistor follows a nonlinear curve. This paper such as large temperature coefficient, compactness of size
proffers a simple analog front-end circuit that can linearize
thermistor characteristics. The front end operates based on a and fast response [3]. By virtue of these merits, thermistors
dual-mode feedback compensation principle. The design and find application in many industrial scenarios, including anti-
optimization of the front-end is discussed in the paper. The front- icing systems [4], automotive engine temperature measurement
end, equipped with the optimized values for passive components, [5]. Thermistors are available as surface-mount devices for
can render a non-linearity as low as 0.35% for a wide temperature general temperature sensing [6]. However, a linear transfer
range. The effect of drift and tolerance of optimization variables
are analysed. Further, the efficacy of the front-end has been estab- characteristics is much preferred by industry and researchers.
lished using simulation and experimental studies with thermistor Hence, it is essential to develop linearizing signal conditioners
characteristics. Experimental results of the developed thermistor for nonlinear sensors. In this paper, a simple signal conditioner
front-end gives a non-linearity of 0.57% over a temperature span that can linearize the thermistor response is proposed, and its
of 120o C. performance is evaluated.
Index Terms—Circuit Design, Feedback Compensation, Front-
End Circuits, Linearization, Non-Linear Sensors, Signal condi- A. Literature Review of Thermistor Linearizers
tioning, Thermistors.
A number of front-end architectures have been reported for
I. I NTRODUCTION thermistor linearization. A simple inverting amplifier based
circuit has been described in [7]. This scheme provides a
Sensors plays a very important role in almost all indus- Non-Linearity (N.L.) of 1% for 30°C to 120°C. The work
trial applications. Many of the sensors have linear input- described in [8] presented the use of fixed point operation-
output characteristics. Displacement sensors, Linear Variable based Field Programmable Gate Arrays (FPGA) implemen-
Differential Transformer (LVDT) and Hall Effect sensors are tation of Steinhart-Hart Equation for thermistor linearization.
examples of linear sensors [1]. Some linear sensor like Giant This scheme has shown to provide a N.L. of 0.11% for −20◦ C
Magneto Resistance (GMR) elements can exhibit nonlinear to 120◦ C. A direct-microcontroller interface for thermistors
characteristics due to inherent bridge configurations [2]. On the has been discussed in [9]. This interface was shown to achieve
other hand, there are sensors with inherently non-linear trans- a N.L. of 1% for a limited temperature range (5◦ C to 45◦ C).
fer characteristics. Thermistor is a common non-linear sensor Neural network based processing technique has been applied
whose resistance (say, Rth ) varies as a exponentially decreas- in [10] and [11] for thermistor linearization, with the aid of
ing function of temperature (say, T ). The Rth -T characteristics a voltage controlled oscillator thermistor circuit. Relaxation
of a thermistor can be modelled using different mathematical oscillator circuit for conditioning remotely-located thermistors
expressions. In [8], modelling of the thermistor has been has been discussed in [12]. The component-count of this
done using Steinhart - Hart Equation(SHHE). Normally, Neg- scheme is relatively high. A logarithmic amplifier design has
978-1-6654-7350-7/22/$31.00 ©2022 IEEE been employed in [13], to achieve a linearized thermistor

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response of N.L. = 1.6% over −25◦ C to 110◦ C range. This

Fig. 2. R-T characteristics of the thermistor used for evaluating the proposed
F F CT

Fig. 1. Circuit schematic of the proposed F F CT .


II. C IRCUIT A RCHITECTURE
circuit requires a precise constant current source and a loga-
rithmic amplifier and its output depends on switch resistances. A. Description and Operation
A 555 timer-based astable multivibrator along with microcon-
The schematic of the proposed F F CT is shown in Fig.
troller performs linearization in [14] for temperature range
1. It processes a quarter bridge consisting of thermistor Rth .
30◦ C to 120◦ C. This scheme requires precise determination of
As illustrated in Fig. 1, a feedback compensation scheme is
linearizing resistor and time measurements for accurate results.
employed with the thermistor-bridge. The circuit consists of a
Thermistor linearization using analog multiplier scheme is
Instrumentation Amplifier (IA), programmable gain amplifier
explained in [15]. The above scheme have wide dynamic range
(PGA) formed by A1, Difference Amplifier (DA) and a
(10◦ C to 220◦ C) but it gives maximum N.L. of 6% towards
reference voltage Vr . The passive elements R1 and R2 form
the lower side of dynamic range. Feedback compensation
two of the four optimization parameters. The gains (say, Y1
technique [16], [17] is another scheme used for linearization.
and Y2 ) offered by the PGA are the other two optimization
In [16], a single element wheatstone bridge, comprising a lin-
parameters. The gain values are set using the resistors Ra ,
ear resistive sensor, is linearized using feedback linearization
Rb , Rc , Rd . It will be shown that F F CT will provide linear
scheme. This technique has been further extended for GMR
output, Vout with respect to temperature, T at optimal values
sensors, with two active GMR elements in [17]. In both of
of R1 , R2 , Y1 and Y2 . The F F CT works in two modes. The
these works, the product of amplifier gain and feedback ratio
switches S1 and S2 are used for configuring the modes.
can be set to a known constant, for achieving linerization.
Let us consider the operation of F F CT in its first mode
In this paper, we proffer a unique analog Front-end using
(say, mode 1). The switches S1 and S2 will be linked to
Feedback Compensation technique for Thermistor (F F CT )
position-1. Hence R1 will be connected to top end of Rth .
linearization. The F F CT interfaces and processes the nonlin-
The gain (Y1 ) of PGA can be written as in (1).
ear thermistor to render an output proportional to temperature.
The salient features of F F CT are outlined below.
Y1 = −Ra /Rb (1)
• Circuit architecture with low cost and low complexity.
• Wide dynamic range of operation with appreciably low The output (say, Vout1 ) of the IA can be obtained as in (2).
nonlinearity.
• Fast dynamic response since there is no energy storage
−G.Vr .(Rth − R1 )
elements (capacitors, inductors) and/or timing operations. Vout1 = (2)
2.(Rth + R1 ) − G.Y1 .(Rth − R1 )
• Offers immunity from circuit nonidealities.
The detailed explanation of F F CT is given in the next section. In (2), G is the gain of IA stage. It can be seen that
This will be followed by error analysis and performance characteristics of Vout1 is dependent on optimisation elements
verification studies in Section III and Section IV, respectively. R1 and Y1 . However, our basic studies demonstrated that the
Section V concludes the work and provides recommendation nonlinearity of Vout1 is still significant. Therefore, a second
for further performance improvement. mode is used.

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In mode-2, the switches are placed in position-2. Hence, the III. E RROR A NALYSIS
resistor, R2 will be linked to Rth . Gain (Y2 ) of the PGA can This section describes the effect of the error sources on the
be expressed as in (3). output of the F F CT . Tolerance in optimization parameters
Y2 = −Rc /Rd (3) R1 , R2 and Y1 , Y2 are the principal error sources in the
F F CT . The effect of tolerance in optimization values on error
The output (say, Vout2 ) of the IA can be written as in (4), and non-linearity are discussed in detail in subsections III-A,
III-B respectively.

Fig. 3. Variation in the non-linearity of F F CT with respect to deviation in


the values of R1 and R2 . The tolerance of R1 and R2 can be selected, based
on this plot, to achieve desired linearity. Fig. 4. Variation in error of Vout with respect to deviation of R1 and R2 .
Acceptable tolerance limits in R1 and R2 for reducing error can be inferred
from this plots
−G.Vr .(Rth − R2 )
Vout2 = (4)
2.(Rth + R2 ) − G.Y2 .(Rth − R2 )
A. Effect of tolerance of Ri
Let us define the final output Vout of F F CT as (Vout1 +
Vout2 )/2. Using (2) and (4), the expression for Vout can be The effect of tolerance of Ri on % N.L and % full span
obtained as in (5). error (error) can be studied with the help of the following
equation.
2 2
1 X −G.Vr .(Rth − Ri ) 1 X −G.Vr .(Rth − R0 )
Vout = . (5) Vout = . (6)
2 i=1 2.(Rth + Ri ) − G.Yi .(Rth − Ri ) 2 i=1 2.(Rth + R0 ) − G.Yi .(Rth − R0 )
This voltage, Vout will possess linear transfer characteristics R0 = Ri .(1 ± △Ri )
with temperature, at optimal values of R1 , R2 , Y1 and Y2 .
B. Case Study From section II-B Ri takes two values R1 , R2 .
The functioning of the F F CT scheme is studied with the The contour plot corresponding to N.L. and error with
help of a case study. A typical thermistor NTCM-100K-B3950 respect to R1 and R2 are shown in Fig. 3 and Fig. 4. N.L.
is considered. The Rth vs T characteristics of this thermistor increases from minimum value, with deviation in R1 and R2 .
is plotted and given in Fig. 2. The values of optimization Centre point of Fig. 3 corresponds to minimum N.L. at optimal
constants were found using iterative search method for best values of R1 and R2 . Best fit line was found using least
linearity. The maximum N. L. of the curve joining Vout vs T square approximation technique. Non-linearity is maximum
characteristics was ascertained according to the least-squares deviation of measured data from fitted line upon measured
fitting method. The values of R1 , R2 , Y1 , Y2 for minimum data span. Referring to Fig. 3, if the N.L that can be tolerated
nonlinearity (N.L.) from its best fit was found to be 199.9 kΩ, be 0.5% then it corresponds to −4% deviation in R1 and +2%
22.4 kΩ, 0.4, 1.3. The obtained coefficients were tested with deviation in R2 from optimal values. In Fig. 4, centre point
entire thermistor dataset for θ ∈ (0°C, 120°C). The step size corresponds to zero full scale error at optimal values of R1
used was 10°C. The Vout was calculated in each step using and R2 . Error increases with deviation in R1 and R2 . Full
linearisation constants. The Vout followed a linear pattern scale error is maximum deviation of measured value from
with θ and maximum N.L. was 0.34%. Thus F F CT offers theoretical value upon measured data span. If the error that can
an efficient linearisation scheme for non linear sensors like be tolerated be 1% then it corresponds to −4% deviation in
thermistor. R1 and −4% deviation in R2 from optimal values. Thus from

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optimal values of Y1 and Y2 . N.L increases from minimum
value and error from zero with deviation in Y1 and Y2 from
optimal values. Let the N.L. that can be tolerated be 0.5% then
it corresponds to −2% deviation in Y1 and −2% deviation in
Y2 from optimal values. Referring to Fig. 6 let the error that
can be tolerated be 0.5% then it corresponds to +2% deviation
in Y1 and −2% deviation in Y2 from optimal values. Thus from
non-linearity and error contour plots we can infer deviation in
Y1 and Y2 from optimal values for given N.L. and full scale
error.

Fig. 5. Variation in non-linearity of F F CT with respect to deviation in the


values of Y1 and Y2 . These results are helpfull in proper design of PGA.

Fig. 7. Output voltage (Vout1 and Vout2 ) of the F F CT during its dual
mode operation.

IV. P ERFORMANCE VERIFICATION


The working of proposed F F CT and efficacy of linearizing
scheme was verified using simulation and emulation studies.
Details are incorporated in the following sections.
Fig. 6. Variation in error of Vout with respect to deviation of Y1 and Y2 and A. Simulation Studies
tolerance of Y1 , Y2 for given error can be ascertained from this plot
The proposed F F CT was implemented in the simula-
tion software, LTSPICE, from Linear Technology Corp. The
non-linearity and error contour plots we can infer deviation in thermistor resistance Rth were programmed to vary from
R1 and R2 from optimal values for given N.L. and full scale 321.140 kΩ to 3.649 kΩ. This corresponds to the temperature
error. range of 0°C to 120°C. Linearisation terms (R1 , R2 , Y1
and Y2 ) were calculated according to principle discussed in
B. Effect of tolerance of Yi Section II-B. The optimal values were obtained as R1 = 199.9
The effect of tolerance of Yi on N.L. and error can be kΩ, R2 = 22.4 kΩ, Y1 = 0.4 and Y2 = 1.3. The gain of IA,
studied from following equation. G = 5 was set using gain determining resistor RG = 12.35
kΩ. Y1 was realised using Ra = 544 Ω and Rb = 6.8 kΩ.
2 Likewise Y2 was realised using Rc = 8.58 kΩ and Rd = 33
1 X −G.Vr .(Rth − Ri ) kΩ. The equal resistors used at left arm of bridge, Rp = 10
Vout = .
2 i=1 2.((Rth + Ri ) − G.Yi (1 ± △Yi ).(Rth − Ri )) kΩ. The switches S1 and S2 were implemented using spice
(7) model of a switch having Ron = 100Ω and Rof f = 100 MΩ.
From section II-B Yi takes two values Y1 and Y2 . The IA were modelled using LT 1167 IC. The opamp A1
The variation N.L. and error with respect to Y1 and Y2 is was modelled with parameters corresponding to OP07 IC [18].
shown in Fig. 5 and Fig 6. Centre point of Fig. 5 and Fig The DA was realized using LT 1167 IC. The bridge negative
6 corresponds to minimum N.L. and zero full scale error at feedback is implemented DA. The reference voltage Vr = 2.5V

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is taken. Mode 1 and Mode 2 corresponds to highly nonlinear
R-T characteristics as seen from Fig. 7. Vout computed offline
using equation (5) follows a quasi linear characteristics with %
N.L = 0.353% for the temperature range of 0°C to 120°C as
shown in Fig. 8.

Fig. 9. Emulation results of the developed F F CT . The output non-linearity


can be seen to be lower than 0.57%.

TABLE I
P ERFORMANCE E VALUATION

Ref. Technique Used Range (°C) % N.L Remarks


Fig. 8. Simulation results of the proposed F F CT . The output voltage and [8] ⊎ 30 to 120 1 ∗
non-linearity is plotted. The maximum N.L. is less than 0.353% [3] SHHE -20 to 120 0.11 ◦
[9] µC based 5 to 45 1 •
[10],[11] ANN based 0 to 100 0.8 ▷
B. Emulation Studies [12] Integrator based 0 to 120 1.4 ≀
[13] Log Amplifier -25 to 110 1.6 ∧
Efficiency of F F CT was also checked in emulation studies. [14] Astable multivibrator 30 to 120 1.7 ∨
The scheme was implemented in a breadboard. The compo- [15] Analog multiplier 10 to 220 0.6 ✓
This work F F CT 0 to 120 0.57 ‡
nents chosen in emulation was similar to the ones used in ⊎ Opamp based inverting amplifier.
simulation studies. The signal Vr = 2.5 V was obtained from ∗ Moderate non linearity for wide range.
voltage reference IC LM385-2.5 V. The thermistor resistance ◦ Precise constant current source required.
• Slow response due to charging, discharging capacitor..
Rth corresponding to NTCM-100K-B3950 were emulated ▷ Low sensitivity of circuit.
using decade resistance box according to [19]. The temperature ≀ Time resolution critical for accuracy.
range used was 0°C to 120°C. The resistance corresponding ∧ Errors due to neglecting higher order terms.
∨ Precise determination of linearizing resistor.
to this temperature range is 321.140 kΩ to 3.649 kΩ. The Rp ✓ Moderate Linearity
was selected as 10 kΩ. The linearization constants R1 and R2 ‡ Low cost, Less complex, low N.L for wide dynamic range.
were implemented using potentiometers for fine adjustments. SHHE - Steinhart-Hart equation, µC - Microcontroller
ANN-Artificial Neural Networks, Ref. - Reference
Any deviation from optimised values will introduce N.L. and
error. R1 was taken as 199.9 kΩ and R2 was taken as 22.4 kΩ.
The IA was realised using AD620 IC. The gain of G = 5 of the
IA realised using resistor 12.35 kΩ. The PGA were realised tested, achieved non-linearity is considered, along with some
using OP07 IC. The DA were implemented using AD620 qualitative remarks.
IC. The measurements were done using 6.5 digit multimeter V. C ONCLUSIONS AND F UTURE W ORKS
(Model No. 34461A from KEYSIGHT). The emulation results
are shown in Fig. 9. The maximum nonlinearity found was A new feedback (negative) compensation-based circuit was
0.573%. The performance of the F F CT can observed to be discussed. Feedback compensation technique is useful in
equivalent or better(in terms of range, error etc). Moreover the linearizing non-linear sensors as well as non-linearities due
circuit complexity is low and can be realised using commonly to bridge circuits. In this scheme feedback compensation
available Integrated circuits. technique was used to linearize thermistor characteristics.
The scheme was simulated in LTSPICE. Emulation studies
C. Performance evaluation of linearization schemes followed simulation results with marginal increase in N.L.
The performance of the developed scheme is compared and error. Also it possesses a low N.L. and error over a
with existing linearization circuits for thermistors. A summary wide temperature range. Further work must be carried out
of the comparison results can be viewed in Table I. The for hardware verification of the proposed scheme as well as
factors such as technique employed, range of temperature automating switches.

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R EFERENCES
[1] S. Bhattacharya, A. K. Agarwal, O. Prakash, S. Singh, Eds, Sensors
for Automotive and Aerospace Applications(Energy, Environment and
Sustainibility Series), Singapore: Springer, 2019, 2522-8366.
[2] E. Sifuentes, O. Casas and R. Pallas-Areny, ”Direct Interface for Mag-
netoresistive Sensors,” in Proc. IEEE Instrumentation and Measurement
Technology Conference I2 MTC, 2007, pp. 1-7.
[3] Alan S. Morris,, Measurement and Instrumentation, Reza Langari, Ed.,
2nd ed. Amsterdam: Elsevier, 2016., pp. 15-64.
[4] S. Finlayson and G. S. Gupta,, “Instrumentation and automated control
of aircraft leading edge temperature,” in Proc. IEEE Sensors Appl.
Symp., Galveston, Feb. 2013, pp. 182–187.
[5] F. Chen et. al, ”EMC Protection of SCB Explosive Devices by Using
SMD-Based NTC Thermistors,” IEEE Trans. Electromagn. Compat.,
vol. 54, pp. 1216-1221, 2012.
[6] Z. Xu and L. Liu, ”The Application of Temperature Sensor in Automo-
bile,” Int. Conf. on Control, Automat. Sys. Engg. (CASE), Seoul, 2018,
pp. 2260-2267.
[7] A. R. Sarkar, D. Dey and S. Munshi, ”Linearization of NTC Thermistor
Characteristic Using Op-Amp Based Inverting Amplifier,”, IEEE Sensors
J., vol. 13, pp. 4621-4626, 2013.
[8] K. P. S. Rana, V. Kumar, A. K. Dagar, A. Chandel and A. Kataria,
”FPGA Implementation of Steinhart–Hart Equation for Accurate Ther-
mistor Linearization,”, IEEE Sensors J, vol. 18, pp. 2220-2227, Mar.
2018.
[9] F. Reverter, ”A microcontroller-based interface circuit for non-linear
resistive sensors,” in Measurement Science and Technology, vol.32, IOP
2020 pp. 1-4.
[10] T. Prasad, K. P. S. Rana and V. Kumar, ”Development of an Intelligent
Temperature Transducer,” IEEE Sensors J., vol. 19, pp.4734-4736, Jun.
2015.
[11] V. N. Kumar, K. V. L. Narayana, A. Bhujangarao and S. Sankar,
”Development of an ANN-Based Linearization Technique for the VCO
Thermistor Circuit,”, IEEE Sensors J., vol.15 pp. 886-894 2015.
[12] K. Elangovan, B. A. Sontakke and C. S. Anoop, ”Design, Analysis, and
Hardware Verification of a Linearized Thermistor-Based Temperature
Measurement System,” IEEE Trans. Instrum. Meas., vol. 71, pp. 1-9,
2022.
[13] A. A. Khan and R. Sengupta, ”A Linear Temperature/Voltage Converter
Using Thermistor in Logarithmic Network,”, IEEE Trans. Instrum.
Meas., vol. 33, pp. 1-4, 1984.
[14] N. Chatterjee, B. Bhattacharyya, D. Dey and S. Munshi, ”A Combina-
tion of Astable Multivibrator and Microcontroller for Thermistor-Based
Temperature Measurement Over Internet,” IEEE Sensors J., vol. 19, pp.
3252-3259, 2019.
[15] A. A. Khan, M. A. Al-Turaigi and A. R. M. Alamoud ”Linearized ther-
mistor thermometer using an analog multiplier,” IEEE Trans. Instrum.
Meas. vol. 37, pp. 322-323, 1988.
[16] Mohan Madhu T, Geetha Sankaran, Prasanna Kumar, Jagadeesh ”Lin-
earisation of the Output of a Wheatstone bridge for a Single Active
Sensor,” in Proc. 16th IMEKO TC4 Symposium, Florence, 2008, pp.
25-29.
[17] T Sen, C. S. Anoop, S. Sen ”Design and performance evaluation of two
novel linearisation circuits for giant magnetoresistance based sensors,”
IET Circ. Dev. Syst., vol. 11, pp. 496-503, 2017.
[18] Analog Devices, OP07 Datasheet, Rev. G, Accessed: 15-06-
2022. [Online]. Available: https://www.analog.com/media/en/technical-
documentation/data-sheets/op07.pdf
[19] ”Specifications for NTC Thermistor,” Accessed: 15-
06-2022. MF52B2 104F3950, Online. Available:
https://www.tme.eu/Document/f9d2f5e38227fc1c7d979e546ff51768/NT
CM-100K-B3950.pdf

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