Workflow Design and Management For IC Supply Chain
Workflow Design and Management For IC Supply Chain
Abstract—This research develops interaction models among model, as shown in figure 2, a fabless design house only
companies in IC supply chain to study the information designs IC and IC foundry companies in IC fabrication sector
integration among them. The main processes of IC supply chain help this design house to produce IC. This diversification and
are IC design, wafer fabrication, wafer probe, IC packaging/ integration structure is the base of IC supply chain of
assembly, and final test. A workflow model between IC design
Taiwan’s IC industry, which is different from that of the other
houses and wafer fabrication plants is developed with focuses on
purchase order, engineering data, and work-in-process status. major players in the world. Famous Taiwan companies such
This model facilitates the standardization and simplification for as TSMC and UMC are wafer foundry companies in the
the information integration interfaces, which could increase the wafer fabrication sector, and ASE is in IC packaging and final
communication efficiency and effectiveness between customers test sectors.
and vendors. Finally, Extricity Alliance software is used in a
case study to demonstrate the interaction process and
information flow between IC design houses and wafer
fabrication plants.
I. INTRODUCTION
S
262 4 13 34 36
ince its invention in the 1950s, semiconductor has Fabless Mask Fabrications Packaging Testing
become one of the most important industries in the 21st
century. Integrated circuit (IC) is the product of 15
semiconductor manufacturing and it consists of five major Substrate
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Figure 9 illustrates three classes including boundary, control
and entity for PO process, defined in this study.
IC design houses release PO to their subcontractors.
Typical PO information includes PO number, product list,
release date, quantity, unit price, delivery date, mask
information, process name, trade condition, etc. Figure 10
shows the class diagram of PO.
IC design houses need to provide detailed wafer
engineering data to wafer fab for complex fabrication.
Typical engineering data are product number, chip size, test
key, design rule, wafer acceptance test specification, split
condition, seal ring, wafer type, code layer, option layer,
probe card, output quality assurance procedure, packaging
Fig. 5. Workflow system architecture reference model [4] procedure, etc.
All subcontractors need to feedback WIP report to IC
design houses for the management of production progress, as
the time to market is critical to all IC products. WIP
information includes release date, lot identification, facility
name, flow type, flow name, flow length, current location,
next location, current layer, current quantity, start date,
completion date, etc.
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IC Design House Agent IC Design House Service Subcontractor Service Subcontractor Agent
Create PO
signal(Receipt Acknoeledgement)
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software was used to demonstrate the interaction processes
between companies. This study can be extended in several
directions, such as the study of interaction processes between
IC design houses and IC packaging plants, as well as between
IC design houses and final test plants.
ACKNOWLEDGMENT
The authors would like to thank Industrial Technology
Research Institute (Contract No. 893K37BH4) for financially
supporting this research.
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This model facilitates the standardization and simplification
for the information integration interfaces. Extricity Alliance
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