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Combinational Logic Part5

The document discusses multiplexers and demultiplexers. It explains that a multi-bit multiplexer selects one of several multi-bit input buses as the output based on a selector bit. A multi-way multiplexer similarly selects one of several multi-bit inputs but uses multiple selector bits. Demultiplexers work in the reverse by taking a single input and routing it to one of multiple outputs based on selector bits. The document provides examples of implementing various multiplexers and demultiplexers and also discusses how to use multiplexers to implement logic functions from their truth tables.

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22 views

Combinational Logic Part5

The document discusses multiplexers and demultiplexers. It explains that a multi-bit multiplexer selects one of several multi-bit input buses as the output based on a selector bit. A multi-way multiplexer similarly selects one of several multi-bit inputs but uses multiple selector bits. Demultiplexers work in the reverse by taking a single input and routing it to one of multiple outputs based on selector bits. The document provides examples of implementing various multiplexers and demultiplexers and also discusses how to use multiplexers to implement logic functions from their truth tables.

Uploaded by

sarangoudsai
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Elements of Computing Systems-1

Combinational Logic (Part 5)

Dr. Jyothish Lal G, Assistant Professor (Sr. Gr)


Department of AI / Center for Computational Engineering and Networking (CEN)
Amrita School of AI, Coimbatore
Acknowledgment: Prof. Noam Nisan, Prof. Shimon Schocken
Multi-bit multiplexer
and Multi-way multiplexer

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 2


Multi-bit multiplexer
An n-bit multiplexor is exactly the same as the binary multiplexor, except that the two
inputs are each n-bit wide; the selector is a single bit.

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 3


HACK Exercise
• Implement and test the following chip
– Mux4
– Mux16

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 4


Multi-bit multi-way multiplexer
An m-way n-bit multiplexor selects one of m n-bit input buses and outputs it to
a single n-bit output bus. The selection is specified by a set of k control bits,
where k = log2 m.

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 5


HACK exercise
• Implement and test the following chip
– Mux4Way16
– Mux8Way16

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 6


Demultiplexer (DEMUX)
• Works in reverse manner as compared to MUX
• In general, n output lines and m select lines
n=2m
• Usually, we denote it as 1 to 2m demultiplexer
• The selection of specific output line is controlled by the bit values of m
selection lines

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 7


Implementation of 1-to-2 DEMUX
in sel a b
0 0 0 0
0 1 0 0
1 0 1 0
1 1 0 1

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 8


Gate level logic
sel

in
b

Try yourself: Design 1-to-2 DEMUX using NAND gates

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 9


Implementation of 1-to-4 DEMUX
D0
D1
in D2
D3

S1 S0

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 10


Chip logic Diagram
Gate level logic
S1 S0 in
HDL Description

D0

D1

D2

D3

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 11


Multi-Way/Multi-Bit Demultiplexer

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 12


4 way Demultiplexer

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 13


4 way Demultiplexer

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 14


HACK Exercise
• Implement
– 4 way Demultiplexer
– 8 way Demultiplexer

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 15


Implementation of Logic function using MUX

• Implement an n-variable function using 2n to 1


multiplexer
– Connect the n variables to the select lines
– Connect the truth table output column values to
data inputs

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 16


F(A,B,C)= ∑(1,4,5,6)

0
1
0
0
1 8 to 1 MUX F
1
1
0

A B C

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 17


An Interesting observation
• For n-variable function, how many distinct functions are possible?
• Take our previous example, it is a 3 variable function. The last
column specifies the output function ‘f’, which is 8 (23) bits
23
• So in 8 bits, we can have 28 combinations , ie 2

2n
• So in general, 2 distinct functions are possible

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 18


Implementation of Logic function using MUX
• We can do better!

• Implement an n-variable function using 2n-1 to 1 multiplexer


– Connect (n-1) variables to the select lines
– Apply the remaining variable, its complement , 0
or 1 to the data inputs

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 19


Implement the function F(A,B,C)= ∑(1,4,5,6) using 4-to-1 MUX

D0= C

D1= 0
C
D2= 1
0
D3= C’ 1 4 to 1 MUX F
C’

✓ ✓ ✓ ✓

A B

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 20


If we select B and C as select lines,

A
1
A 4 to 1 MUX F
0

B C

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 21


Implement the function F(A,B,C,D)= ∑(2,3,4,9,10,11,13,14) using 8-to-1 MUX

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 22


D0= 0
D1= 1 0
1
D2= D’ D’
0
D3=0 D 8 to 1 MUX F
1
D4=D D
D’
D5=1

D6=D

D7=D’ A B C

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 23


Implement the function F(A,B,C,D)=∑(0,1,2,4,6,9,12,14) using 4-to-1 MUX
Let C, D be the selection lines

A’B
B’
A’B 4 to 1 MUX F
0

C D

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 24


Implement the function F(A,B,C,D)=∑(1,3,4,11,12,13,14,15) using 4-to-1 MUX

Let A, B be the selection lines

D
C’D’
CD 4 to 1 MUX F
1

A B

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 25


Thank You

EOC-1|B.TECH CSE (AI)|CEN|Dr. Jyothish 26

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