0% found this document useful (0 votes)
65 views

COA Assignment

The document describes the organization and operation of memory chips and hard disk drives. It provides details on: - The 1Kx1 memory chip which stores data in a 1024x1024 matrix addressed by row and column. - The 2Mx8 dynamic memory chip which has 2 million addresses each storing an 8-bit byte of data. - Hard disk drives use magnetic platters coated with material to store data via magnetic heads reading and writing tiny spots. - A sample hard disk configuration is analyzed including capacity, access time, and time to transfer a 5MB file.

Uploaded by

Vijay Sankar
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
65 views

COA Assignment

The document describes the organization and operation of memory chips and hard disk drives. It provides details on: - The 1Kx1 memory chip which stores data in a 1024x1024 matrix addressed by row and column. - The 2Mx8 dynamic memory chip which has 2 million addresses each storing an 8-bit byte of data. - Hard disk drives use magnetic platters coated with material to store data via magnetic heads reading and writing tiny spots. - A sample hard disk configuration is analyzed including capacity, access time, and time to transfer a 5MB file.

Uploaded by

Vijay Sankar
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 8

Department of Computer Science and Engineering

On
Table of Contents

Sl. No Topic

1. Memory Chip

2. Hard disk Drive


1. Memory Chip
A memory chip, also known simply as a memory or RAM (Random Access Memory) chip, is
an integrated circuit (IC) used to store data in a digital format temporarily. Memory chips play a crucial
role in the operation of computers and other electronic devices. They provide high-speed data access to
the central processing unit (CPU) and other components.

Memory chips are made up of transistors and capacitors. The capacitors store two binary logic
bits (0 or 1). The transistors allow data to be read and written to the capacitors.

1.1 1K *1 Memory Chip


The 1K*1 memory chip is a very common type of memory chip, and it is used in a wide
variety of devices, such as computers, printers, and copiers. It is a reliable and efficient way to
store data, and it is relatively inexpensive to produce.

1.2 Organization of 1K*1 Memory Chip


A 1K*1 memory chip is organized as a square matrix of 1024 rows and 1024 columns, with
one bit in each position in the matrix. The chip has 10 address pins, so the full 20-bit address is fed into
the chip in two stages, the 10-bit row address first, and then the 10-bit column address. When a refresh
operation occurs, an entire row is refreshed all at once.
The memory chip is organized in this way because it is the most efficient way to store data. By
organizing the data in a matrix, each bit can be accessed directly by its row and column address. This
allows for very fast access to data, which is important for many applications, such as databases and file
systems.
A 1kx1 memory chip refers to a memory chip with a capacity of 1 kilobit (1k) and a data width of 1 bit
(1x1). The organization of such a memory chip involves arranging 1,024 memory cells, each capable
of storing one bit of information.
In memory organization:
Capacity: The total capacity is 1 kilobit, which means the memory chip can store 1,024 bits of data.
Addressing: Each bit of data is stored at a unique address. In a 1kx1 memory chip, you would have
1,024 unique addresses (from 0 to 1023) to access each bit.
Data Width: The data width is 1 bit, meaning that each addressable location stores a single binary digit
(0 or 1).

Organization: The memory cells are typically organized in rows and columns. The specific
organization can vary based on the type of memory technology used (e.g., SRAM, DRAM, Flash). Each
row and column intersection corresponds to a unique address.

Read and Write Operations: The memory chip allows reading the stored data from any address and
writing new data to any address. Reading retrieves the stored bit at a specific address, and writing
changes the bit at a particular address
1.3 Diagram
1.4 2M X 8 Dynamic Memory Chip
• A 2M x 8 dynamic memory chip is a 16-megabit dynamic random-access
memory (DRAM) chip.
• It is organized as a 4K x 4K array. Each row has 4096 cells, which are divided
into 512 groups of 8.
• This means that each row can store 512 bytes of data.

1.5 Organization of 2M X 8 Dynamic Memory Chip


The organization of a "2M x 8" Dynamic Memory Chip, where "2M" represents a capacity of 2 megabits
and "8" indicates an 8-bit data width, means that the memory chip is organized into 2 million
addressable locations, each capable of storing 8 bits of data.
Here's a simplified representation of how the data might be organized in the memory chip:

Address 0: | D7 D6 D5 D4 D3 D2 D1 D0 |

Address 1: | D7 D6 D5 D4 D3 D2 D1 D0 |

... and so on ...

Address 2M-1: | D7 D6 D5 D4 D3 D2 D1 D0 |

Capacity: The memory chip has a total capacity of 2 megabits, meaning it can store 2 million bits of
data.
Data Width: Each addressable location in the chip can store 8 bits of data (D7 through D0). This is
commonly referred to as a byte, and it's the amount of data typically processed together in many
computer architectures.
Addresses: The chip has 2 million unique addresses, ranging from 0 to 2M - 1. Each address
corresponds to an 8-bit data value.
Read and Write Operations: The memory chip allows for reading the stored data from any address
and writing new data to any address. Reading retrieves the 8-bit data at a specific address, and writing
changes the 8-bit data at a particular address.
This type of memory chip is commonly used in various electronic devices and computer systems for
temporary data storage due to its relatively high capacity and speed.
HYB 5117800BSJ: This chip uses a submicron CMOS silicon gate process technology. It also uses
advanced circuit techniques to provide wide operating margins.

IS41C8205: This chip is a high-performance CMOS dynamic random-access memory.


1.6 Diagram

1.7 References

• https://www.sciencedirect.com/topics/engineering/memory-chip

• https://www.computerhope.com/jargon/m/memochip.html
2. Hard Disk Drive

2.1 Definition

A hard disk drive (HDD) is a storage device that stores and retrieves digital data. HDDs are
also called hard drives, fixed disks, or hard disks. They are non-volatile, meaning they retain
data even when the computer is off.
HDDs store data on magnetic platters that rotate at high speeds. The platters are made of non-
magnetic material and coated with a thin layer of magnetic material. A magnetic head reads
and writes data by magnetizing tiny spots on the platter.

2.2 Question
Consider a magnetic disk drive with 8 surfaces, 512 tracks per surface, and 64 sectors per
track. Sector size is 1 kB. The average seek time is 8 ms, the track-to-track access time is 1.5
ms, and the drive rotates at 3600 rpm. Successive tracks in a cylinder can be read without head
movement.
a. What is the disk capacity?
b. What is the average access time? Assume this file is stored in successive sectors and tracks
of successive cylinders, starting at sector 0, track 0, of cylinder i.
c. Estimate the time required to transfer a 5-MB file.
d. What is the burst transfer rate?

ANSWER

a.)

The system consists of 88 surfaces of 512512 tracks, each of which has 6464 11KB sectors. Its capacity
is:
8×512×64×1KB=262144KB=256MB8×512×64×1KB=262144KB=256MB

b.)
The access time is a sum of the seek time and the rotational delay. First, let's calculate the rotational
delay:
12×3600rpm=12×60rps=8.333ms2×3600rpm1=2×60rps1=8.333ms

The access time is equal to: 8+8.333=16.3338+8.333=16.333ms.


c)
Each cylinder is made of 88 tracks, each of 6464KB, so its total memory is 8×64=5128×64=512KB.
To store a 55MB file, you need 1010 cylinders.

Look into how each cylinder is accessed:


First, the beginning cylinder is found (initial access time consisting of 88ms seek time
and 8.3338.333 ms rotational delay), and then read. The time to read a cylinder is the time to read its
tracks, so 8×603600rpm=133.3338×3600rpm60=133.333ms.

After reading a cylinder, the disk needs to switch to the next cylinder (performing 99 total switches
of 1.51.5ms each) and find the starting position(8.3338.333 ms rotational delay).

Putting the information from the previous 33 steps into an equation, we get that the total transfer time
is:
8+8.333+133.333+9×(1.5+8.333+133.333)=1438.16ms8+8.333+133.333+9×(1.5+8.333+133.333)=1
438.16ms

d)
The burst transfer rate describes the amount of data transferred in a second. To find that out, we need
to determine how much data is transferred in a single revolution and how many revolutions there are in
a second.
In a revolution, a track of 6464 11KB sectors is read, so the amount of data transferred is 6464KB.

Combining the already known expression for rps and the amount of data per revolution, construct the
formula:
transfer rate=revolutions per second×data transferred=60rps×64KB=3.75MB/stransfer rate
=revolutions per second×data transferred=60rps×64KB=3.75MB/s

You might also like