Computer Organization

&
Architecture
Lecture: 4
 Computer Arithmetic
Integer representation: If 8-bit the number from 0 to 255.
00000000=0
00000001=1
10000000=128
11111111=255
Sign magnitude : If 8-bit then the magnitude are 7 bits and the bit8 represent the sign
00000000=+010 00010010=+1810
10000000=-010
inconvenient
10010010=-1810

So, using 2’s complement : If 8-bit then the range be from +127 to -128.
MSB is the sign bit. 00010010=+1810
11101110=-1810
 OVERFLOW RULE: If two numbers are added, and they are both positive or
both negative, then overflow occurs if and only if the result has the opposite sign.

No
No
overflow
overflow

carry

No No
overflow carry overflow

Addition
in 2’s
complement
carry
 SUBTRACTION RULE: To subtract one number (subtrahend) from another (minuend),
take the twos complement (negation) of the subtrahend and add it to the minuend.

Subtraction
in 2’s
complement
Specific hardware
Binary Multiplication
Binary Multiplication: Successively multiply the multiplicand by each digit of the
multiplier starting at the right shifting the result left by an extra left position each time each
time but the first. Then sum all partial results.

❑ Unsigned multiplication
❑ Signed multiplication

Block diagram
Method 1:

Try: Multiply 7 X 6

Example: Multiply 15 X 11

Flowchart of Unsigned Binary Multiplication

Example : 3 X -7

Example : 6 X -2

Multiply 9 X -3
Multiplication for signed numbers (Booth method) 2’s complement
 Q Q-1

AC+M’+1

M
AC+M M’

AC+M’+1
 Division
❑ Implemented by successive subtractions
❑ Result must verify the equality
❑ Dividend = Divisor× Quotient + Remainder

Block Diagram of Division Operation

Partial reminder is restored by

Algorithm:
Step 1: Initialize A, Q and M registers to zero, dividend and divisor respectively and
counter to n where n is the number of bits in the dividend.

Step 2: Shift A, Q left one binary position.

Step 3: Subtract M from A placing answer back in A. If sign of A is 1, set Q0 to 0

Step 4: Decrease counter; if counter > 0, repeat process from step 2 else stop the
process. The final remainder will be in A and quotient will be in Q.

ex:1 Divide 15 (1111) by 4 (0100) ex:2 Divide 7 (0111) by 3 (0011)

Division A
M
0
Divisor
Q Dividend
Count n

No Yes
A≥0
Non - Restoring Division (signed
SHL A,Q SHL A,Q
Binary Division)
A A+M A A-M

No Sign Yes
A=0
Q0 0 Q0 1

Count Count -1

Yes
Count > 0

No

No
A≥0
Yes
A A+M

End
 Division Non - Restoring Division (signed Binary Division) ٍ
Algorithm
Step 1: Initialize A, Q and M registers to zero, dividend and divisor respectively and count to
number of bits in dividend.
Step 2: Check sign of A;
If A ≥ 0
a. Shift A, Q left one binary position.
b. Subtract content of M to A and store back in A
If A < 0
a. Shift A, Q left one binary position.
b. Add content of M to A and store back in A.
Step 3: If sign of A is 0, set Q0 to 1 else set Q0 to 0.
Step 4: Decrease counter. If counter > 0, repeat process from step 2 else go to step 5.
Step 5: If A ≥ 0 i.e. positive, content of A is remainder else add content of M to A to get the
remainder. The quotient will be in Q.

ex:1 Divide 14 (1110) by 3 (0011) ex:2 Divide 7 (0111) by 3 (0011)

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