10

(c) The table shows assembly language instructions for a processor which has one general
purpose register, the Accumulator (ACC), and an Index Register (IX).

Instruction
Explanation
Op code Operand
LDM #n Immediate addressing. Load the denary number n to ACC.
Direct addressing. Load the contents of the location at the given address to
LDD <address>
ACC.
Indexed addressing. Form the address from <address> + the contents of the
LDX <address>
Index Register. Copy the contents of this calculated address to ACC.
LDR #n Immediate addressing. Load the denary number n to IX.
STO <address> Store contents of ACC at the given address.
ADD <address> Add the contents of the given address to ACC.
INC <register> Add 1 to the contents of the register (ACC or IX).
CMP #n Compare contents of ACC with denary number n.
JPE <address> Following a compare instruction, jump to <address> if the compare was True.
JPN <address> Following a compare instruction, jump to <address> if the compare was False.
JMP <address> Jump to the given address.
OUT Output to screen the character whose ASCII value is stored in ACC.
END Return control to the operating system.

The current contents of the main memory, Index Register (IX) and selected values from the
ASCII character set are:

Address Instruction ASCII code table (Selected codes only)

20 LDM #0 ASCII Code Character
21 STO 300
22 CMP #0 65 A
23 JPE 28 66 B
24 LDX 100 + IX 1 67 C
25 ADD 301
JPE->True 26 OUT 68 D
69 E
JPN-> False 27
28
JMP 30
LDX 100 + IX 100+0=100 97 a
29 OUT
30 LDD 300 98 b
31 INC ACC 99 c
32 STO 300 100 d
33 INC IX
101 e
34 CMP #2
35 JPN 22
36 END
…
100 65
101 67
102 69
103 69
104 68
…
300
301 33

IX 0
© UCLES 2019 9608/11/M/J/19
 11

Trace the program currently in memory using the following trace table. The first instruction
has been completed for you.

Instruction Memory address

ACC IX OUTPUT
address 100 101 102 103 104 300 301

65 67 69 69 68 33 0

20 0

21 0
22 0=0
True
23
28 65
29 A
30 0
31 1
32 1
33 1
34 1=2False
22 1=0 False
24 67
25 100
26 d
27
30 1
31 2
32 2
33 2
34 2=2 True

[8]

© UCLES 2019 9608/11/M/J/19 [Turn over

 6

(c) The following table shows assembly language instructions for a processor which has one
general purpose register, the Accumulator (ACC), and an Index Register (IX).

Instruction
Explanation
Op code Operand
LDM #n Immediate addressing. Load the denary number n to ACC
Direct addressing. Load the contents of the location at the given address to
LDD <address>
ACC
Indexed addressing. Form the address from <address> + the contents of the
LDX <address>
Index Register. Copy the contents of this calculated address to ACC
LDR #n Immediate addressing. Load the denary number n to IX
STO <address> Store contents of ACC at the given address
ADD <address> Add the contents of the given address to ACC
INC <register> Add 1 to the contents of the register (ACC or IX)
CMP #n Compare contents of ACC with denary number n
JPE <address> Following a compare instruction, jump to <address> if the compare was True
JPN <address> Following a compare instruction, jump to <address> if the compare was False
JMP <address> Jump to the given address
OUT Output to the screen the character whose ASCII value is stored in ACC
END Return control to the operating system

The current contents of the main memory, Index Register (IX) and selected values from the
ASCII character set are:

Address Instruction ASCII code table (Selected codes only)

50 LDM #0 ASCII code Character
51 STO 401
65 A
300+1=301 52 LDX 300 + 0 = 300
66 B
53 CMP #0
54 JPE 62 67 C
55 ADD 400 68 D
56 OUT 69 E
57 LDD 401
58 INC ACC
59 STO 401
60 INC IX
61 JMP 52
62 END
…
300 2
301 5
302 0
303 4
…
400 64
401

IX 0
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 7

Trace the program currently in memory using the following trace table.
The first instruction has been completed for you.

Instruction Memory address

ACC IX OUTPUT
address 300 301 302 303 400 401

2 5 0 4 64 0

50 0

51 0

52 2
53 2=0 (False)
54

55 2+64 = 66
56 B
57 0

58 1
59 1
60 1

61
52 5

53 5=0 False
54

55 69

56 E
57 1

[8]

© UCLES 2019 9608/12/M/J/19 [Turn over

 8

(d) The ASCII character code for ‘A’ is 65 in denary.

(i) Convert the denary ASCII character code for ‘A’ into 8-bit binary.

[1]

(ii) Convert the denary ASCII character code for ‘A’ into hexadecimal.

..................................................................................................................................... [1]

(iii) The Unicode character code for ‘G’ is 0047 in hexadecimal.

State, in hexadecimal, the Unicode character code for ‘D’.

..................................................................................................................................... [1]

© UCLES 2019 9608/12/M/J/19

 11

4 A program is written in assembly language.

(a) The op codes LDM and LDD are used to load a register. The op code LDM uses immediate
addressing, and the op code LDD uses direct addressing.

Describe what happens when the following instructions are run. 27 value
LDM #300
300
Address
...................................................................................................................................................
300
...................................................................................................................................................
ACC
LDD 300

...................................................................................................................................................
27
...................................................................................................................................................
[2]
ACC
(b) Assembly language instructions can be grouped by their purpose.

The following table shows four assembly language instructions.

Tick (✓) one box in each row to indicate the group each instruction belongs to.

Jump Arithmetic Data

Instruction Description
instruction operation movement
LDR #3 Load the number 3 to the
Index Register
ADD #2 Add 2 to the Accumulator

JPN 22 Move to the instruction at

address 22
DEC ACC Subtract 1 from the
Accumulator
[3]

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 10

6 A processor has one general purpose register, the Accumulator (ACC), and an Index Register
(IX).

(a) The table gives three assembly language instructions for loading data into the ACC. It also
identifies the addressing mode used for each instruction.

Instruction Addressing mode

A LDM #193 Immediate
B LDD 193 Direct
C LDX 193 Indexed

(i) State the contents of the Accumulator after each of the instructions A, B and C are run.
193
A ........................................................................................................................................

...........................................................................................................................................

B ........................................................................................................................................

...........................................................................................................................................

C ........................................................................................................................................

...........................................................................................................................................
[3]

(ii) Name two other addressing modes.

1 ........................................................................................................................................

2 ........................................................................................................................................
[2]

(b) The ACC is a general purpose register. The IX is a special purpose register.

Identify two other special purpose registers used in the fetch-execute cycle and describe
their role in the cycle.

Register 1 .................................................................................................................................

Role ..........................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

Register 2 .................................................................................................................................

Role ..........................................................................................................................................

...................................................................................................................................................

...................................................................................................................................................
[4]
© UCLES 2020 9608/11/M/J/20
 9

(b) The assembler translates assembly code into machine code.

The table shows the denary values for three assembler op codes.

Op code Denary value

LDD 194
ADD 200
STO 205

(i) Convert the denary value for the op code LDD into 8‑bit binary.

[1]

(ii) Convert the denary value for the op code STO into hexadecimal.

..................................................................................................................................... [1]

(iii) State why the denary value for the op code ADD cannot be represented in 8‑bit two’s
complement form. Justify your answer.

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

..................................................................................................................................... [2]

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 10

(c) The table shows part of the instruction set for a processor. The processor has one general
purpose register, the Accumulator (ACC), and an Index Register (IX).

Instruction
Explanation
Op code Operand
LDM #n Immediate addressing. Load the denary number n to ACC
Direct addressing. Load the contents of the location at the given address to
LDD <address>
ACC
Indexed addressing. Form the address from <address> + the contents of the
LDX <address>
Index Register. Copy the contents of this calculated address to ACC
LDR #n Immediate addressing. Load the denary number n to IX
STO <address> Store contents of ACC at the given address
ADD <address> Add the contents of the given address to ACC
INC <register> Add 1 to the contents of the register (ACC or IX)
CMP <address> Compare contents of the address given with the contents of ACC
JPE <address> Following a compare instruction, jump to <address> if the compare was True
JPN <address> Following a compare instruction, jump to <address> if the compare was False
JMP <address> Jump to the given address
OUT Output to screen the character whose ASCII value is stored in ACC
END Return control to the operating system

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 11

Complete the trace table for the following assembly language program. The first instruction
has been completed for you.

Address Instruction Memory address

Instruction
20 LDD 103 ACC
address
21 CMP 101 2=0 100 101 102 103

22 JPE 30 1 2 3 0

23 LDD 100 20 0
24 ADD 101
21 0=2
25 STO 100
22
26 LDD 103
27 INC ACC 23 1
28 STO 103 24 1+2=3
29 JMP 20
25 3
30 END
26 0
…
27 1
100 1
101 2
28 1
102 3 29
103 0 20 1
1=2

[6]
© UCLES 2020 9608/12/M/J/20 [Turn over
 10

8 The table shows assembly language instructions for a processor which has one general purpose
register, the Accumulator (ACC) and an Index Register (IX).

Instruction
Explanation
Op code Operand
LDD <address> Direct addressing. Load the contents of the given address to ACC.
Indexed addressing. Form the address from <address> + the
LDX <address> contents of the index register. Copy the contents of this calculated
address to ACC.
STO <address> Store contents of ACC at the given address.
ADD <address> Add the contents of the given address to ACC.
CMP <address> Compare contents of ACC with contents of <address>
Following a compare instruction, jump to <address> if the compare
JPE <address>
was True.
Following a compare instruction, jump to <address> if the compare
JPN <address>
was False.
JMP <address> Jump to the given address.
Output to the screen the character whose ASCII value is stored in
OUT
ACC.
END Return control to the operating system.

The diagram shows the contents of the main memory:

Main memory
800 0110 0100
801 0111 1100
802 1001 0111
803 0111 0011
804 1001 0000
805 0011 1111
806 0000 1110
807 1110 1000
808 1000 1110
809 1100 0010
:
:
2000 1011 0101

(a) (i) Show the contents of the Accumulator after execution of the instruction:

LDD 802

Accumulator:
[1]

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 11

(ii) Show the contents of the Accumulator after execution of the instruction:

LDX 800

Index Register: 0 0 0 0 1 0 0 1

Accumulator: 1 0

Explain how you arrived at your answer.

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

.......................................................................................................................................[3]

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 12

(b) (i) Complete the trace table below for the following assembly language program. This
program contains denary values.

100 LDD 800

101 ADD 801
102 STO 802
103 LDD 803
104 CMP 802
105 JPE 107
106 JPN 110
107 STO 802
108 OUT
109 JMP 112
110 LDD 801
111 OUT
112 END
:
:
800 40
801 50
802 0
803 90

Selected values from the ASCII character set:

ASCII code 40 50 80 90 100

Character ( 2 P Z d

Trace table:

Memory address
ACC OUTPUT
800 801 802 803

40 50 0 90

[4]

© UCLES 2016 9608/11/O/N/16

 13

(ii) There is a redundant instruction in the code in part (b)(i).

State the address of this instruction.

.......................................................................................................................................[1]

(c) The program used the ASCII coding system for character codes. An alternative coding system
is Unicode.

(i) Give two disadvantages of using ASCII code.

1 ........................................................................................................................................

...........................................................................................................................................

2 ........................................................................................................................................

.......................................................................................................................................[2]

(ii) Describe how Unicode is designed to overcome the disadvantages of ASCII.

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

.......................................................................................................................................[2]

© UCLES 2016 9608/11/O/N/16

 6

5 The table shows assembly language instructions for a processor that has one general purpose
register, the Accumulator (ACC) and an index register (IX).

Instruction
Explanation
Op Code Operand
Direct addressing. Load the contents of the given address to
LDD <address>
ACC.
Index addressing. Form the address from <address> +
LDX <address> the contents of the index register. Copy the contents of this
calculated address to ACC.
Indirect addressing. The address to be used is at the given
LDI <address>
address. Load the contents of this second address to ACC.

STO <address> Store the contents of ACC at the given address.

INC <register> Add 1 to contents of the register (ACC or IX).

ADD <address> Add the contents of the given address to the ACC.

END Return control to the operating system.

The diagram shows the contents of a section of main memory:

Main memory

100 0000 0010

101 1001 0011
102 0111 0011
103 0110 1011 64+32+8+2+1 = 107
104 0111 1110
105 1011 0001
106 0110 1000
107 0100 1011

200 1001 1110

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 7

(a) (i) Show the contents of the Accumulator after the execution of the instruction:

LDD 102

ACC: 0111 0011

[1]

(ii) Show the contents of the Accumulator after the execution of the instruction:

LDX 101 +4 = 105

IX: 0 0 0 0 0 1 0 0 4

ACC: 1011 0001

Explain how you arrived at your answer.

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

.......................................................................................................................................[2]

(iii) Show the contents of the Accumulator after the execution of the instruction:

LDI 103

ACC: 0100 1011

Explain how you arrived at your answer.

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

.......................................................................................................................................[3]

© UCLES 2016 9608/12/O/N/16 [Turn over

 8

(b) Complete the trace table below for the following assembly language program.

800 LDD 810

801 INC ACC

802 STO 812

803 LDD 811

804 ADD 812

805 STO 813

806 END

810 28
811 41
812 0
813 0

Trace table:

Memory address
ACC
810 811 812 813

28 41 0 0

28
29
29
41
70
70
[6]

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 10

8 The table shows assembly language instructions for a processor which has one general purpose
register, the Accumulator (ACC) and an Index Register (IX).

Instruction
Explanation
Op code Operand
LDD <address> Direct addressing. Load the contents of the given address to ACC.
Indexed addressing. Form the address from <address> + the
LDX <address> contents of the index register. Copy the contents of this calculated
address to ACC.
STO <address> Store contents of ACC at the given address.
ADD <address> Add the contents of the given address to ACC.
CMP <address> Compare contents of ACC with contents of <address>
Following a compare instruction, jump to <address> if the compare
JPE <address>
was True.
Following a compare instruction, jump to <address> if the compare
JPN <address>
was False.
JMP <address> Jump to the given address.
Output to the screen the character whose ASCII value is stored in
OUT
ACC.
END Return control to the operating system.

The diagram shows the contents of the main memory:

Main memory
800 0110 0100
801 0111 1100
802 1001 0111
803 0111 0011
804 1001 0000
805 0011 1111
806 0000 1110
807 1110 1000
808 1000 1110
809 1100 0010
:
:
2000 1011 0101

(a) (i) Show the contents of the Accumulator after execution of the instruction:

LDD 802

Accumulator:
[1]

© UCLES 2016 9608/13/O/N/16

 11

(ii) Show the contents of the Accumulator after execution of the instruction:

LDX 800

Index Register: 0 0 0 0 1 0 0 1

Accumulator:

Explain how you arrived at your answer.

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

.......................................................................................................................................[3]

© UCLES 2016 9608/13/O/N/16 [Turn over

 12

(b) (i) Complete the trace table below for the following assembly language program. This
program contains denary values.

100 LDD 800

101 ADD 801
102 STO 802
103 LDD 803
104 CMP 802
105 JPE 107
106 JPN 110
107 STO 802
108 OUT
109 JMP 112
110 LDD 801
111 OUT
112 END
:
:
800 40
801 50
802 0
803 90

Selected values from the ASCII character set:

ASCII code 40 50 80 90 100

Character ( 2 P Z d

Trace table:

Memory address
ACC OUTPUT
800 801 802 803

40 50 0 90

[4]

© UCLES 2016 9608/13/O/N/16

 13

(ii) There is a redundant instruction in the code in part (b)(i).

State the address of this instruction.

.......................................................................................................................................[1]

(c) The program used the ASCII coding system for character codes. An alternative coding system
is Unicode.

(i) Give two disadvantages of using ASCII code.

1 ........................................................................................................................................

...........................................................................................................................................

2 ........................................................................................................................................

.......................................................................................................................................[2]

(ii) Describe how Unicode is designed to overcome the disadvantages of ASCII.

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

.......................................................................................................................................[2]

© UCLES 2016 9608/13/O/N/16

 10

The following shows two of the program instructions in machine code.

Machine code
Instruction Binary Hexadecimal
OUTCH 1100 0111 C7
JNE CarryOn A B

Each of the numbers A and B represents the complete instruction in two bytes, one byte for
the op code and one byte for the operand.

(ii) Use the following instruction set to write the numbers for A and B.

A (binary) ........................................................................................................................

B (hexadecimal) .............................................................................................................
[3]

Instruction
Op code Op code Explanation
Operand
(mnemonic) (binary)
LDM #n 1100 0001 Immediate addressing. Load number n to ACC.
Direct addressing. Load the contents of the given
LDD <address> 1100 0010
address to ACC.
Relative addressing. Move to the address n locations
LDV #n 1100 0011 from the address of the current instruction. Load the
contents of this address to ACC.
STO <address> 1100 0100 Store the contents of ACC at the given address.
DEC 1100 0101 Decrement the contents of ACC.
Output the character corresponding to the ASCII
OUTCH 1100 0111
character code in ACC.
Following a compare instruction, jump to <address> if
JNE <address> 1110 0110
the compare was False.
JMP <address> 1110 0011 (Unconditionally) jump to the given address.
CMP #n 1110 0100 Compare the contents of ACC with number n.

© UCLES 2017 9608/11/O/N/17

 6

(b) The following table shows part of the instruction set for a processor. The processor has one
general purpose register, the Accumulator (ACC), and an Index Register (IX).

Instruction
Op code Op code Explanation
Operand
(mnemonic) (binary)
LDM #n 1100 0001 Immediate addressing. Load number n to ACC.
Direct addressing. Load the contents of the given
LDD <address> 1100 0010
address to ACC.
Relative addressing. Move to the address n locations
LDV #n 1100 0011 from the address of the current instruction. Load the
contents of this address to ACC.
STO <address> 1100 0100 Store the contents of ACC at the given address.
DEC 1100 0101 Decrement the contents of ACC.
Output the character corresponding to the ASCII
OUTCH 1100 0111
character code in ACC.
Following a compare instruction, jump to <address> if
JNE <address> 1110 0110
the compare was False.
JMP <address> 1110 0011 (Unconditionally) jump to the given address.
CMP #n 1110 0100 Compare the contents of ACC with number n.

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 7

Complete the trace table for the following assembly language program.
Label Instruction
StartProg: LDV #CountDown
CMP Num1
ASCII code table (selected codes only)
JNE CarryOn
<Space> 3 B C X
JMP Finish
32 51 66 67 88
CarryOn: OUTCH
LDD CountDown
DEC
STO CountDown
JMP StartProg
Finish: LDM #88
OUTCH
END
CountDown: 15
32
51
67
Num1: 32

Trace table:

ACC CountDown OUTPUT

15
67 C
15
14
14

[5]

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 10

The following shows two of the program instructions in machine code.

Machine code
Instruction Binary Hexadecimal
OUTCH 1100 0111 C7
JNE CarryOn A B

Each of the numbers A and B represents the complete instruction in two bytes, one byte for
the op code and one byte for the operand.

(ii) Use the following instruction set to write the numbers for A and B.

A (binary) ........................................................................................................................

B (hexadecimal) .............................................................................................................
[3]

Instruction
Op code Op code Explanation
Operand
(mnemonic) (binary)
LDM #n 1100 0001 Immediate addressing. Load number n to ACC.
Direct addressing. Load the contents of the given
LDD <address> 1100 0010
address to ACC.
Relative addressing. Move to the address n locations
LDV #n 1100 0011 from the address of the current instruction. Load the
contents of this address to ACC.
STO <address> 1100 0100 Store the contents of ACC at the given address.
DEC 1100 0101 Decrement the contents of ACC.
Output the character corresponding to the ASCII
OUTCH 1100 0111
character code in ACC.
Following a compare instruction, jump to <address> if
JNE <address> 1110 0110
the compare was False.
JMP <address> 1110 0011 (Unconditionally) jump to the given address.
CMP #n 1110 0100 Compare the contents of ACC with number n.

© UCLES 2017 9608/13/O/N/17

 6

4 The table shows assembly language instructions for a processor which has one general purpose
register, the Accumulator (ACC) and an index register (IX).

Instruction
Explanation
Op code Operand
Direct addressing. Load the contents of the location at the given
LDD <address>
address to ACC.
Indexed addressing. Form the address from <address> + the
LDX <address> contents of the Index Register. Copy the contents of this calculated
address to ACC.
LDR #n Immediate addressing. Load the number n to IX.
STO <address> Store contents of ACC at the given address.
ADD <address> Add the contents of the given address to ACC.
INC <register> Add 1 to the contents of the register (ACC or IX).
DEC <register> Subtract 1 from the contents of the register (ACC or IX).
CMP <address> Compare contents of ACC with contents of <address>.
Following a compare instruction, jump to <address> if the compare
JPE <address>
was True.
Following a compare instruction, jump to <address> if the compare
JPN <address>
was False.
JMP <address> Jump to the given address.
OUT Output to the screen the character whose ASCII value is stored in ACC.
END Return control to the operating system.

(a) (i) State what is meant by direct addressing and indirect addressing.

Direct addressing ..............................................................................................................

...........................................................................................................................................

Indirect addressing ............................................................................................................

...........................................................................................................................................
[2]

(ii) Explain how the instruction ADD 20 can be interpreted as either direct or indirect
addressing.

Direct addressing ..............................................................................................................

...........................................................................................................................................

Indirect addressing ............................................................................................................

...........................................................................................................................................
[2]

© UCLES 2018 9608/11/O/N/18

 7

(b) The assembly language instructions in the following table use either symbolic addressing or
absolute addressing.

Tick (3) one box in each row to indicate whether the instruction uses symbolic or absolute
addressing.

Instruction Symbolic Absolute

ADD 90

CMP found

STO 20

[2]

(c) The current contents of a general purpose register (X) are:

X 1 0 1 1 1 0 1 0

(i) The contents of X represent an unsigned binary integer.

Convert the value in X into denary.

.......................................................................................................................................[1]

(ii) The contents of X represent an unsigned binary integer.

Convert the value in X into hexadecimal.

.......................................................................................................................................[1]

(iii) The contents of X represent a two’s complement binary integer.

Convert the value in X into denary.

.......................................................................................................................................[1]

© UCLES 2018 9608/11/O/N/18 [Turn over

 8

(d) The current contents of the main memory, Index Register (IX) and selected values from the
ASCII character set are provided with a copy of the instruction set.

Address Instruction ASCII code table (selected codes only)

70 LDX 200 ASCII code Character
71 OUT 127 ?
72 STO 203 128 !
73 LDD 204 129 “
74 INC ACC 130 *
75 STO 204 131 $
76 INC IX 132 &
77 LDX 200 133 %
78 CMP 203 134 /
79 JPN 81
Instruction set
80 OUT
81 LDD 204 Instruction
Op Explanation
82 CMP 205 Operand
code
83 JPN 74
Direct addressing. Load the contents of
84 END LDD <address>
the location at the given address to ACC.
… Indexed addressing. Form the address
from <address> + the contents of the
LDX <address>
200 130 Index Register. Copy the contents of this
calculated address to ACC.
201 133
Immediate addressing. Load the number
202 130 LDR #n
n to IX.
203 0 Store contents of ACC at the given
STO <address>
address.
204 0
Add the contents of the given address to
205 2 ADD <address>
ACC.
Add 1 to the contents of the register (ACC
INC <register>
or IX).
IX 0
Subtract 1 from the contents of the
DEC <register>
register (ACC or IX).
Compare contents of ACC with contents of
CMP <address>
<address>.
Following a compare instruction, jump to
JPE <address>
<address> if the compare was True.
Following a compare instruction, jump to
JPN <address>
<address> if the compare was False.
JMP <address> Jump to the given address.
Output to the screen the character whose
OUT
ASCII value is stored in ACC.
END Return control to the operating system.

© UCLES 2018 9608/11/O/N/18

 9

Complete the trace table for the given assembly language program.

Instruction Memory address

ACC IX OUTPUT
address 200 201 202 203 204 205

70 130 130 133 130 0 0 2 0

[8]

© UCLES 2018 9608/11/O/N/18 [Turn over

 6

3 The following table shows assembly language instructions for a processor which has one general
purpose register, the Accumulator (ACC) and an Index Register (IX).

Instruction
Explanation
Op code Operand

LDD <address> Direct addressing. Load the contents of the location at the given address to
ACC.
LDX <address> Indexed addressing. Form the address from <address> + the contents of the
Index Register. Copy the contents of this calculated address to ACC.
LDR #n Immediate addressing. Load the number n to IX.
STO <address> Store contents of ACC at the given address.
ADD <address> Add the contents of the given address to ACC.
INC <register> Add 1 to the contents of the register (ACC or IX).
DEC <register> Subtract 1 from the contents of the register (ACC or IX).
CMP <address> Compare contents of ACC with contents of <address>.
JPE <address> Following compare instruction, jump to <address> if the compare was True.
JPN <address> Following compare instruction, jump to <address> if the compare was False.
JMP <address> Jump to the given address.
OUT Output to the screen the character whose ASCII value is stored in ACC.
END Return control to the operating system.

(a) (i) State what is meant by absolute addressing and symbolic addressing.

Absolute addressing ..........................................................................................................

...........................................................................................................................................

Symbolic addressing .........................................................................................................

...........................................................................................................................................
[2]

(ii) Give an example of an ADD instruction using both absolute addressing and symbolic
addressing.

Absolute addressing ..........................................................................................................

Symbolic addressing .........................................................................................................

[2]

© UCLES 2018 9608/12/O/N/18

 7

(b) (i) State what is meant by indexed addressing and immediate addressing.

Indexed addressing ...........................................................................................................

...........................................................................................................................................

Immediate addressing .......................................................................................................

...........................................................................................................................................
[2]

(ii) Give an example of an instruction that uses:

Indexed addressing ...........................................................................................................

Immediate addressing .......................................................................................................

[2]

(c) The current contents of a general purpose register (X) are:

X 1 1 0 0 0 0 0 1

(i) The contents of X represent an unsigned binary integer.

Convert the value in X into denary.

...................................................................................................................................... [1]

(ii) The contents of X represent an unsigned binary integer.

Convert the value in X into hexadecimal.

...................................................................................................................................... [1]

(iii) The contents of X represent a two’s complement binary integer.

Convert the value in X into denary.

...................................................................................................................................... [1]

© UCLES 2018 9608/12/O/N/18 [Turn over

 8

(d) The current contents of the main memory, Index Register (IX) and selected values from the
ASCII character set are:

Address Instruction ASCII code table (selected codes only)

40 LDD 100 ASCII code Character
41 CMP 104 300 /
42 JPE 54 301 *
43 LDX 100 302 -
44 CMP 105 303 +
45 JPN 47 304 ^
46 OUT 305 =
47 LDD 100
48 DEC ACC
49 STO 100
50 INC IX
51 JMP 41
52
53
54 END

100 2
101 302
102 303
103 303
104 0
105 303

IX 1

This is a copy of the instruction set.

Instruction
Explanation
Op code Operand

LDD <address> Direct addressing. Load the contents of the location at the given address to
ACC.
LDX <address> Indexed addressing. Form the address from <address> + the contents of the
Index Register. Copy the contents of this calculated address to ACC.
LDR #n Immediate addressing. Load the number n to IX.
STO <address> Store contents of ACC at the given address.
ADD <address> Add the contents of the given address to ACC.
INC <register> Add 1 to the contents of the register (ACC or IX).
DEC <register> Subtract 1 from the contents of the register (ACC or IX).
CMP <address> Compare contents of ACC with contents of <address>.
JPE <address> Following a compare instruction, jump to <address> if the compare was True.
JPN <address> Following a compare instruction, jump to <address> if the compare was False.
JMP <address> Jump to the given address.
OUT Output to the screen the character whose ASCII value is stored in ACC.
END Return control to the operating system.

© UCLES 2018 9608/12/O/N/18

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Complete the trace table for the given assembly language program.

Instruction Memory address

address ACC IX OUTPUT
100 101 102 103 104 105
2 302 303 303 0 303 1
40

[7]

© UCLES 2018 9608/12/O/N/18 [Turn over

 4

2 The following table shows assembly language instructions for a processor which has one general
purpose register, the Accumulator (ACC) and an Index Register (IX).

Instruction
Explanation
Op code Operand
Direct addressing. Load the contents of the location at the given address
LDD <address>
to ACC.
Indexed addressing. Form the address from <address> + the contents of
LDX <address>
the Index Register. Copy the contents of this calculated address to ACC.
LDR #n Immediate addressing. Load the number n to IX.
STO <address> Store contents of ACC at the given address.
ADD <address> Add the contents of the given address to ACC.
INC <register> Add 1 to the contents of the register (ACC or IX).
DEC <register> Subtract 1 from the contents of the register (ACC or IX).
CMP <address> Compare contents of ACC with contents of <address>.
Following compare instruction, jump to <address> if the compare was
JPE <address>
True.
Following compare instruction, jump to <address> if the compare was
JPN <address>
False.
JMP <address> Jump to the given address.
OUT Output to the screen the character whose ASCII value is stored in ACC.
END Return control to the operating system.

(a) State what is meant by relative addressing and indexed addressing.

Relative addressing ...................................................................................................................

...................................................................................................................................................

...................................................................................................................................................

Indexed addressing ...................................................................................................................

...................................................................................................................................................

...................................................................................................................................................
[2]

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(b) The current contents of a general purpose register (X) are:

X 1 1 1 1 0 0 1 0

(i) The contents of X represent an unsigned binary integer.

Convert the value in X into denary.

.......................................................................................................................................[1]

(ii) The contents of X represent an unsigned binary integer.

Convert the value in X into hexadecimal.

.......................................................................................................................................[1]

(iii) The contents of X represent a two’s complement binary integer.

Convert the value in X into denary.

.......................................................................................................................................[1]

(iv) Show the result on the general purpose register (X) after the following instruction is run.

INC X

[1]

© UCLES 2018 9608/13/O/N/18 [Turn over

 6

(c) The current contents of the main memory, Index Register (IX) and selected values from the
ASCII character set are provided with a copy of the instruction set.

Address Instruction ASCII code table (selected codes only)

20 LDD 96 ASCII code Character
21 CMP 97 450 <
22 JPE 32 451 >
23 LDX 86 452 =
24 CMP 98 453 &
25 JPN 27 454 (
26 OUT 455 )
27 LDD 96 Instruction set
28 INC ACC Instruction
29 STO 96 Op Explanation
Operand
30 INC IX code

31 JMP 21 Direct addressing. Load the contents of

LDD <address>
the location at the given address to ACC.
32 END
Indexed addressing. Form the address
… from <address> + the contents of the
LDX <address>
Index Register. Copy the contents of this
93 453 calculated address to ACC.
94 453 Immediate addressing. Load the number
LDR #n
n to IX.
95 452
96 8 Store contents of ACC at the given
STO <address>
address.
97 10
Add the contents of the given address to
98 453 ADD <address>
ACC.
Add 1 to the contents of the register (ACC
INC <register>
or IX).
IX 8
Subtract 1 from the contents of the
DEC <register>
register (ACC or IX).
Compare contents of ACC with contents of
CMP <address>
<address>.
Following a compare instruction, jump to
JPE <address>
<address> if the compare was True.
Following a compare instruction, jump to
JPN <address>
<address> if the compare was False.
JMP <address> Jump to the given address.
Output to the screen the character whose
OUT
ASCII value is stored in ACC.
END Return control to the operating system.

© UCLES 2018 9608/13/O/N/18

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Complete the trace table for the given assembly language program.

Instruction Memory address

ACC IX OUTPUT
address 93 94 95 96 97 98
453 453 452 8 10 453 8
20

[7]

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 6

3 The table shows the assembly language instructions for a processor which has one general
purpose register – the Accumulator.

Instruction
Explanation
Op Code Operand

LDD <address> load using direct addressing

STO <address> store the contents of the Accumulator at the given address

LDI <address> load using indirect addressing

LDX <address> load using indexed addressing

INC add 1 to the contents of the Accumulator

END end the program and return to the operating system

(a) Write on the diagram to explain the instruction shown.

Show the contents of the Accumulator after the execution of the instruction.

LDD 105 Main memory

100 0100 0000
101 0110 1000
Accumulator 102 1111 1110
103 1111 1010
104 0101 1101
105 0001 0001
106 1010 1000
107 1100 0001

200 1001 1111

[2]

(b) Write on the diagram to explain the instruction shown.

Show the contents of the registers after the execution of the instruction.

LDX 101 Main memory

100 0100 0000
101 0110 1000
Accumulator 102 1111 1110
103 1111 1010
104 0101 1101
105 0001 0001
Index Register 106 1010 1000
0000 0011 107 1100 0001

200 1001 1111

[4]

© UCLES 2012 9608/01/SP/15

 7

(c) Trace this assembly language program using the trace table.

500 LDD 507

501 INC
502 STO 509
503 LDD 508
504 INC
505 STO 510
506 END
507 22
508 170
509 0
510 0

Memory Address
Accumulator 507 508 509 510
22 170 0 0

[5]

© UCLES 2012 9608/01/SP/15 [Turn over

 14

7 The table shows assembly language instructions for a processor which has one general purpose
register, the Accumulator (ACC).

Instruction
Explanation
Op code Operand

LDD <address> Direct addressing. Load contents of given address to ACC

STO <address> Store the contents of ACC at the given address

Indirect addressing. The address to be used is at the given

LDI <address>
address. Load the contents of this second address to ACC

Indexed addressing. Form the address from <address> +

LDX <address> the contents of the index register. Copy the contents of this
calculated address to ACC

INC <register> Add 1 to contents of the register (ACC)

JMP <address> Jump to the given address

END Return control to operating system

The diagram shows the contents of the memory.

Main memory

120 0000 1001

121 0111 0101

122 1011 0110

123 1110 0100

124 0111 1111 127 (address)

125 0000 0001

126 0100 0001

127 0110 1001

200 1000 1000

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 15

(a) (i) Show the contents of the Accumulator after execution of the instruction:

D--> Direct from address 121 LDD 121

Accumulator: 0 1 1 1 0 1 0 1
[1]

(ii) Show the contents of the Accumulator after execution of the instruction:

I--> Indirect from address 124 LDI 124

Accumulator:
0110 1001

Explain how you arrived at your answer.

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

...................................................................................................................................... [3]

(iii) Show the contents of the Accumulator after execution of the instruction:
Operand + IX
LDX 120 + 6 = 126

Index Register: 0 0 0 0 0 1 1 0
4 2
0100 0001
Accumulator:

Explain how you arrived at your answer.

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

...................................................................................................................................... [3]

© UCLES 2015 9608/13/M/J/15 [Turn over

 16

(b) Trace the assembly language program using the trace table.

300 LDD 321

301 INC
302 STO 323
303 LDI 307
304 INC
305 STO 322
306 END
307 320

320 49
321 36
322 0
323 0

Trace table:

Memory address
Accumulator
320 321 322 323

49 36 0 0
36
37
37

[6]

Permission to reproduce items where third-party owned material protected by copyright is included has been sought and cleared where possible. Every reasonable
effort has been made by the publisher (UCLES) to trace copyright holders, but if any items requiring clearance have unwittingly been included, the publisher will
be pleased to make amends at the earliest possible opportunity.

To avoid the issue of disclosure of answer-related information to candidates, all copyright acknowledgements are reproduced online in the Cambridge International
Examinations Copyright Acknowledgements Booklet. This is produced for each series of examinations and is freely available to download at www.cie.org.uk after
the live examination series.

Cambridge International Examinations is part of the Cambridge Assessment Group. Cambridge Assessment is the brand name of University of Cambridge Local
Examinations Syndicate (UCLES), which is itself a department of the University of Cambridge.

© UCLES 2015 9608/13/M/J/15

 12

9 The table shows assembly language instructions for a processor which has one general purpose
register, the Accumulator (ACC) and an index register (IX).

Instruction
Explanation

Op code Operand

LDD <address> Direct addressing. Load the contents of the given address to ACC.

LDX <address> Indexed addressing. Form the address from <address> + the contents of the
index register. Copy the contents of this calculated address to ACC.
STO <address> Store contents of ACC at the given address.

ADD <address> Add the contents of the given address to ACC.

INC <register> Add 1 to the contents of the register (ACC or IX).

DEC <register> Subtract 1 from the contents of the register (ACC or IX).

CMP <address> Compare contents of ACC with contents of <address>.

JPE <address> Following a compare instruction, jump to <address> if the compare was True.

JPN <address> Following a compare instruction, jump to <address> if the compare was
False.
JMP <address> Jump to the given address.

OUT Output to screen the character whose ASCII value is stored in ACC.

END Return control to the operating system.

(a) The diagram shows the current contents of a section of main memory and the index register:

60 0011 0010
61 0101 1101
62 0000 0100
63 1111 1001
64 0101 0101
65 1101 1111
66 0000 1101
67 0100 1101
68 0100 0101
69 0100 0011
...
1000 0110 1001

Index register: 0 0 0 0 1 0 0 0
8
© UCLES 2016 9608/11/M/J/16
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(i) Show the contents of the Accumulator after the execution of the instruction:

LDX 60 +8 = 68
Accumulator: 0100 0101

Show how you obtained your answer.

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

.......................................................................................................................................[2]

(ii) Show the contents of the index register after the execution of the instruction:

DEC IX

Index register:
[1]

© UCLES 2016 9608/11/M/J/16 [Turn over

 14

(b) Complete the trace table on the opposite page for the following assembly language program.

50 LDD 100

51 ADD 102

52 STO 103

53 LDX 100

54 ADD 100

55 CMP 101

56 JPE 58

57 JPN 59

58 OUT

59 INC IX

60 LDX 98

61 ADD 101

62 OUT

63 END

...

100 20

101 100

102 1

103 0

IX (Index Register) 1

Selected values from the ASCII character set:

ASCII Code 118 119 120 121 122 123 124 125
Character v w x y z { | }

© UCLES 2016 9608/11/M/J/16

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Trace table:

Memory address
Instruction Working ACC IX OUTPUT
address space 100 101 102 103

20 100 1 0 1

50

51

52

53

54

55

[7]

© UCLES 2016 9608/11/M/J/16

 12

9 The table shows assembly language instructions for a processor which has one general purpose
register, the Accumulator (ACC) and an index register (IX).

Instruction
Explanation

Op code Operand

LDD <address> Direct addressing. Load the contents of the given address to ACC.

LDX <address> Indexed addressing. Form the address from <address> + the contents of the
index register. Copy the contents of this calculated address to ACC.
STO <address> Store contents of ACC at the given address.

ADD <address> Add the contents of the given address to ACC.

INC <register> Add 1 to the contents of the register (ACC or IX).

DEC <register> Subtract 1 from the contents of the register (ACC or IX).

CMP <address> Compare contents of ACC with contents of <address>.

JPE <address> Following a compare instruction, jump to <address> if the compare was True.

JPN <address> Following a compare instruction, jump to <address> if the compare was
False.
JMP <address> Jump to the given address.

OUT Output to screen the character whose ASCII value is stored in ACC.

END Return control to the operating system.

(a) The diagram shows the current contents of a section of main memory and the index register:

60 0011 0010
61 0101 1101
62 0000 0100
63 1111 1001
64 0101 0101
65 1101 1111
66 0000 1101
67 0100 1101
68 0100 0101
69 0100 0011
...
1000 0110 1001

Index register: 0 0 0 0 1 0 0 0

© UCLES 2016 9608/12/M/J/16

 13

(i) Show the contents of the Accumulator after the execution of the instruction:

LDX 60

Accumulator:

Show how you obtained your answer.

...........................................................................................................................................

...........................................................................................................................................

...........................................................................................................................................

.......................................................................................................................................[2]

(ii) Show the contents of the index register after the execution of the instruction:

DEC IX

Index register:
[1]

© UCLES 2016 9608/12/M/J/16 [Turn over

 14

(b) Complete the trace table on the opposite page for the following assembly language program.

50 LDD 100

51 ADD 102

52 STO 103

53 LDX 100

54 ADD 100

55 CMP 101

56 JPE 58

57 JPN 59

58 OUT

59 INC IX

60 LDX 98

61 ADD 101

62 OUT

63 END

...

100 20

101 100

102 1

103 0

IX (Index Register) 1

Selected values from the ASCII character set:

ASCII Code 118 119 120 121 122 123 124 125
Character v w x y z { | }

© UCLES 2016 9608/12/M/J/16

 15

Trace table:

Memory address
Instruction Working ACC IX OUTPUT
address space 100 101 102 103

20 100 1 0 1

50

51

52

53

54

55

[7]

© UCLES 2016 9608/12/M/J/16

 5

4 The table shows assembly language instructions for a processor which has one general purpose
register, the Accumulator (ACC) and an index register (IX).

Instruction Explanation

Op code Operand

LDD <address> Direct addressing. Load the contents of the given address to ACC.
Indexed addressing. Form the address from <address> + the contents of the
LDX <address>
index register. Copy the contents of this calculated address to ACC.
STO <address> Store contents of ACC at the given address.

ADD <address> Add the contents of the given address to ACC.

INC <register> Add 1 to the contents of the register (ACC or IX).

DEC <register> Subtract 1 from the contents of the register (ACC or IX).

CMP <address> Compare contents of ACC with contents of <address>.

JPE <address> Following a compare instruction, jump to <address> if the compare was True.

JPN <address> Following a compare instruction, jump to <address> if the compare was False.

JMP <address> Jump to the given address.

OUT Output to screen the character whose ASCII value is stored in ACC.

END Return control to the operating system.

The diagram shows the contents of the index register:

Index register: 1 1 0 0 1 1 0 1

(a) Show the contents of the index register after the execution of the instruction:

INC IX

Index register:
[1]

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 6

(b) Complete the trace table on the opposite page for the following assembly language program.

20 LDX 90

21 DEC ACC

22 STO 90

23 INC IX

24 LDX 90

25 DEC ACC

26 CMP 90

27 JPE 29

28 JPN 31

29 ADD 90

30 OUT

31 ADD 93

32 STO 93

33 OUT

34 END
:
:

90 2

91 90

92 55

93 34

IX 2

Selected values from the ASCII character set:

ASCII Code 65 66 67 68 69 70 71 72
Character A B C D E F G H

© UCLES 2016 9608/13/M/J/16

 7

Trace table:

Memory address
Working ACC IX OUTPUT
Instruction
space 90 91 92 93

2 90 55 34 2

20

21

22

23

24

25

26

[7]

© UCLES 2016 9608/13/M/J/16 [Turn over

 8

4 The following table shows part of the instruction set for a processor. The processor has one
general purpose register, the Accumulator (ACC) and an Index Register (IX).

Instruction
Op code Op code Explanation
Operand
(mnemonic) (binary)
Immediate addressing. Load the denary number n to
LDM #n 0000 0001
ACC.
Direct addressing. Load the contents of the location
LDD <address> 0000 0010
at the given address to ACC.
Indirect addressing. At the given address is the
LDI <address> 0000 0101 address to be used. Load the contents of this second
address to ACC.
Indexed addressing. Form the address from
<address> + the contents of the Index Register
LDX <address> 0000 0110
(IX). Copy the contents of this calculated address to
ACC.
LDR #n 0000 0111 Immediate addressing. Load number n to IX.
STO <address> 0000 1111 Store the contents of ACC at the given address.

The following diagram shows the contents of a section of main memory and the Index Register (IX).

(a) Show the contents of the Accumulator (ACC) after each instruction is executed.

IX 0 0 0 0 0 0 1 1

Main
(i) LDM #500
Memory
ACC 500
................................................................[1]
Address contents
495 13
(ii) LDD 500
496 86
ACC 496
................................................................[1] 497 92

(iii) LDX 500 + 3 = 503 498 486

499 489
502
ACC ................................................................[1]
500 496
(iv) LDI 500 501 497
ACC 86
................................................................[1] 502 499
503 502

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 9

(b) Each machine code instruction is encoded as 16-bits (8-bit op code followed by an 8-bit
operand).

Write the machine code for the following instructions:

LDM #17

LDX #97

[3]

(c) Using an 8-bit operand, state the maximum number of memory locations, in denary, that can
be directly addressed.

...............................................................................................................................................[1]

(d) Computer scientists often write binary representations in hexadecimal.

(i) Write the hexadecimal representation for this instruction:

0 0 0 0 0 1 1 1 1 1 0 0 0 0 1 0

.......................................................................................................................................[2]

(ii) A second instruction has been written in hexadecimal as:

05 3F

Write the equivalent assembly language instruction, with the operand in denary.

.......................................................................................................................................[2]

© UCLES 2017 9608/11/M/J/17 [Turn over

 8

5 The following table shows part of the instruction set for a processor. The processor has one
general purpose register, the Accumulator (ACC), and an Index Register (IX).

Instruction
Op code Op code Explanation
Operand
(mnemonic) (binary)
Direct addressing. Load the contents of
LDD <address> 0001 0011 the location at the given address to the
Accumulator (ACC).
Indirect addressing. The address to be used is
LDI <address> 0001 0100 at the given address. Load the contents of this
second address to ACC.
Indexed addressing. Form the address from
<address> + the contents of the Index
LDX <address> 0001 0101
Register. Copy the contents of this calculated
address to ACC.
Immediate addressing. Load the denary
LDM #n 0001 0010
number n to ACC.
Immediate addressing. Load denary number n
LDR #n 0001 0110
to the Index Register (IX).
Store the contents of ACC at the given
STO <address> 0000 0111
address.

The following diagram shows the contents of a section of main memory and the Index Register (IX).

(a) Show the contents of the Accumulator (ACC) after each instruction is executed.

IX 0 0 0 0 0 1 1 0
4 2
(i) LDD 355
Main
ACC 351
.................................................. [1] memory
Address contents
(ii) LDM #355
350
ACC 355
.................................................. [1] 351 86

(iii) LDX 351 + 6 = 357 352

353
ACC 22
.................................................. [1]
354
(iv) LDI 355 355 351
ACC
86
.................................................. [1] 356
357 22
358

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 9

(b) Each machine code instruction is encoded as 16 bits (8-bit op code followed by an 8-bit
operand).

Write the machine code for these instructions:

LDM #67

LDX #7

[3]

(c) Computer scientists often write binary representations in hexadecimal.

(i) Write the hexadecimal representation for the following instruction.

0 0 0 1 0 1 0 0 0 1 0 1 1 1 1 0

.......................................................................................................................................[2]

(ii) A second instruction has been written in hexadecimal as:

16 4D

Write the assembly language for this instruction with the operand in denary.

.......................................................................................................................................[2]

© UCLES 2017 9608/12/M/J/17 [Turn over

 8

4 The following table shows part of the instruction set for a processor. The processor has one
general purpose register, the Accumulator (ACC) and an Index Register (IX).

Instruction
Op code Op code Explanation
Operand
(mnemonic) (binary)
Immediate addressing. Load the denary number n to
LDM #n 0000 0001
ACC.
Direct addressing. Load the contents of the location
LDD <address> 0000 0010
at the given address to ACC.
Indirect addressing. At the given address is the
LDI <address> 0000 0101 address to be used. Load the contents of this second
address to ACC.
Indexed addressing. Form the address from
<address> + the contents of the Index Register
LDX <address> 0000 0110
(IX). Copy the contents of this calculated address to
ACC.
LDR #n 0000 0111 Immediate addressing. Load number n to IX.
STO <address> 0000 1111 Store the contents of ACC at the given address.

The following diagram shows the contents of a section of main memory and the Index Register (IX).

(a) Show the contents of the Accumulator (ACC) after each instruction is executed.

IX 0 0 0 0 0 0 1 1

Main
(i) LDM #500
Memory
500 Address contents
ACC ................................................................[1]
495 13
(ii) LDD 500
496 86
ACC 496
................................................................[1] 497 92

(iii) LDX 500 + 3 = 503 498 486

499 489
ACC 502
................................................................[1]
500 496
(iv) LDI 500 501 497
ACC 86
................................................................[1] 502 499
503 502

© UCLES 2017 9608/13/M/J/17

 9

(b) Each machine code instruction is encoded as 16-bits (8-bit op code followed by an 8-bit
operand).

Write the machine code for the following instructions:

LDM #17 OPCode (LDM) Operand(17)

0000 0001 00010001

LDX #97 OPCode (LDX) Operand(97)

0000 0110
[3]

(c) Using an 8-bit operand, state the maximum number of memory locations, in denary, that can
be directly addressed.

...............................................................................................................................................[1]

(d) Computer scientists often write binary representations in hexadecimal.

(i) Write the hexadecimal representation for this instruction:

0 0 0 0 0 1 1 1 1 1 0 0 0 0 1 0

.......................................................................................................................................[2]

(ii) A second instruction has been written in hexadecimal as:

05 3F

Write the equivalent assembly language instruction, with the operand in denary.

.......................................................................................................................................[2]

© UCLES 2017 9608/13/M/J/17 [Turn over