Example 2: D → J-K

should work like a J-K

Excitation Table for D

Q Q+ D J K Q Q+
0→0 0 0 0 0 0 J D Q
0→1 1 0 0 1 1 Logic
0 1 0 0 K Q
1→0 0
0 1 1 0
1→1 1 1 0 0 1
JQ CLK
JK 1 0 1 1
00 01 11 10
Q
1 1 0 1 TT for J-K
0 0 0 1 1 1 1 1 0
1 1 0 0 1
KQ
Function is D = JQ + K Q J-K FF/Latch
Q
D Q
K Q
J Q

CLK
1
 (C) Counter Design
• A counter is a special case of an FSM that cycles through its states
on receiving triggering clock pluses.
• It does not have any external data I/Ps.
100 No external I/Ps
Reset E
A Counter O/P
000 011
D Logic Next State
001 bits
B
C 010

FFs
n n

CLK
• The states need to be encoded by binary bits.
2
 State Transition Diagram and Table for a 3-bit Binary Up-Counter

Reset Synthesis (3-Bit Up Counter) Output Toggle Flip-Flop

Input
Present State Next State Inputs
000 111
C B A C+ B+ A+ TC TB TA
001 110
0 0 0 0 0 1 0 0 1
010 101 0 0 1 0 1 0 0 1 1
0 1 0 0 1 1 0 0 1
011 100 0 1 1 1 0 0 1 1 1
1 0 0 1 0 1 0 0 1
1 0 1 1 1 0 0 1 1
(a) State Transition
1 1 0 1 1 1 0 0 1
Diagram
1 1 1 0 0 0 1 1 1
(b) State Transition Table (What next state
FF Excitation Table Revisited will be given the
Q Q+ R S J K T D current state.)
0 0 x 0 0 x 0 0
0 1 0 1 1 x 1 1
1 0 1 0 x 1 1 0
1 1 0 x x 0 0 1 3
Excitation table for R-S, J-K, T, and D Flip-Flops
From excitation table for FF inputs, get K-map for the FF inputs.

CB
CB
00 01 11 10 A 00 01 11 10
A
0 0 0 0 0
0 1 1 1 1
1 1 0 1 1 0
1 1 1 1
TA=1 TC=AB
CB
A 00 01 11 10 K-maps for Up-Counter Using Toggle
0 0 0 0 0 Flip-Flops.
1 1 1 1 1
TB=A

Obtain logic expr. for FF I/Ps (as functions of current state bits A,
B, C, --- A=QA, B=QB, C=QC) and realize the counter

4
 Counters with More Complex Sequencing (Non-Consecutive Binary Outputs)
Present State Next State

000 110 C B A C+ B+ A+
0 0 0 0 1 0
010 101 0 0 1 x x x
0 1 0 0 1 1
011 0 1 1 1 0 1
1 0 0 x x x
State Transition 1 0 1 1 1 0
Diagram 1 1 0 0 0 0
Implementation Using J-K FFs: 1 1 1 x x x
State Transition Table
Present Next Remapped Next
State State State
C B A C B+
+ A+ JC KC JB KB JA KA Q Q+ J K
0 0 0 0 1 0 0 x 1 x 0 x
0 0 0 x
0 0 1 x x x x x x x x x
0 1 0 0 1 1 0 x x 0 1 x
0 1 1 x
0 1 1 1 0 1 1 x x 1 x 0 1 0 x 1
1 0 0 x x x x x x x x x 1 1 x 0
1 0 1 1 1 0 x 0 1 x x 1 Q + = JQ + K Q
1 1 0 0 0 0 x 1 x 1 0 x J-K Flip-Flop Excitation Table
1 1 1 x x x x x x x x x 5
State Transition Table and Remapped Next-State Functions
 Next State Functions
JC = A KC = A
JB =1 KB = A + C
J A = BC KA = C
CB CB
00 01 11 10 A 00 01 11 10
A x x 1 x
0 0 0 x x 0 KC
JC
1 x 1 x x 1 x x x 0

CB CB
A 00 01 11 10 A 00 01 11 10
0 1 x x x 0 x 0 1 x
JB KB
1 x x x 1 1 x 1 x x
CB CB
A 00 01 11 10 00 01 11 10
A
0 0 1 0 x JA 0 x x x x KA
1 x x x x 1 x 0 x 1
Remapped K-Maps for J-K Implementation. 6
 Actual Implementation ( Using J-K)

C B JA A
A J Q J Q J Q
CLK CLK CLK
K Q K Q K Q
A C KB B C
A
Count
signal

A B
KB JA
C C

J-K Flip-Flop Implementation of 3 Bit Counter.