21EC3611 - ANALOG ELECTRONICS LAB Manual
21EC3611 - ANALOG ELECTRONICS LAB Manual
LAB MANUAL
Prepared By Verified By Approved By
Staff Incharge HOD/ECE Principal
PREFACE
Learning is a process that requires class instructions and practice labs. If we omit any of
the above then the learning process is clearly flawed. This manual is an attempt to standalone
the lab instructions through the development of lab curriculum that is based on the class
curriculum. This manual is intended to be used by lab instructors, course instructors andstudents.
The intent of this curriculum is to define a clear lab structure that can be followed by the
lab instructor and the students. Perhaps one of the greatest problems faced by lab instructors is
that they are unable to keep the students occupied for the entire duration of the lab due to which
the learning process is greatly hampered.
The labs have been developed in such a way that there is synchronization between the
class and the lab. The manual has been divided into 23 lab sessions having duration of 3 hours
each. Students of the course are expected to carefully read the concept map before coming to the
lab. Students come to the lab with a design/program that will be handed over to the lab
instructor for further grading. The code/design is based on previous learning and experiments.
Each lab has a detailed walk through task which provides a problem statement and its
programmable solution to the students. The students can raise queries about the code provided
and the lab instructor will guide the students on how the solution has been designed.
Thereafter predefined practice questions have been presented such that each question has
a fix duration and grade. Students are graded upon their accomplishments in these practice tasks.
At the end of the lab, the lab instructor will assign an unseen task to the students. This unseen
task contains all the concepts taught in the lab. These unseen tasks have a higher level of
complexity and generally have a greater gain in terms of marks.
What sets these labs apart is the fact that a clear grading criterion has been defined for
each lab. Students are aware of the grading criteria and are expected to meet the requirementsfor
successful completion of each lab.
COLLEGE VISION
Our Vision is "To create innovative and vibrant
young leaders and entrepreneurs in Engineering and
Technology for building India as a super knowledge power
and blossom into a University of excellence recognized
globally".
COLLEGE MISSION
International Resources
background.
INTRODUCTION
The Department of Electronics and Communication Engineering was
established in Francis Xavier Engineering College in the year 2000, which
offers UG and PG courses. The mission of the Electronics and Communication
Engineering Department is to provide excellence through effective and
qualitative teaching- learning process, to enhance the problem solving and
lifelong learning skills that will enable by edifying the students and to create
students with effective communication skills, the abilities to lead a ethicalvalues
in order to fulfill the social needs. This is accomplished by commitment to the
highest possible standards of quality in the areas of teaching, research, counseling
and service.
DEPARTMENT VISION
DEPARTMENT MISSION
quality output.
INTRODUCTION
Total - 50 marks
UNIVERSITY EXAMINATION
The exam will be conducted for 100 marks. Then the marks will be calculated to
80 marks.
SPLIT UP OF UNIVERSITY PRACTICAL EXAMINATION MARKS
Aim and Algorithm - 20 marks
Program - 40 marks
Output - 30 marks
Viva-voce - 10 marks
Know the location of the fire extinguisher and the first aid box and how
to use them in case of emergency.
Dont’s
Do not insert metal objects such as clips, pins and needles into the
computer casings. They may cause fire.
Take a note of all the exits in the room and also take note of the location of
the fire extinguishers in the room for the sake of fire safety.
Look away from the screen once in a while to give your eyes a rest.
Do not attempt to open any machines and do not touch the backs of
Do not spill water or any other liquid on the machines in order to maintain
electrical safety.
changing the desktop back Ground or changing the video and audio
settings.
staff.
Student should follow the Lab dress code whenever they avail the
laboratory facilities and make sure your ID cards are visible outside
Whenever students enter into the lab, they should make the entry in the log
register kept for that purpose.
Observation note books / record note books are only allowed inside the lab,
other belongings are not allowed.
Maintain silence in the Lab.
Only one user is allowed to work in one system at a time.
If any problem occurs in the software or hardware it should be brought to the
notice of the staff in-charge, as well as entry should be made in the log register
kept for that purpose.
The laboratory must be kept clean and neat.
Arrange the chairs before leaving the lab.
Shutdown the systems in a proper way before leaving the laboratory.
You must wear your ID and Lab Coat each time you enter a computer lab. If you
do not have your ID, or lab coat when entering the computer lab, you may be asked
to leave the computer lab.
No drinking or eating is allowed in any computer lab. All open and unopened food,
and beverages are prohibited from entering the computer lab.
You must be considerate of other users. Privacy and concentration are important
in computer labs. If you need to talk to somebody, please do so in a way that does
not disturb other users.
Lab assistants are there to assist in using the technology so that you may complete
your work.
The computer labs are an academic resource. As such, please respect the needs of
others by not monopolizing the computers for non-academic use.
Lab staff is not responsible for any belongings left in the computer labs. Please
make sure you take your belongings with you when you leave.
The computers in the labs have been set up in such a way as to be used by multiple
people having differing needs. Do not change or interfere with the configuration of
the computers.
Documents should be saved to the D drive.
Users are not allowed to print large quantities of flyers, banners or other distribution
materials. If print jobs of this nature are required, one copy may be printed in the
computer lab and copies will need to be processed through the alternative printing
facility.
Attempting to damage or destroy information on the computers will not be
tolerated.
You are expected to leave your computer in the same condition as you found it. This
includes putting chairs back in place and logging out when you leave.
You are responsible for reading and abiding by all signs posted in the computer
labs.
PO c Design/Development of
Solutions: Design and develop solutions
X X
for engineering problems that meet
specified needs.
PO d Conduct Investigations of
Complex Problems: Conduct
investigations of complex problems X X
including design of experiments and
analysis to provide valid solutions.
PO j Communication: Communicate
effectively to the engineering community
X X X
and the outside world and also to write
effective reports.
5 HARTLEY OSCILLATOR 40
6 COLPITTS OSCILLATOR 45
9 ASTABLE MULTIVIBRATOR 58
10 MONOSTABLE MULTIVIBRATOR 61
13 STUDY OF PSPICE 72
AIM:
i) To design and construct the current series feedback amplifier with voltage divider bias
circuit.
ii)To study the effect of negative feedback, also calculate input impedance, output
1 Transistor BC 547 1
4 AFO (0-10)MHz 1
5 RPS (0-30)V, DC 1
7 Bread board - 1
9 BNC cable - 2
THEORY:
A fraction of output voltage is applied in series with input voltage through the feedback amplifier
network. The cuurent series feedback connection increases the input resistance and the output
resistance of amplifier and Overall Gain. Thus, Rif =Ri *1+AVβ and Rof =Ro *1+AV β
PROCEDURE:
Varying the frequency of AFO, obtain corresponding output voltage using CRO
PIN DIAGRAM:
PIN SPECIFICATIONS:
CIRCUIT DIAGRAM:
CURRENT SERIES FEEDBACK AMPLIFIER
VCC=12V
A.WITHOUT FEEDBACK
R1
Rc
100K 5.6K C2
Q1 0.1U
C1
BC547
0.1U
Vout
VAMPL = 1Vpp Vin
R2 Re FREQ = (0-30MHz)
FREQ = (0-2MHz) Ce
22K 1.2K
4.7U
R1
Rc
100K 5.6K C2
Q1 0.1U
C1
BC547
0.1U
Vout
VAMPL = 1Vpp Vin
R2 Re FREQ = (0-30MHz)
FREQ = (0-2MHz)
22K 1.2K
Vcc=Vce+Ic(Rc+Re)
12=5+10((Rc+Re)
Rc+Re = 7kΩ
Choose Re=1kΩ
Rc+1kΩ=7kΩ
Rc= 6kΩ
Choose Rc=5.6kΩ
Vr1 R1
Vr 2 R2
Vr2=Vbe + Vre
Vr2=0.7+1=1.7v
Vr1=Vcc-Vr2=12-1.7v=10.3v
R1 10.3 10.3
R1
R2
R2 1.7
1.7
Choose R1=100kΩ
R2 = 0.165x100kΩ
Choose R2=22kΩ
1
Ce
2 50 0.110^6100 = 31µf
Choose Ce=22µf
TABULATION:
RESULT:
Thus the current series feedback amplifier with voltage divider bias circuit is design and
plotted the output response.
AIM:
i) To design and construct the voltage shunt feedback amplifier with voltage
divider bias circuit and to study the effect of negative feedback.
ii) To calculate the input impedance, output impedance and bandwidth and also plot
the frequency response.
APPARATUS REQUIRED:
S.NO COMPONENTS RANGE/TYPE QUANTITY
1 Transistor BC 547 1
2 Resistors 100KΩ, 50 KΩ, 5.6 KΩ, 22 KΩ, 1each
1KΩ
THEORY:
A fraction of output voltage is applied in parallel with input voltage through the
feedback amplifier network. The voltage shunt feedback connection decreases both the input
and output resistance of amplifier and Overall Gain. Thus Rif =Ri /1+AVβ and Rof =Ro/1+AV β.
PROCEDURE:
1. Connections are made as per the circuit diagram.
2. Set the biasing voltage, VCC=+12V1 using RPS.
3. Set the input voltage, 50mv sinusoidal using AFO.
4. Varying the frequency of AFO obtain corresponding output voltage using CRO
5. Calculate the voltage gain Av.
6. Plot the frequency response and plot the bandwidth curve.
PIN SPECIFICATIONS:
A.WITH FEEDBACK
R1
Rc
100K Rf 5.6K C2
50K Q1 0.1U
C1
BC547
0.1U
Vout
Vin
FREQ = (0-30MHz)
VAMPL = 1Vpp R2 Re
Ce
22K 1.2K
FREQ = (0-2MHz) 22U
VCC=12V
B.WITHOUT FEEDBACK
R1
Rc
100K 5.6K C2
Q1 0.1U
C1
BC547
0.1U
Vout
VAMPL = 1Vpp Vin
R2 Re FREQ = (0-30MHz)
FREQ = (0-2MHz) Ce
22K 1.2K
22U
R2
R2 1.7
1.7
Choose R1=100kΩ
R2 = 0.165x100kΩ
Choose R2=22kΩ
Step 3: To find Ce, C1 & C2
Choose C1 & C2 = 0.1µf & Ce= 0.01Re
1
Ce = 31µf
2 50 0.110^6100
Choose Ce=22µf
MODEL GRAPH:
RESULT:
Thus the voltage shunt feedback amplifier is designed and the frequency response is
obtained.
Without feedback bandwidth = KHz
With feedback bandwidth = KHz
AIM:
To design a transistorized RC phase shift oscillator at the frequency 200Hz. Assume R=2.2kΩ,
C=0.1uf.
APPARATUS REQUIRED:
1 Transistor BC 107 1
22 KΩ ,2.2 KΩ
3 Capacitors 22 µF, 1
0.1 µF 3
4 RPS (0-30)V DC 1
6 Bread board - 1
8 BNC cable - 2
THEORY:
The RC phase shift oscillator circuit consists of a conventional single transistor amplifier with
voltage divider bias and RC phase shift network. The phase shift network consist of three sections
is 60° so that the total phase shift produced by this RC network is 180°.The frequency of
oscillation is given by
fo =
2RC 6 + 4K
Where R1=R2=R3=R; k=Rc/R
C1=C2=C3=C
PROCEDURE:
3. To vary the value of resistance ‘R’ to get the perfect sinusoidal waveform.
5. Calculate the frequency of sine wave and compare it with theoretical frequency.
PIN DIAGRAM:
PIN SPECIFICATIONS:
Current- (0-1)A
R1
Rc
100K 5.6K Cf 1 Cf 2 Cf 3
Rf 1 Rf 2 Rf 3
2.2K 2.2K 2.2K
R2 Re
Ce FEEDBACK
22K 1.2K
22U
DESIGN:
AMPLIFIER STAGE
Vcc=Vce+Ic(Rc+Re)
12=5+10((Rc+Re)
Rc+Re = 7kΩ
Choose Re=1kΩ
Rc+1kΩ=7kΩ
Rc= 6kΩ
Choose Rc=5.6kΩ
Vr1 R1
Vr 2 R2
Vr2=Vbe + Vre
Vr2=0.7+1=1.7v
Vr1=Vcc-Vr2=12-1.7v=10.3v
R1 10.3 10.3
R1
R2
R2 1.7
1.7
Choose R1=100kΩ
R2 = 0.165x100kΩ
Choose R2=22kΩ
1
Ce
2 50 0.110^6100 = 31µf
Choose Ce=22µf
FEEDBACK STAGE
Given R=R1=R2=R3=2.2kΩ,
C=C1=C2=C3=0.1µf f=?
f
2RC 4k 6
Rc
k ?
R
TABULATION:
OUTPUT
RESULT:
Hence the required transistorized RC phase shift oscillator is designed and waveform is
plotted
Theoretical frequency = Hz
Practical frequency = Hz
THEORY:
The Wien bridge oscillator is also a RC oscillator used for audio frequency range. The feedback
network does not provide any phase shift it is a lead lag network, which is called Wienbridge
circuit. The amplifier is the two stage common emitter transistor configurations. Each stage
contributes 180° phase shift. Hence the total phase shifts due to the amplifier becomes 360° which
is necessary as per the oscillator conditions. The frequency of oscillations is given by
1
f
2 R1 R2C1C2
When R1 R2 R and C1 C2 C
1
f
2RC
CIRCUIT OPERATION:
The bridge consists of R&C in series with R&C in parallel. The feedback is applied from the
collector of Q2 through the coupling capacitor to the bridge circuit. The resistance R4 serves the
dual purpose of emitter resistance of the transistor Q1 and also the element of the Wien
TABULATION:
OUTPUT
RESULT:
Thus the Wien bridge oscillator circuit was designed and output was verified with
theoretical frequency.
Theoretical frequency = Hz
Practical frequency = Hz
AIM:
APPARATUS REQUIRED:
1 Transistor BC547 1
100 KΩ,22 KΩ
4 DIB 200 µF 2
5 RPS (0-30)V DC 1
7 Bread board - 1
9 BNC cable - 2
THEORY:
The Hartley oscillator consists of two inductors 4 and L2 are placed across a common
capacitors C and the centre of the inductor’s tapped. The tank circuit is made up of L1, L2 and
C. The frequency of oscillator is given by
1
f
2 CLeq
Leq L1 L2
When the circuit is turned ON. The capacitor is charged. When the capacitors fully
charged. It discharges through coils L1 and feedback V appears across L2. The voltage
PROCEDURE:
3. By varying the value of L1, L2 and C the frequency of oscillation can be varied.
5. Calculate the frequency of sine wave and compare it with theoretical frequency.
PIN DIAGRAM:
PIN SPECIFICATION:
B- Silicon
C- AF power transistor
Power- (0-5)w
Current- (0-1)A
VCC=12V
HART LEY
OSCILLAT OR
R1
Rc
Q1 0.1U
AMPLIFIER Cc1
V
CIRCUIT BC107
0.1U
R2 Re
Ce
22K 1.2K
22U
0
L1 200uH L2 10mH
TANK CIRCUIT
C 0
0.1uF
DESIGN:
AMPLIFIER STAGE
Vcc=Vce+Ic(Rc+Re)
12=5+10(Rc+Re)
Rc+Re = 7kΩ
Choose Re=1kΩ
Rc+1kΩ=7kΩ
Rc= 6kΩ
Choose Rc=5.6kΩ
Vr1 R1
Vr 2 R2
Vr2=Vbe + Vre
Vr2=0.7+1=1.7v
Vr1=Vcc-Vr2=12-1.7v=10.3v
R1 10.3 10.3
R1
R2
R2 1.7
1.7
Choose R1=100kΩ
R2 = 0.165x100kΩ
Choose R2=22kΩ
1
Ce
2 50 0.110^6100 = 31µf
Choose Ce=22µf
FEEDBACK STAGE
Given F=10kHz.
1
f
2 CLeq
Leq L1 L2 ?
TABULATION:
OUTPUT
RESULT:
Theoretical frequency = Hz
Practical frequency = Hz
AIM:
To design a colpitts oscillator of frequency 10KHZ C1=0.1µF, C2=0.01µF and plot the
waveforms.
APPARATUS REQUIRED:
1 Transistor BC547 1
22kΩ, 1.2kΩ 1
22 µF 1
4 Inductor 22.8mH 1
5 RPS (0-30)V DC 1
7 Bread board - 1
9 BNC cable - 2
THEORY:
The colpitts oscillator uses two capacitors and placed across a common inductor L at the
centre of capacitors is taped. The tank circuit is made up of C1, C2 and L. The frequency of
oscillation is given by
1
f ; where C C1 C2
C1 C 2
eq
PROCEDURE:
2. Set the biasing voltage, VCC=+12V using RPS. By varying the value of C1, C2 and L
the frequency of oscillation can be varied.
4. Calculate the frequency of sine wave and compare it with theoretical frequency.
PIN DIAGRAM:
PIN SPECIFICATION:
B- Silicon
C- AF power transistor
Power- (0-5)w
Current- (0-1)A
COLPIT T S VCC=12V
OSCILLAT OR
R1
Rc
Q1 0.1U
AMPLIFIER Cc1 V
CIRCUIT
BC107
0.1U
R2 Re
Ce
22K 1.2K
22U
0
C1 C2
0.1U 0.01U
0 TANK CIRCUIT
L 27.8mH
DESIGN:
AMPLIFIER STAGE
Vcc=Vce+Ic(Rc+Re)
12=5+10(Rc+Re)
Rc+Re = 7kΩ
Choose Re=1kΩ
Rc+1kΩ=7kΩ
Rc= 6kΩ
Choose Rc=5.6kΩ
Vr1 R1
Vr 2 R2
Vr2=Vbe + Vre
Vr2=0.7+1=1.7v
Vr1=Vcc-Vr2=12-1.7v=10.3v
R1 10.3 10.3
R1
R2
R2 1.7
1.7
Choose R1=100kΩ
R2 = 0.165x100kΩ
Choose R2=22kΩ
1
Ce
2 50 0.110^6100 = 31µf
Choose Ce=22µf
FEEDBACK STAGE
Given F=10kHz.
1
f
2 LCeq
C1C2
Ceq ?
C1 C2
TABULATION:
OUTPUT
RESULT:
Thus the Colpitts oscillator was designed and the output was obtained.
Theoretical frequency= Hz
Practical frequency = Hz
AIM:
To design a Class-C tuned amplifier with the frequency of 2 KHz and obtain the
frequency response. Calculate the bandwidth.
APPARATUS REQUIRED:
1. Transistor CL100 1
3. Capacitor 1µf 3
4. DRB - 1
5. DIB - 1
6. AFO (0-20MHz) 1
8. RPS DC-(0-30v) 1
9. Bread board - 1
THEORY:
If any amplifier amplifies a specific frequency or narrow band of frequencies those are
called tuned amplifiers. The amplifier is said to be Class-C tuned amplifier, if the Q-point and
the input signals are selected such that the output signal is obtained less than a half cycle for a
full wave input. Due to such a selection of a point transistor remains active for less than a half
cycle. Hence only that much point is produced at the output of remaining cycle of the input
PROCEDURE:
5. Calculate the gain in dB and plot the frequency response on the graph.
PIN DIAGRAM:
PIN SPECIFICATION:
C- Gallium Arsenide
Power- (0-3)w
Current- (0-1)A
Cc2
Cc1
VAMPL = 1V
EQ = 0-30MHz
FREQ = 0-2MHz
DESIGN:
Given f =2kHz. f ;
2 LC
Let C=1nF
L=?
MODEL GRAPH:
RESULT:
The Class-C tuned amplifier has been designed with 2KHz frequency and frequency
response was plotted on the graph. The bandwidth is
Bandwidth = KHz
AIM:
To design and construct the integrator and differentiator circuits and obtain the output
response for various input frequency range.
APPARATUS REQUIRED:
1 Resistor 10KΩ 1
2 Capacitor 0.1µF 1
4 AFO 1 MHz 1
5 Bread board - 1
7 BNC cable - 2
THEORY:
INTERGRATOR:
A circuit in which the output voltage is directly proportional to the integral of input is
known as integrator (i.e) Output α input it is a sample RC series circuit which output is taken
across the capacitor C. For good integrator.
i) The time constant RC of the circuit should be very large compared to the time period of
the input waves
ii) The value of ‘R’ should be ten or more times larger than Xc
DIFFERENTIATOR:
A circuit in which the output voltage is directly proportional to the derivative of the
input is known as “Differentiator”. (i.e) Output α (input).
i) The time constant RC of the circuit should be much smaller than the input period of the input
waves.
ii) The values of Xc should be ten (or) more times larger than(R).
PROCEDURE:
2. The input waveform is to be set using AFO with different frequency range.
CIRCUIT DIAGRAM:
A.INTEGRATOR
10k
Vin Vout
C
V1 = 1Vpp
0.1U
MODEL GRAPH:
AMPLITUDE
SIGNAL TIME/DIV. VOLT/DIV. TIME
INPUT
OUTPUT 1
OUTPUT 2
B.DIFFERENTIATOR
C
0.1U
vOUT
Vin R
10k
V2 = 1Vpp
MODEL GRAPH:
Differentiator:
f = 1KHz
τ = RC = 1ms
If C = 0.1μF
Then R = 10KΩ
Integrator:
f = 1KHz
= RC = 1ms
If C = 0.1μF
Then R = 10KΩ
TABULATION:
AMPLITUDE
SIGNAL VOLT/DIV. TIME
Input
Output 1
Output 2
RESULT:
Thus the RC differentiator and Integrator is designed and output waveforms are plotted.
AIM:
APPARATUS REQUIRED:
1 Transistor BC107 2
3 Capacitor 0.01µf 2
5 RPS (0-30)V DC 1
6 Bread board - 1
8 BNC cable - 2
THEORY:
CIRCUIT OPERATION:
When VCC is applied, the collector current starts following in Q1 and Q2. In addition the
coupling capacitor C1 and C2 also start changing up. As the characteristics of two transistors
say Q1 will conduct more and more +Ve. The increasing positive output at point ‘A’ is applied
PROCEDURE:
1. Connections are made as per the circuit diagram
2. Obtain the required waveform. Note down the time period and amplitude using CRO
3. Calculate the frequency of the waveform.
4. Plot the waveform on the graph.
CIRCUIT DIAGRAM:
MODEL GRAPH:
Vcc – Vce(sat)
RC = = 5.9 KΩ
Ic
R ≤ hfe RC = 315 * 5.9 * 103 = 1.85MΩ
R = 1.5MΩ
T = 1.38RC
TABULATION:
V01
V02
RESULT:
Thus the Astable Multivibrator is designed and output waveforms are plotted.
Theoretical frequency = Hz
Practical frequency = Hz
AIM:
To design and construct monostable multivibrator. And calculate the time period of pulse.
APPARATUS REQUIRED:
1 Transistor BC107 2
30.6 KΩ 1each
3 Capacitor 2000pf 1
4 Diode IN4007 1
6 RPS (0-30)V DC 1
7 Bread board - 1
9 BNC cable - 2
THEORY:
A multivibrator in which one transistor is always conducting and the other is non-conducting
is called a monostable multivibrator. It has only one stable state.
From the above circuit arrangements Q1 is at cut off and Q2 is saturated. This is the stable
state for the circuit and it will continue to stay in the stable until a triggering pulse is applied to
C2. When a negative pulse of short duration and sufficient magnitude is applied to the base of Q1
through C2, the transistor Q1 starts the conducting and the positive potential at the collection of
Q1 and is coupled to the base of Q2 through capacitor C1. This decreases the
PROCEDURE:
MODEL GRAPH:
Vcc – Vce(sat)
R= = 1.13MΩ
IB2
T = 0.69RC
C = T / 0.69R =
VB1 = (since, V B1 is very less)
VBBR1 = VCE (sat) R2
R2 =10R1 (since, VBB = 2V and VCE (sat) = 0.2V)
Let R1 = 10KΩ, then R2 = 100KΩ
Choose C1 = 25pF.
TABULATION:
INPUT OUTPUT
WIDTH
RESULT:
Thus the Monostable Multivibrator is designed and output waveforms are plotted.
AIM:
APPARATUS REQUIRED:
1 Diode 1N4007 1
4 RPS (0-30)V DC 1
5 Bread board - 1
7 BNC cable - 2
THEORY:
CLIPPERS:
The clipper circuits are used to clip off or removal off the position of signal voltage above
(or) below certain levels.
POSITIVE CLIPPERS:
A positive clipper is that which removes the positive portion of the input voltage. During the
positive half cycle of the input voltage, the diode is forward bias and conduct heavily therefore
the voltage across the diode and hence the load resistance is zero
R1
Output voltage (VO) = Vin Where RL>R1
R1 RL
A negative clipper is that which removes the negative portion of the input voltage. The
diode is forward bias and conducts heavily. Therefore the voltage across the diode and hence
across the load resistance, is zero. Hence the output voltage during negative half cycle is zero.
During the positive half cycle of input voltage the diode is reverse biased and behaves as an open.
In this condition the circuit behaves as voltag3e divider.
R1
Outputvoltage (VO)= Vin Where RL>R1
R1 RL
CLAMPERS:
Clamper is a diode circuit which is used to add and subtract a dc level to an electrical signal.
POSITIVE CLAMPERS:
During the negative half cycle of the input signal the diode is forward biased it behaves as a
short. The charging time constant (τ=RC) is very small. So that the capacitor will charge to volts
very quickly (VO=V)
NEGATIVE CLAMPERS:
During the positive half cycle of the input diode is forward signal biased. The charging
time constant (τ=RC) is very small. So that the capacitor will charge to volts very quickly.
PROCEDURE:
POSITIVE CLAMPER:
MODEL GRAPH:
NEGATIVE CLAMPER:
MODEL GRAPH
MODEL GRAPH:
MODEL GRAPH:
CLIPPERS CLAMPERS
+VE
-VE
RESULT:
AIM:
To design and determine the period and frequency of oscillations of an astable multivibrator
with the component value R1=R2=150KΩ, RC1=RC2=3.3 KΩ.
APPARATUS REQUIRED:
1 Transistor BC107 2
3 Capacitor 0.01µf 2
5 RPS (0-30)V DC 1
6 Bread board - 1
8 BNC cable - 2
THEORY:
CIRCUIT OPERATION:
When VCC is applied, the collector current starts following in Q1 and Q2. In addition the
coupling capacitor C1 and C2 also start changing up. As the characteristics of two transistors
say Q1 will conduct more and more +Ve. The increasing positive output at point ‘A’ is applied
PROCEDURE:
1. Connections are made as per the circuit diagram
2. Obtain the required waveform. Note down the time period and amplitude using CRO
3. Calculate the frequency of the waveform.
4. Plot the waveform on the graph.
CIRCUIT DIAGRAM:
MODEL GRAPH:
Vcc – Vce(sat)
RC = = 5.9 KΩ
Ic
R = 1.5MΩ
T = 1.38RC
TABULATION:
V01
V02
RESULT:
Thus the Astable Multivibrator is designed and output waveforms are plotted.
Theoretical frequency = Hz
Practical frequency = Hz
AIM:
INTRODUCTION:
SPICE stands for Simulation Package with Integrated Circuit Emphasis. SPICE is as close to a
universally available package for doing numerical network analysis as one can find. In PSPICE
the program we run in order to draw circuit schematics is called CAPTURE. The program that
will let us run simulations and see graphic results is called PSPICE. You can run simulation from
the program where your schematic is. There are a lot of things we can do with PSpice, but the
most important things for you to learn are
In this part we will create a simple DC circuit shown in Fig. 1‐1 just to let you know how to start
working with PSPICE. Your goal is to find the current value in the resistor labeled R1.
16. Now change the component values to the required ones. To do this you just need to double‐
click on the parameter you want to change. A window will pop up where you will be able to
set a new value for that parameter.
17. Once you have finished building your circuit, you can move on to the next step – prepare it
for simulation.
18. Select PSpice/New Simulation Profile and type a name, this can be the same name as your
project, and click Create.
19. The Simulations Settings window will now appear. You can set up the type of analysis you
want PSpice to perform. In this case it will be Bias Point. Click Apply then OK.
20. Now you are ready to simulate the circuit. Select PSpice/Run and wait until the PSpice
finishes. Go back to Capture and see the voltages and currents on all the nodes.
21. If you are not seeing any readout of the voltages and currents then select PSpice/Bias
Point/Enable Bias Voltage Display and PSpice/Bias Point/Enable Bias Current Display. Make
sure that PSpice/ Bias Point/Enable is checked.
DC Sweep
Compose the schematics shown in Fig. 1‐2. The type of analysis you need to set up is DC
Sweep. Make sure the sweep variable is Voltage source. Type in V1 as the name of the source.
Make sure the sweep type is linear and use 0V, 2V and 0.01V for the start value, end value and
increment, respectively. Run the simulation. We are interested in graphing the diode current
versus the diode voltage. Once the simulation has finished you will see a black window with no
graph in it. Select Trace/Add trace from the trace menu. You will see now a window
AC Sweep
Compose the schematics shown in Fig. 1‐3. Use the part VAC as your source. The type of
analysis you need to set up is AC Sweep. Check logarithmic in AC Sweep type and select Decade.
Use 1, 1000 and 10 for Start frequency, End frequency and Points/Decade, respectively. Run the
simulation. Now we are interested in plotting the output to input ratio (i.e.,the transfer function
of the circuit). Select Trace/Add Trace from the Trace menu, selectV(C1:2) then from the right
window select / and finally select (V1:+).
Use the cursor to find the point where the y‐axis value is 1/√2 (or –3dB). Mark that point and now
using Plot/Label/Line, Plot/Label/Arrow and Plot/Label/Text mark the limits of the region
Parametric Sweep
In the schematics of Fig. 1‐1, replace the DC voltage source V1 by a 0V‐120V square
wave. You may specify a period of 10ns, a 50% duty cycle and a 1ns rise time and fall time for
the square wave. Our goal is to find the values of R2 such that the current in R1 is 1A when V1
is 0V and 120V, respectively. (Note: a hand calculation of possible values of R2 may help you
here. Also, you should obtain two different R2 values for this part.)
First we need to define the sweep parameter, in this case it is the value of R2, so double‐click on
the value and change it to something like {Var} where Var can be any name. Now from the library
Special, get a part named Param and place it on the schematics and double‐click on it so you can
edit its properties. Click on the New Column and type the name Var without the {}, then input
the Value 50 and finally click OK. Now select the column Var and select Display, a new window
called Display Properties will appear, click on Name and Value then Ok. Close the properties
window. Set up a transient simulation from 0 to 100ns with a step size of 0.1ns. Once you are in
the setup window check the parametric sweep option and select Global Parameter, type Var as
the name and then select linear and type 10, 20 and 1 for the start value, end value and increment,
respectively. Perform the simulation.
RESULT:
The basics of ORCAD PSPICE was studied.
AIM:
To simulate the Tuned Collector Oscillator using ORCAD PSPICE software.
SOFTWARE REQUIRED:
ORCAD PSPICE
PROCEDURE:
1. Draw the circuit as per the circuit diagram.
2. Create a edit simulation title.
3. Select the type of analysis.
4. Create a new simulation file.
5. Simulate the file.
CIRCUIT DIAGRAM:
OUTPUT:
*Analysis directives:
.TRAN 0 2ms 0
.PROBE
.INC "tuned13-SCHEMATIC1.net"
**** INCLUDING tuned13-SCHEMATIC1.net ****
* source TUNED13
RESULT:
Thus the tuned collector was simulated using ORCAD PSPICE and its output waveform
was obtained.
AIM:
To simulate the TWIN-T Oscillator using ORCAD PSPICE software.
SOFTWARE REQUIRED:
ORCAD PSPICE
PROCEDURE:
1. Draw the circuit as per the circuit diagram.
2. Create a edit simulation title.
3. Select the type of analysis.
4. Create a new simulation file.
5. Simulate the file.
CIRCUIT DIAGRAM:
V1 R1
NETLIST:
*Libraries:
* Local Libraries :
.lib "nom.lib"
*Analysis directives:
.TRAN 0 100s 0
.PROBE
.INC "twinteee-SCHEMATIC1.net"
* source TWINTEEE
V_V1 N000051 0 9
RESULT:
Thus the Twin T oscillator was simulated using ORCAD PSPICE and its output
waveform was obtained.
SOFTWARE REQUIRED:
ORCAD PSPICE
PROCEDURE:
1. Draw the circuit as per the circuit diagram.
2. Create a edit simulation title.
3. Select the type of analysis.
4. Create a new simulation file.
5. Simulate the file.
CIRCUIT DIAGRAM:
C3
10u
NETLIST:
*Libraries:
* Local Libraries :
.lib "nom.lib"
*Analysis directives:
.TRAN 0 5s 0
.PROBE
.INC "wein1-SCHEMATIC1.net"
* source WEIN1
V_V2 N00091 0 5
RESULT:
Thus the Wein bridge oscillator was simulated using ORCAD PSPICE and its output
waveform was obtained.
SOFTWARE REQUIRED:
ORCAD PSPICE
PROCEDURE:
1. Draw the circuit as per the circuit diagram.
2. Create a edit simulation title.
3. Select the type of analysis.
4. Create a new simulation file.
5. To plot the frequency response of the amplifier use dB Magnitude of Voltage in
Advanced Markers.
6. Simulate the file.
CIRCUIT DIAGRAM:
12.00V
R1 R2
10 40
C1
R4 L1 L2
1.25n
80k 1m . 1m
C2
125p 12.00V K K1
V1 K_Linear
12.00V 12 COUPLING = .3
Q1
C4 4.615V
165.6mV
100n Q2N2222
0V 3.887nV
R3
V3
1Vac R5 150 C3
0Vdc 50k 10u
0V
NETLIST:
*Libraries:
* Local Libraries :
.lib "nom.lib"
*Analysis directives:
.PROBE
.INC "double1-SCHEMATIC1.net"
* source DOUBLE1
V_V1 N00043 0 12
RESULT:
Thus the double tuned amplifier was simulated using ORCAD PSPICE and its output
waveform was obtained.
SOFTWARE REQUIRED:
ORCAD PSPICE
PROCEDURE:
1. Draw the circuit as per the circuit diagram.
2. Create an edit simulation title.
3. Select the type of analysis.
4. Create a new simulation file.
5. To plot the frequency response of the amplifier use dB Magnitude of Voltage in
Advanced Markers.
6. Simulate the file.
CIRCUIT DIAGRAM:
1Vac
0Vdc
NETLIST:
*Libraries:
* Local Libraries :
.lib "nom.lib"
*Analysis directives:
.PROBE
.INC "stuned-SCHEMATIC1.net"
* source STUNED
R_R6 0 N00044 5k
C_C1 0 N00048 1n
C_C4 0 N00094 1u
V_V2 N00055 0 10
RESULT:
Thus the stagger tuned amplifier was simulated using ORCAD PSPICE and its output
waveform was obtained.
SOFTWARE REQUIRED:
ORCAD PSPICE
PROCEDURE:
1. Draw the circuit as per the circuit diagram.
2. Create a edit simulation title.
3. Select the type of analysis.
4. Create a new simulation file.
5. Simulate the file.
CIRCUIT DIAGRAM:
0
V1
15Vdc
R3 R4
C3
2k C4 2k
1p
R1 R21p
100k 100k
VC1 VC2
Q1
Q2 V
VB2
V
VB1
V BC107A
BC107A V
C10 D12
.01u
V1 = -4v
V3 D1N4001
V2 = 4v 22k
TD = 0s C107
TR = 100ns 0
TF = 100ns R19
.01u
PW = 500us 22k
20V
10V
SEL>>
0V
V(Q1:c)
1.0V
0.5V
0V
V(Q1:b)
20V
10V
0V
V(Q2:c)
10V
0V
-10V
0s 0.5ms 1.0ms 1.5ms 2.0ms 2.5ms 3.0ms 3.5ms 4.0ms 4.5ms 5.0ms 5.5ms 6.0ms 6.5ms 7.0ms 7.5ms 8.0ms
V(Q2:b)
Time
NETLIST:
*Libraries:
* Local Libraries :
.lib "nom.lib"
*Analysis directives:
.TRAN 0 8ms 0
21EC3611 - AE Lab FXEC-ECE/III Sem Page 96
Manual
.PROBE
* source BIST
V_V1 N00246 0
V_V2 N00183 0 15
RESULT:
Thus the bistable multivibrator was simulated using ORCAD PSPICE and its output
waveform was obtained.
AIM:
To simulate the circuit Schmitt Trigger circuit using ORCAD PSPICE software and to plot
its hysersis curve.
SOFTWARE REQUIRED:
ORCAD PSPICE
CIRCUIT DIAGRAM:
NETLIST:
r_rin 1 2 50
r_rc1 0 3 50
r_r1 3 5 185
r_r2 5 8 760
r_re 4 8 260
r_rth2 7 0 85
c_cload 0 7 5pf
v_vee 8 0 dc -5
v_vin 1 0
r_rth1 8 7 125
q_q1 3 2 4 qstd
q_q2 6 5 4 qstd
q_q3 0 6 7 qstd
q_q4 0 6 7 qstd
.probe
.END
PROCEDURE:
To Plot the hysteresis of Schmitt trigger the QSTD model can be used in PSPICE. As
QSTD model is not available in PSPICE library, for this experiment Netlist may be created and
executed in ORCAD capture.
1. Goto file menu in PSPICD A/D DEMO Student File New Text file
3. To execute the circuit file, you can close the file and again open the file and click run.
4. Instead of using the DC sweep to look at the hysteresis, use the transient analysis, (Print
Step = .01ms and Final Time = 2ms) sweeping VIN from -1.8 volts to -1.0 volts and back
down to -1.8 volts, very slowly. This has two advantages:
it avoids convergence problems
it covers both the upward and downward transitions in one analysis
After the simulation, in the Probe window in PSpice, the X axis variable is initially set to be
Time. By selecting X Axis Settings from the Plot menu and clicking on the Axis Variable
button, you can set the X axis variable to be V(1). Then use Add on the Trace menu to display
V(7), and change the X axis to a user defined data range from -1.8V to -1.0V (Axis Settings on
the Plot menu). This plots the output of the Schmitt trigger against its input, which is the
desired outcome.
OUTPUT:
RESULT:
Thus the Schmitt trigger with predictable hysteresis was simulated using ORCAD
PSPICE and its output waveform was obtained.
SOFTWARE REQUIRED:
ORCAD PSPICE
PROCEDURE:
1. Draw the circuit as per the circuit diagram.
2. To choose transformer
Go to Part Place Analog XFRM
Double click on the transformer and give the Coupling coefficient as 1(maximum value
is 1) and L1 =30H and L2=40H.
3. Create a edit simulation title.
4. Select the type of analysis.
5. Create a new simulation file.
6. Simulate the file.
CIRCUIT DIAGRAM:
V
5
NETLIST:
*Analysis directives:
.TRAN 0 100ms 0
.PROBE
.INC "blocking1-SCHEMATIC1.net"
* source BLOCKING1
V_V1 N00056 0 5
RESULT:
Thus the monostable blocking oscillator was simulated using ORCAD PSPICE and its
output waveform was obtained.
AIM:
To simulate the Voltage and Current Time Base Circuits using ORCAD PSPICE software.
SOFTWARE REQUIRED:
ORCAD PSPICE
PROCEDURE:
1. Draw the circuit as per the circuit diagram.
2. To choose transformer
Go to Part Place Analog XFRM
Double click on the transformer and give the Coupling coefficient as 1(maximum value
is 1) and L1 =30H and L2=40H.
3. Create a edit simulation title.
4. Select the type of analysis.
5. Create a new simulation file.
6. Simulate the file.
CIRCUIT DIAGRAM:
VOLTAGE TIME BASE CIRCUIT
OUTPUT:
RESULT:
Thus the Voltage and Current Time Base Circuits was simulated using ORCAD PSPICE
and its output waveform was obtained.
Oscillators Amplifiers
1. They are self-generating circuits. They
generate waveforms like sine, square and 1. They are not self-generating circuits. They
triangular waveforms of their own. need a signal at the input and they just
Without having input signal. increase the level of the input waveform.
2. It have infinite gain 2.It have finite gain
3. Oscillator uses positive feedback. 3.Amplifier uses negative feedback.
2. What are the disadvantages of the basic LC Oscillator?
They have no means of controlling the amplitude of the oscillations.
It is difficult to tune the oscillator to the required frequency.
3. In an LC circuit, when the capacitor is maximum, what about the inductor energy?
Minimum
4. In an LC oscillator, what about the frequency of oscillation?
Inversely proportional to the square root of L or C
REFERENCE BOOKS
1. Paul B Zbar and Albert P Malvino, Michael A Miller, “Basic Electronics: A
Text Lab Manual”, 7th edition, Tata McGraw Hill, 2009.
2. David A Bell, “Laboratory Manual for Electronic Devices and Circuits”,
4th edition, PHI, 2001.
3. Muhammed H Rashid, “SPICE for circuits and electronics using PSPICE”,
2nd edition, PHI, 1995.
4. Semiconductor Physics and Devices by D. A. Neamen
5. Analog Circuits by Robert Pease.