1368 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 35, NO.

9, SEPTEMBER 2000

Monolithic Transformers for Silicon RF IC Design

John R. Long, Member, IEEE

Abstract—A comprehensive review of the electrical perfor-

mance of passive transformers fabricated in silicon IC technology
is presented. Two types of transformer construction are considered
in detail, and the characteristics of two-port (1 : 1 and 1 : turns
ratio) and multiport transformers (i.e., baluns) are presented from
both computer simulation and experimental measurements. The
effects of parasitics and imperfect coupling between transformer
windings are outlined from the circuit point of view. Resonant
tuning is shown to reduce the losses between input and output at
the expense of operating bandwidth. A procedure for estimating
the size of a monolithic transformer to meet a given specification
is outlined, and circuit examples are used to illustrate the applica-
tions of the monolithic transformer in RF ICs.
Index Terms—Baluns, monolithic transformers and inductors,
radio frequency integrated circuit design, silicon technology, trans-
former circuit models, wireless circuits.
Fig. 1. Monolithic transformer. (a) Physical layout. (b) Schematic symbol.

I. INTRODUCTION
II. MONOLITHIC TRANSFORMER

T RANSFORMERS have been used in radio frequency (RF)

circuits since the early days of telegraphy. Recent work
has shown that it is possible to integrate passive transformers
The operation of a passive transformer is based upon the mu-
tual inductance between two or more conductors, or windings.
The transformer is designed to couple alternating current from
in silicon IC technologies that have useful performance charac-
one winding to the other without a significant loss of power,
teristics in the 1–3-GHz frequency range, opening up the possi-
and impedance levels between the windings are transformed in
bility for IC implementations of narrowband radio circuits [1],
the process (i.e., the ratio of terminal voltage to current flow
[2]. However, the limitations of RF IC transformers on silicon
changes between windings). In addition, direct current flow is
must be clearly understood by the circuit designer in order to
blocked by the transformer, allowing the windings to be biased
make intelligent design compromises. In this paper, the con-
at different potentials.
struction and performance characteristics of monolithic trans-
To realize a lumped inductance, microwave designers often
formers fabricated in production silicon VLSI technologies will
use an electrically short transmission line (i.e., guided wave-
be presented from both measurement and simulation. Although
length, physical length) [1]. The input impedance of such
these devices are distributed parameter structures, many of the
a transmission line when short-circuited at one end is given by
limitations inherent in their implementation on an IC chip can be
examined from the circuit point of view using a lumped equiv- (1)
alent circuit model. In addition, the use of resonant tuning to
reduce the substantial losses that arise from imperfect magnetic where is the series resistance and is the series inductance
coupling between the windings of a monolithic transformer is of the transmission line segment. The inductance is increased
described. Finally, a simplified procedure to estimate the dimen- by making the characteristic impedance of the line larger,
sions of a transformer to meet a desired electrical specification however, due to losses also increase.
is outlined, and examples of monolithic transformers in RF cir- A microstrip line is the simplest on-chip element for mono-
cuit applications are described. While this paper addresses trans- lithic implementation of a transmission line inductor, and the
formers fabricated in silicon IC technologies, it should be noted strip is normally wound into a spiral to reduce chip area of the
that the results of this study are more generally applicable to component. Interwinding microstrip spiral inductors to magnet-
components fabricated on insulating and semi-insulating sub- ically couple independent conductors is a logical extension of
strates, such as GaAs. this concept, and results in a monolithic transformer, as shown
in Fig. 1.
An early example of this type of structure is the compact
spiral directional coupler reported by Shibata in 1981 [3].
Manuscript received December 20, 1999; revised January 31, 2000. This
work was supported by Micronet, the Canadian Institute for Telecommunica- This was followed by a circuit demonstration of a monolithic
tions Research, and the Natural Sciences and Engineering Research Council of transformer in a push–pull amplifier, and later, transmitter
Canada. and image-reject mixer circuits fabricated in gallium-arsenide
The author is with the Department of Electrical and Computer Engineering,
University of Toronto, Toronto, ON M5S 3G4, Canada. (GaAs) IC technology by Podell [4], [5]. The first analysis
Publisher Item Identifier S 0018-9200(00)05930-8. of monolithic transformers was published by Frlan [6], who
0018–9200/00$10.00 © 2000 IEEE
LONG: MONOLITHIC TRANSFORMERS FOR SILICON RF IC DESIGN 1369

compared simulation and experimental measurement for terminals and , there is minimal phase shift of the signal
a monolithic spiral transformer and a transformer balun. at the secondary if the load is connected to terminal (with
Boulouard and Le Rouzic [7] proposed an alternate topology grounded). This is the noninverting connection. In the inverting
and analysis technique for monolithic microwave integrated connection, terminal is grounded and is connected to the
circuit (MMIC) spiral transformers, which was also verified load so that the secondary output is antiphase to the signal ap-
experimentally. Frlan and Rabjohn [8] demonstrated square plied to the primary. Aside from the phase shift between input
spiral transformers on alumina and GaAs substrates, and devel- and output ports, other aspects of the transformer’s electrical be-
oped circuit simulation tools based upon extraction of a lumped havior depend upon the choice of terminal configuration (this is
element model for the transformer from physical and geometric addressed in Section V).
parameters. This modeling technique was later extended to the
analysis of planar structures on conductive substrates, such as
A. Physical Layout
silicon [1], [9]. In the recent literature, there are many examples
of monolithic transformers fabricated in silicon IC technology A monolithic transformer is constructed using conductors
for use in RF circuits, such as preamplifiers [10], [11], oscil- interwound in the same plane or overlaid as stacked metal,
lators [12], [13], mixers [2], [14], [15], and power amplifiers as shown in Fig. 2. The mutual inductance (and capacitance)
[16]. However, there is little design information or analysis of of the transformer is proportional to the peripheral length of
different transformer topologies given in the majority of these each winding. Interleaving planar metal traces or overlaying
publications, which is the objective of this paper. (i.e., stacking) conductors maximizes the periphery between
windings and promotes mutual inductance at the expense of
III. ELECTRICAL CHARACTERISTICS AND CONSTRUCTION increased interwinding capacitance. The magnetic coupling
A planar monolithic transformer constructed from inter- coefficient is determined by the mutual and self-induc-
wound metal conductors is shown in Fig. 1. Magnetic flux tances, which depend primarily upon the width and spacing
produced by current flowing into the primary winding at of the metal traces and the substrate thickness [17], with
terminal induces a current in the secondary winding that for transformers fabricated using parameters
flows out of terminal . This produces a positive voltage typical for silicon VLSI technologies.
across a load connected between terminals and . The Many of the techniques that have been applied to optimization
main electrical parameters of interest to a circuit designer are of monolithic spiral inductors are also applicable to the trans-
the transformer turns ratio and the coefficient of magnetic former [18], [19]. For example, ohmic losses are reduced when
coupling . The current and voltage transformations between multiple layers of metal (available in a VLSI technology) are
windings in an ideal transformer are related to the turns ratio used to construct each winding. Although uniform width and
by the following equation: spacing of the metal traces is typically used, nonuniform width
and spacing may offer some performance advantages in specific
(2) applications [20].
The Shibata coupler [3] of Fig. 2(a) is constructed from
where the primary and secondary voltages ( , ) and currents
two parallel conductors that are interwound to promote edge
( , ) are defined in Fig. 1(b), and , are the self-induc-
tances of the primary and secondary windings, respectively. The coupling of the magnetic field between windings. The primary
strength of the magnetic coupling between windings is indicated and secondary terminals (labeled and in the figure) lie
by the -factor, as in the same plane, as illustrated in the cross-section at the
right of the figure. The conductors used to connect the inner
(3) terminals to other circuitry are not shown for clarity. The square
layout is defined by the outer and inner conductor lengths
where is the mutual inductance between the primary and (OD and ID in Fig. 2), the number of turns of metal on each
secondary windings. The self-inductance of a given winding winding ( for all designs shown in Fig. 2), and
is the inductance measured at the transformer terminals with by the width and spacing between the metal traces. One
all other windings open-circuited. If the magnetic coupling be- disadvantage of Shibata’s design is that the total (i.e., unwound)
tween windings is perfect (i.e., no leakage of the magnetic flux), length of primary and secondary windings (and hence the self-
is unity, while uncoupled coils have a -factor of zero. A inductances and ) are not equal because the windings
practical transformer will have a -factor somewhere between are asymmetric. Therefore, the transformer turns ratio
these two extremes. Since the materials used in the fabrication of [from (2)] although there are the same number of turns of metal
an IC chip have magnetic properties similar to air, there is poor on each winding.
confinement of the magnetic flux in a monolithic transformer This inherent asymmetry is eliminated through the use of
and . Thus, the -factor is always substantially identical interwound spirals, as in the Frlan-style transformer
less than one for a monolithic transformer, however, coupling [6] shown in Fig. 2(b). This ensures that electrical characteris-
coefficients as high as 0.9 are realizable on-chip. tics of primary and secondary are identical when they have the
The phase of the voltage induced at the secondary of the trans- same number of turns. Another advantage of this design is that
former depends upon the choice of the reference terminal. For the transformer terminals are on opposite sides of the physical
an ac signal source with the output and ground applied between layout, which facilitates connections to other circuitry.
1370 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 35, NO. 9, SEPTEMBER 2000

VLSI interconnect schemes, which results in unequal resistances

for the upper (shaded) and lower (solid black) windings. Also,
the upper winding is electrically shielded from the conductive
substrate by the lower winding, and hence the parasitic capac-
itance to the conductive substrate (and the associated dissipa-
tion) differ for each winding. In addition, there is a large par-
allel-plate component to the capacitance between windings due
to the overlapping of metal layers, which limits the frequency re-
sponse. However, this can be reduced by offsetting the upper and
(a) lower metal layers by some distance as shown in the cross-sec-
tion of Fig. 2(c). These performance impairments are balanced
by a savings in chip area when the windings are stacked verti-
cally. It is expected that the current trend in silicon technologies
toward thicker and lower permittivity intermetal dielectrics and
more layers of interconnect metal will result in improved perfor-
mance from stacked winding transformers in future.
A transformer can also be implemented using concentrically
wound planar spirals as illustrated in Fig. 2(d) [23]. The
common periphery between the two windings is limited to just
(b) a single turn. Therefore, mutual coupling between adjacent
conductors contributes mainly to the self-inductance of each
winding and not to mutual inductance between the windings.
As a result, the concentric spiral transformer has less mutual
inductance and more self-inductance than the Frlan and Finlay
configurations, giving it a lower -factor. However, coupling
coefficients as high as 0.6 have been reported [16]. Also, there
is no symmetry between windings in this configuration. Since
higher -factors (i.e., closer to the ideal -factor of unity) are
(c) available from other configurations, the applications for this
type of transformer are limited. However, a low ratio of mutual
inductance to self-inductance is useful in applications such as
peaking coils for high-performance broadband amplifiers [24].

IV. ELECTRICAL MODELS

An electrical model of a transformer that can be derived from
the physical layout and process technology specifications is re-
quired for the simulation and optimization of RF circuits. The
(d) complete electrical behavior of monolithic transformers cannot
be accurately predicted from closed-form equations, and hence
Fig. 2. Monolithic transformer winding configurations. (a) Parallel conductor
(Shibata) winding. (b) Interwound (Frlan) winding. (c) Overlay (Finlay) numerical methods must be used. The numerical solution of
winding. (d) Concentric spiral winding. Maxwell’s equations in three dimensions will give the most ac-
curate results, and this technique is becoming more practical
Multiple conductor layers (i.e., stacked conductors) are used for the design of multiturn spiral transformers as computing
to fabricate an overlay or broadside coupled transformer, as il- technology and simulation software improve. However, at the
lustrated in Fig. 2(c). This implementation was first described by present time, the processing time and memory requirements for
Finlay for spiral inductors [21], [22]. The Finlay-type winding full 3-D simulation of all but the simplest transformer physical
utilizes both edge and broadside magnetic coupling to reduce layouts are prohibitive, making this an inefficient alternative for
the overall area required in the physical layout. Flux linkages design and optimization.
between the conductor layers is improved as the intermetal di-
electric is thinned [i.e., decreasing in Fig. 2(c)]. Typically, A. Multisection Lumped-Element Models
the dielectric thickness between layers is on the order of 1 m A model for the silicon RF IC transformer based on a
when fabricated on an RF IC, giving close to 0.9. Although lumped-element equivalent circuit is an efficient and accurate
the windings as shown in the figure are identical, they are imple- alternative to other numerical methods. The lumped-element
mented on different metal layers causing asymmetry in the elec- approximation is valid because the physical length of each
trical response of the transformer. Part of this asymmetry arises conducting segment is typically much less than the guided
from the difference in thickness between metal layers in most wavelength, in-band (i.e., OD ). In this work, the
LONG: MONOLITHIC TRANSFORMERS FOR SILICON RF IC DESIGN 1371

(a)

Fig. 4. 1 : n transformer compact model.

typical monolithic transformer with three to four turns on

(b) each winding. For design optimization, component library
Fig. 3. Monolithic transformer compact model. (a) Cross-section of a simple generation, and hand analysis purposes, a simplified version of
two-conductor transformer. (b) Lumped-element model for a two-conductor the lumped-element model, or a compact model, is required.
transformer.
An example of a compact model for a transformer with four
independently driven ports (i.e., , , , and ) and turns ratio
lumped-element circuit model is extracted from the phys- 1 : is shown in Fig. 4. In many applications, the compact model
ical layout and process technology specifications using the can be further simplified because one (or more) of the ports
GEMCAP2 computer program [8], [9]. Similar models have is grounded. At the core of the model is an ideal linear trans-
been developed by others [25], [11]. The GEMCAP2 transformer former with magnetizing inductance and turns ratio 1 : .
model consists of cascaded lumped-element sections, which The path for magnetic flux between windings has the same per-
captures the distributed parameter behavior of an ensemble of meability as free space for conventional IC technologies (unless,
individual conductor segments. As an example, the equivalent for example, a ferromagnetic layer is used in fabrication) and
circuit model for the coupled microstrip transmission lines therefore the magnetizing inductance is lossless and the mag-
shown in Fig. 3(a) is illustrated in Fig. 3(b). Self-inductance and netic path is highly linear. Note that this is an advantage in RF
(frequency-dependent) ohmic losses of the conductors are mod- IC applications, where the dynamic range (and hence linearity)
eled by components and , while the parasitic capacitances requirements are very demanding. Inductances and are
and dissipation in the substrate are represented by shunt elements placed in series with the primary and secondary windings of the
, , and . Transformer action is modeled by including linear transformer to account for imperfect coupling or leakage
mutual magnetic and electric coupling between the of the magnetic flux between the windings. Resistors and
individual conducting segments. This circuit model can be used are placed in series with the leakage inductances represent
directly in a time-domain (i.e., SPICE) or frequency-domain ohmic losses in the windings, which are significant due to the
circuit simulation. For multiturn monolithic transformers, the relatively thin layers of metal available in an IC process. The in-
simple two-conductor model is extended by extracting similar terwinding capacitance is modeled by capacitors connected be-
lumped-element equivalent circuits for each conducting segment tween primary and secondary, and . The dominant capac-
in the physical layout. itive parasitics between each winding and the underlying sub-
For transformers fabricated on silicon, losses cause by dissi- strate ( ) are represented by the series connection of capac-
pation of the electric field in the substrate is accurately modeled itors and , and substrate loss is included through the
by resistor for substrate resistivities greater than approxi- addition of resistor in parallel with , as in Fig. 3(b).
mately 1 cm. Hasegawa [26] has shown that longitudinal Circuit realizations for the ideal transformer subcircuit of
currents in the substrate are induced by current flow along Fig. 4 are shown in Fig. 5. Synthesis of a model directly from
each conducting strip, and losses associated with this current the circuit equations for magnetic coupling between current
are proportional to the square of frequency. Also, the current loops results in the direct-form model shown in Fig. 5(a).
distribution across each conducting strip is frequency depen- Inductances and model the self-inductances of the
dent due to the proximity and skin effects, and introduce addi- primary and secondary windings, respectively. Mutual coupling
tional losses that increase proportionally to the square root of between windings is modeled by the dependent current sources,
frequency. These losses are modeled by adding frequency-de- which are weighted by parameters and (note that
pendent components to the series resistance in the equiv- for a passive, reciprocal transformer).
alent circuit. Thévenizing the dependent current source on the secondary
side of the direct-form model gives the dual-source model
B. Compact Models shown in Fig. 5(b). In this equivalent circuit, the transformer
The lumped-element model generated by GEMCAP2 turns ratio is an explicit parameter. Current flowing through
has hundreds of circuit elements (i.e., , , and ) for a magnetizing inductance gives rise to voltage which
1372 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 35, NO. 9, SEPTEMBER 2000

(a)

(a)

(b)

(b)

Fig. 6. Transformer equivalent circuits. (a) Low-frequency model with

leakage shifted to primary. (b) High-frequency equivalent circuit with leakage
(c) shifted to secondary.

Fig. 5. CAD models for magnetic coupling in a 1 : n transformer. (a) Direct on the operational bandwidth of the transformer. This informa-
form model. (b) Dual-source model. (c) T-section model. tion is used to develop guidelines for monolithic transformer
design and explain experimental observations in terms of
controls the dependent voltage source on the secondary side. equivalent circuit parameters. The series and shunt inductive
Note that this results in an ideal 1 : transformation for elements define many characteristics of the frequency response,
voltage between the internal primary and secondary. The actual and a simplified equivalent circuit at low frequencies is shown
terminal voltage is modified by current flow through leakage in Fig. 6(a). The assignment of leakage inductance between
inductances and placed in series with the primary primary and secondary is arbitrary, as described previously,
and secondary windings. The model shown in Fig. 5(b) has the and here the secondary leakage has been shifted to the primary
leakage inductance partitioned equally between windings, as in order to simplify the equivalent circuit.
the mutual inductance is
It is clear from Fig. 6(a) that the shunt inductor in the pri-
(4) mary affects the low end of the frequency response by shunting
energy to ground, while the series element blocks transmission
This arbitrary assignment of leakage inductance is not unique
of the signal from primary to secondary as the operating fre-
[i.e., (4) cannot explicitly define two unknown leakage induc-
quency increases. The terms low, mid, and high frequency used
tances] and other combinations are possible. For example, if
in the following discussion are in the relative sense implied by
all the leakage inductance is moved to the primary winding,
then the effects of these two elements.

and (5) A. Response at Low Frequency

The series combination of load resistance and secondary
This combination also gives the same terminal behavior as the winding loss can be reflected to the primary side of the trans-
assignment shown in Fig. 5(b). former as
The T-section model of Fig. 5(c) uses three inductors to
model the mutual coupling between windings. This model (6)
simplifies hand analysis of circuits incorporating transformers,
however, it is only valid for ac signals because there must be
The reflected resistance appears in parallel with the shunt
isolation of dc current flow between the primary and secondary
magnetizing inductance , shown in Fig. 6(a). The dc value
loops in a physical transformer.
of ( ) is determined by the unwound length of the winding
( ) and the sheet resistivity of the metallization ( ) ac-
V. FREQUENCY RESPONSE cording to the equation
It is useful to consider simplifications of the compact model
to determine the circuit elements that have the greatest impact (7)
LONG: MONOLITHIC TRANSFORMERS FOR SILICON RF IC DESIGN 1373

For an integer number of turns, the unwound length of a

square Frlan transformer (for example) with an integer number
of turns is given by

OD (8)

for . Similar expressions can be derived for the other

winding configurations.
At the lower edge of the passband, the impedance of the mag-
netizing inductance ( ) is small relative to , and therefore
little of the input signal is transmitted to the load. As the op-
erating frequency increases, the effect of the magnetizing in-
ductance on the frequency response diminishes as its reactance
becomes large relative to the reflected load and generator resis-
tances. At relatively high frequencies, the leakage inductance in
series with the generator impedance blocks signal transmission
to the transformer output, and therefore attenuation of the trans-
former increases again. Fig. 7. Fractional bandwidth and attenuation versus transformer k -factor.
Assuming that the reflected and effective generator resis-
tances are approximately equal (i.e., ) and a it can be shown that the maximum signal transmission in the
1 : 1 turns ratio, it can be shown for the equivalent circuit of passband is
Fig. 6(a) that the fractional bandwidth of the magnetic path is
(11)
for (9)
which occurs at a frequency
where fractional bandwidth is defined as the ratio of the upper
and lower cut-off frequencies . The relationship between (12)
bandwidth and -factor, defined by (9), and the total attenua-
tion from primary to secondary ports at the lower cut-off fre- These equations show that the signal attenuation in the passband
quency are plotted in Fig. 7. For a typical -factor of 0.8, the can be estimated from the -factor and termination resistances.
monolithic transformer bandwidth is greater than three octaves As the -factor decreases, both the signal transmission and the
( ) with an attenuation ( ) of 3.8 dB fractional bandwidth of the transformer are diminished, and the
at the lower edge of the passband. As the -factor approaches attenuation minimum shifts closer to the lower cut-off frequency
unity, the fractional bandwidth increases dramatically and the of the transformer winding ( ). Thus, a large
total attenuation at the lower cut-off frequency approaches the -factor is needed to reduce attenuation in the passband and
ideal ( dB, or ), as shown in Fig. 7. Thus, maximize the usable bandwidth of the component.
a large -factor is necessary to minimize attenuation and maxi-
mize the transformer bandwidth. Note that this analysis ignores C. High-Frequency Response
the effects of ohmic loss in the windings and parasitic capaci-
tances, which are substantial in monolithic transformers. Parasitic capacitances are difficult to determine accurately
(numerical analysis is normally required) and capacitive
B. Mid-Band Response effects are best investigated from simulation of a particular
case. However, some qualitative observations on the behavior
As the operating frequency continues to increases, the atten- of monolithic transformers can be made from the high-fre-
uation through the transformer reaches a minimum in the pass- quency equivalent circuit shown in Fig. 6(b). Here, a 1 :
band. Losses in the passband are caused by dissipation of the
turns ratio transformer with is assumed, and the
windings and the conductive substrate for devices fabricated on
significant high-frequency parasitics from the compact model
silicon. In most cases, the series parasitics in the transformer
of Fig. 4 have been shifted to the secondary loop. The shunt
compact model dominate the midband response, because the
elements are represented by a – equivalents, as is valid
source and load impedances used in RF circuits are typically
at a given frequency, and the effect of the shunt inductance
an order of magnitude lower than the shunt parasitics (on the
in the primary is again assumed negligible. The value of the
order of tens of ohms for the source/load compared to hundreds
interwinding capacitance is modified by the voltage transfer
of ohms for the shunt parasitics).
The simplified compact model of Fig. 6(a) can be used to pre- ratio when moved from primary to secondary loops due
dict the midband response if the capacitive parasitics are negli- the Miller effect. The sign of the transfer ratio can be either
gible. Assuming a 1 : 1 transformer with a symmetrically loaded positive (noninverting) or negative (inverting configuration),
winding so that which leads to different behavior at higher frequencies. For
the noninverting connection, is positive and the -type –
(10) section in the transformer secondary has a bandpass response
1374 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 35, NO. 9, SEPTEMBER 2000

with a transmission zero due to the effect of in parallel with

. This zero causes a notch in the high-frequency response.
However, the inverting connection behaves differently at higher
frequencies. The voltage transfer ratio is negative in the
inverting connection, which causes the bridging capacitor
to have a positive reactance that decreases with increasing
frequency. Thus, the magnitude response at high frequencies
resembles a lowpass filter with a comparatively higher cut-off
than for the noninverting connection, due to absence of the
transmission zero.
The substrate and interwinding parasitic capacitances res- (a)
onate with the inductance of each winding, and above this
self-resonance, the reactance at the transformer input appears
capacitive. Hence, the self-resonant frequency is often used as
a figure of merit to define and compare the upper frequency
limit for transformers.

D. Differential versus Single-Ended Drive

It has been demonstrated that differential drive of a microstrip
winding gives a higher quality ( )-factor and broader band-
width than when a single-ended source is used [27]. Consider
the equivalent circuit of the single microstrip line section, shown
in Fig. 8. Here, a simplified equivalent circuit consisting of
and represents the electrical behavior of , , and at (b)
any given frequency. Fig. 8. Differential versus single-ended excitation. (a) Single-ended model.
For single-ended excitation, Port 2 is grounded and the equiv- (b) Differential model.
alent circuit is connected as a one-port. The input impedance at
Port 1, defined as , becomes a parallel combination of two
components: , representing the inductance and series dissi-
pation ( and ), and , representing the shunt par-
asitic elements, as illustrated in Fig. 8(a).
For a differential excitation, where the signal is applied be-
tween the two ports (Port 1 and Port 2), the input impedance
is due to the parallel combination of and . Since the
substrate parasitics are connected via the ground plane, the two
shunt elements are now in series. The equivalent circuit is shown
in Fig. 8(b).
Note that the impedance of the substrate parasitics in the
equivalent circuit are and for the differential case,
which are double the value for single-ended excitation (i.e., just
in parallel with , single-ended). Therefore, at lower fre-
quencies, the input impedance in either the shunt or the differ-
Fig. 9. Simplified transformer model illustrating resonant tuning at both ports.
ential connections is approximately the same. However, as the
frequency increases, these parasitics have a higher impedance
at a given frequency when excited differentially than they do in inductance at each port form lossy -section matching net-
works. The two element -section will modify the impedance
the single-ended connection. This reduces the real part and in-
appearing across the terminals of the transformer to a lower
creases the reactive component of the input impedance. There-
impedance at the internal transformer nodes (in the compact
fore, the -factor is improved when driven differentially, and
model). By appropriate selection of the tuning capacitance at
moreover, a wider operating bandwidth is realized for no extra
each port, the impedance appearing in shunt with the internal
cost in processing.
transformer can be represented as a shunt – equivalent.
When the total shunt capacitive component is parallel
E. Transformer Tuning resonant with the magnetizing inductance , the two ports
Capacitors placed in shunt with the primary and secondary are matched and transmission losses are minimized.
windings tune a monolithic transformer and decrease the losses The attenuation caused by leakage in a low -factor trans-
between input and output ports. As seen from the simplified former is substantial, as shown in Fig. 7, however, the loss can
compact ‘T’ model of Fig. 9, the shunt capacitance and leakage be reduced by resonant tuning. Unfortunately, a larger portion
LONG: MONOLITHIC TRANSFORMERS FOR SILICON RF IC DESIGN 1375

TABLE I
TECHNOLOLGY PARAMETERS [28]

of the power entering the transformer is dissipated by ohmic Fig. 10. Measurement versus simulation for 1 : 1 spiral transformers.
losses in the windings themselves as the -factor is reduced.
This is an important consideration because the ohmic losses of
the windings are relatively high due to the thin metallization conductor spacing improves the magnetic coupling between
used in fabrication. The effective load reflected from the sec- primary and secondary windings, and hence the closest line
ondary back to the primary is proportional to the square of the spacing ( 3 m) was chosen.
transformer -factor, as seen from the low-frequency model of The frequency response (both magnitude and phase) of the
Fig. 6(a). Hence, as the -factor drops, so does the load at the square spiral (Frlan) transformer in both the inverting and non-
internal node as seen from the primary side. Therefore, a high inverting connections is compared in Fig. 10. At low frequen-
-factor is still desirable in order to limit losses in the passband cies, the transmission of a signal from primary to secondary for
when resonant tuning is used to reduce the attenuation. a 50- source and load ( ) is low, because the input frequency
is well below the self-inductance of the primary and secondary
windings [note that is, by definition, 6 dB larger than the
VI. TRANSFORMER EXAMPLES
voltage gain , as defined in Fig. 6(a), with
The performance of both spiral and symmetric transformers 50 ]. As the frequency increases, the coupling between input
has been characterized in simulation and by fabricating and and output also improves, reaching a minimum in the operating
testing a number of different designs. The following square band, which for this transformer is in the 1–3-GHz range. There
spiral layouts have been fabricated and tested: 1 : 1 inverting is a substantial difference in the magnitude responses of the two
and noninverting, 1 : 3 and 1 : 5 inverting step-up designs, a connections, as seen from both the measured and simulated data
4 : 5 square symmetric balun, and a 2 : 1 : 1 symmetric trifilar shown in Fig. 10. This difference is mainly due to the effect
transformer. of interwinding capacitance, which introduces a zero in the re-
sponse of the noninverting transformer as previously outlined in
A. Inverting and Non-Inverting 1 : 1 Transformers Section V-C. The phase difference between inverting and non-
A 1 : 1 Frlan transformer consisting of four turns of inverting configurations is 180 degrees at low frequencies, as
10- m-wide top-level metal with a 3- m conductor spacing expected, but deviates significantly above 3 GHz, which defines
and measuring 400 m on each side (i.e., dimension OD in the upper edge of the transformer’s operating band. The simu-
Fig. 2) has been fabricated and tested. The interwinding capac- lated and measured responses agree well in both phase and mag-
itance introduced by closely spaced conductors is acceptable nitude up to the first self-resonant frequency of the two wind-
in most applications. A summary of the important parameters ings, where the assumption of lumped behavior in the simulation
of the fabrication process are listed in Table I [28]. A number model no longer applies. This occurs at approximately 5 GHz.
of features of this technology are worth noting. The top-metal
thickness is close to 2 m, which is double the metal thickness B. Comparison of Planar and Overlay Configurations
available in most silicon VLSI technologies. Thicker metal The winding configuration and technology used in fabrica-
reduces the ohmic losses in the primary and secondary wind- tion are other important factors that determine the frequency
ings of a planar transformer. Also, the 6- m-thick insulating response of a monolithic transformer. In order to investigate
oxide layer reduces parasitic coupling to the semiconducting this, two 1 : 1 transformers were designed given the technology
substrate, thereby improving the operating bandwidth and parameters listed in Table I. The first design is a four-turn
reducing in-band losses caused by shunt parasitic elements. Frlan transformer consisting of 10- m-wide conductors spaced
Losses due to the substrate are further reduced through the use 3 m apart, with an outer dimension (OD) of 400 m, as in
of a relatively high resistivity substrate (nominally 15 -cm). Section VI-A. The second design is a four-turn Finlay trans-
Previous experience with both simulation and measurement of former. The conductor width and conductor spacing is identical
microstrip spiral inductors [9] has shown that the minimum for both designs, but the dimensions of the Finlay transformer
1376 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 35, NO. 9, SEPTEMBER 2000

TABLE II
PARAMETERS FOR 1 : 1 PLANAR AND OVERLAY TRANSFORMERS (w = 9 m, s = 3 m)

(a)

Fig. 11. Magnitude response for planar and overlay configurations.

are chosen to match the self-inductance of the Frlan design

(OD 309 m). The simulated low frequency parameters (b)
of the transformer compact model (i.e., , , and ) are Fig. 12. 1 : 5 step-up transformer and application. (a) 1 : 5 step-up transformer
compared in Table II. layout. (b) Transformer coupled feedback amplifier.
The data shows that the -factor of the Finlay transformer is
7% higher than the Frlan design due to tighter coupling of the agree fairly well with the predictions from (11) and (12), which
magnetic field in the overlay configuration. The main advantage are 2.7 dB at 2 GHz for the Frlan and 2.6 dB at 2.5 GHz for the
of overlaying the windings is that approximately one-half of Finlay transformer.
the chip area is required to realize the same self-inductance,
and hence each winding for the Finlay transformer is shorter C. 1 : n Square Spiral Transformers
in its unwound length. This leads to a lower for the Finlay Turns ratios other than 1 : 1 are also possible. For example,
transformer (5.7 compared to 8.5 ), however, the resistance a 1 : 5 step-up ratio between primary and secondary can be
of secondary winding is higher (at 12.7 ) because thinner metal realized by sectioning one winding (e.g., the primary) into five
is used for the lower-level (i.e., secondary) winding. This is a individual turns rather than one continuous winding. These
limitation typical of current silicon VLSI technologies. five single-turn windings are then connected in parallel to
The magnitude response of each transformer is plotted in form a 1 : 5 step-up ratio between primary and secondary of
Fig. 11 for both inverting and noninverting connections. It can the transformer. The 1 : 5 step-up design shown in Fig. 12(a)
be seen from the figure that lower attenuation is achieved using consists of ten turns of 10- m-wide topmetal with a 3- m
the inverting connection, as predicted from high frequency anal- conductor spacing, and measures 400 m on each side. The
ysis of the compact model. The pronounced dips in the mag- primary winding (five individual turns) are lightly shaded in
nitude response in the noninverting connection are caused by the figure rather than one continuous winding.
the effect of the interwinding capacitance (as described in Sec- The basic compact model parameters (refer to Fig. 4) for 1 : 1,
tion V-C). The notch in the response is more pronounced for 1 : 3, and 1 : 5 transformers are compared in Table III. The trans-
the planar (Frlan) transformer because the ohmic losses of the formers were simulated using the GEMCAP2 program and mea-
windings are lower, resulting in a higher -factor. Attenuation sured data was obtained from samples fabricated in the tech-
is highest for the overlay transformer connected in the nonin- nology of Table I. The -factor decreases slightly as the turns
verting configuration because the secondary winding has a rel- ratio was varied, which is expected as the number of turns on
atively high series resistance. The minimum passband attenu- the secondary winding differs for each design. The total induc-
ation and the frequency where this occurs (listed in Table II) tance on the primary ( in Table III) scales approximately as
LONG: MONOLITHIC TRANSFORMERS FOR SILICON RF IC DESIGN 1377

TABLE III
COMPACT MODEL PARAMETERS FOR PLANAR TRANSFORMERS

the square of the turns ratio. The self-inductance and associated

parasitics at the secondary ( and in Table III) are deter-
mined by the length of the winding and increase with increasing
winding length. The ratio of self-inductance to parasitic capac-
itance at the primary decreases dramatically for larger step-up
ratios, and therefore the driving point impedance at Port 1 must
be kept low in order to efficiently couple a signal into a step-up
transformer primary.
The step-up transformer is an almost ideal feedback element
for an RF amplifier, and can be used as a narrowband alterna-
tive to a broadband resistive network. The benefits of negative Fig. 13. Square symmetric (Rabjohn) balun.
feedback in amplifier design are well known, however, a broad-
band feedback amplifier cannot meet the sub-3-dB noise figure
required for many wireless applications. Feedback via mutual also implement a balun by grounding one of the windings at the
magnetic coupling in a 1 : transformer, as shown in Fig. 12(b), electrical center, or center tap. The electrical and physical center
allows for control of amplifier gain and linearity without intro- of a winding differ for all of the spiral designs shown in Fig. 2,
ducing excessive noise. Note that primary of transformer is which is a disadvantage of asymmetric layouts.
driven from the emitter, which is a low impedance source, and A square symmetric layout, first proposed by Rabjohn [8] and
the secondary of is made resonant using to realize the illustrated in Fig. 13, solves this problem. This transformer con-
desired amplifier load impedance. A low supply voltage is pos- sists of two groups of interwound microstrip lines that are di-
sible, since ohmic drops in the bias path are nearly eliminated. vided along a line of symmetry running horizontally, as shown
A 1-dB noise figure RF preamplifier with 12-dB gain and input in Fig. 13. The groups of lines are interconnected in a way which
third-order intercept point of 4 dBm that consumes 2 mW brings all four terminals to the outside edge of the transformer
from a 1-V supply has been realized using transformer feed- layout, which is an advantage when connecting the transformer
back [10], [2]. This level of performance was achieved with a terminals to other circuitry. Also, the midpoint between the ter-
production silicon IC process flow that was not optimized for minals on each winding, or the center tap, can be located pre-
RF performance from the passive components. cisely in the symmetric layout as indicated in Fig. 13. The turns
ratio for the example shown is 4 : 5 between primary and sec-
ondary.
D. Multifilament Transformers and Transformer Baluns
The measured and simulated responses for this balun are
The 1 : 1 and 1 : transformers described in the previous compared in Fig. 14. The experimental transformer is designed
sections of this paper consist of two independent windings (or with OD 325 m, 8- m linewidth, 3- m line spacing,
conducting filaments) and are classified as bifilar transformers. and fabricated with the technology described in Table I. The
Multifilament transformers can also be constructed on-chip. slight difference in magnitude response at the inverting and
These devices are used to implement power dividers/combiners noninverting secondary ports is clearly seen from the measure-
and baluns. ments. This is due to the effect of interwinding capacitance
A balun is a device which couples a balanced circuit to an (as described in Section V-C). The effect is not reduced by
unbalanced one. There are many structures used to implement adding tuning capacitance in shunt with the transformer ports.
baluns at RF and microwave frequencies, although a differential Capacitors connected at the input and output ports (425 fF
amplifier is the most commonly used method for unbalanced-to- across the primary and 1.7 pF across each secondary winding)
balanced signal conversion on-chip. Microwave balun structures tune the balun to match the (50- ) source to the secondary
such as the Lange, rat-race, and branch line coupler require phys- load, and the tuned response is also plotted on Fig. 14. The
ical dimensions on the order of the signal wavelength and so these measured transmission loss is reduced from over 5 dB to very
devices consume too much chip area when operating below ap- close to the ideal (3 dB) by tuning. The phase error between
proximately 15 GHz [29]. The transformers shown in Fig. 2 can secondary ports of the tuned balun is also shown on Fig. 14,
1378 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 35, NO. 9, SEPTEMBER 2000

(a) (b)

Fig. 14. Frequency response of a monolithic transformer balun.

(c)
Fig. 16. Trifilar balun. (a) Square symmetric trifilar balun layout. (b) Func-
tional equivalent circuit. (c) Frequency response.

windings so that the input impedance is 50 at approximately

2.4 GHz (point B on Fig. 15). It should be noted that the leakage
inductance at each port is fixed by the transformer design, and
therefore the range of impedances which can be realized by res-
onant tuning with shunt capacitors is limited. In conventional
Fig. 15. Input impedance of the 4 : 5 balun.
two-element – matching, a wider range of impedances can
be matched since both “ ” and “ ” are variable. However,
where the phase error is the deviation from a 180 phase tuning capacitors can also be placed in series with each port to
difference between ports. This error is on the order of 1 degree extend this range.
in the desired passband for the balun (2000–3000 MHz). The physical layout of a square symmetric trifilar balun
The measured input impedance for the 4 : 5 step-up balun
measuring 500 m on a side is shown in Fig. 16(a), and the
was determined and plotted on the complex impedance chart
schematic is illustrated in Fig. 16(b). The transformer consists
shown in Fig. 15 for a frequency range from 10 MHz to 5 GHz.
of three groups of interwound 8- m-wide microstrip lines with
The secondary load resistance is matched to the real part of the
a 3- m line spacing, which are divided along a line of symmetry
transformer output impedance which includes losses in the
running vertically and horizontally through the center. The four
windings. This resistance for a given transformer turns ratio ,
groups of lines are connected so that all terminals are brought
generator resistance , and ohmic losses of the primary and
to the outside edge of the layout, which is advantageous when
secondary windings and , is given by
using the transformer with other circuitry. The three separate
(13) windings of the balun (i.e., one primary and two secondary
windings) are indicated by shading of the conductors.
Here, , 50 , 8.5 , and 10.2 . The measured performance of the trifilar balun when driven
Point A on the impedance plot is the untuned input impedance differentially is illustrated in Fig. 16(c). The forward transmis-
at 2.4 GHz, . The addition of the tuning capacitors sion of power from the primary input to secondary outputs
(425 fF and 1.7 pF at the primary and secondary terminals, re- ( in Fig. 16) and ( ) of the balun is plotted against
spectively) establishes a resonance with primary and secondary the left axis of the figure. The other terminals of the balun were
LONG: MONOLITHIC TRANSFORMERS FOR SILICON RF IC DESIGN 1379

With a passive transformer balun [as in Fig. 17(d)], the RF

input can be matched to the mixing quad through the appro-
priate choice of transformer turns ratio. The passive balun in-
troduces virtually no distortion to the RF signal, thereby pre-
serving linearity. Resonant tuning must be used to ensure that
the signal-to-noise ratio is not excessively degraded in the trans-
(a) (b)
formation. The transformer-coupled bipolar junction transistor
(BJT) mixer has demonstrated a low noise figure (9.5 dB single-
sideband (SSB) 50 ), and a relatively high third-order intercept
point ( 6 dBm) given that the circuit has conversion gain (7 dB)
and operates from a 1.0-V supply [10].
Mixers with high linearity and 6–7-dB noise figures can be
implemented on-chip using balun-coupled diode ring topolo-
gies. Input intercept points on the order of 10 dBm, or more,
(c) (d) are possible for such mixers based on a quad of Schottky diodes,
as in Fig. 17(e). The local oscillator (LO) power required to
drive the diode mixer is a disadvantage when 50 interfaces
are used. However, in a completely monolithic implementation,
the port impedances can be defined on-chip in order to reduce
power consumption.
A mixer design utilizing monolithic trifilar baluns at the RF
and LO inputs and a Schottky diode ring has also been devel-
(e)
oped for lower-power/low-voltage applications [14]. The design
Fig. 17. Mixer circuits. (a) Balanced mixer block diagram. (b) BJT is derived from existing mixer architectures, such as the Gilbert
commutating stage. (c) Differential pair balun. (d) RF transformer balun.
(e) Diode commutator. multiplier and the doubly balanced diode ring mixer. From ex-
perimental measurements for an RF input of 5.3 GHz, LO at
5.55 GHz and IF at 250 MHz, the mixer attains 6.5 dB gain,
grounded for this measurement. Again, excellent agreement is 6.1-dB noise figure, and a 8.2-dBm IIP3. Although there is a
seen between the predictions of the computer model and the conversion loss, the emphasis in this design is on linearity and
de-embedded measurements from RF on-wafer probing. The improved dynamic range rather than conversion gain.
phase error between secondary windings of the balun is also The transformer-coupled approach has the potential to realize
shown. Note that very low phase and amplitude error is seen in a variety of proven mixer topologies, including image-reject
the desired passband from 1–4 GHz due to the use of a fully designs [15], [31]. When implemented monolithically, these
symmetric layout and differential drive. components can offer a significant advance in transceiver
performance and integration level compared to the current
E. Transformer Baluns in Mixers state-of-the-art.
Interstage coupling using on-chip magnetic elements is an al-
ternative technique of aggressively improving a mixer’s perfor- VII. TRANSFORMER DESIGN
mance, which has a different set of design trade-offs from the
The goal of a design procedure for monolithic transformers is
better-known RC mixer topologies. The monolithic transformer
to attain the desired bandwidth with the lowest possible losses,
balun can be used to improve the dynamic range of monolithic
mixers [2]. while consuming as little chip area as possible. In this section,
A conventional IC doubly balanced demodulator, which is a procedure for estimating the initial size of a monolithic trans-
based on the Gilbert multiplier topology [30], can be viewed former will be given. Because of the complexities involved in
as a linear preamplifier stage followed by a differential down- the modeling and analysis of these components, any design pro-
converting mixer, as illustrated in Fig. 17(a). The input stage cedure should involve simulation of the structure in order to con-
converts a single-ended RF input signal into a differential signal firm that the original performance requirements are satisfied.
that drives the RF inputs of a four-transistor mixing quad [see The important figures of merit for the monolithic transformer
Fig. 17(b)]. This is analogous to the function of a balun in RF are: -factor ( ), source and load impedance levels [ , from
and microwave mixer circuits and a differential amplifier is nor- (10)], self-inductances of the individual windings, and the self-
mally used for this purpose on an RF ICs [shown in Fig. 17(c)]. resonant frequency (which is determined by parasitic capaci-
Gain in the input stage can be used to suppress noise intro- tances).
duced by the mixing quad, but this gain also reduces the upper As seen from Fig. 7, a -factor close to one gives the widest
limit on the mixer’s dynamic range. However, distortion in the bandwidth. For narrowband applications such as cellular tele-
receive mixer usually defines the input intercept point for the phony, little useful selectivity is possible because the -factor
receive chain in a modern transceiver. Hence, a Gilbert mixer of a monolithic transformer’s windings is on the order of 5 or
is normally designed with little gain in order to maximize the less. Thus, the transformer bandwidth will not affect the in-band
linear range at the mixer’s RF input. response, even when resonant tuned.
1380 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 35, NO. 9, SEPTEMBER 2000

transformer layouts having a constant self-inductance of 5 nH.

Two sets of fabrication parameters were chosen: a line spacing
and winding metal thickness of 1 m on a 400- m-thick sub-
strate (similar to many VLSI processes), and the parameters for
the 1 : 1 transformers that were fabricated and described previ-
ously (see Table I). The effect of metal width (and spacing) on
the magnetic coupling is clearly apparent from the figure. For a
given number of turns, the lines of magnetic flux which couple
between windings increases as the metal width decreases. There
is a large improvement in -factor as the number of turns is in-
creased from one to two, because of coupling between adjacent
lines. The number of metal lines running in parallel increases
with the number of turns, and because the magnetic coupling
decreases quickly with the separation between parallel conduc-
tors, the -factor quickly tends to a limiting value for a given
metal width. The data shown in the figure indicates that a de-
sign with three to four turns is optimum.

B. Design Procedure
Fig. 18. k -factor versus number of turns for a 1 : 1 Frlan transformer with As a first step, the inductance required for each winding must
L = 5 nH. be determined from consideration of the terminal impedances
and center frequency specification. For example, (12) can be
For a resonant RLC circuit, the 3-dB bandwidth (in Hertz) used to compute the winding self-inductance (of a 1 : 1 trans-
is given by former) for a given center frequency and loading . In a
narrowband system, the inductance of the transformer winding
(14) can often be made resonant with a parasitic capacitance, and
so the capacitance of the source and/or load must be consid-
where is the total resistance (including loading of the ered in the process of determining the winding self-inductance
source) and is the total capacitance shunting the circuit. If and turns ratio. Additional capacitance may be added in shunt
a large self-inductance is used (e.g., 10 nH), a relatively small at the ports of the transformer to tune the device to a given fre-
is needed to tune the transformer. A small self-inductance quency and reduce the transmission losses. Resonant tuning re-
(e.g., 2 nH) requires more tuning capacitance, and (14) predicts duces the bandwidth of the transformer [as per (14)] and hence
a narrower bandwidth for a given load, . Therefore, the selection of center frequency, bandwidth, and winding induc-
selection of winding inductance influences the bandwidth tance are closely related. For applications where bandwidth is a
when resonant tuning is applied. For relatively low terminal consideration, the inverting connection should be used.
impedances (on the order of the conductor ohmic losses), the It was shown previously (Fig. 18) that the transformer
series parasitics ( and in the transformer model) dominate -factor improves as the width of the winding decreases, and
the response and so wider conductors lines with relatively large therefore the smallest practical linewidth should be used in the
parasitic capacitances may be used. When terminal impedances design. However, the high ohmic losses in the windings of a
on the order of hundreds of ohms are used, shunt parasitics monolithic transformer must also be considered. These losses
play a more important role in the overall response and therefore modify the impedances seen at each port when the transformer
narrower conductor widths should be used. is impedance matched to the source and load, and also con-
tribute noise in the final circuit. Narrowly spaced conductors
A. Transformer -factor improve the magnetic and electric coupling between windings.
The relationship between -factor and the parameters that In most cases, line spacing close to the minimum allowable
influence the magnetic coupling between windings of a trans- for the technology results in the best overall performance (i.e.,
former fabricated on an IC is complex and it is best investigated additional interwinding capacitance is less important that the
using simulation tools. improvement in -factor).
To maximize magnetic coupling between windings (and Knowing the winding inductance, number of turns, and con-
hence -factor), adjacent conductors should belong to different ductor width and spacing, the physical dimensions of a trans-
windings. The mutual magnetic coupling between adjacent former can be estimated with a design aid such as the one shown
conductors that belong to the same winding contributes self-in- in Fig. 19. This graph (also generated from Greenhouses’ algo-
ductance but not mutual inductance to the transformer and rithm) illustrates the inductance per unit of length of a given
lowers the coupling coefficient. winding as a function of the OD for a four-turn 1 : 1 Frlan trans-
The plot shown in Fig. 18 illustrates the variation in -factor former. Points on the curves shown in the figure are all physi-
with the number of turns for a 1 : 1 turns ratio square spiral Frlan cally realizable.
transformer [layout as in Fig. 2(b)]. The curves plotted on the As an example, assume that a center frequency of 2 GHz in
figure were generated using the Greenhouse algorithm [17] for a 50- system is required. Equation (12) predicts a winding
LONG: MONOLITHIC TRANSFORMERS FOR SILICON RF IC DESIGN 1381

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coupled push–pull amplifiers for low cost monolithic microwave ICs,” image-reject downconverter in SiGe technology,” in Proc. IEEE Bipolar
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1382 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 35, NO. 9, SEPTEMBER 2000

John R. Long (M’95) received the B.Sc. degree in

electrical engineering from the University of Calgary,
Calgary, AB, Canada, in 1984, and the M.Eng. and
Ph.D. degrees in electronics engineering from Car-
leton University, Ottawa, ON, Canada, in 1992 and
1996, respectively.
He was employed for 10 years by Bell-Northern
Research Ltd., Ottawa (now Nortel Networks),
involved in the design of GaAs ASICs for Gbit/s
fiber-optic transmission systems. In 1996 he joined
the faculty at the University of Toronto, Toronto,
ON, Canada. His current research interests include low-power transceiver
circuitry for highly integrated radio applications and electronics design for
high-speed data communications systems.
Dr. Long was the recipient of the 1997 NSERC Doctoral Prize and the Dou-
glas R. Colton and Governor General’s Medals for research excellence. He is
a Member of the Program Committee for the International Solid-State Circuits
Conference (ISSCC) and Chair of the RF Program Committee for the IEEE
Bipolar/BiCMOS Circuits and Technology Conference (BCTM).