INTERNATIONAL UNIVERSITY

SCHOOL OF ELECTRICAL ENGINEERING (EE)

PRINCIPLES OF EE1 LAB

Lab

Operational Amplifiers

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Principles of EE1 Lab 1-8

 INTERNATIONAL UNIVERSITY
SCHOOL OF ELECTRICAL ENGINEERING (EE)

I. Objectives
This lab introduces the operational amplifier or "op amp". The circuit is already constructed for
you on a single IC (integrated circuit) and in this lab we will use the IC in several of its most
popular configurations

II. Introduction
Ideal operational amplifiers (Op-Amps) are two-ports that can produce an output
voltage which is directly proportional to their input voltage (linear operation). Op-Amps can be
operated in two ways: open loop and closed loop. The latter circuit connection is the only one
that can force the Op-Amp to operate in its linear region. An equivalent circuit model can be
used to model or simulate the ideal Op-Amp or to incorporate deviations from ideality. The
standard inverting and non-inverting configurations are explored.

The lab experiments include the realization of both configurations and the experimental
determination of the circuit parameters that demonstrate the function of the circuit and allow
for Op-Amp parameter derivation.

III. Theory
3. Operational Amplifiers

3.1 Op Amp Terminal Characteristics

A 741 Op-Amp is shown in Fig. 1 below. Op-Amps have two input terminals; the input
voltage Vi to the Op-Amps is taken across these terminals. One terminal is called inverting or
negative and the voltage there is usually denoted as Vn and the other as non-inverting (Vp) so
that Vi=(Vp-Vn). The output is taken between Vo and ground. Additional terminals (such as V+
or +Vcc, V- or -Vcc) are used for bias, offset etc.

Fig.1. Pinout for the 741 Opamp

The realistic model of an operational amplifier is given in your text and repeated below
with equivalent notation. It involves separate input and output circuits. The input consists of an
input resistance Ri between the inverting and noninverting terminals. The output consists of a
voltage dependent voltage source (with voltage AvVi) in series with an output resistance Ro.
Note that the only connection between the input and output is through the proportionality
relation of the dependent source.

Principles of EE1 Lab 2-8

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SCHOOL OF ELECTRICAL ENGINEERING (EE)

Fig. 2. An Op-am equivalent circuit.

The parameters involved are as follows:

1. Input Voltage Vi: V(a,b)=Vi=(Vp-Vn).

2. Output Voltage Vo: The output voltage of an Op-Amp is proportional to the input
voltage, provided it remains less in absolute value than the DC bias voltages V+ and V-.

3. Input Resistance Ri: The input resistance appears between the inverting and
noninverting terminal (so that Vi appears across Ri) and can be found by dividing the input
voltage Vi by the current entering the non-inverting input terminal Vp or exiting the inverting
terminal Vn.

4. Open Loop Voltage Gain μ or Av: The open loop voltage gain is the proportionality
constant in the dependent source equation where V = AvVi (or V=μV(a,b)).

5. Output Resistance Ro: The output resistance appears as a resistor in series with the
dependent source. In the presence of a non-zero output resistance Ro, the output voltage across
a load RL is not all of V = AvVi and can be found by analyzing the voltage divider between Ro
and RL.

3.2 Linear Operation and Saturation

Op-Amps have two regions of operation: linear and saturation. In the linear region,
the voltage transfer characteristic, i.e. the mathematical relationship between the input and
output voltages, is linear. This holds true when the output voltage lies in the range

From the definition of voltage gain given above, i.e. Vo = AvVi, one can see that this
range corresponds to input voltages in the range of

In this range the output voltage is directly proportional to the input voltage, by the factor
Av.

Principles of EE1 Lab 3-8

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SCHOOL OF ELECTRICAL ENGINEERING (EE)

For input voltages outside this range, the Op Amp is said to be saturated, and its output
is bounded by the DC bias voltages. In other words, the output voltage is clamped to V- when
Vi<V-/Av and to V+ when Vi>V+/Av.

3.3 Characteristics of an Ideal Op-Amp

1. Ri = : According to the definition of input resistance given above, an infinite input

resistance means that no current flows into or out of the input terminals. This greatly simplifies
the analysis of Op-Amp circuits.

2. Ro = 0: In this case the entire dependent source voltage appears across the load
resistance or as the input of another device.

3. μ =AV = : If the output voltage is to be finite it follows from the definition of

voltage gain, that Vi = Vo / Av will go to zero if Av is infinite. This, however, assumes that there
is some way for the input to be affected by the output. Indeed this will only happen if there is
such a connection namely a negative feedback mechanism in the form of a connection between
the output and the inverting terminal (closed loop operation). If such connection does not exist,
then the output will be saturated (open loop operation). For closed loop operation, it is said that
a virtual short exists between the positive and negative input terminals. This means that if an
Op-Amp is operating in its linear region (if it is unsaturated) then Vi  0, or equivalently Vp 
Vn. This also simplifies the circuit calculations at the input terminals, because Vp and Vn can be
represented by a single variable. When one of the two terminals is grounded, then the voltage
at both terminals is zero and the other terminal is called a virtual ground.

3.4 Building Amplifier Circuits Using Op-Amps

There are two standard closed-loop connections for an Op-Amp. Both have in common
the connection (Rf) from the output terminal to the inverting input terminal. This connection
provides the negative feedback and ensures the virtual short. The analysis is simple for ideal
Op-Amps since:

(a) the two input terminals are at the same voltage and

(b) there is no current into the input terminals.

The analysis usually derives a gain or amplification. It is important to note that this is
the gain of the whole stage (or the closed loop gain) and should not be confused with the gain
of the Op Amp alone.

One last note: negative feedback does not guarantee that the amplifier will not saturate.
If the input is such that the output, based on the amplification of the whole stage, is expected to
be larger than the bias voltage in absolute value (Vo> V+ or Vo< V-) then the output will be
clamped to V+ (or V-).

3.4.1 The Inverting Amplifier

Principles of EE1 Lab 4-8

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SCHOOL OF ELECTRICAL ENGINEERING (EE)

Fig. 3. An inverting amplifier

Circuit analysis of the inverting amplifier in Fig. 3 yields the equation,

V2 = K V1 = (-Rf/R)V1 (1)

Thus, the theoretical gain K of the whole stage (that is, the entire Op-Amp circuit of
Fig 3.) is given by

K = V2/V1= (-Rf/R).

3.4.2. The Non-Inverting Amplifier

Circuit analysis of the non-inverting amplifier shown in Fig. 4 yields the equation,

V2 = (1+Rf/R)V1 (2)

Thus, the theoretical gain K of the whole stage is given by

K = V2/V1= (1 + Rf/R).

Fig. 4. A non-inverting amplifier.

Principles of EE1 Lab 5-8

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SCHOOL OF ELECTRICAL ENGINEERING (EE)

IV. Calculation
4.1 Calculate the gain K for the inverting amplifier circuit in Fig. 5 assuming that the
Op-Amp is ideal and using the resistance values specified in 5.1.1.

4.2 Express the Gain K for the non-inverting amplifier of Fig.6 in term of R2 and R1,
assuming that the Op-amp is ideal.

4.3 Given the results of question 4.2, calculated values R1 and Rf that produce the circuit
gain of 10.

V. Simulation/Experiment
You will be using the "741" Op-Amp which is biased at +15V and -15V. The chip
layout is shown in Fig. 1. The standard procedure on such chip packages (DIP15) is to identify
pin 1 as the one to the left of the notch in the chip package. The notch always separates pin 1
from the last pin on the chip. In the case of 741, the notch is between pins 1 and 8. Pins 2, 3,
and 6 are the inverting input Vn , the non-inverting input Vp, and the amplifier output Vo
respectively. These three pins are the only three terminals that usually appear in an Op-Amp
circuit schematic diagram.

Required equipment (Offline lab):

Electronic board with Power Supply
Digital Multimeter
741 Operational Amplifier
10KΩ, 100KΩ, 2.2KΩ Resistors

5.1 Experiment 1: Inverting Amplifier

Fig. 5. An inverting amplifier configuration.

Principles of EE1 Lab 6-8

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SCHOOL OF ELECTRICAL ENGINEERING (EE)

Procedure

5.1.1 Construct the circuit in Fig. 5 with R1 =2.2k, and Rf =10k, 1V input signal at 1Khz.
Measure the gain. Sketch the results on the oscilloscope.

5.1.2 Calculate and measure the gain with R1 = 2.2kΩ and Rf = 100kΩ. Compare results with
previous case. Sketch the results on the oscilloscope.

a. Compare the measured/simulated output signal in 5.5.1 and 5.1.2? Explain the differences.
b. Find the phase difference between the input and output of inverting amplifier? Why is this
called an inverting amplifier?

5.2 Experiment 2: Non-Inverting Amplifier

Fig. 6. A non-inverting amplifier configuration

5.2.1 Construct the non-inverting amplifier shown in Fig. 6 with R1 = 2.2kΩ and Rf = 10kΩ.
Measure the gain.

5.2.2 Repeat section 5.2.1 with R1 = 2.2kΩ and Rf = 100kΩ. Compare the results.

a. Compare the measured/simulated output signal in 5.2.1 and 5.2.2? Explain the differences.
b. Find the phase difference between the input and output of inverting amplifier? Why is this
called an inverting amplifier?

5.3 Experiment 3: Comparator using OPAM

Note: Function generator and oscilloscope are not used in this experiment.

Build the circuit as followed:

Principles of EE1 Lab 7-8

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SCHOOL OF ELECTRICAL ENGINEERING (EE)

Fig. 7. OPAM Comparison circuit

5.3.1 Calculate the DC voltages at points A, B, and C.

5.3.2 Using the input combinations listed in Table 2, apply the appropriate signals to V1 and
V2. Measure the output voltage and record values in Table 1. Conclude on the working
principle of the OPAM used in the comparison circuit (show the relationship between
𝑉 + , 𝑉 − 𝑎𝑛𝑑 𝑉𝑂𝑈𝑇 ).

Table 1.

V1 (Volts) V2 (Volts) 𝑉𝑂𝑈𝑇 (Volts)

= 𝑉𝐴 = 𝑉𝐴

= 𝑉𝐴 = 𝑉𝐵

= 𝑉𝐴 = 𝑉𝐶

= 𝑉𝐵 = 𝑉𝐴

= 𝑉𝐵 = 𝑉𝐵

= 𝑉𝐵 = 𝑉𝐶

= 𝑉𝐶 = 𝑉𝐴

= 𝑉𝐶 = 𝑉𝐵

= 𝑉𝐶 = 𝑉𝐶

THE END

Principles of EE1 Lab 8-8