Roll No.

: _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
Amrita Vishwa Vidyapeetham
Amrita School of Engineering, Coimbatore
B.Tech Second Assessment Examination – December 2022
Third Semester
Electronics and Communication Engineering
19ECE201 Analog Electronics Circuits
Duration: Two hours Maximum Marks: 50
Course Outcomes (COs):

CO Course Outcomes
CO01 Ability to analyze transistor (BJT and MOSFET) circuits
CO02 Ability to design amplifier circuits to given specifications
Instructions:
1. All questions are mandatory AND to be answered in the same order as in the Question paper.
2. Unless otherwise specified, all components can be considered to be ideal.
3. In circuits using BJTs and MOSFETs, unless otherwise mentioned, the following values can be
assumed: 𝑉𝑇 = 25 𝑚𝑉; 𝛽 = 300, 𝑉𝐵𝐸,𝑎𝑐𝑡 = 0.6 V, 𝑉𝐶𝐸,𝑠𝑎𝑡 = 0.2 V and 𝑉𝑡 = 1 𝑉.
4. All variables and terms used, if not explained, may be considered to have the same connotation as
in Microelectronic Circuits – Sedra & Smith, 7th ed, Oxford University Press.
5. All circuit diagrams are to be neatly drawn using pencil and labelled.

Questions 1 – 20: From amongst those given, please choose the answer that you consider most appropriate
and note it down CLEARLY, in your answer sheet. Only your choice need be written. For example, if your
choice for a question is (b), write down ONLY (b) in the answer sheet, given to you.
[20 marks] [CO1] [BTL2]
1. Amongst the parasitic capacitances of a BJT, the one that will typically have the maximum impact on
the frequency response of the amplifier is that bridging
(a) the base and the emitter (b) the base and the collector (c) the collector and the emitter
(d) the load resistance (e) None of these
2. The input parasitic capacitance of the BC547 is ------------- pF.
(a) 4 (b) 6 (c) 9 (d) 2 (e) None of these
3. A common-emitter amplifier employing an 𝑅𝐸 with an emitter-bypass capacitance 𝐶𝐸 will have
(a) A higher gain (b) A lower gain (c) lower stability (d) greater variation in operating point
(e) Higher bandwidth when compared to a self-biased CE amplifier without 𝐶𝐸 .
4. Amongst the three external capacitances - 𝐶1 , 𝐶2 , 𝐶𝐸 – normally associated with a Common-Emitter
amplifier, the one which typically has the largest influence on the frequency response is
(a) 𝐶1 (b) 𝐶2 (c) 𝐶𝐸 (d) Both 𝐶1 & 𝐶2 (e) None of these
5. The MOSFET can be considered to be a
(a) CCVS (b) VCVS (c) VCCS (d) CCCS (e) constant voltage source
6. The threshold voltage 𝑉𝑡 of a p-channel MOSFET is such that
(a) 𝑉𝑡 > 0 (b) 𝑉𝑡 < 0 (c) 𝑉𝑡 < 0, if 𝑉𝐷𝑆 < 0 (d) 𝑉𝑡 < 0, if 𝑉𝐷𝑆 > 0 (e) 𝑉𝑡 > 0, if 𝑉𝐷𝑆 > 0

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7. In an n-channel, enhancement mode MOSFET,
(a) 𝑉𝑔𝑠 > 𝑉𝑡 (b) 𝑉𝑔𝑠 < 𝑉𝑡 (c) 𝑉𝑔𝑠 = 𝑉𝑡 (d) 𝑉𝑔𝑠 < 𝑉𝑜𝑣 (e) None of these
8. In a MOSFET, the drain current 𝑖𝐷 is related to the drain-source voltage (𝑣𝐷𝑆 ) as
𝑊 𝑊 1 2
(a) 𝑖𝐷 = 𝜇𝑛 𝐶𝑜𝑥 ( 𝐿 ) (𝑉𝑜𝑣 − 𝑣𝐷𝑆 ) 𝑣𝐷𝑆 (b) 𝑖𝐷 = 𝜇𝑛 𝐶𝑜𝑥 ( 𝐿 ) (𝑉𝑜𝑣 − 2 𝑣𝐷𝑆 ) 𝑣𝐷𝑆
1 𝑊 1 𝑊 2
(c) 𝑖𝐷 = 2 𝜇𝑛 𝐶𝑜𝑥 ( 𝐿 ) (𝑉𝑜𝑣 − 𝑣𝐷𝑆 ) 𝑣𝐷𝑆 (d) 𝑖𝐷 = 2 𝜇𝑛 𝐶𝑜𝑥 ( 𝐿 ) ((𝑣𝐺𝑆 − 𝑉𝑡 )𝑣𝐷𝑆 − 𝑣𝐷𝑆 )
(e) None of these
9. Pinch -off is defined as the condition where
(a) 𝑣𝐺𝐷 > 𝑉𝑡 (b) 𝑣𝐺𝐷 < 𝑉𝑡 (c) 𝑣𝐺𝐷 = 𝑉𝑡 (d) 𝑣𝐺𝐷 = 𝑉𝑜𝑣 (e) 𝑣𝐺𝐷 > 𝑉𝑜𝑣
10. In the saturation region of a MOSFET, the drain current (𝑖𝐷 ) is related to the drain-source voltage
(𝑣𝐷𝑆 ) by a ----------------- relationship.
(a) linear (b) square law (c) logarithmic (d) cubic (e) None of these
11. A common emitter amplifier, employs a BJT which has a dc current gain of 100 and is biased at 1 mA.
In its’ small signal model, 𝑟𝜋 will be ------------- (in 𝑘Ω).
(a) 1.5 (b) 2 (c) 1.0 (d) 2.5 (e) None of these
12. In the saturation region, the collector current (𝐼𝐶 ) is controlled by
(a) the dc current gain (𝛽) (b) the base biasing resistances
(c) the base-emitter voltage (d) the base current
(e) None of these
13. A BJT with a dc current gain of 100 is biased in the saturation region, with a collector current of 16 𝑚𝐴
and an overdrive factor of 5. The base current would then be, (in 𝜇𝐴)
(a) 16 (b) 1.6 (c) 15 (d) 50 (e) None of these
14. For an npn transistor, as 𝑉𝐶𝐸 increases, the reverse bias across the collector-base junction
(a) increases (b) decreases (c) remains the same (d) is independent of 𝑉𝐶𝐸 (e) None of these
15. The process transconductance parameter (𝑘𝑛′ ) of a MOSFET is given by
𝜇 𝐶
(a) 𝐶 𝑛 (b) 𝜇𝑜𝑥 (c) 𝜇𝑛 𝐶𝑛 (d) 𝜇𝑜𝑥 𝐶𝑜𝑥 (e) None of these
𝑜𝑥 𝑛
16. The use of an emitter resistance in a common-emitter amplifier
(a) increases the gain (b) decreases the gain (c) decreases the input resistance
(d) decreases the bandwidth (e) None of these
17. In a MOSFET, the channel depth at the source end is
1
(a) maximum (b) minimum (c) proportional to (𝑉𝑜𝑣 − 𝑣𝐷𝑆 ) (d) proportional to
𝑉𝑜𝑣
(e) None of these
18. The drain current in the saturation region for a MOSFET when the drain-source voltage (𝑣𝐷𝑆 ) is equal
to
(a) 𝑉𝑜𝑣 (b) 𝑉𝑡 (c) 0 (d) 𝑉𝑜𝑣 − 𝑉𝑡 (e) None of these
19. The conductance of a MOSFET 𝑔𝐷𝑆 is NOT affected by
(a) the ratio 𝑊/𝐿 (b) the factor 𝜇𝑛 𝐶𝑜𝑥 (c) the overdrive voltage (d) 𝑣𝐺𝑆 (e) None of these
20. In a n-channel MOSFET operated at a constant gate potential, if the voltage 𝑣𝐷𝑆 is increased,
(a) the channel thickness increases at the drain (b) the channel thickness remains a constant
(c) the channel thickness decreases at the drain (d) the channel thickness decreases at the source
(e) None of these

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 Questions 21 - 25: Begin each question on a fresh page

21. Design a Common-Emitter amplifier with a voltage divider bias such that |𝐴𝑉 | = 10. You are provided
with a single power supply of 5 V and a BJT with a dc current gain of 100. No resistor larger than
40 𝑘Ω is to be used. [10 marks] [CO2] [BTL3]
22. An NMOS transistor with a process transconductance parameter 𝑘𝑛′ of 330 𝜇𝐴/𝑉 2 and 𝑉𝑡 = 0.7 𝑉 is
required to operate as a variable resistor ranging from 200 Ω to 2.2 𝑘Ω. If 𝑣𝐷𝑆 can be assumed to be
small, (i) determine the range of 𝑣𝐺𝑆 necessary to achieve this end; (ii) Using a 180 nm process
technology and a maximum allowable voltage of 2 V, what would be the required transistor width W ?
[5 marks] [CO1] [BTL2]
𝑽𝟏

𝑽𝟏 𝑹𝟐
𝑪𝟐
𝑹𝟏
𝒗𝒐
𝑹𝟏 𝑹𝟑
𝑪𝟐 𝑪𝟏
𝑪𝟏 𝒗𝒐 𝒗𝒊 𝑻𝟏
𝒗𝒊 𝑻𝟏

𝑹𝟐 𝑹𝟒 𝑹𝟑 𝑪𝟑

Fig. 1 Fig. 2

23. For the circuit of Fig. 1, given that the transistor 𝛽 = 100, 𝑅4 = 0 and 𝑉1 = 5 𝑉, design (i) 𝑅1 , 𝑅2 and
𝑅3 such that the BJT is biased at (1 mA, 2 V). (ii) What is the maximum voltage gain of this amplifier ?
(iii) If the lower 3dB frequency of the amplifier is to be 20 Hz, choose appropriate values of 𝐶1 and 𝐶2 .
[5 marks] [CO2] [BTL3]
24. Consider the circuit shown in Fig. 2. The BJT has a dc current gain of 100, with 𝐶𝜋 = 10 𝑝𝐹 and 𝐶𝜇 =
5 𝑝𝐹. The component values are 𝑅1 = 220 𝑘Ω; 𝑅2 = 1 𝑘Ω; 𝑅3 = 100 Ω; 𝐶1 = 𝐶2 = 1 𝜇𝐹 and 𝐶3 =
0.1 𝜇𝐹. (i) Determine the maximum voltage gain of this amplifier; (ii) What are the cut-away
frequencies corresponding to 𝐶1 , 𝐶2 and 𝐶2 ; (iii) Are these frequencies, widely separated ? Which
capacitance will have the maximum effect on the frequency response ? (iv) Determine the upper 3 dB
frequency of this amplifier. [5 marks] [CO2] [BTL3]

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 Table I MOSFET Biasing

25. Consider Table 1 above. It provides information on the potentials measured at the three terminals of a
n-channel MOSFET for five different biasing conditions. For each condition, determine the required
voltages and the region of operation of the MOSFET.
[5 marks] [CO1] [BTL2]

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Course Outcome / Bloom’s Taxonomy Level (BTL) Mark Distribution Table

CO Marks BTL Marks

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