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Von Neumann Architecture - Engager Activity

The document summarizes the Von Neumann architecture, which describes the flow of data through a CPU. It involves 1) decoding instructions in the control unit, 2) copying data into cache for potential later use, and 3) executing results by passing them to the accumulator after calculations in the ALU using data from memory addressed via the program counter, memory address register, and address/data buses.

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Shakila.D Raks Pallikkoodam
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34 views

Von Neumann Architecture - Engager Activity

The document summarizes the Von Neumann architecture, which describes the flow of data through a CPU. It involves 1) decoding instructions in the control unit, 2) copying data into cache for potential later use, and 3) executing results by passing them to the accumulator after calculations in the ALU using data from memory addressed via the program counter, memory address register, and address/data buses.

Uploaded by

Shakila.D Raks Pallikkoodam
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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1.

1 Systems Architecture (Von Neumann Architecture)

CPU MEMORY
1. Data sent to Control Unit to be decoded.
Address Data 2. Data copied into the cache incase it needs to be
PC MAR used later.
1 Load 3. ALU passes result into the accumulator to be
Address 6 executed.
2 Store 4. Address stored in PC
Cache
Address 4 5. Address from MAR is passed along address bus to
main memory.
3 Add Address
6. Memory fetches the data and passes along the
5
ALU CU data bus.
4 7. Data fetched copied in the MDR.
8. PC increments.
5 12 9. Address copied from PC to MAR
ACC MDR 10. ALU performs calculations and/or logical
6 28
decisions.

Use the statements below and put this algorithm in order from start to finish.

START END

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