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8051 Interrupts

The 8051 microcontroller has 5 interrupt sources - 2 internal timer interrupts, 2 external interrupts, and 1 serial interrupt. The IE register is used to enable or disable interrupts by setting bits. When multiple interrupts occur, the IP register determines the priority by setting bits to assign priorities of 0 or 1. Interrupts with priority 1 can interrupt those with priority 0, but two interrupts of the same priority will follow an internal polling sequence.

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53 views3 pages

8051 Interrupts

The 8051 microcontroller has 5 interrupt sources - 2 internal timer interrupts, 2 external interrupts, and 1 serial interrupt. The IE register is used to enable or disable interrupts by setting bits. When multiple interrupts occur, the IP register determines the priority by setting bits to assign priorities of 0 or 1. Interrupts with priority 1 can interrupt those with priority 0, but two interrupts of the same priority will follow an internal polling sequence.

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Microcontroller - 8051 Interrupts

There are five interrupt sources for the 8051,which means that they can recognize 5different
events that can interrupt regular progran execution. The 8051 architecture handles 5 interrupt
sOurces, out of which two are internal (Timer Interrupts), two are external and one is a serial
interrupt. They are INTO, TFO, INT1, TF1, RVTI. Each interrupt can be enabled or disabled
by setting bits of the IE register and the whole interrupt system can bedisabled by clearing the
External Interrupt Enable (EA)bit of the same register.
Register TCON
Register IE
EXO
Pins
"O
NT

TFO

Interrupt
TF1
Tiier

TF2 ET

EXF2

æARTSPE R
SPIP

IE (Interrupt Enable) Register


This register is responsible for enabling and disabling the interrupt. EA register is set to one for
enabling interrupts and set to 0for disabling the interrupts. Its bit sequence and their meanings
are shown in the following figure.
X Value aftor resst

IET EA ET2 ES ET1 EX1 ETO EX0 Bit name


bt7 bitB bh5bit4b3it2 biti bo

EA bit enables or disables all interrupt sources (globally):


0-disables all interrupts (evenenabled).
1- enables specific interrupts.
ET2 bit enables or disables Timer T2 interrupt:
0- Timer T2 interrupt disabled.
1-Timera T2 interrupt enabled.
ES bit enables or disables serial communication (UART and SPI) interrupts:
0- UART (universal asynchronous receiver-transmitter) and SPI (serial
peripheral interface) interrupt disabled.
1-UART and SPI interrupts enabled.
ETI bit enables or disables Timer Tl interrupt:
0 - Timer Tlinterrupt disabled.
1-Timer Tl interrupt enabled.
EXI bit enables or disables external interrupt through the INTO pin:
0- Interrupt onthe INTOpin disabled.
I- Interrupt on the INTO pin enabled.
ETO bit enables or d1sables Timer T0 interrupt:
0-Timer TOinterrupt disabled.
|- Timer TO interrupt enabled.
EXO bit enables or disables external interrupt through the INTIpin:
0- Interrupt on the INTIpin disabled.
|- Interrupt on the INTI pin enabled.
Interrupt Priorities
When several interrupts are enabled, it may happen that while one of them is in progress,
another one is requested. In such situations, the microcontroller needs to know whether to
proceed with the execution of current interrupt routine or to meet a new interrupt request. For
this reason, there is a priority list on the basis of which the microcontroller knows what to do.
The prioritylist offers 3levels of interrupt priority:
1) Reset - If a reset request arrives, all processes are stopped and the microcontroller
restarts.
ii) Interrupt priority Ican be disabled byReset only.
iii) Interrupt priority Ocan be disabled by both Reset and interrupt priority 1.
The IP Register (Interrupt Priority Register) specifies which one of existing interrupt sources
have higher and which one has lower priority. Interrupt priority is usually specified at the
beginning of the program.
IP (Interrupt Priority) Register
We can change the priority levels of the interupts by changing the corresponding bit in the
InterruptPriority (IP) register as shown in the following figure.
X 0 Value after reset

IP PT2 PS PT1 PX1 PTO PX0 Bit name


bit7 bit6 bit5 bit4 bit3 bit2 bitf bito

Bitsof this register determine the interrupt source priority.


PT2 Timer T2 interrupt priority:
0- Priority 0
|- Priority I
PS Serial port interrupt priornty:
0 - Priority 0
| -Priority I
PTI Timer TI interrupt priority:
0 - Priority 0
| - Priority I
PXIExternal internupt INTI priority:
0 - Priority 0
| -Priority I
PTO Timer TO interrupt priority:
0- Priority 0
| -Priority I
PX0 External interrupt INTO priority:
0 - Priority 0
1- Priority I
interrupted by the high priority interrupt, but not interrupted
Alow priority interrupt can only be
by another low priority interrupt.
request of higher
interrupts of different priority levels are received simultaneously, the
If two
priority level is served. polling
the same priority levels are received simultaneously, then the internal
If the requests of serviced.
request is to be
sequence determines which
TCON Register
external interrupt to the
Controller (TCON) register specifies the type of
Timing
microcontroller.

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