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Tutorial 4

The document discusses digital electronic circuits and contains 3 questions: 1. The first question asks about hazards in implementing a MUX with AND-OR-NOT gates. The summary states there is a possibility of static-1 hazard due to an overlapping pair in the K-map. 2. The second question asks to implement a function using a 8:1 multiplexer with the given minterms. 3. The third question asks what values D0-D7 should take in a MUX to implement a given simplified function. The summary lists the values needed to properly implement the function.

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17 views

Tutorial 4

The document discusses digital electronic circuits and contains 3 questions: 1. The first question asks about hazards in implementing a MUX with AND-OR-NOT gates. The summary states there is a possibility of static-1 hazard due to an overlapping pair in the K-map. 2. The second question asks to implement a function using a 8:1 multiplexer with the given minterms. 3. The third question asks what values D0-D7 should take in a MUX to implement a given simplified function. The summary lists the values needed to properly implement the function.

Uploaded by

mrinali.minnu9
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Tutorial 4

Digital Electronic Circuits

13/02/2023
Q.1. In the following MUX implementation, if the min-term expression of Y is implemented in simplified
form using AND-OR-NOT gates, will be there be any chances of occurrence of any hazard?

Contd.
Q.2. Implement the function F(A, B, C, D) = ∑m(2, 3, 4, 5, 8, 9, 12) using a 8:1 Multiplexer. Consider B, C,
and D as select lines.

Q.3. What should be the value of D0 , D1, …., D7 so that the minimized output F= A(B+C):
Solutions
A B C D F
Ans. 1. Truth table for the given MUX implementation is,
0 0 0 0 0
0 0 0 1 1
0 0 1 0 1
B C D F 0 0 1 1 0
0 1 0 0 0
0 0 0 0
0 1 0 1 1
0 0 1 1
0 1 1 0 0
0 1 0 A’ 0 1 1 1 1

0 1 1 0 1 0 0 0 0
1 0 0 1 1
1 0 0 0
1 0 1 0 0
1 0 1 A’ 1 0 1 1 0

1 1 0 A 1 1 0 0 0
1 1 0 1 0
1 1 1 A’
1 1 1 0 1
1 1 1 1 0
Hence, the min-term expression is, Y = Σm(1,2,5,7,9,14). K-map for Y is given as,

C’D’ C’D CD CD’

A’B’ 1 1

A’B 1 1

AB 1

AB’ 1

Because of an overlapping pair, static-1 hazard is possible in AND-OR-NOT implementation of Y.


Q.2. Implement the function F(A, B, C, D) = ∑m(2, 3, 4, 5, 8, 9, 12) using a 8:1 Multiplexer.

Ans. 2. Considering, B,C, and D as select lines the implementation table is:
Q.3. What should be the value of D0 , D1, …., D7 so that the
minimized output F= A(B+C):

Ans. 3. The given MUX arrangement can be written in POS form


as,

F=(A+B+C+D0)(A+B+C’+D1)(A+B’+C+D2)(A+B’+C’+D3)(A’+B+C+D4)
(A’+B+C’+D5)(A’+B’+C+D6)(A’+B’+C’+D7)
A B C F = A(B+C)

The output F for three inputs A, B, and C is given in the table. 0 0 0 0

0 0 1 0

0 1 0 0
From the table the POS expression which follows A(B+C) is,
0 1 1 0
F=(A’+B+C’)(A’+B’+C)(A’+B’+C’)
To implement the given POS expression, 1 0 0 0
D0=0, D1=0, D2=0, D3=0, D4=0, D5=1, D6=1, D7=1 1 0 1 1
1 1 0 1

1 1 1 1

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