FDMS0310AS FairchildSemiconductor
FDMS0310AS FairchildSemiconductor
August 2014
FDMS0310AS
N-Channel PowerTrench® SyncFETTM
30 V, 22 A, 4.3 mΩ
Features General Description
Max rDS(on) = 4.3 mΩ at VGS = 10 V, ID = 19 A The FDMS0310AS has been designed to minimize losses in
power conversion application. Advancements in both silicon and
Max rDS(on) = 5.2 mΩ at VGS = 4.5 V, ID = 17 A package technologies have been combined to offer the lowest
Advanced package and Silicon combination for low rDS(on) rDS(on) while maintaining excellent switching performance.This
and high efficiency device has the added benefit of an efficient monolithic Schottky
body diode.
SyncFETTM Schottky Body Diode
MSL1 robust package design Applications
100% UIL tested Synchronous Rectifier for DC/DC Converters
Top Bottom
Pin 1
S D 5 4 G
S
S
G D 6 3 S
D 7 2 S
D D S
D 8 1
D
D
Power 56
Thermal Characteristics
RθJC Thermal Resistance, Junction to Case 3.0
°C/W
RθJA Thermal Resistance, Junction to Ambient (Note 1a) 50
Off Characteristics
BVDSS Drain to Source Breakdown Voltage ID = 1 mA, VGS = 0 V 30 V
Drain to Source Breakdown Voltage
BVDSST VGS = 0 V, Transient = 100 ns 33 V
Transient
ΔBVDSS Breakdown Voltage Temperature
ID = 10 mA, referenced to 25°C 23 mV/°C
ΔTJ Coefficient
IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V 500 μA
IGSS Gate to Source Leakage Current, Forward VGS = 20 V, VDS = 0 V 100 nA
On Characteristics
VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 1 mA 1.2 1.5 3.0 V
ΔVGS(th) Gate to Source Threshold Voltage
ID = 10 mA, referenced to 25°C -4 mV/°C
ΔTJ Temperature Coefficient
VGS = 10 V, ID = 19 A 3.6 4.3
rDS(on) Static Drain to Source On Resistance VGS = 4.5 V, ID = 17 A 4.5 5.2 mΩ
VGS = 10 V, ID = 19 A, TJ = 125°C 4.8 6.0
gFS Forward Transconductance VDS = 5 V, ID = 19 A 103 S
Dynamic Characteristics
Ciss Input Capacitance 1715 2280 pF
VDS = 15 V, VGS = 0 V,
Coss Output Capacitance 655 870 pF
f = 1MHz
Crss Reverse Transfer Capacitance 75 110 pF
Rg Gate Resistance 0.7 2.5 Ω
Switching Characteristics
td(on) Turn-On Delay Time 9.0 18 ns
tr Rise Time VDD = 15 V, ID = 19 A, 3.9 10 ns
td(off) Turn-Off Delay Time VGS = 10 V, RGEN = 6 Ω 25 40 ns
tf Fall Time 3.2 10 ns
Qg Total Gate Charge VGS = 0 V to 10 V 27 37 nC
Qg Total Gate Charge VGS = 0 V to 4.5 V VDD = 15 V, 13 19 nC
Qgs Gate to Source Charge ID = 19 A 4.2 nC
Qgd Gate to Drain “Miller” Charge 3.7 nC
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. EAS of 33 mJ is based on starting TJ = 25 °C, L = 0.3 mH, IAS = 15 A, VDD = 27 V, VGS = 10 V.
4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied.
100 5
VGS = 10 V
VGS = 4 V
VGS = 3.5 V
NORMALIZED
60 3
VGS = 3 V
VGS = 3.5 V
40 2 VGS = 4 V
20 1
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX VGS = 4.5 V VGS = 6 V VGS = 10 V
0 0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 0 20 40 60 80 100
VDS, DRAIN TO SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)
1.6 16
ID = 19 A PULSE DURATION = 80 μs
DRAIN TO SOURCE ON-RESISTANCE
1.2
10
1.0 8
6 TJ = 125 oC
0.8
4
TJ = 25 oC
0.6 2
-75 -50 -25 0 25 50 75 100 125 150 2 4 6 8 10
TJ, JUNCTION TEMPERATURE (oC) VGS, GATE TO SOURCE VOLTAGE (V)
100 100
PULSE DURATION = 80 μs
IS, REVERSE DRAIN CURRENT (A)
VGS = 0 V
DUTY CYCLE = 0.5% MAX
80 10
ID, DRAIN CURRENT (A)
VDS = 5 V TJ = 125 oC
TJ = 125 oC
60 1
TJ = 25 oC
TJ = 25 oC
40 0.1
TJ = -55 oC TJ = -55 oC
20 0.01
0 0.001
1 2 3 4 0.0 0.2 0.4 0.6 0.8 1.0 1.2
VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)
10 3000
ID = 19 A
VGS, GATE TO SOURCE VOLTAGE (V)
8 VDD = 15 V Ciss
1000
CAPACITANCE (pF)
6
VDD = 10 V Coss
VDD = 20 V
4
Crss
2 100
f = 1 MHz
VGS = 0 V
0 40
0 5 10 15 20 25 30 0.1 1 10 30
Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)
40 100
IAS, AVALANCHE CURRENT (A)
80
ID, DRAIN CURRENT (A)
TJ = 25 oC VGS = 10 V
10 60
TJ = 125 oC
20
o
RθJC = 3.0 C/W
Limited by Package
1 0
0.001 0.01 0.1 1 10 40 25 50 75 100 125 150
o
tAV, TIME IN AVALANCHE (ms) TC, CASE TEMPERATURE ( C)
200 2000
100 1000
P(PK), PEAK TRANSIENT POWER (W)
100 μs
ID, DRAIN CURRENT (A)
10
1 ms
100
10 ms
1 THIS AREA IS
LIMITED BY rDS(on) 100 ms
1s
10
SINGLE PULSE
0.1 TJ = MAX RATED SINGLE PULSE
10 s
RθJA = 125 oC/W RθJA = 125 oC/W
DC
TA = 25 oC 1 TA = 25 oC
0.01 0.5
0.01 0.1 1 10 100200 10
-4
10
-3
10
-2
10
-1
1 10 100 1000
VDS, DRAIN to SOURCE VOLTAGE (V) t, PULSE WIDTH (sec)
Figure 11. Forward Bias Safe Figure 12. Single Pulse Maximum
Operating Area Power Dissipation
2
1 DUTY CYCLE-DESCENDING ORDER
D = 0.5
NORMALIZED THERMAL
0.2
0.1 0.1
IMPEDANCE, ZθJA
0.05
0.02 PDM
0.01
0.01
t1
t2
SINGLE PULSE
0.001 NOTES:
o
RθJA = 125 C/W DUTY FACTOR: D = t1/t2
(Note 1b) PEAK TJ = PDM x ZθJA x RθJA + TA
0.0001
-4 -3 -2 -1
10 10 10 10 1 10 100 1000
t, RECTANGULAR PULSE DURATION (sec)
Fairchild’s SyncFETTM process embeds a Schottky diode in Schottky barrier diodes exhibit significant leakage at high tem-
parallel with PowerTrench MOSFET. This diode exhibits similar perature and high reverse voltage. This will increase the power
characteristics to a discrete external Schottky diode in parallel in the device.
with a MOSFET. Figure 14 shows the reverse recovery
characteristic of the FDMS0310AS.
25 0.01
5
1E-5 TJ = 25 oC
0
-5 0.000001
0 50 100 150 200 0 5 10 15 20 25
TIME (ns) VDS, REVERSE VOLTAGE (V)
Figure 14. FDMS0310AS SyncFETTM body Figure 15. SyncFETTM body diode reverse
diode reverse recovery characteristic leakage versus drain-source voltage