Analog Electronic Circuits & Op-

Amps(21EE32)

MODULE -1 : DIODE CIRCUITS & TRANSISTOR AT LOW

FREQUENCIES
 Module- 1:
oDiode Circuits: Diode characteristics, Diode clipping, and clamping
circuits.

oTransistor at Low Frequencies: Operating point, voltage divider bias

circuit, stability factor, BJT transistor modelling- emitter follower,
analysis using h – parameter model.
 Introduction:
 A PN junction is an interface or a boundary between two semiconductor material types,
namely the p-type and the n-type semiconductors.
 A PN Junction Diode is made by joining two equally doped P-type and N-type semi-
conductor materials.

 When these two materials are joined together, they form a small layer in-between them
called the depletion layer.
 Introduction to PN Junction Diode:
 The p-type or the positive side of the semiconductor has an excess of holes and the n-type or
the negative side has an excess of electrons. In a semiconductor, the p-n junction is created by
the method of doping.
In semiconductor production, doping is the
intentional introduction of impurities into an
intrinsic semiconductor for the purpose of
modulating its electrical, optical and structural
properties.
The doped material is referred to as an extrinsic
semiconductor. A semiconductor doped to such
high levels that it acts more like a conductor than
a semiconductor is referred to as a degenerate
semiconductor.
 Introduction to PN Junction Diode:
 Let us consider a thin p-type silicon semiconductor sheet. If we add a small amount of
pentavalent impurity to this, a part of the p-type Si will get converted to n-type silicon. This
sheet will now contain both p-type region and n-type region and a junction between these two
regions.
 The processes after the formation
of a p-n junction are of two types –
o Diffusion and Drift.

 As we know, there is a difference in the concentration of holes and electrons at the two sides of
a junction, the holes from the p-side diffuse to the n-side and the electrons from the n-side
diffuse to the p-side. These give rise to a diffusion current across the junction.
 Introduction to PN Junction Diode:
 When an electron diffuses from the n-side to the p-side, an ionized donor is left behind on the
n-side, which is immobile. As the process goes on, a layer of positive charge is developed on
the n-side of the junction.
 Similarly, when a hole goes from the p-side to the n-side, and ionized acceptor is left behind
in the p-side, resulting in the formation of a layer of negative charges in the p-side of the
junction.
 This region of positive charge and negative charge on either side of the junction is termed as
the depletion region. Due to this positive space charge region on either side of the junction, an
electric field direction from a positive charge towards the negative charge is developed.
 Due to this electric field, an electron on the p-side of the junction moves to the n-side of the
junction. This motion is termed as the drift. Here, we see that the direction of drift current is
opposite to that of the diffusion current.
Introduction to PN Junction Diode:
Biasing conditions for the p-n Junction Diode.
There are three biasing conditions for p-n junction diode and this is based on the
voltage applied:
1. Zero bias: There is no external voltage applied to the p-n junction diode.
2. Forward bias: The positive terminal of the voltage potential is connected to
the p-type while the negative terminal is connected to the n-type.
3. Reverse bias: The negative terminal of the voltage potential is connected to
the p-type and the positive is connected to the n-type.
 Zero Biased Condition:
In this case, no external voltage is applied to the P-N junction diode; and therefore,
the electrons diffuse to the P-side and simultaneously holes diffuse towards the N-
side through the junction, and then combine with each other.
Due to this an electric field is generated by these charge carriers. The electric field
opposes further diffusion of charged carriers so that there is no movement in the
middle region. This region is known as depletion width or space charge.
Forward Bias:
When the p-type is connected to the positive terminal
of the battery and the n-type to the negative terminal
then the p-n junction is said to be forward-biased.
When the p-n junction is forward biased, the built-in
electric field at the p-n junction and the applied electric
field are in opposite directions.
When both the electric fields add up the resultant
electric field has a magnitude lesser than the built-in
electric field. This results in a less resistive and thinner
depletion region.
The depletion region’s resistance becomes negligible
when the applied voltage is large. In silicon, at the
voltage of 0.6 V, the resistance of the depletion region
becomes completely negligible and the current flows
across it unimpeded.
Reverse Bias:
When the p-type is connected to the negative
terminal of the battery and the n-type is
connected to the positive side then the p-n
junction is said to be reverse biased.
In this case, the built-in electric field and the
applied electric field are in the same direction.
When the two fields are added, the resultant
electric field is in the same direction as the built-
in electric field creating a more resistive, thicker
depletion region.
The depletion region becomes more resistive and
thicker if the applied voltage becomes larger.
Diode I-V Characteristics:
Diode I-V Characteristics:
 The minimum amount of voltage required for conducting the diode is known

as “knee voltage” or “threshold voltage” or “cut-in voltage”.

 The Avalanche Breakdown and Zener Breakdown are two different

mechanisms by which a PN junction breaks.

 The Zener and Avalanche breakdown both occur in diode under reverse bias

condition.
Diode I-V Characteristics:
Avalanche Breakdown:

 The Avalanche Breakdown occurs because of the ionization of electron-hole pairs

which will result valence electrons to absorb sufficient energy to leave parent atom.

 After the breakdown, the junction cannot regain its original position because the

diode is completely burnt off.

Diode I-V Characteristics:
 The reverse bias voltage at which the Avalanche breakdown occurs is called
Reverse Breakdown Voltage (VBR).

 The Zener breakdown occurs in the very thin depletion region which has more
numbers of free electrons.

 The reverse current starts flowing in the junction because of which depletion
region becomes completely vanishes. This process is known as the Zener
breakdown.
Diode I-V Characteristics:

 In Zener breakdown, the junction is not completely damaged. The depletion region

regains its original position after the removal of the reverse voltage.

 The maximum reverse bias voltage that can be applied for a diode before entering the

breakdown region is called Peak Inverse Voltage (PIV).

 Diode Approximation: (Large signal operations)
1. Ideal Diode:
◦ When the diode is forward biased, resistance offered is zero, if
it is reverse biased resistance offered is infinity.

◦ It acts as a perfect switch.

◦ The characteristic and the equivalent circuit of the diode is

shown in Fig. 1.
 Diode Approximation: (Large signal operations)
2. Second Approximation:
◦ When forward voltage is more than 0.7 V, for Si diode then it
conducts and offers zero resistance.

◦ The drop across the diode is 0.7V.

◦ When reverse biased it offers infinite resistance.

◦ The characteristic and the equivalent circuit is shown in Fig. 2.

 Diode Approximation: (Large signal operations)
3. Third Approximation:
◦ When the forward voltage is more than 0.7V, then the diode
conducts, it offers a resistance RF and the voltage drop is
0.7V(slope of the current).

◦ The output characteristic and the equivalent circuit is shown

in fig. 3.
 Diode Current Equation:
The Shockley diode equation or the diode law, gives the I–V Characteristic of an
ideal diode in either forward or reverse bias (applied voltage):
𝐕𝐃
Diode Current 𝐈𝐃 = 𝐈𝐒 𝐞 − 𝟏
𝐧𝐕𝐓

Where VD = Voltage applied across the diode; IS= Reverse Saturation Current; n is
an Ideality Factor which depends on operating conditions and physical conditions
(1< n < 2); VT= Thermal Voltage given by,
𝑘𝑇
𝑉𝑇 =
𝑞
Where k is the Boltzmann’s Constant; T = Temperature in °K; q = Magnitude of
electric charge
 Diode Rectifiers:
 The main application of p-n junction diode is in rectification circuits.
 These circuits are used to describe the conversion of AC signals to DC in power
supplies.
 Diode rectifier gives an alternating voltage which pulsates in accordance with time.
The filter smoothens the pulsation in the voltage and to produce DC voltage, a
regulator is used which removes the ripples.
 There are two primary methods of diode rectification:
1. Half Wave Rectifier
2. Full Wave Rectifier
a) Center Tapped Rectifiers
b) Bridge Rectifier
 Half Wave Rectifier:
 The half-wave rectifier has both positive and negative cycles.
 During the positive half of the input, the current will flow from positive to
negative which will generate only a positive half cycle of the AC supply.
 When AC supply is applied to the transformer, the voltage will be decreasing at
the secondary winding of the diode.
 All the variations in the AC supply will reduce, and we will get the pulsating DC
voltage to the load resistor.
 Half Wave Rectifier:
 In the second half cycle, the current will flow from negative to positive and the diode
will be reverse biased.
 Thus, at the output side, there will be no current generated, and we cannot get power at
the load resistance. A small amount of reverse current will flow during reverse bias due
to minority carriers.
Advantages of Half Wave Rectifier
Affordable
Simple connections
Easy to use as the connections are simple
Number of components used are less
Disadvantages of Half Wave Rectifier
Ripple production is more
Harmonics are generated
Utilization of the transformer is very low
The efficiency of rectification is low
 Applications of Half Wave Rectifier:
Following are the uses of half-wave rectification:
Power rectification: Half wave rectifier is used along with a transformer for
power rectification as powering equipment.
Signal demodulation: Half wave rectifiers are used for demodulating the AM
signals.
Signal peak detector: Half wave rectifier is used for detecting the peak of the
incoming waveform.
Diode Clippers:
 A clipper is a circuit which is used to eliminate a portion of an input signal.

 In other words the circuit prevents some portion of the wave form (input signal

voltage) above or below a certain positive or negative amplitude, or both is

called a clipping circuit.

 Classification of Diode Clippers:
 Basically there are two types of clippers:

1. Series Clippers and

2. Shunt/Parallel Clippers.

 The Series clipper contains a diode that is in series with the load.

 The Shunt clipper contains a diode that is in parallel with the load.
 Diode Clippers-An Overview
The basic components required for a clipping circuit are – an ideal diode and a
resistor.
In order to fix the clipping level to the desired amount, a dc battery must also
be included.
When the diode is forward biased, it acts as a closed switch, and when it is
reverse biased, it acts as an open switch.
Different levels of clipping can be obtained by varying the amount of voltage
of the battery and also interchanging the positions of the diode and resistor.
1. Positive Series Clipper:
 In a Series Positive Clipper, a diode is connected in series with the output, as shown in
figure below.
 During the Positive Half Cycle of the input voltage, the terminal A is positive with
respect to B. This reverse biases the diode and it acts as an open switch.
1. Positive Series Clipper:
 Therefore all the applied voltage drops across the diode and none across the resistor.
 As a result of this there is no output voltage during the positive half cycle of the input
voltage (In case of Ideal Diode).
 Practically, a bit portion of the positive cycle is present in the output due to the diode
conduction voltage of 0.7V (Silicon Diode). Hence there will be a difference in the
practical and ideal output waveforms as shown below.
2. Biased Positive Series Clipper {With Positive reference
Voltage (+Vr)}:
 In this Clipper circuit the diode is connected in series to the input signal and biased
with positive reference voltage Vr , it attenuates a portion of positive amplitude of
waveform.
 The following figure represents the circuit diagram for positive series clipper when the
positive reference voltage is applied.
2. Biased Positive Series Clipper {With Positive reference
Voltage (+Vr)}:
 During the positive half cycle of the input the diode gets reverse biased and the
reference voltage appears at the output.
 During its negative half cycle, the diode gets forward biased and conducts like a
closed switch providing complete output at negative half cycle.

 Hence the output waveform appears as shown in the above figure.

2. Biased Positive Series Clipper {With Negative reference
Voltage (-Vr)}:
 In this Clipper circuit the diode is connected in series to the input signal and biased
with negative reference voltage Vr and that attenuates the positive portions of the
waveform.
 The following figure represents the circuit diagram for positive series clipper, when
the reference voltage applied is negative.
2. Biased Positive Series Clipper {With Negative reference
Voltage (-Vr)}:
 During the positive cycle of the input the diode gets reverse biased and the reference
voltage appears at the output. As the reference voltage is negative, the same voltage with
constant amplitude is shown.
 During its negative cycle, the diode gets forward biased and conducts like a closed
switch.

 Hence the input signal that is greater than the reference voltage, appears at the output.
 Positive Shunt Clipper:
 In this Clipper circuit the diode is connected in parallel to the input signal which attenuates the
positive portions of the waveform, as shown in figure below.
 During positive half cycle of the input , the point A in the circuit positive with respect to the
point B. This makes the diode forward biased and hence it conducts like a closed switch. Thus
the voltage across the load resistor becomes zero as no current flows through it and hence VO
will be zero.
 Positive Shunt Clipper:
 In negative half cycle of the input, the point A in the circuit negative with respect to the point B.
This makes the diode reverse biased and hence it behaves like an open switch.
 Hence the voltage across the load resistor will be equal to the applied input voltage as it
completely appears at the output VO.
 Biased Positive Shunt Clipper {With Positive reference
Voltage (+Vr)}:
 In this clipper circuit the diode is connected in shunt to the input signal and biased with positive
reference voltage Vr and that attenuates the positive portions of the waveform.
 The following figure represents the circuit diagram for positive shunt clipper when the reference
voltage applied is positive.
 Biased Positive Shunt Clipper {With Positive reference
Voltage (+Vr)}:
 During the positive half cycle of the input the diode gets forward biased and nothing but the
reference voltage Vr appears at the output.
 During its negative half cycle, the diode gets reverse biased and behaves as an open switch. The
whole of the input appears at the output.
 Biased Positive Shunt Clipper {With Negative reference
Voltage (-Vr)}:
 In this clipper circuit the diode is connected in shunt to the input signal and biased with negative
reference voltage Vr and that attenuates the positive portions of the waveform.
 The following figure represents the circuit diagram for positive shunt clipper, when the reference
voltage applied is negative.
 Biased Positive Shunt Clipper {With Negative reference
Voltage (-Vr)}:
 During the positive half cycle of the input, the diode gets forward biased and the reference
voltage appears at the output. As the reference voltage is negative, the same voltage with
constant amplitude is shown.
 During the negative half cycle, the diode gets reverse biased and behaves as an open switch.
Hence the input signal that is greater than the reference voltage, appears at the output.
 Biased Negative Shunt Clipper {With Negative reference
Voltage (-Vr)}:
 During the positive half cycle of the input, the diode gets reverse biased and behaves as an open
switch. The whole of the input appears at the output.
 During the negative half cycle, the diode gets forward biased and behaves as an closed switch.
Hence the reference voltage will appears at the output.
 Drawbacks of Series and Shunt Diode Clippers
In series clippers, when the diode is in ‘OFF’ position, there will be no
transmission of input signal to output. But in case of high frequency signals
transmission occurs through diode capacitance which is undesirable. This is the
drawback of using diode as a series element in such clippers.
In shunt clippers, when diode is in the ‘OFF’ condition, transmission of input
signal should take place to output. But in case of high frequency input signals,
diode capacitance affects the circuit operation adversely and the signal gets
attenuated (that is, it passes through diode capacitance to ground).
 Example 1:
Determine the output waveform for the sinusoidal input as shown in the figure below.

Step 1: The Output VO is taken across resistor R.

 Example 1:
Step 2: During the positive half cycle of input, whenever the input voltage exceeds bias voltage
of 5V, the Diode turns “ON”.
Step 3: The transition model is substituted,
Applying KVL we can write ,
VO = Vi + 5 V
But, VO= VR= (iR*R) = (id*R) = 0 V

Vi + 5 V = 0V

i.e., Vi= -5 V ( Transition Voltage)

 Example 1:
Step 4: During the negative half cycle of input, for the voltage less than -5 V, the Diode is reverse
biased and goes for “OFF” state.
We know that, VO= Vi + 5 V

Input Signal Output Voltage Waveform

 Example 2:
For the clipping circuit shown in the figure, sketch the input and output waveforms for R=
10kΩ for Vi= 20sinωt and VR= 10V. Assume Rf=100Ω , Rr=∞ and Vr=0.
 Example 2:
Given, Vi= 20sinωt , Comparing with Vi= Vmsinωt ; we get Vm= 20 V
During Positive half cycle of input, the diode is forward biased and circuit is condensed to

Applying KVL,
Vin – (I*R) – (rf*I) – VR =0
Substituting the values, 20 – (10* 103*I) – (100*I) – 10 = 0
Simplifying, I = 9.09*10-5A or 90.9μA
 Example 2:
Forward Voltage Drop of Diode is Vf= rf* I = 100 * 90.9*10-6 = 9.9mV
VR= 10 V & Vf= 9.9mV
From the Circuit ,

During Positive half cycle of input

Output Voltage VO= Vf + VR = 10+0.09 = 10.1V

During Negative half cycle of input, Diode is Reverse biased and

Output Voltage VO= - Vm= - 20V
Output Voltage is as shown Output Waveform
Example 3:
Determine I, V1, V2, and Vo for the series dc configuration of Figure.
 Example 3:
During Positive half cycle of input,
the circuit is condensed to

Determining the known quantities we

can redraw the circuit as
 Example 3:
The resulting current through the circuit is, E1 + E2 – VD - I(R1+R2) = 0

I ≈ 2.072 mA
and the voltages are
 Example 3:
Applying Kirchhoff’s voltage law to the output section in the clockwise direction
will result in,

- E2 +V2 - VO = 0
VO= V2 - E2 = 4.56 – 5 = -0.44V
The minus sign indicates that VO has a polarity opposite to that chosen direction
 Example 4:
For the clipping circuit shown in the figure, sketch the output waveform. Assume Diode used
is Silicon.
 Example 4:
During Positive half cycle of input, the diode D1 is forward biased, D2 is Reverse Biased so the
overall circuit is condensed to
Applying KVL,
Vin – (I*R) – Vd1 – 8 V =0
Substituting the values,
10 – (I*1*103) – 0.7 – 8 = 0
Simplifying, I = 1.3*10-3A or 1.3 mA
VR= IR = (1.3*10-3)*(1*103)= 1.3 V
Output Voltage VO= (Vd1 + 8) = (0.7 + 8) = 8.7 V
 Example 4:
During Negative half cycle of input, the diode D2 is forward biased, D1 is Reverse Biased so the
overall circuit is condensed to
Applying KVL,
Vin – (I*R) + 6 V + Vd2 =0
Substituting the values,
-10 – (I*1*103) + 6 + 0.7 = 0
Simplifying, I = - 3.3*10-3A or - 3.3 mA
(Negative Sign Indicates chosen current direction is reversed)
VR= IR = (3.3*10-3)*(1*103)= 3.3 V
Output Voltage VO= - Vd1 - 6 = -0.7 - 6 = - 6.7 V Output Waveform
 Example 5:
For the clipping circuit shown in the figure, sketch the output waveform. Assume Diode used
is Silicon.
 Example 5:
The transition voltage can first be determined by applying the condition id= 0A at Vd=VD=0.7V.
Applying Kirchhoff’s voltage law around the output loop in the clockwise direction, we find that
-VO - VT + V = 0
VO= V – VT = 4 - 0.7 = 3.3V
For input voltages greater than 3.3 V, the diode will be an
open circuit and VO = Vi. For input voltages of less than
3.3 V, the diode will be in the “on” state and the network,
where output voltage is
Clampers: Introduction
 Clampers
A Clamper circuit can be defined as the circuit that consists of a diode, a resistor and a capacitor
that shifts the waveform to a desired DC level without changing the actual appearance of the
applied signal.
In order to maintain the time period of the wave form, the τ must be greater than half the time
period, discharging time for the capacitor should be slow.
τ = RC
Where R is the resistance of the resistor employed
C is the capacitance of the capacitor used
The time constant of charge and discharge of the capacitor determines the output of a clamper
circuit.
In a clamper circuit, a vertical shift either upward or downward takes place in the output
waveform with respect to the input signal.
 Clampers
The load resistor and the capacitor affect the waveform. So, the discharging time of the
capacitor should be large enough.
The DC component present in the input is rejected when a capacitor coupled network is used
as a capacitor blocks DC. Hence when DC needs to be restored, clamping circuit is used.
The network must have a capacitor, a diode, and a resistive element, but it can also employ an
independent dc supply to introduce an additional shift.
The magnitude of R and C must be chosen such that the time constant τ= RC is large enough
to ensure that the voltage across the capacitor does not discharge significantly during the
interval the diode is not conducting.
Throughout the analysis we will assume that for all practical purposes the capacitor will fully
charge or discharge in five time constants.
 Clampers
The network shown below will clamp the input signal to the zero level (for ideal diodes).
The resistor R can be the load resistor or a parallel combination of the load resistor and a
resistor designed to provide the desired level of R.
 Clampers
During the interval 0 → T/2 the network will appear as
shown in Fig, with the diode in the “ON” state
effectively “shorting out” the effect of the resistor R.
The resulting RC time constant is so small (R
determined by the inherent resistance of the network)
that the capacitor will charge to V volts very quickly.
During this interval the output voltage is directly across
the short circuit and VO= 0 V.
Clampers
When the input switches to the -V state, the network will appear as shown, with the open-
circuit equivalent for the diode determined by the applied signal and stored voltage across the
capacitor—both “pressuring” current through the diode from cathode to anode.
Now that R is back in the network the time constant determined by the RC product is
sufficiently large to establish a discharge period 5τ much greater than the period T/2 → T, and
it can be assumed on an approximate basis that the capacitor holds onto all its charge and,
𝑄
therefore, voltage (since V = ) during this period.
𝐶
Since VO is in parallel with the diode and resistor, it can also be drawn in the alternative
position shown.
Clampers
 Applying Kirchhoff’s voltage law around the input loop will result in
- V - V – VO= 0 and VO= 2V
 The negative sign resulting from the fact that the polarity of 2V is
opposite to the polarity defined for VO.
 The resulting output waveform appears in Figure with the input signal.
 The output signal is clamped to 0 V for the interval 0 to T/2 but
maintains the same total swing (2V) as the input.
 For a clamping network:
The total swing of the output is equal to the total swing of the input
signal.
Clampers
In general, the following steps may be helpful when analysing clamping networks:
1. Start the analysis of clamping networks by considering that part of the input signal that
will forward bias the diode.
2. During the period that the diode is in the “on” state, assume that the capacitor will
charge up instantaneously to a voltage level determined by the network.
3. Assume that during the period when the diode is in the “off” state the capacitor will hold
on to its established voltage level.
4. Throughout the analysis maintain a continual awareness of the location and reference
polarity for VO to ensure that the proper levels for VO are obtained.
5. Keep in mind the general rule that the total swing of the total output must match the
swing of the input signal.
Example 1:
Determine VO for the network shown, for the input indicated.
 Example 1:
Note that the frequency is 1000 Hz, resulting in a period of 1 msec and an interval of 0.5 msec
between levels.
The analysis will begin with the period t1 → t2 of the input signal since the diode is in its short-
circuit state. For this interval the network will appear as shown
 Example 1:
The output is across R, but it is also directly across the 5V battery if you follow the direct
connection between the defined terminals for VO and the battery terminals.
The result is VO= 5 V for this interval.
Applying Kirchhoff’s voltage law around the input loop will result in
-20V + VC - 5V = 0 and VC= 25 V
The capacitor will therefore charge up to 25 V
 Example 1:
In this case, the resistor R is not shorted out by the diode but a Thévenin equivalent circuit of
that portion of the network which includes the battery and the resistor will result in RTh= 0 Ω ,
with ETh = V = 5 V. For the period t2 → t3 the network will appear as shown in Figure.
The open-circuit equivalent for the diode will remove the 5V battery from having any effect on
VO, and applying Kirchhoff’s voltage law around the outside loop of the network will result in
+10V + 25 V – VO=0
VO =35 V
The time constant of the discharging network is determined
by the product RC and has the magnitude
τ = RC = (100kΩ)(1μF) = 100msec=0.1 sec
 Example 1:
 The total discharge time is therefore 5τ = 5(100 msec) = 500 msec.
 Since the interval t2 → t3 will only last for 0.5 msec, it is certainly a good approximation that the
capacitor will hold its voltage during the discharge period between pulses of the input signal. The
resulting output appears as shown with the input signal.
 Note that the output swing of 30 V matches the input swing.
 Example 2:
In the given circuit, given that C=2μF and diode cut-in voltage, Vγ =0. Calculate the average output
voltage.
a) 2V
b) 4V
c) -2V
d) -3V

Answer: (c) -2V

Explanation: Maximum input is Vm = 32 + 5 = 37 V; Capacitor charges up to 37 – 3 = 34 V
Vout = Vin – Vc = 32 + 5 sinωt – 34 = - 2 + 5sinωt
Average output voltage = – 2 V.
 Bipolar Junction transistor

Holes and electrons Three terminal device

determine device characteristics
Control of two terminal currents

Amplification and switching through 3rd contact

Transistor share a feature with…

• Output current can toggle between large and small

(Switching  Digital logic; create 0s and 1s)

• Small change in ‘valve’ (3rd terminal) creates Large

change in output between 1st and 2nd terminal

(Amplification  Analog applications; Turn 0.5  50)

 Transistors:
 Bipolar transistors are one of the main ‘building-blocks’ in electronic
systems
 They are used in both analogue and digital circuits
 They incorporate two pn junctions and are sometimes known as bipolar
junction transistors or BJTs
 Here will refer to them simply as bipolar transistors
Notation
◦ bipolar transistors are 3 terminal devices
◦ COLLECTOR (C)
◦ BASE (B)
◦ EMITTER (E)
◦ the base is the control input diagram illustrates the notation used for labelling
voltages and currents
 Transistors:
 The transistor is a three-layer semiconductor device consisting of either two n- type and one
p-type layers of material OR two p- type and one n-type layers of material.

pnp Transistor npn Transistor

Bipolar Junction Transistor (BJT)

3 adjacent regions of doped Si (each connected to

a lead):
◦ Base. (thin layer,less doped).
◦ Collector.
◦ Emitter.
npn bipolar junction transistor
2 types of BJT:
◦ npn.
◦ pnp.
Most common: npn (focus on it).

Developed by Shockley (1949)

pnp bipolar junction transistor

 Bipolar Junction Transistors: Basics
IC

- - +
+
-

IE IC IE
- + IB + IB

IE = I B + I C ………(KCL) IB + IC = I E ………(KCL)

VEC = VEB + VBC ……… (KVL) VCE = VBE + VCB ……… (KVL)
 BJT npn Transistor
1 thin layer of p-type, sandwiched between 2 layers of n-type.
N-type of emitter: more heavily doped than collector.
With VC>VB>VE:
◦ Base-Emitter junction forward biased, Base-Collector reverse biased.
◦ Electrons diffuse from Emitter to Base (from n to p).
◦ There’s a depletion layer on the Base-Collector junction no flow of e- allowed.
◦ BUT the Base is thin and Emitter region is n+ (heavily doped)  electrons have enough
momentum to cross the Base into the Collector.
◦ The small base current IB controls a large current IC
 BJT characteristics
 Current Gain:
 α is the fraction of electrons that diffuse across the
narrow Base region
 1- α is the fraction of electrons that recombine with I C  I E
holes in the Base region to create base current
 The current Gain is expressed in terms of the β (beta) of I B  (1   ) I E
the transistor (often called hfe by manufacturers).
IC 
 β (beta) is Temperature and Voltage dependent.  
 It can vary a lot among transistors (common values for IB 1
signal BJT: 20 - 200).
Transistor action
 Transistors:
Relationship between the collector current and the base
current in a bipolar transistor
o characteristic is approximately linear
o magnitude of collector current is generally
many times that of the base current
o the device provides current gain
 Bipolar Transistor Characteristics
Behavior can be described by the current gain, hfe or by the transconductance, gm
of the device
 Transistor configurations
◦ transistors can be used in a number of
configurations
◦ most common is as shown
◦ emitter terminal is common to input
and output circuits
◦ this is a common-emitter
configuration
◦ we will look at the characteristics of the
device in this configuration
 Input characteristics
◦ the input takes the form of a
forward-biased pn junction
◦ the input characteristics are
therefore similar to those of a
semiconductor diode
Output characteristics
◦region near to the
origin is the
saturation region
◦this is normally
avoided in linear
circuits
◦slope of lines
represents the
output resistance
 + -
BJT Basics
IE IC
- + IB

VEB >-VBC > 0  VEC > 0 but small

IE > -IC > 0  IB > 0
VEB, VBC > 0  VEC >> 0
IE , IC > 0  I B > 0

VEB < 0, VBC > 0  VEC > 0

IE < 0, IC > 0  IB > 0 but small
Bipolar Junction Transistors: Basics

Bias Mode E-B Junction C-B Junction

Saturation Forward Forward

Active Forward Reverse

Inverted Reverse Forward
Cutoff Reverse Reverse
Bipolar Junction Transistor (BJT):
 The Bipolar Junction Transistor has three Configurations:
1. Common Base Configuration
2. Common Emitter Configuration
3. Common Collector Configuration
 Transistor Operation:
The basic operation of the transistor will now be described using the pnp transistor in the
following Figure. In first Figure the pnp transistor has been redrawn without the base-to-collector
bias.
The depletion region has been reduced in width due to the applied bias, resulting in a heavy flow
of majority carriers from the p- to the n-type material.
Forward-biased junction of a pnp transistor. Reverse-biased junction of a pnp transistor.
 Transistor Operation:
One p-n junction of a transistor is reverse biased, while the other is forward biased.
Applying Kirchhoff’s current law to the transistor as shown in Figure, as if it were a single node,
we obtain IE = IC + IB Majority and minority carrier flow of a pnp transistor.
The Emitter current is the sum of the Collector and Base
currents.
The collector current, however, is comprised of two
components—the majority and minority carriers as indicated in
Figure.
The minority-current component is called the leakage current
and is given the symbol ICO (IC current with emitter terminal
Open).
IC = ICO(majority) + ICO(minority)
 Transistor Biasing and Stabilization:
Operating point: Operation in the cut-off,
saturation, and linear regions of the BJT
characteristic are provided as follows:
1. Linear-region operation:
 Base–emitter junction forward biased
 Base–collector junction reverse biased
2. Cutoff-region operation:
 Base–emitter junction reverse biased
3. Saturation-region operation:
 Base–emitter junction forward biased
 Base–collector junction forward biased
 npn Common Emitter circuit
Emitter is grounded.
Base-Emitter starts to conduct with VBE=0.6V,IC
flows and it’s IC=β*IB.
Increasing IB, VBE slowly increases to 0.7V but IC
rises exponentially.
As IC rises ,voltage drop across RC increases and
VCE drops toward ground. (transistor in saturation,
no more linear relation between IC and IB)
 Common Emitter characteristics
The avalanche multiplication
Collector current
of current through collector
proportional to Base current
junction occurs: to be
Collector current controlled by avoided
the collector circuit. (Switch
behavior) In full saturation
VCE=0.2V.

No current flows
Operation region summary
Operation IB or VCE BC and BE Mode
Region Char. Junctions
Cutoff IB = Very Reverse & Open Switch
small Reverse
Saturation VCE = Small Forward & Closed Switch
Forward
Active Linear VCE = Reverse & Linear
Moderate Forward Amplifier
Break-down VCE = Large Beyond Limits Overload
 Transistor Biasing:
The basic function of transistor is amplification.
The process of raising the strength of weak signal without any change in its general shape is
referred as faithful amplification.
For faithful amplification it is essential that:-
1. Emitter-Base junction is forward biased
2. Collector- Base junction is reversed biased
3. Proper zero signal collector current
The proper flow of zero signal collector current and the maintenance of proper collector
emitter voltage during the passage of signal is called transistor biasing.
WHY BIASING?
If the transistor is not biased properly, it would work inefficiently and produce distortion
in output signal
 Transistor Biasing:
HOW A TRANSISTOR CAN BE BIASED?
A transistor is biased either with the help of battery or associating a circuit with the transistor.
The circuit used for transistor biasing is called the biasing circuit.
VARIOUS BIASING CIRCUITS
1. Fixed Bias Circuit
2. Fixed Bias with Emitter Resistor/Emitter Stabilized bias
3. Collector to Base Bias Circuit
4. Potential Divider Bias Circuit
Fixed Bias Configuration:
 The fixed-bias configuration is the simplest of transistor biasing arrangements, but it is also quite unstable
 For most configurations the dc analysis begins with a determination of the base current
 For the dc analysis of a transistor network, all capacitors are replaced by an open-circuit equivalent
Fixed Bias Configuration:
Forward Bias of Base- Emitter
 Consider first the base–emitter circuit loop of Figure.
 Writing Kirchhoff’s voltage equation in the clockwise direction for the
loop, we obtain

Note the polarity of the voltage drop across RB as

established by the indicated direction of IB. :
 Fixed Bias Configuration:
Collector–Emitter Loop
The collector–emitter section of the network appears in Figure with the
indicated direction of current IC and the resulting polarity across RC.

which states in words that the voltage across the collector–emitter region of a transistor
in the fixed-bias configuration is the supply voltage less the drop across RC.
As a brief review of single- and double-subscript notation recall that
VCE= VC - VE
Problems:
1. Determine the following for the Fixed-Bias Configuration:
a. IBQ and ICQ
b. VCEQ
c. VB and VC
d. VBC
Problems:
𝑉𝑐𝑐 −𝑉𝐵𝐸 12𝑉−0.7𝑉
a. 𝑰𝑩𝑸 = 𝑅𝐵
=
240𝑘Ω
= 𝟒𝟕. 𝟎𝟖 𝝁𝑨
𝑰𝑪𝑸 = 𝛽 × 𝐼𝐵𝑄 = 50 47.08 𝜇𝐴 = 𝟐. 𝟑𝟓 𝒎𝑨
b. 𝑽𝑪𝑬𝑸 = 𝑉𝑐𝑐 − 𝐼𝐶 𝑅𝐶 = 12 𝑉 − 2.35𝑚𝐴 2.2𝑘Ω
𝑽𝑪𝑬𝑸 = 𝟔. 𝟖𝟔 𝑽
c. 𝑽𝑩 = 𝑽𝑩𝑬 = 𝟎. 𝟕 𝑽
d. Using double subscription notation yields
𝑽𝑩𝑪 = 𝑉𝐵 − 𝑉𝐶 = 0.7𝑉 − 6.83 𝑉 = −𝟔. 𝟏𝟑 𝑽
Negative sign indicates that junction is reverse biased.
 Saturation
Saturation conditions are normally
avoided because the base-collector
junction is no longer reverse biased and
the output amplified signal will be
distorted
For a transistor operating in the
saturation region, the current is
maximum for the particular design.
The highest saturation level is defined
by the maximum collector current as Saturation regions:
provided by the specification sheet (a)Actual (b) Approximate.
Saturation

Determining IC(sat) Determining IC(sat) for the fixed-bias configuration.

 Problem:
Given the load line in Figure and the defined Q-point, determine the required values
of VCC, RC, and RB for a fixed-bias configuration.
 Problem:
From the Figure, VCE= VCC= 20V at IC=0 mA

𝑉𝐶𝐶
I C= (𝑎𝑡 𝑉𝐶𝐸 = 0 V)
𝑅𝐶

𝑉𝐶𝐶 20 𝑉
RC= = = 𝟐𝒌Ω
𝐼𝐶 10 𝑚𝐴

VCC – VBE –IBRB=0

𝑉𝐶𝐶 −𝑉𝐵𝐸 20−0.7

RB= = = 𝟕𝟕𝟐𝒌Ω
𝐼𝐵 25𝜇𝐴
2. Emitter Stabilized bias/ Fixed Bias with
Emitter Resistor Bias
Main Circuit DC Equivalent Circuit
2. Emitter Stabilized bias:
Base-Emitter Loop:
2. Emitter Stabilized bias:
Base-Emitter Loop: We Know That, IE= IC+ IB
But, IC = β IB
Therefore, IE = β IB +IB = (β +1) IB
Applying KVL ,
2. Emitter Stabilized bias:
Collector-Emitter Loop
Applying KVL,
IERE + VCE + ICRC - VCC=0
Since IE ≈ I C

VCE = VCC - IC(RC + RE)

 Saturation Level
The addition of the emitter resistor to the dc bias of the BJT provides improved stability, that is,
the dc bias currents and voltages remain closer to where they were set by the circuit when outside
conditions, such as temperature and transistor beta, change.
 Problems:
1. Determine the following for the emitter bias network of the figure shown:
a. IB
b. IC
c. VCE
d. VB
e. VC
f. VE
g. VBC
For above example, Determine the saturation current.

IC(sat) = 6.67mA

Looking at the ICQ and IC(sat), the value of current is doubled.

 Load- Line Analysis:
The load-line analysis of the emitter-bias network is only slightly different from that encountered
for the fixed-bias configuration. The level of IB as determined by Equation which defines the
level of IB on the characteristics of Figure(denoted IBQ).
The collector–emitter loop equation that defines the load line is the
following:

Choosing IC=0 mA, gives

Choosing VCE = 0V, gives

 Voltage Divider Bias
This is a very stable bias circuit. The currents and voltages are nearly independent of any
variations in β.
DC components of the voltage-divider configuration.
 Voltage Divider Bias
 There are two methods that can be applied to analyse the voltage divider
configuration.
 The first is the exact method that can be applied to any voltage-divider
configuration.
 The second is referred to as the approximate method and can be applied
only if specific conditions are satisfied.
Voltage Divider Bias
 Voltage Divider Bias
Exact Analysis:
 Voltage Divider Bias
Exact Analysis:
Applying Kirchhoff’s voltage law in the clockwise direction in the Thévenin network,

𝑬𝑻𝒉 − 𝑰𝑩 𝑹𝑻𝒉 − 𝑽𝑩𝑬 − 𝑰𝑬 𝑹𝑬 = 𝟎

(Substituting IE = (β+1)IB)
 Voltage Divider Bias

Where IB << I1 and I1 @ I2 :

Where RE > 10R2:

 Voltage Divider Bias:
Transistor Saturation Level

Load-Line Analysis
 Bias Stabilization
Through proper biasing, a desired quiescent operating point of the transistor amplifier in
the active region (linear region) of the characteristics is obtained. It is desired that once
selected the operating point should remain stable.
The maintenance of operating point stable is called Stabilisation.
The selection of a proper quiescent point generally depends on the following factors:
(a) The amplitude of the signal to be handled by the amplifier and distortion level in signal
(b) The load to which the amplifier is to work for a corresponding supply voltage
The operating point of a transistor amplifier shifts mainly with changes in temperature,
since the transistor parameters — β, ICO and VBE (where the symbols carry their usual
meaning)—are functions of temperature.
 Bias Stabilization
The stability of a system is a measure of the sensitivity of a network to variations
in its parameters. In any amplifier employing a transistor the collector current IC
is sensitive to each of the following parameters:
1. β : increases with increase in temperature
2. VBE: decreases about 7.5 mV per degree Celsius (°C) increase in temperature
3. ICO (reverse saturation current): doubles in value for every 10°C increase in
temperature
 Stability Factors, S(ICO), S(VBE), and S(β)
A stability factor, S, is defined for each of the parameters affecting bias stability as listed below:
Networks that are quite stable and relatively
insensitive to temperature variations
have low stability factors.
The higher the stability factor, the more sensitive the
network to variations in that parameter.

In each case, the delta symbol (Δ) signifies change in that quantity. The numerator of each equation is
the change in collector current as established by the change in the quantity in the denominator. For a
particular configuration, if a change in ICO fails to produce a significant change in IC, the stability factor
defined by S(ICO)= IC/ICO will be quite small.
STABILITY FACTOR FOR POTENTIAL DIVIDER BIAS CIRCUIT
 Problems:
Calculate the stability factor and the change in IC from 25°C to 100°C for the transistor defined by Table 4.1 for the
following emitter-bias arrangements.
(a) RB/RE = 250(RB=250RE)
(b) RB/RE =10(RB =10RE).
(c) RB/RE =0.01(RE=100RB).
Problems:
Calculate the stability factor and the change in IC from 25°C to 100°C for the transistor defined by Table 4.1 for the
following emitter-bias arrangements.
(a) RB/RE = 250(RB=250RE); (b) RB/RE =10(RB =10RE).
(c) RB/RE =0.01(RE=100RB).
 Problems:
2. Determine the stability factor S(VBE) and the change in IC from 25°C to 100°C for the transistor defined by
Table 4.1 for the following bias arrangements.
(a) Fixed-bias with RB=240kΩ and β= 100.
(b) Emitter-bias with RB= 240kΩ, RE = 1kΩ, and β= 100.
(c) Emitter-bias with RB=47kΩ, RE=4.7kΩ, and β= 100.
(a)
 Problems:
2. Determine the stability factor S(VBE) and the change in IC from 25°C to 100°C for the transistor defined by Table
4.1 for the following bias arrangements.
(a) Fixed-bias with RB=240kΩ and β= 100.
(b) Emitter-bias with RB= 240kΩ, RE = 1kΩ, and β= 100.
(c) Emitter-bias with RB=47kΩ, RE=4.7kΩ, and β= 100.
 Problems:
2. Determine the stability factor S(VBE) and the change in IC from 25°C to 100°C for the transistor defined by Table
4.1 for the following bias arrangements.
(a) Fixed-bias with RB=240kΩ and β= 100.
(b) Emitter-bias with RB= 240kΩ, RE = 1kΩ, and β= 100.
(c) Emitter-bias with RB=47kΩ, RE=4.7kΩ, and β= 100.
 Problems:
3. Determine ICQ at a temperature of 100°C, if IC1=2 mA at 25°C. Use the transistor described by
Table 4.1, where β1=50 and β2=80, and a resistance ratio RB/RE of 20.

In conclusion therefore the collector current changed from 2 mA at

room temperature to 2.25 mA at 100°C, representing a change of 12.5%.
 BJT Transistor Modelling
 A model is an equivalent circuit that represents the AC characteristics of the transistor.
OR
A model is the best approximate of the actual behaviour of a semiconductor device under
specific operating conditions, including circuit elements
 Transistor small signal amplifiers can be considered linear for most application.
 Transistor Models:
1. re- model – any region of operation, fails to account for output impedance, less accuracy
2. Hybrid model – limited to a particular operating conditions, more accuracy
 Amplification in the AC domain:
 To examine the small-signal ac response of the BJT amplifier by reviewing the models
most frequently used to represent the transistor in the sinusoidal ac domain.
Conservation of energy dictates that over time the total power output, Po, of a system
cannot be greater than its power input, Pi, and that the efficiency defined by Po/Pi cannot be
greater than 1.
The factor missing from the discussion above that permits an ac power output greater than
the input ac power is the applied dc power. It is a contributor to the total output power even
though part of it is dissipated by the device and resistive elements.
In other words, there is an “exchange” of dc power to the ac domain that permits
establishing a higher output ac power. In fact, a conversion efficiency is defined by
Po(ac)/Pi(dc), where Po(ac) is the ac power to the load and Pi(dc) is the dc power supplied.
BJT Transistor Modelling
BJT Transistor Modelling
Redraw for Small Signal Analysis
 BJT Transistor Modelling
Identify the important quantities to be determined for the system. Since we know that the transistor is an
amplifying device, we would expect some indication of how the output voltage Vo is related to the input voltage
Vi—the voltage gain.
Note in Figure for this configuration that Ii Ib and Io Ic, which define the current gain Ai Io/Ii. The input
impedance Zi and output impedance Zo will prove particularly important in the analysis to follow.
A great deal more will be offered about these parameters in the sections to follow. In summary, therefore, the ac
equivalent of a network is obtained by:
1. Setting all dc sources to zero and replacing them by a short-circuit equivalent
2. Replacing all capacitors by a short-circuit equivalent
3. Removing all elements bypassed by the short-circuit equivalents introduced by steps 1
and 2
4. Redrawing the network in a more convenient and logical form
 Important Parameters Zi, ZO, AV, Ai

Input Impedance, Zi :
For the input side, the input impedance Zi is defined by Ohm’s law as the following:
 Important Parameters Zi, ZO, AV, Ai

The input impedance of a BJT transistor amplifier is purely resistive in nature and,
depending on the manner in which the transistor is employed, can vary from a few ohms
to mega ohms.
Important Parameters Zi, ZO, AV, Ai
Output Impedance, ZO :
The output impedance is naturally defined at the output set of terminals, but the manner in which it is defined is
quite different from that of the input impedance. That is:
The output impedance is determined at the output terminals looking back into the system with the applied
signal set to zero.

The output impedance of a BJT transistor amplifier is resistive in nature and,

depending on the configuration and the placement of the resistive elements, Zo, can
vary from a few ohms to a level that can exceed 2MΩ.
Important Parameters Zi, ZO, AV, Ai
Voltage Gain, Av:
One of the most important characteristics of an amplifier is the small-signal ac voltage gain as
determined by

For transistor amplifiers, the no-load voltage

gain is greater than the loaded voltage gain.

Depending on the configuration, the magnitude of the voltage gain for a

loaded single-stage transistor amplifier typically ranges from just less than 1
to a few hundred.
Important Parameters Zi, ZO, AV, Ai
Current Gain, Ai:
The last numerical characteristic to be discussed is the current gain defined by
For BJT amplifiers, the current gain typically ranges from a
level just less than 1 to a level that may exceed 100.
 Important Parameters Zi, ZO, AV, Ai
Phase Relationship:
The phase relationship between input and output sinusoidal signals is
important for a variety of practical reasons. Fortunately, however:
For the typical transistor amplifier at frequencies that permit ignoring
the effects of the reactive elements, the input and output signals are
either 180° out of phase or in phase.
 THE re TRANSISTOR MODEL:
BJT transistor amplifiers are referred to as current-controlled devices.
Common Base Configuration:

Recall from Module 1 that the ac resistance of a diode can be determined by the equation rac = 26 mV/ID, where ID is
the dc current through the diode at the Q (quiescent) point.
 THE re TRANSISTOR MODEL:

For the common-base configuration, typical values of Zi range from a few ohms to a
maximum of about 50. In general, for the common-base configuration the input impedance
is relatively small and the output impedance quite high.
THE re TRANSISTOR MODEL:
 THE re TRANSISTOR MODEL:
Common Emitter Configuration:

Recall from Module 1 that the ac resistance of a diode can be determined by the equation rac = 26 mV/ID, where ID is
the dc current through the diode at the Q (quiescent) point.
THE re TRANSISTOR MODEL:
Common Emitter Configuration:
THE re TRANSISTOR MODEL:
Common Emitter Configuration:

For the common-emitter configuration, typical values of Zi

defined by βre range from a few hundred ohms to the kilo ohm
range, with maximums of about 6–7 kΩ.
THE re TRANSISTOR MODEL:
Common Emitter Configuration:

The resulting minus sign for the voltage gain reveals that the output and
input voltages are 180° out of phase. The current gain for the configuration
THE re TRANSISTOR MODEL: EMITTER-
FOLLOWER CONFIGURATION
 The output voltage is always slightly less than the input signal due
to the drop from base to emitter, but the approximation AV ≈ 1
Zi:

ZO:
then multiplying by ( β + 1) to establish Ie

Substituting for Zb gives

THE re TRANSISTOR MODEL: EMITTER-
FOLLOWER CONFIGURATION
ZO:

AV:

Ai:
THE re TRANSISTOR MODEL: EMITTER-
FOLLOWER CONFIGURATION
Effect of ro:

ZO:

AV:
 Problems:
For the network of Figure:
(a) Determine re.
(b) Find Zi
(c) Calculate Zo
(d) Determine Av
(e) Find Ai
(f) Repeat parts (c) through (e) including ro = 25 kΩ in all calculations and compare results.
Problems:
Problems:
APPROXIMATE HYBRID PARAMETER EQUIVALENT CIRCUIT:

Approximate Common Emitter Hybrid Equivalent Approximate Common Base Hybrid Equivalent
Circuit Circuit

In other words, when the problem is presented, the parameters such as hie, hfe, hib, and so on, are specified.
Keep in mind, however, that the hybrid parameters and components of the re model are related by the following
equations as hie= βre, hfe = β , hoe =1/rO, hfb = -α , and hib = βre
The hybrid parameter equivalent model : COMMON-EMITTER
FIXED-BIAS CONFIGURATION
The hybrid parameter equivalent model : COMMON-EMITTER
FIXED-BIAS CONFIGURATION
 Problems:
For the network of Figure:
(a) Find Zi
(b) Calculate Zo
(c) Determine Av
(d) Find Ai
The hybrid parameter equivalent model : COMMON-EMITTER
VOLTAGE DIVIDER BIAS CONFIGURATION
The hybrid parameter equivalent model : COMMON-EMITTER
UNBYPASSED EMITTER BIAS CONFIGURATION
The hybrid parameter equivalent model : COMMON-BASE
CONFIGURATION
 The common-base configuration is characterized as having a relatively low input and a high
output impedance and a current gain less than 1. The voltage gain, can be quite large.

 The transistor output impedance hoe is not included for the common-base configuration because
it is typically in the mega ohm range and can be ignored in parallel with the resistor RC.
The hybrid parameter equivalent model : COMMON-BASE
CONFIGURATION
 Problems:
For the network of Figure:
(a) Find Zi
(b) Calculate Zo
(c) Determine Av
(d) Find Ai
Problems:
 References:
1. “Electronic Devices and Circuit Theory” , Robert L Boylestad, Louis Nashelsky,
Pearson Publishers, 11th Edition, 2015.

2. “Electronic Devices and Circuits” , David A Bell, Oxford University Press, 5th Edition,
2008.

3. “Electronic Devices and Circuits” , Millman & Halkias, McGraw Hill, 4th Edition,
2015.