IC APP Unit-1
IC APP Unit-1
Topics: Ideal and practical operational amplifier, op-amp characteristics-dc and ac characteristics,
general linear applications of op-amp: adder, sub tractor, differentiator, integrators, active filters
and oscillators, non linear applications of op-amp: comparators, schmitt triggers, multivibrators.
Definition: an operation amplifier is a direct coupled high gain amplifier that usually contains one or
more differential amplifiers followed by a level translator stage which follows an output stage. An OP-
AMP is able to perform mathematical operations such as addition, subtraction, multiplication, integration,
differentiation …etc. hence it is called an operational amplifier.
Op-Amp symbol & terminals: An operational amplifier is represented by a triangle in which it
shows the direction of signal flow. Any Op-Amp basicallycontains at least 5-terminls.
Pin4 & Pin7 (Power Supply): Pin7 is the positive voltage supply terminal and Pin4 is the negative voltage
supply terminal. The 741 IC draws in power for its operation from these pins. The voltage between these
two pins can be anywhere between 5V and 18V.
Pin6 (Output): This is the output pin of IC 741. The voltage at this pin depends on the signals at the input
pins and the feedback mechanism used. If the output is said to be high, it means that voltage at the output is
equal to positive supply voltage. Similarly, if the output is said to be low, it means that voltage at the output
is equal to negative supply voltage.
Pin2 & Pin3 (Input): These are input pins for the IC. Pin2 is the inverting input and Pin3 is the non-
inverting input. If the voltage at Pin2 is greater than the voltage at Pin3, i.e., the voltage at inverting input is
higher, the output signal stays low. Similarly, if the voltage at Pin3 is greater than the voltage at Pin2, i.e.,
the voltage at non-inverting input is high, the output goes high.
Pin1 & Pin5 (Offset Null): Because of high gain provided by 741 Op-Amp, even slight differences in
voltages at the inverting and non-inverting inputs, caused due to irregularities in manufacturing process or
external disturbances, can influence the output. To nullify this effect, an offset voltage can be applied at
pin1 and pin5, and is usually done using a potentiometer.
Pin8 (N/C): This pin is not connected to any circuit inside 741 IC. It’s just a dummy lead used to fill the
void space in standard 8 pin packages.
Specifications:
Power Supply: Requires a Minimum voltage of 5V and can withstand upto 18V
Input Impedance: About 2 megaohms
Output impedance: About 75 ohms
Voltage Gain: 200,000 for low frequencies
Maximum Output Current: 20mA
Recommended Output Load: Greater than 2 kiloohms
Input Offset: Ranges between 2mV and 6mV
Slew Rate: 0.5V/microsecond (It is the rate at which an Op-Amp can detect voltage changes)
Open Loop Voltage Gain(A):The open loop voltage gain without any feedback for an ideal op amp is
infinite. But typical values of open loop voltage gain for a real op amp ranges from 20,000 to 2, 00,000. Let
the input voltage be Vin. Let A be the open loop voltage gain. Then the output voltage is V out = AVin. The
value of a typically is in the range specified above but for an ideal op amp, it is infinite.
Input Impedance(Zin):Input Impedance is defined as the input voltage by the input current. The input
impedance of an ideal op amp is infinite. That is there no current flowing in the input circuit. However, an
ideal op amp has certain current flowing in the input circuit of the magnitude of few pico-amps to a few
milli-amps.
Bandwidth(BW):An ideal op amp has an infinite bandwidth that is it can amplify any signal from DC to
the highest AC frequencies without any losses. So therefore, an ideal op amp is said to have infinite
frequency response. In real op amps, the bandwidth is generally limited. The limit depends on the gain
bandwidth (GB) product. GB is defined as the frequency where the amplifier gain becomes unity.
Offset Voltage(Vio):The offset voltage of an ideal op amp is zero, which means that the output voltage will
be zero if the difference between the inverting and non-inverting terminal is zero. If both the terminals are
grounded, the output voltage will be zero. But real op amps have an offset voltage.
Common Mode Rejection Ratio(CMRR):Common mode refers to the situation when the same voltage is
applied to both the inverting and non-inverting terminal of the Op-Amp. The common mode rejection refers
to the ability of the op amp to reject the common mode signal. Now we are in a position to understand the
term common mode rejection ratio.The common mode rejection ratio refers to the measure of the ability of
the Op-Amp to reject the common mode signal.
Mathematically it is defined as
CMMR = | A D / A CM|
DC characteristics of Op-amp
An ideal op-amp draws no current from source and its response is also independent of temperature. But
practically it draws current into the input terminals. The two inputs respond differently to current and
voltage due to mismatch in transistors. The important d.c characteristics of op-amp are
1. Input bias current(IB)
2. Input Offset Current (Iios)
3. Input Offset Voltage (Vios)
4. Thermal Drift.
Input bias current(IB) :ideally we assume that no current is drown from the input terminals if they are
grounded, but in practically the input terminals will conduct a small value of dc currents to baisof the input
transistor.
1. Frequency Response:
The variation in operating frequency will cause variations in gain magnitude and its phase angle. The
manner in which the gain of the op-amp responds to different frequencies is called the frequency response.
Op-amp should have an infinite bandwidth BW =∞ (i.e.) if its open loop gain in 90dB with dc signal its
gain should remain the same 90 dB through audio and onto high radio frequency. The op-amp gain
decreases (roll-off) at higher frequency.What reasons to decrease gain after a certain frequency reached is
there must be a capacitive component in the equivalent circuit of the op-amp. For an op-amp with only one
break (corner) frequency all the capacitors effects can be represented by a single capacitor C. Below fig is a
modified variation of the low frequency model with capacitor C at the output.
− jX c
A=
1+ j
[ ]
f
f1
V0= AOLVd
R 0− jX c f1 is the corner frequency or the upper 3 dB frequency of
the op-amp. The magnitude and phase angle of the open
V 0 − jX c 1
A= = AOL ;if u sub Xc= loop volt gain are f1 of frequency can be written
V d R 0− jX c 2 π fc
as,
1 1
A= A and we now f1=
1+ j 2 π fc R0 OL 2 π R0 c
AOL
| A| =
√1+(f /f 1
2
)
Φ = Tan-1(f/f1)
1. For frequency f<< f1 the magnitude of the gain is 20 log AOL in db.
2. At frequency f = f1 the gain in 3 dB down from the dc value of A OL in db. This frequency f1 is called
corner frequency.
3. For f>> f1 the fain roll-off at the rate off -20dB/decade or -6dB/decade.
From the phase characteristics that the phase angle is zero at frequency f = 0. At the corner frequency f1 the phase
angle is -45º (lagging and an infinite frequency the phase angle is -90 . It shows that a maximum of 90
phase change can occur in an op-amp with a single capacitor C. Zero frequency is taken as the decade
below the corner frequency and infinite frequency is one decade above the corner frequency.
A OL A OL ω1
A= ; sub jω = S, then
A=
1+ j
[ ]
f
f1
; sub f =ω ω1 + jω
A OL ω1
A=
A OL s +ω1
A=
1+ j
[ ]ω
ω1
In practical op-amp, however, has number of stages and each stage produces a capacitive component, thus
due to a number of RC pole pairs , there will be a different number of break frequencies. The transfer
function of an op-amp with three break frequencies can be like this,
A OL
A OL ω 1 ω 2 ω 3
A=
[1+ j
f
f1 ][
1+ j
f
f2
1+ j
f
f3 ][ ] ; 0 < f1< f2< f3 or A =
[ s +ω1 ] [ s +ω 2 ][ s+ω 3 ]
with 0 <
ω 1< ω2 <ω 3
for a typical op-amp the straight line approximation of open loop gain V S frequency in logarithmic scale as
shown in bellow fig.
Frequency response is flat (90dB) for lower frequencies (0-200KHz) i.e., to the first break frequency. From
200KHz to 2MHz the gain drops from 90dB to 70dB W which is at-20dB/ decade. At frequency 2MHz
to20MHz , the roll-off rate is -40 dB / decade, accordingly the frequency increases cascading effect of rc
pairs (poles) come in to effect of roll-off rate increasing successively by -20db / decade at each corner
frequency. Each RC pole pair also introduce a lagging phase of maximum up to -900.
2. Circuit Stability:A circuit or a group of circuit connected together as a system is said to be stable, if its
o/p reaches a fixed value in a finite time. A system is said to be unstable, if its o/p increases with time
instead of achieving a fixed value. In fact the o/p of an unstable sys keeps on increasing until the system
break down. The unstable system is impractical and need be made stable. The criterion gain for stability is
used when the system is to be tested practically. In theoretically, always used to test system for stability, ex:
Bode plots. Bode plots are compared of magnitude Vs Frequency and phase angle Vs frequency. Any
system whose stability is to be determined can represented by the block diagram.
The block between the output and input is referred to as forward block and the block between the output
signal and f/b signal is referred to as feedback block. The content of each block is referred as transfer
frequency. From fig. we represented it by AOL (f) which is given by
AOL (f) = V0/Vin if Vf = 0 ----- (1) B is a constant if the feedback circuit uses only
resistive components. If the characteristic
where AOL (f) = open loop volt gain. equation (1+AB)=0, the circuit will become
unstable which leads to produce a oscillation
The closed loop gain ACL is given by ACL = V0/Vin response. re writing the characteristic equation 1-
(-AB) = 0
A OL
=
1+ A OL B leads to loop gain , -AB=1
Once the magnitude Vs frequency and phase angle Vs frequency plots are drawn, system stability may be
determined.
3.Slew rate: It means how fast the output of an op-amp changes with respect to the input.
Consider the op-amp input as a square wave, keep increasing the frequency(f) keeping amplitude
constant of the square wave to see where the square wave distorts, at that frequency and amplitude slew
rate is 2∗π∗f∗Vpeak where Vpeak is the maximum peak of the signal. An op-amp with a very small slew rate
would produce distortions to a square wave as shown
Another way to define slew rate would be ‘The maximum rate at which the output changes with respect to
time without distortion’ which is mathematically
The amount of noise that an op-amp can reject from a power supply is called PSRR ,Suppose there is a
noise of 10mV pk-pk on the power rail, noise is seen at the output of the op-amp because of the noise on
the power rail.Usually expressed in dB
Calculation of gain:
potential (virtual earth summing point). Therefore
sub V2=0 in above eqn
V ¿−0 0−V out
=
R1 Rf
V ¿ −V out
=
R1 Rf
V ¿−V out V out −Rf
From above ckt, i = =
R1 + Rf V¿ R1
V ¿−V 2 V 2−V out V out
And we now, i = = Therefore The closed loop gain (A v) is =
R1 Rf V¿
the non-inverting input is zero, so V 1=0 and −Rf
always V1=V2 because of both the inverting and R1
non-inverting terminals are maintained at same −R f
And output voltage V out = V¿
R1
Conclusion:if Rf=R1then Vout = - Vin , hear the –ve sign indicate the output is inverted or 1800out of phase.
V ∈ ¿ ¿ = R1
V out R 1+ R f
V out R 1+ R f
=
V¿ R1
V out Rf
= 1+
V¿ R1
The closed loop gain of op-amp (Av) is
From voltage divition rule
V out Rf
R1 = 1+
V1 = V V¿ R1
R 1+ R f out
counclstion:if Rf=R1then Vout = 2Vin ,so the output is positive and in phase with the input.
Then V0 = - R f ( V1 V2 V3
+ +
Rf Rf Rf )
Non Inverting summing amplifier:
V1 V2 V3
+ +
R1 R2 R3
= Va
1 1 1
+ +
R1 R2 R 3 ( )
V a=
[ V1 V2 V3
+ +
R 1 R 2 R3 ]
( 1 1 1
+ +
R 1 R 2 R3 )
And the output is
V0 = 1+( Rf
R
Va)
V1,V2,V3 are three inputs applied to the non
inverting input terminal of op-amp through the
V0 = 1+( )
[ Rf
V1 V2 V3
+ +
R1 R2 R3 ]
( R1 + R1 + R1 )
resistors R1,R2,R3 respectively. Rf is the feedback R
1 2 3
resistance connected across the output and
Rf
inverting input terminals. When R1=R2=R3=R =
2
R is the resistance connected to inverted input
Then V0=V1+V2+V3
Apply KCL at node ‘a’
So in this case the out is the sum of all the inputs.
V 1−V a V 2−V a V 3 −V a
+ + =0
R1 R2 R3
Difference Op-Amp amplifier: Thus far we have used only one of the operational
amplifiers inputs to connect to the amplifier,
using either the “inverting” or the “non-inverting”
input terminal to amplify a single input signal
with the other input being connected to ground.
But as a standard operational amplifier has two
inputs, inverting and no-inverting, we can also
connect signals to both of these inputs at the same
time producing another common type of
operational amplifier circuit called a Differential V 1 −V out (a)
=
Amplifier. R1 R3
( )
I1= ; If = R3
R1 Rf Vout(b) = V2
R1
Vb =0 because V2=0V and we know Va=Vb so Va
Total output Vout = Vout(a) + Vout(b)
is also 0v,
−R3 R3
I1 = If Vout = V 1+ V 2
R1 R1
V 1−V a V a−V out(a)
= , sub Va = 0v then R3
R1 R3 Vout = (V2 - V1)
R1
Conclusion: Therefore the output voltage is proportional to difference of inputs i.e., (V2- V1).
Also note that if input V1 is higher than input V2 the output voltage sum will be negative, and if V2 is
higher than V1, the output voltage sum will be positive.
As its name implies, the Op-amp Integrator is an operational amplifier circuit that performs the
mathematical operation of Integration, that is we can cause the output to respond to changes in the input
voltage over time as the op-amp integrator produces an output voltage which is proportional to the integral
of the input voltage.If we apply a constantly changing input signal such as a square wave to the input of
an Integrator Amplifier then the capacitor will charge and discharge in response to changes in the input
signal. This results in the output signal being that of a saw tooth waveform whose output is affected by
the RC time constant of the resistor/capacitor combination because at higher frequencies, the capacitor has
less time to fully charge. This type of circuit is also known as a Ramp Generator and the transfer function
is given below.
V ¿−V X
And Iin= , Vx=0 V , so
R¿
V¿
Iin =
R¿
d (V X −V ¿ ¿ out ) dV
If = C ¿ = -C out
dt dt
V¿ dV out
=−C
R¿ dt
−V ¿
dV out = dt
C R¿
−1
V out =
C R¿
∫ V ¿ dt
Conclusion: So from the above formula the output of an integrating op-amp is the integration of input
signal.
COMPARATOR:The Op-amp comparator compares one analogue voltage level with another analogue
voltage level (reference voltage VREF)and produces an output signal based on this voltage comparison. In
other words, the op-amp voltage comparator compares the magnitudes of two voltage inputs and determines
which is the larger of the two.
where AOL is open loop gain of op-amp and it is infinite . In practical cases this infinite value is replaced
with the maximum value that is saturates value (Vsat).
if v2 > v1 then then V2-V1 is positive and the output is +Vsat (HIGH)
if v2 < v1 then then V2-V1 is negative and the output is -Vsat (low)
Types of comparators:
Positive Voltage Comparator:The basic configuration for the positive voltage comparator is also known
as a non-inverting comparator circuit detects when the input signal (VIN) is ABOVE or more positive than
the reference voltage (VREF ) producing an output at VOUT which is HIGH as shown.
Negative Voltage Comparator:The basic configuration for the negative voltage comparator is also known
as an inverting comparator circuit , detects when the input signal (VIN) is BELOW or more negative than
the reference voltage (VREF) producing an output at VOUT which is HIGH as shown.
In the inverting configuration, which is the opposite of the positive configuration, the reference voltage is
connected to the non-inverting input of the operational amplifier while the input signal is connected to the
inverting input. Then when VIN is less than VREF the op-amp comparators output will saturate towards the
positive supply rail ( Vcc). when VIN is greater than VREF, the op-amp comparators output will change state
and saturate towards the negative supply rail 0v.
Then depending upon which op-amp inputs we use for the signal and the reference voltage, we can produce
an inverting or non-inverting output. We can take this idea of detecting either a negative or positive going
signal one step further by combining the above two op-amp comparator circuits to produce a window
comparator circuit.
Window Comparator:
A Window Comparator is basically the inverting and the non-inverting comparators combined into a
single comparator stage. The window comparator detects input voltage levels that are within a specific band
or window of voltages, instead of indicating whether a voltage is greater or less than some preset or fixed
voltage reference point. This time, instead of having just one reference voltage value, a window comparator
will have two reference voltages implemented by a pair of voltage comparators. One which triggers an op-
amp comparator on detection of some upper voltage threshold (VREF(UPPER)) and one which triggers an op-
amp comparator on detection of a lower voltage threshold level (VREF(LOWER)) Then the voltage levels
between these two upper and lower reference voltages is called the “window”, hence its name.
Using our idea above of a voltage divider network, if we now use three equal value resistors so that R1=R2
=R3= R we can create a very simple window comparator circuit as shown. Also as the resistive values are
1
all equal, the voltage drops across each resistor will also be equal at one-third the supply voltage ( Vcc).
3
2
So for ease in this simple window comparator example, we can set the upper reference voltage to Vcc and
3
1
the lower reference voltage to Vcc.
3
1
When VIN is below the lower voltage level VREF(LOWER) which equates to Vcc, VOUT will be LOW.
3
1
When VIN exceeds this Vcc lower voltage level, the first op-amp comparator detects this and switches its
3
output is HIGH. This means that both op-amps have their outputs HIGH at the same time. No current flows
through the pull-up resistor RL so VOUT is equal to Vcc.As VIN continues to increase it passes the upper
2
voltage level, VREF(UPPER) at Vcc. At this point the second op-amp comparator detects this and switches its
3
output LOW and VOUT becomes equal to 0V.
Working of Zero Crossing Detector Circuit: In a Zero Crossing Detector Circuit, the non-inverting
terminal of the Op-amp is connected with the ground as a reference voltage and a sine wave input (Vin) is
fed to the inverting terminal of the op-amp, as you can see in the circuit diagram. This input voltage is then
compared with the reference voltage. Any general purpose op-amp IC can be used here, we have used op-
amp IC LM741.
Now, when you consider the positive half cycle of the sine wave input, We know that, when the voltage at
the non-inverting end is less than the voltage at inverting end, the output of the Op-amp output is Low or of
negative saturation. Hence, we will receive a negative voltage waveform.
Then in negative half cycle of the sine wave, the voltage at the non-inverting end (reference voltage)
becomes greater than the voltage at inverting end (input voltage), so the output of the Op-amp becomes
High or of positive saturation.
It can be seen in the above waveform that whenever the sine wave crosses zero, the output of the Op-amp
will shift either from negative to positive or from positive to negative. It shifts negative to positive when
sine wave crosses positive to negative and vice versa. This is how a Zero Crossing Detector detects when
the waveform is crossing zero every time. As you can observe that the output waveform is a square wave,
so a Zero Crossing Detector is also called a Square wave Generator Circuit.
Schmitt trigger:
A Schmitt trigger circuit is also called a regenerative comparator circuit. The circuit is designed with a
positive feedback and hence will have a regenerative action which will make the output switch levels. Also,
the use of positive voltage feedback instead of a negative feedback, aids the feedback voltage to the input
voltage, instead of opposing it. The use of a regenerative circuit is to remove the difficulties in a zero-
crossing detector circuit due to low frequency signals and input noise voltages. We have two Schmitt
trigger circuits, they are
As shown in the circuit diagram, a voltage divider with resistors R1 and R2 is set in the positive feedback
of the 741 IC op-amp. The same values of R1 and R2 are used to get the resistance value R par = R1||R2
which is connected in series with the input voltage. R par is used to minimize the offset problems. The
voltage across R1 is fed back to the non-inverting input. The input voltage Vi triggers or changes the state
of output Vout every time it exceeds its voltage levels above a certain threshold value called Upper
Threshold Voltage (VUL) and Lower Threshold Voltage (VLT).
Let us assume that the inverting input voltage has a slight positive value. This will cause a negative value in
the output. This negative voltage is fed back to the non-inverting terminal (+) of the op-amp through the
voltage divider. Thus, the value of the negative voltage that is fed back to the positive terminal becomes
higher. The value of the negative voltage becomes again higher until the circuit is driven into negative
saturation (-Vsat). Now, let us assume that the inverting input voltage has a slight negative value. This will
cause a positive value in the output. This positive voltage is fed back to the non-inverting terminal (+) of
the op-amp through the voltage divider. Thus, the value of the positive voltage that is fed back to the
positive terminal becomes higher. The value of the positive voltage becomes again higher until the circuit is
driven into positive saturation (+Vsat). This is why the circuit is also named a regenerative comparator
circuit.
R1
The input voltage formula of above circuit is Vin = Vf = V0 …….(1)
R 1+ R 2
When Vout = +Vsat, the voltage across R1 is called Upper Threshold Voltage (V UT). The input voltage, Vin
must be slightly more positive than VUT inorder to cause the output Vo to switch from +Vsat to -Vsat. When
the input voltage is less than VUT, the output voltage Vout is at +Vsat.( In order to get an upper Threshold
Voltage sub V0 = +Vsat and Vin =VUTin equation….. (1))
R1
Upper Threshold Voltage, VUT = +Vsat ……(1)
R 1+ R 2
When Vout = -Vsat, the voltage across R1 is called Lower Threshold Voltage (V LT). The input voltage, Vin
must be slightly more negative than VLT inorder to cause the output Vo to switch from -Vsat to +Vsat.
When the input voltage is less than VLT, the output voltage Vout is at -Vsat.( In order to get an lower
Threshold Voltage sub V0 = -Vsat and Vin =VLTin equation….. (1))
R1
Lower Threshold Voltage, VLT = - Vsat ……..(2)
R 1+ R 2
Since a comparator circuit with a positive feedback is used, a dead band condition hysteresis can occur in
the output. When the input of the comparator has a value higher than V UT, its output switches from +Vsat to
-Vsat and reverts back to its original state, +Vsat, when the input value goes below V LT. This is shown in
the figure below. The hysteresis voltage can be calculated as the difference between the upper and lower
threshold voltages.
Vhys = VUT – VLT………….(3)
(
Vhys = V sat
R1
R1 + R2 )(
− −V sat
R1
R 1+ R 2 )
R1
Vhys = 2V sat
R 1+ R 2
Transfer characteristics
The working of non-inverting Schmitt trigger circuit is similar to that of inverting Schmitt trigger circuit but
the difference here is the output is the output is maintained at +V sat value when the input signal is varying
from VUTto VLT. If input signal reaches V LT then the output sate is shifts from +V sat to -Vsat this state is
maintained till the input reaches VUT, same thing will reaped until the input is available.
−R1
V¿ = V0
R2
R1 R1
Vhys = V sat + V
R2 R 2 sat
2 R1
Vhys = V
R 2 sat
Advantages:
Op-amp Multivibrator:
We can take this idea of converting a periodic waveform into a rectangular output one step further by
replacing the sinusoidal input with an RC timing circuit connected across the op-amps output. This time,
instead of a sinusoidal waveform being used to trigger the op-amp, we can use the capacitors charging
voltage, Vc to change the output state of the op-amp.
1. AstableMultivibrator
2. MonostableMultivibrator
The circuit looks like a Schmitt trigger except that the input voltage is replaced by a capacitor and positive
feedback resistors R1 and R2 form an inverting Schmitt trigger.
When power is turned ON, V 0 automatically swings either +Vsat or to -Vsat since these are the only
stable states allowed by Schmitt trigger. Assume it swings to +Vsat.
Now capacitor starts charging towards +Vsat through the feedback path provided by the
resistor Rf to the inverting input. As long as the capacitor voltage VC is less than VUT , the output
voltage remains at +Vsat
As soon as VC charges to a value slightly greater than VUT , the input goes positive with respect to
the upper threshold value. This switches the output voltage from +Vsat to -Vsat
As VC switches to -Vsat , capacitor starts discharging. The current discharges in capacitor and
recharges capacitor voltage to VLT When VC becomes slightly more negative than the feedback
voltage VLT, output voltage switches back to +Vsat and capacitor starts charging. Same process will
repeat.
When V0 is at Vsat , the feedback voltage is called When V0 is at -Vsat , the feedback voltage is
the upper threshold voltage VUT and is given as called the lower threshold voltage VLT and is
R1 given as
VUT = +Vsat
R 1+ R 2 R1
VLT = - Vsat
R 1+ R 2
R1
VUT = +βVsatwhere β =
R 1+ R 2 R1
VLT = - βVsat, where β =
R 1+ R 2
time period of output wave form is depends on R, C and β values and the formula is
T= 2RC ln ( 1−β
1+ β
) ; and frequency f = T1
Derivation for time period (T):
The frequency of oscillation is determined by the time ti takes the capacitor to charge from V UT TO
VLT and vice versa. The voltage across the capacitor as a function of time is given as
Let us consider the charging of capacitor from V LT to VUTwher VLT is the intialvoltage ,Vc(t) is
theinstantaneous voltage , +Vsat is the maximum voltage. at t=T1 the voltage across the capacitor
reaches VUT and there fore
−T 1
RC
= ln
V UT – V sat
V ¿ – V sat ( ) sub VLT = - βVsat and VUT = +βVsat then
T1 = RC ln ( – β V sat – V sat
)
( )
T1 V ¿ – V sat β V sat – V sat
= ln
RC V UT – V sat
T1 = RC ln ( 1−β
1+ β
)
T1 is the time taken to charge the capacitor from V LT to VHT same time is required to discharge the
capacitor from VHT to VLT.so total time period T=2T1
( )
T= 2 RC ln
1+ β
1−β
and frequency f=
1
T
The monostablemultivibrator is also called as the one-shot multivibrator. The circuit produces a single
pulse of specified duration in response to each external trigger signal. For such a circuit, only one stable
state exists. When an external trigger is applied, the output changes its state. The new state is called as a
quasi-stable state. The circuit remains in this state for a fixed interval of time. After some time it returns
back to its original stable state. In fact, an internal trigger signal is generated which drives the circuit back
to its original stable state. Usually, the charging and discharging of a capacitor provide this internal
trigger signal.
The diode D1 connected across the capacitor is called clamping diode. It clamps the capacitor voltage
to 0.7V when the output is at +Vsat .
A negative triggering pulse is applied to the Non-inverting terminal of Op-amp through RC
differentiator circuit and diode D2 .
To understand the operation of the circuit, let us assume that the output V0 is at +Vsat i.e. in its stable
state.
The diode D1 (Connected across Capacitor) conducts and the voltage across the capacitor C is
Vc gets clamped to 0.7 Volts.
The voltage at the non-inverting terminal is controlled by voltage divider circuit of R1 and R2Voltage
R2
at non-inverting terminal V2 = + β V0;where β =
R 1+ R 2
If V2 , a negative trigger of amplitude V2 is applied to the non-inverting terminal, so that the effective
voltage at this terminal is less than 0.7V then the output of the Op-amp changes its state
from +Vsat to -Vsat.
The diode is now reverse biased and the capacitor starts charging exponentially to -Vsat through
resistance R.
The voltage at the non-inverting terminal is now - βVsat. When the capacitor voltage becomes just
slightly more negative than - βVsat, the output of the Op-amp changes its state back to +Vsat .
The capacitor now starts charging towards +Vsat through R until VC reaches 0.7V as capacitor gets
clamped to the voltage .
In a monostablemultivibrator , the intial voltage Vin=VD1 (diode forward voltage), final voltage Vf= -Vsat
Vout is voltage across the capacitor VC. So substitute all the values in above equation then
VC = -Vsat + (VD1-(-Vsat))e−t / RC
Vsat( 1- β) = (VD1+Vsat)e−T / RC
−T / RC
V sat (1−β )
e =
(V D 1 +V sat )
−T
RC
= ln (
V sat (1−β)
V D 1 +V sat )
( )
T V D 1 +V sat
= ln
RC V sat (1−β)
( )
V D 1 +V sat
T =¿ RC ln
V sat (1−β)