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EEE-2216 (Analog II Lab)

Analog electronics

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0% found this document useful (0 votes)
68 views25 pages

EEE-2216 (Analog II Lab)

Analog electronics

Uploaded by

shiamahamedluvon
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Beene NG. A De See M NORTHERN UNIVERSITY Department of Electrical & Electronic Engineering Lab Manual Course Code: EEE 2216 Course Title: Analog Electronics lab Compiled by Mahfuza Ferdousi Assistant Professor Department of CSE, NUB Department of Electrical & Electronic Engineering Course Code: EEE-2216, Course Title: Analog Electronics Lab EXPERIMENT NUMBER :1 [E EXPERIMENT : Study of BIT Biasing Circuits OBJECTIVE: ‘Toestablish the proper operating point and to study the stability of the operating point with respect to changing fin different biasing circuits. Equipments: ‘p-n transistor (C828,BC 108) one piece each 500k potentiometer one piece resisrors 4700,5609, 10K DC micrometer (0400/4 multimeter ‘one unit Trainer board ‘one unit suit Diagram: Fixed Bias circuit: j ice Veer SV ik ‘Student must perform the following calculations before coming to the lab 1. Forthe circuit shown in Fig. 1(a) and 2(a) find expressions for cy and Veo, Procedures 1, Measure the value of Re with multimeter and record 2, Construct the fixed bias circuit with C828 transistors as shown in Fig, Ia). Adjust SOOK potentiometer until Vce is approximately equal to Vec/2. Measure Ver, Vee, Vic and Ip. Ic can be calculated from Vic and Re, 3. Replace C828 by C829 keeping Vee and SOOK potentiometer fixed at values set step 1, Measure VE V Bt V xe and Ip, 4 the fixed bias circuit with C828 transistors as shown in Fig, 1(b), step 2 and 3. the self bias circuit with C828 transistors as shown in Fig, 2(a). uits of Fig. 1(a) and 1(b) with respect to stability against justify your answer. > the circuits of Fig. 2(a) and 2(b) with respect to stability against riation in Band justify your answer. Compare the stability of fixed bias circuits with that of self bias circuits. Discuss the stability of fixed bias and self bias circuits against variation in temperature. 5, Determine B from the measured values of currents. Using this value for and measured value of PB, calculate Veg and lc for pretab expressions. Compare the calculated values with experimental ones. EXPERIMENT NUMBER :2 NAME OF THE EXPERIMENT : Study of Common Emitter (CE) Amplifier OBJECTIVE: ‘Toknow the effect of the frequency on the gain of a common emitter amplifier and also to measure the input impedance, output impedance and phase relationships of a CE amplifier. Equipments: repen transistor C828/C829 ‘one piece 10k potentiometer two pieces resistors 1000470 0, 560.9,5K0,33K2 capacitors 1OME- two pieces,47pF one piece multimeter cone piece bread board cone piece power supply cone piece signal generator ‘one piece oscilloscope ‘one piece Theory: ‘When a bipolar transistor operates in linear region, then principle of superposition can be applied. As a result, ac circuit can be separated from de circuit. For small ac signal analysis, 1 or T model is used. Fora model, a= Win and gq" Bir and r, = Vy/He] For T-model, fe=Ville Va is the early voltage and V,=4 (ii) diffusion capacitance. Athigh frequency we cannot neglect the effect of eapacitances on the band frequencies, their effects can be neglected, calculations before coming tothe lab. et | equivalent circuits ofthe CE Amplifier Circuit, 4, Obiain an expression for ouput resistance Ko. Procedures 1. Construct the circuit as shown in the circuit diagram for CE amplifier, Adjust 10K potentiometer until Veeis approximately equal to Veo? by multimeter. 2,Set the signal generator frequency at SKHz, Ch.2 is connected to V, Apply and increase input signal until you sce distorted output signal. Set V below this value 100mY. Connect Visto ch. 1. Measure peak value of both Vi,and Vo. 3.Set the oscilloscope in dual mode, Observe the phase relationship between input and output. 4. Connect the 10KQ potentiometer from Vo to ground. Adjust the 10KQ. potentiometer until Vo is half the open circuit value. Measure the output impedance from potentiometer. $. Disconnect ch.2 and connect ch.1 across 100 £2 and measure peak value, 6, Disconnect the bypass capacitor and observe the effect on gain. 7. Reconstruct the circuit as shown in Fig.1. Set the signal frequency at $0 Hz. Measure the input and output 8. Repeat step 7 for frequency 100Hz, 200Hz, S00Hz, 800Hz, IKHz, 2KHz ete., Until higher cut-off frequency is found ensuring constant input forall steps. 9. Observe the phase relationships between input and output below lower eutof? and higher cutoff frequency. ina semi-log paper. ain from prelab expressions el er ‘gm and ea from de analysis NAME. OF THE EXPERIMENT : Study ofan Emiter Follower ‘onsECTIVE: ‘To measure the input impedance, output impedance, phase relationship and gain ofan emitter follower. pment ‘psn transistor C828/C829 ‘one piece 10k, 100K potentiometer one piece each resistors 1000 10K, 100K capacitors OUR: two pieces multimeter cone pieoe bread board ‘one piece power supply one piece signal generator one piece oscilloscope one piece Girewit Diagram: 400, crst0ur AMA ch2 & potentiometer and connect ch.1 across 10002. Measure the peak value. ‘Change the input frequency to $0 Hz and measure voltage gain, Measure voltage gains at different frequencies. Take sufficient readings around lower cutoff frequency, in mid-band ‘and upper cutoff frequency. Reports 1. Plot the frequency response of the cireuit on semi log graph paper. 2. What is the input impedance, output impedance, phase relationship and gain of the emitter those of a CE amplifier? 3. What is the application of the emitter follower circuit? 4. What are advantages and disadvantages of emitter follower circuit? 5. Explain the reason why voltage gain is less than unity. (NAME OF THE EXPERIMENT : Study of Wien Bridge Oscillator OBJECTIVE: ‘The objective ofthis experiment isto study the operation of the Wien Bridge Oscillator ‘An oscillator circuit in which a balanced bridge is used asthe feedback network to make 180° phase shift (condition {for an oscillator) isthe Wien bridge oscillator. Theoretically its frequency of oscillation is given by f = 1/2aRC. Inreference to fig:1 below, the oscillation is maintained when Ry ato is approximately 2. Notice that ifRs is made appreciably greater than 2R, a square wave oscillation is produced and if Ris made les than 2R, oscillation decays, and ceases. ‘Equipments: 1 OPAMP 741 one piece 2. Trainer Board one unit 43. Regulated power supply one unit 4. Oscilloscope fone unit 5. Resistor100K, 10K 2 pieces each 20K, 20K(POT) I piece each. 6.Capacitor 0.14F 2 pieces , | cope lead tothe output ofthe amplifier, Adj order to obaina sinusoidal waveform which ius, tio of Rx/R, and frequency of oscillation, |pDraw the output wave shapes. Compare the observed frequency with the theoretical one, 5 Deseribe the significance of RyR ratio 4) Whatare the methods of changing frequency of Wien bridge oscillator? 2 Department of Electrical & Electronic Bs en Course Code: EEE-2216, Course Title: Analog Electronics Lab NAME OP THE EXPERIMENT : To study the following characteristics ofan operational amplifier. 1) Input bias current Input off-set Voltage i) Common mode rejection ratio iv) Slew rate Description of 741 1C: ‘The pin configuration of 741 IC is shown in the fig (1). The pins 2 and 3 are the input, inverting & non-inverting respectively. Out put is taken from pin no. “6. The pins 784 are used for supply voltage connection, Not thet scamested Vetve) Ougut Nal Pes iz fs fr Wig(1y: Pin configuration of 741 1C i a special type high gain direct couple voltage shunt feedback d.. amplifier. Ii tical operation such as summation, multiplication ete. and some ‘Where, fo = VR: and yy = V'yR', ‘Theciruit connection ofthis experiment is shown inthe fg. (2) Ryst00K Fig2: Circuit dinginin ofan operational mpi fo oyt bin euren meseement iput offset_Voltage: lnput offset voltage i defined asthe input votage needed to null the ouput voltage. So the input offset voltage is defined by the following relation: Vio= Vow/Aci. ‘Where, Viois the input of off-set voltage Vous the open circuit ouput voltage ‘Aq.is the closed loop gain Aci = -Ry/Ry The ircuit connection of this experiment is shown in Fig 3): the following expression: CMRR= Ad Acat ‘Where, ‘Ag differential gain Ry/Ry. ‘Acu= Common mode gain Von Vien) Vacay= Common mode output voltage ‘The creit diagram of this experiment is shown in fig (4): View) y= tok, s1av 6 ¥ig.3: Circ diagram fa input offset vollage measurement. iii) Common mode rejection ratio: “The common mode rejection iratio is defined as the ratiom of diferemtial gain tothe common mode gain. Is given by Res took, mv [tus RI=WK wy wi 100K, av ‘At is the delay time, >fil 1 response, The ‘Frequency Tnput voltage Output voltage ‘Voltage gain ‘Normalized kHz) VSD) V4SD) Aa-VVi Voltage gain = AgPAVA dean z pee a Table no. 5: Data for frequency response of non-inverting amplifier Frequency Tnput vollage Output voltage | Voltage gain ‘Nommalized fiKH2) V\(SD) VASD) APVdV, Voltage gain Department of Electrical & Electronic Engineering Course Code: EEE-2216, Course Title: Analog Electronics Lab EXPERIMENT NUMBER :8 NAME OF. PERIMENT : Design of Active Filters Objective: ‘The objective ofthis experiment is to investigate the characteristics of different types of filter namely Low pass filters, High pass filters. Basie filters and Butterworth filters will be investigated Theory: A filter isa frequency sensitive ciruil. I passes some frequencies but blocks or attenuates others. Active filters are composed of operational amplifiers along with passive components suchas resistors, capacitors te. To achieve a steeper roll-of, Butterworth filter is used Equipments: 1. Power supply 2, Signal generator 3. Resistors 4. Capacitors 5. Oscilloscope 6. Operational Amplifiers (741 or 301) ‘Study of Basic low pass filter Gireuit Diagram: “4. Note the data in @ data sheet given below: Frequency (Hz) Input Ej Output i SVP) Vo Report: 1. Calculate the cut-off frequency theoretically using the formula fe “1/21 RC. 2. Draw the response curve (gain vs frequency) in a semi log graph paper and find the 3-db frequency or cut-off frequency from the graph, 3. Design a filter for a cut-off frequency of 10 KHz, -40 db/Decade Low Pass Butterworth filter Cireuit Diagram: ease the cu-oft frequency from the formula f 0.707/2nRC,, Dra the frequency curve in semi og graph paper. na filter fora frequency of | KHz, Wodb/Decade High Pass Butterworth filter Cireuit Diagram Procedure: T. Connect the circuit accordi {to the figure 3, 2. Apply an input voltage of 5 V (p-p), | Fig. 3: High Pass Filter fora roll-off of sodbldecade | 4. Vary the frequency and calculate gain, Ay = |) 4. Note the data ina daa sheet given below: Frequency (Hz) Input 5, f 5V@p)

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