Lecture 3 Memory-1
Lecture 3 Memory-1
• Cache miss
– Request not satisfied by cache
– failed attempt to read or write a piece of data in
the cache
– Increases access time
• Cache hit
– Request satisfied by cache
– Data transfer at maximum speed
Cache mapping
• Direct
– Specifies a single cache line for each memory
block
– Easier
• Set associative
– Specifies a set of cache lines for each memory
block
• Associative
– No restriction
– Any cache line can be used for any cache block
Direct mapping
Fully associative
• Greatest flexibility
• Any block can go into any line of the
cache
• Most expensive (cost of associative
memory, comparator)