Networks Booklet (186 Pages)
Networks Booklet (186 Pages)
GATE / IES
For “Electrical”, “Elect. & Comm.” And "Instrumentation" Engg.
Product of,
TARGATE EDUCATION
place of trust since 2009
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TARGATE EDUCATION
BILASPUR CENTRE: Ground Floor, Below Old Arpa Bridge,Jabdapara,
GATE – 2020
Electronics & Communication (EC)
Network solution methods: nodal and mesh analysis; Network theorems: superposition, Thevenin and
Norton’s, maximum power transfer; Wye-Delta transformation; Steady state sinusoidal analysis using
phasors; Time domain analysis of simple linear circuits; Solution of network equations using Laplace
transform; Frequency domain analysis of RLC circuits; Linear 2-port network parameters: driving point and
transfer functions; State equations for networks.
IES – 2019
Electronics & Telecommunication
Network graphs & matrices; Wye-Delta transformation; Linear constant coefficient differential equations-
time domain analysis of RLC circuits; Solution of network equations using Laplace transforms- frequency
domain analysis of RLC circuits; 2-port network parameters-driving point & transfer functions; State
equations for networks; Steady state sinusoidal analysis.
Electrical Engineering
Circuit elements, network graph, KCL, KVL, Node and Mesh analysis, ideal current and voltage sources,
Thevenin’s, Norton’s, Superposition and Maximum Power Transfer theorems, transient response of DC and
AC networks, Sinusoidal steady state analysis, basic filter concepts, two-port networks, three phase circuits,
Magnetically coupled circuits, Gauss Theorem, electric field and potential due to point, line, plane and
spherical charge distributions, Ampere’s and Biot-Savart’s laws; inductance, dielectrics, capacitance;
Maxwell’s equations.
Table of Contents
01. Basic Concept Of Network______________________________________1
1.1 OHM’S LAW 1
1.2 R,L,C 3
1.3 CHARGE, ENERGY, REAL POWER 6
1.4 KCL, K VL, POWER LAW 10
1.5 STAR DELTA NETWORK 19
1.6 OP-AMP (IDEAL) 24
1.7 SOURCE (DEPENDENT OR INDEPENDENT) 26
1.8 MISCELLANEOUS 29
***********
(A) 1.2 K
(B) 2.4 K
(C) 3.6 K
(D) 7.2 K
AC[IES – EC – 2005]
3. R and C are connected in parallel across a
sinusoidal voltage source of 240V. If
currents through the source and the capacitor
are 5A and 4A, respectively, then what is the
value of R?
(A) 24 (B) 48
(C) 80 (D) 240
AB [IES - EE - 2008]
4. For the network shown in the figure below,
what is the voltage across the current source
I?
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NETWORK
Answer :
1. 2. 3. 4. 5.
D B C B A
1.2 R,L,C
AA[IES – EC – 1991]
1. What will be the value of XC so that the
circuit is non inductive?
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NETWORK
(1 5)
(C) (1 5)C (D) C
2
AB [GATE - EC - 1997]
8. In the circuit of Fig. the equivalent
impedance seen across terminals A, B is (A) RA=RB (B) RA=RB=0
(C) RA< RB (D) RB= RA /(1+RA)
A2.9 TO 3.1 [GATE–S1–EE–2017]
12. The equivalent resistnace between the
terminals A and B is _______ .
AB[GATE – IN – 2006]
9. A metal wire has a uniform cross-section A,
length l, and resistance R between its two A2.12-2.16 [GATE–S2–EC–2017]
end points. It is uniformly stretched so that 13. A connection is made consisting of
its length becomes l . The new resistance resistance A in series with a parallel
is combination of resistance B and C. Three
(A) R (B) R
2 resistors of value 10 , 5 , 2 are
provided. Consider all possible permutations
(C) R (D) e R of the given resistors into the positions A, B,
C and identify the configurations with
A9to11 [GATE – EC – 2014] maximum possible overall resistance, and
10. For the Y-network shown in the figure, the also the ones with minimum possible overall
value of R1 (in ) in the equivalent ∆- resistance. The ratio of maximum to
network is ------. minimum values of the resistance (up to
second decimal place) is _____.
***********
Answer :
1. 2. 3. 4. 5. 6. 7. 8. 9. 10.
A D B B D B D B B *
11. 12. 13.
D * *
10. 9 to 11
12. 2.9 to 3.1
13. 2.12 to 2.16
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NETWORK
(A) 10 W (B) 12 W
(C) 16 W (D) 20 W
(A) 15 W
AB[IES – EC – 2001]
(B) 0 W
4. In the circuit shown in the given Fig., power
dissipated in the 5 resistor is (C) 15 W
(D) Cannot be determined unless the value
of R is known
AC[IES – EC – 2010]
8. The power dissipated n the 1 resistor is 1
W due to the 5V voltage source alone and
576 W due to 30 A current source alone. The
total power absorbed in the same resistor
(A) zero (B) 80 W due to both the sources is :
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NETWORK
***********
Answer :
1. 2. 3. 4. 5. 6. 7. 8. 9. 10.
C A B B D D B C C B
11. 12. 13. 14. 15. 16. 17. 18. 19.
B C A C A C 3 A *
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NETWORK
(A) 1 A (B) 2 A
(C) 4 A (D) 8 A
AC[IES – EC – 1992]
6. In the circuit shown, the values of V1 and I1
(A) 1 W, 1 W, 2 W will be :
(B) 0 W, 1 W, 1 W
(C) 1 W, 0 W, 1 W
(D) 0 W, 0 W, 0 W
AD[IES – EC – 1991]
2. What is the value of R so that i = 2A?
(A) 1 V, 1 A (B) 1 V, 6 A
(C) 5 V, 5 A (D) None
AA[IES – EC – 1993]
7. Which of the following theorems is a
manifestation of the Law of conservation of
energy?
(A) 5 (B) 10
(A) Tellegen's theorem
(C) 40 (D) 60
(B) Reciprocity theorem
AC[IES – EC – 1992]
(C) Thevenin's theorem
3. Find the current in RL in the circuit below :
(D) Norton's theorem
AB[IES – EC – 1999]
8. In the circuit shown in the Fig., for R = 20
, the current 'I' is 2 A. When R is 10 ,
the current 'I' would be :
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NETWORK
(A) (3 14)amps
(A) 1 V (B) (3 14)amps
(B) 3 V (C) 5 amps
(C) 6 V (D) None of these
(D) 9 V AC [GATE – EC – 1997]
22. In the circuit shown in the figure the current
AC[IES – EC – 2012]
i D through the ideal diode (zero cut in
19. The total resistance faced by the voltage
source having zero internal resistance in the voltage and zero forward resistance) equals
circuit is :
(A) 10
(B) 5
(C) 2.5 (A) 0A (B) 4A
(D) 1.5 (C) 1A (D) None
AA [GATE - EC - 1993] AB [GATE - EC - 1997]
20. The two electrical subnetworks N 1 and N 2 23. The current i4 in the circuit of Fig. is equal
are connected through three resistors as to
shown in Fig. The voltages across 5 ohm
resistor and 1 ohm resistor are given to be 10
V and 5 V, respectively. Then voltage across
15 ohm resistor is :
(A) 12 A (B) – 12 A
(C) 4 A (D) None of these
(A) – 105 V (B) + 105 V AD [GATE - EC - 1997]
(C) – 15 V (D) + 15 V 24. The voltage V in Fig. is always equal to
AC [GATE – EE – 1996]
21. In the circuit shown in figure, X is an
element which always absorbs power.
During a particular operation, it sets up a
current of 1 amp in the direction shown and
absorbs a power Px . It is possible that X can
absorb the same power Px for another
current i. Then the value of this current is
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NETWORK
(A) 10 (B) 18
(C) 24 (D) 12
AA [GATE – EC – 2003]
35. The minimum number of equations required (A) 0.31 A (B) 1.25 A
to analyze the circuit shown in the figure is
(C) 1.75 A (D) 2.5 A
AA [GATE - EE - 2008]
40. Assuming ideal elements in the circuit
shown below, the voltage v ab will be :
(A) 3 (B) 4
(C) 6 (D) 7
AC [GATE - EE - 2004]
36. In Fig., the value of the source voltage is (A) 3 V (B) 0V
(C) 3V (D) 5 V
AD [GATE – IN – 2008]
41. The power supplied by the dc voltage source
in the circuit shown below is
(A) 12 V (B) 24 V
(C) 30 V (D) 44 V
AB [GATE - EE - 2004]
37. In Fig., the value of resistance R is is
(A) I 3 I 5 I 6 I 7 0
(B) I 3 I 5 I 6 I 7 0
AA [GATE - EE - 2009]
45. The current through the 2k resistance in
the circuit shown in Fig. is :
(A) –5 V (B) 2 V
(C) 3 V (D) 6 V
Common Data for Next Two Questions :
(A) 0 mA (B) 1 mA Consider the following figure :
(C) 2 mA (D) 6 mA
AB [GATE – EE – 2010]
46. As shown in the figure, a 1 resistance is
connected across a source that has a load
line v + i = 100. The current through the
resistance is :
AD [GATE – EC – 2013]
50. The current I S in Amps in the voltage
source, and voltage VS in volts across the
current source respectively, are
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NETWORK
(A) 13, –20 (B) 8, –10 power absorbed by the three circuit elements
(C) –8, 20 (D) –13, 20 in watts is _______.
AC [GATE – EC – 2013]
51. The current in the 1 resistor in Amps is
(A) 2 (B) 3.33
(C) 10 (D) 12
AA [GATE – EC – 2014] A0.5 [GATE – EE – 2015]
52. Consider the configuration shown in the 56. In the given circuit, the parameter k is
figure which is a portion of a larger positive, and the power dissipated in the
electrical network 2 resistor is 12.5 W. The value of k is __
.
(A) 5 (B) 7
(C) 10 (D) 14
A1 [GATE – IN – 2015]
58. Consider the circuits shown in the figure.
A0.5 [GATE – EC – 2014] The magnitude of the ratio of the currents,
54. In the figure shown. The value of the current i.e. | I1 / I 2 | , is _____.
I (in Amperes) is ------------.
A0.5-0.5 [GATE–S6–EE–2016]
64. In the given circuit, the current supplied by
the battery, in ampere, is _______.
A11.25-11.50 [GATE–S6–EE–2016]
A5 [GATE–S4–IN–2016] 65. In the circuit shown below, the node voltage
60. Three currents i1 , i2 and i3 meet at a node as VA is _____ V.
shown in the figure below. If i1 3cos(t )
ampere, i2 4sin(t ) ampere and
i3 I 3 cos(t ) ampere, the value of I 3 in
ampere is _____ .
A4.9-5.1 [GATE–S3–EC–2016]
61. In the circuit shown in the figure, the
magnitude of the current (in amperes)
through R2 is ___
AA [GATE – IN – 2018]
67. In the given circuit, the mesh currents I 1 ,
I 2 and I 3 are
***********
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NETWORK
Answer :
1. 2. 3. 4. 5. 6. 7. 8. 9. 10.
B D C A B C A B C A
11. 12. 13. 14. 15. 16. 17. 18. 19. 20.
B C D C A A B B C A
21. 22. 23. 24. 25. 26. 27. 28. 29. 30.
C C B D * B C D D D
31. 32. 33. 34. 35. 36. 37. 38. 39. 40.
A C D D A C B C B A
41. 42. 43. 44. 45. 46. 47. 48. 49. 50.
D D B A A B B A X D
51. 52. 53. 54. 55. 56. 57. 58. 59. 60.
C A * * * * A * * *
61. 62. 63. 64. 65. 66. 67. 68.
* * * * * * A 0
25. 31 V, 13 A
53. 2.8
55. 330
56. 0.5
58. 1
59. 8
60. 5
61. 4.9 to 5.1
62. – 1.05 to – 0.95
63. 10
64. 0.5
65. 11.25 to 11.50
66. 248 to 252
(C)
(A) 1 (B) 0.5
(C) 2 (D) 1.5
AB[IES – EC – 1993]
2. In the given Fig., the capacitors C1, C3, C4,
and C5 have a capacitance of 4 microfarads
each and the capacitor C2 has a capacitance
of 10 microfarads. The effective capacitance
(in microfarads) between the points X and Y
will be (D)
AA[IES – EC – 1994]
4. Which one of the following circuits is the
delta equivalent of the star circuit given in
(A) 2 (B) 4
the figure 1
(C) 8 (D) 10
AC[IES – EC – 1993]
3. Which one of the following networks is the
Y equivalent of the circuit shown in
Fig.1?
(A)
(A)
(B)
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NETWORK
Direction :
The following 4 (Four) items consist of two
(C) statements, one labelled the ‘Assertion (A)’ and
the other labelled the ‘Reason (R)’. You are to
examine these two statements carefully and decide
if the Assertion (A) and the Reason (R) are
individually true and if so, whether the Reason is a
correct explanation of the Assertion. Select your
(D) answers to these items using the Codes given
below and mark your answer sheet accordingly:
(A) Both A and R are true and R is the correct
explanation of A
(B) Both A and R are true but R is NOT the
AD[IES – EC – 1994] correct explanation of A
5. The equivalent resistance between the
(C) A is true but R is false
terminal points X and Y of the circuit shown
is : (D) A is false but R is true
AD [IES - EE - 2001]
8. Assertion (A):
Equivalent network obtained from Y
transformation relationships in general is
valid only for one frequency.
Reason (R):
The impedances involved in Y vary
with frequency.
(A) 150 ohms (B) 45 ohms
(C) 55 ohms (D) 30 ohms AA[IES – EC – 2001]
9. For the equivalent circuit shown in the given
AB[IES – EC – 1996] figure, the values of RAB and RBC are
6. A delta connection contains three equal respectively
impedances of 60 ohms. The impedances of
the equivalent star connection will be :
(A) 15 each (B) 20 each
(C) 30 each (D) 40 each
AC[IES – EC – 1997]
7. The effective resistance between the
terminals A and B in the circuit shown in the
Fig., is :
(A) 5 Ω and 15 Ω
(B) 15 Ω and 30 Ω
(C) 30 Ω and 5 Ω
(D) 20 Ω and 35 Ω
AD [GATE - EE - 1992]
10. All the resistances in Figure are 1 each.
The value of current ‘I’ is
All resistors = R
(A) R (B) R – 1
6
(C) R/2 (D) R
11
1 2 AB [GATE - EE - 2001]
(A) A (B) A 14. Consider the star network shown in Fig. The
15 15
resistance between terminals A and B with C
4 8 open is 6 , between terminals B and C
(C) A (D) A with A open is 11 , and between terminals
15 15
C and A with B open is 9 . Then
A100 [GATE – EE – 1994]
11. A set of 3 equal resistors, each of value R x ,
connected in star across RYB of given figure
consumes the same power as the unbalanced
delta connected load shown. The value of
R x is ______ .
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NETWORK
2
(A) k (B) k
A2.9-3.1 [GATE–S8–EE–2016]
21. In the balanced 3-phase, 50 Hz, circuit
shown below, the value of Inductance (L) is
10 mH. The value of the capacitance (C) for
which all the line currents are zero, in
millifarads, is __________.
AD [GATE–S3–EC–2016]
22. In the given circuit, each resistor has a value
equal to 1 Ω.
Answer :
1. 2. 3. 4. 5. 6. 7. 8. 9. 10.
B B C A D B C D A D
11. 12. 13. 14. 15. 16. 17. 18. 19. 20.
* D C B A A B * * *
21. 22.
* D
11. 100
18. 29.09 to 29.10
19. 2.62
20. 100
21. 2.9 to 3.1
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NETWORK
Answer :
1. 2. 3. 4.
D C * B
3. 9.0 to 9.1
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NETWORK
AA[IES – EC – 2003]
2. In the circuit shown below, the voltage
across 2 resistor is 20V. The 5 resistor (A) Constant voltage
connected between the terminals A and B
can be replaced by an ideal (B) Linearly increasing voltage
(C) an ideal impulse
(D) Exponentially increasing voltage
AA [GATE - EC - 2009]
6. In the interconnection of ideal sources
shown in the figure, it is known that the 60
(A) Voltage source of 25 V with + terminal V source is absorbing power.
upward
(B) Voltage source of 25 V with + terminal
downward
(C) Current source of 2 A upward
(D) Current source of 2 A downward
AA[IES – EC – 2009]
3. Assertion (A) : Ideal current sources and
ideal voltage sources do not exist in reality. Which of the following can be the value of
the current source I?
Reason (R): All sources have finite internal
impedances. (A) 10 A (B) 13 A
Codes : (C) 15 A (D) 18 A
(A) Both A and R are individually true and
R is the correct explanation of A AC [GATE – EC – 2014]
(B) Both A and R are individually true but 7. The circuit shown in the figure represents a
R is not the correct explanation of A.
(C) A is true but R is false
(D) A is false but R is true
A15A [GATE – EE – 1995]
4. In the circuit shown in figure, ammeter A2 (A) Voltage controlled voltage source
reads 12 A and A3 reads 9 A. A1 will read (B) Voltage controlled current source
____ A. (C) Current controlled current source
(D) Current controlled voltage source
***********
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NETWORK
Answer :
1. 2. 3. 4. 5. 6. 7. 8. 9.
D A A * C A C A 2
4. 15A
1.8 Miscellaneous
AD[IES – EC – 1991]
1. For the circuit shown in the figure, the
current x is 3A. The power delivered by the
dependent current source D is :
(A)
(A) 50 Watts
(B) 2250 Watts
(C) 2300 Watts
(D) 1500 Watts
AB[IES – EC – 1992]
(B)
2. A 24 V battery of internal resistenace r = 4
ohm is connected to a variable resistance R. Codes:
The rate of heat dissipation in the resistor is
maximum when the current draw from the (A) Both A and R true and 'R' is the correct
battery is I. Current drawn from the battery explanation of 'A'
will be (I/2), when R is equal to
(B) Both A and R true and 'R' is the not
(A) 8 ohms (B) 12 ohms correct explanation of 'A'
(C) 16 ohms (D) 20 ohms (C) 'A' is true, 'R' is false
AA[IES – EC – 1993] (D) 'A' is false, 'R' is true
3. For the circuit shown in the given Fig., the
current through R, when VA = 0 and VB = 15 AD[IES – EC – 1994]
V is 1 amp. Now, if both VA and VB are 5. In the circuit shown in the given figure,
increased by 15 volts, then the current current I is :
through R will be :
(A) 1 amp
(B) 1/2 amp 2 24
(A) A (B) A
(C) 3 amp 5 5
(D) 1/3 amp 18 2
(C) A (D) A
5 5
AC[IES – EC – 1993]
4. Assertion (A): For the networks shown in AA[IES – EC – 1994]
Fig., A and Fig., B, the sum of the products 6. The dual of the netwok shown in the figure,
of branch voltages of Fig., A at time t1 and is :
the corresponding branch currents of the
network in Fig., B at time t2 is equal to zero.
Reason (R): The networks shown in Fig. A
and Fig B are not structurally the same.
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NETWORK
(A)
(A) 6 µ s (B) 10 µ s
(C) 15 µ s (D) 25 µ s
(B)
AA[IES – EC – 1996]
10. In the circuit shown in the given figure, the
current I in the 2 ohm resistor is :
(C)
(A) 6 V (B) 10 V
(C) 25 V (D) 40 V
AA[IES – EC – 1995]
8. For a given voltage, four heating coils will
produce maximum heat when connected (A) 1 (B) 2
(C) 3 (D) 3.3
(A) all in parallel
AC[IES – EC – 1997]
(B) all in series
13. In the circuit shown in the Fig., if I = 2, then
(C) with two parallel pairs in series value of the battery voltage V will be :
(D) one pair in parallel with the other two
in series
AA[IES – EC – 1996]
9. The time constant associated with the
capacitor charging in the circuit shown in
the given figure is
(A) 5 V (B) 3 V
(C) 2 V (D) 1 V
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NETWORK
AA[IES – EC – 2003]
22. The current flowing through the voltage
source in the circuit given below is :
AC[IES – EC – 2005]
25. If a unit step current is passed through a
capacitor, what will be the voltage across the
capacitor?
(A) 0
(B) A step function
(C) A ramp function (A) 4 (B) 40
(D) An impulse function (C) 44 (D) 440
(A) 3V
(B) – 3V
(C) 5V
(D) None of these
A Inductor, 2H [GATE - EE - 1997]
36. The voltage and current waveforms for an
element are shown in Figure. The circuit
(A) increases
element is..... and its value is ..........
(B) decreases
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NETWORK
(A) delivers 80 W
(B) absorbs 80 W
(C) delivers 40 W
(D) absorbs 40 W
AD [GATE - EE - 2000]
41. A voltage waveform v(t) = 12 t2 is applied
across a 1 H inductor for t 0, with initial
current through it being zero. The current
A5A [GATE - EE - 1997]
through the inductor for t 0 is given by:
37. A 10 V battery with an internal resistance of
1 is connected across a nonlinear load (A) 12 t (B) 24 t
whose V – I characteristic is given by 7I =
V2 + 2V. The current delivered by the (C) 12 t3 (D) 4 t3
battery is...... A. AA [GATE - EC - 2003]
AB [GATE - EE - 1999] 42. Twelve 1 resistances are used as edges to
38. When a resistor R is connected to a current form a cube. The resistance between two
source, it consumes a power of 18W. When diagonally opposite corners of the cube is
the same R is connected to a voltage source 5
having the same magnitude as the current (A) (B) 1
source, the power absorbed by R is 4.5 W. 6
The magnitude of the current source and the 6 3
value of R are (C) (D)
5 2
(A) 18 A and 1 AC [GATE - EC - 2003]
43. The differential equation for the current i(t)
(B) 3 A and 2 in the circuit of the Fig. is
(C) 1A and 18
d 2i di
(A) 2 2
2 i (t ) sin t
dt dt
d 2i di
(B) 2
2 2i (t ) cos t
dt dt
d 2i di
(C) 2 2
2 i(t ) cos t
4 8 dt dt
(A) ohms (B) ohms
3 3 d 2i di
(D) 2
2 2i (t ) sin t
(C) 4 ohms (D) 2 ohms dt dt
(A) 0 W (B) 5 W
(C) 10 W (D) 100 W
AC[GATE – EE – 2013]
49. Three capacitors C1 , C2 and C 3 whose
values are 10F , 5 F and 2 F
respectively, have breakdown voltages of 10
(A) 3 8 cos 2t (B) 32 sin 2t V, 5 V and 2 V respectively. For the
(C) 16sin 2t (D) 16 cos 2t interconnection shown below, the maximum
safe voltage in volts that can be applied
AB [GATE – IN – 2003] across the combination, and the
45. The output resistance across the terminals 1 corresponding total charge in C stored in
and 2 of the DC bridge in figure is the effective capacitance across the
terminals are, respectively
(A) 2.8 and 36 (B) 7 and 119
(C) 2.8 and 32 (D) 7 and 80
AB [GATE – EC/IN – 2013]
50. The following arrangement consists of an
(A) 12.5k (B) 24.5k ideal transformer and an attenuator which
(C) 25.0k (D) 100k attenuates by a factor of 0.8. An ac voltage
VWX1 =100 V is applied across WX to get an
AA [GATE – IN – 2008] open circuit voltage VYZ1 across YZ. Next,
46. The current I supplied by the dc voltage an ac voltage V YZ2 = 100 V is applied
source in the circuit shown below is :
across YZ to get an open circuit voltage
VWX2 across WX. Then, VYZ1 /VWX1 ,
VWX2 /VYZ2 are respectively,
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NETWORK
AD [GATE–S8–EE–2016]
57. In the circuit shown below, the voltage and
current sources are ideal. The voltage (Vout)
across the current source, in volts, is :
***********
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NETWORK
Answer :
1. 2. 3. 4. 5. 6. 7. 8. 9. 10.
D B A C D A A A A A
11. 12. 13. 14. 15. 16. 17. 18. 19. 20.
C B C C D A C C C D
21. 22. 23. 24. 25. 26. 27. 28. 29. 30.
A A A B C C D C B C
31. 32. 33. 34. 35. 36. 37. 38. 39. 40.
C D B A A * * B B A
41. 42. 43. 44. 45. 46. 47. 48. 49. 50.
D A C B B A C A C B
51. 52. 53. 54. 55. 56. 57. 58. 59.
C * * * 0 A D * *
36. Inductor, 2H
37. 5A
52. 2470 to 2417
53. 1 ot –1
54. 1.75
58. 0.9 to 1.1
59. 7.9 to 8.1
(A) 1 W (B) 5 W
(C) 13 W (D) 25 W
AA [GATE - EC - 1998]
8. Superposition theorem is NOT applicable to
networks containing
(A) nonlinear elements
(B) dependent voltage sources
(C) dependent current sources
(D) transformers
A0.95-1.05 [GATE – IN – 2018]
9. In the given circuit, superposition is applied.
When V2 is set to 0 V, the current I 2 is -6
A. When V1 is set to 0 V, the current I 1 is
+6 A. Current I 3 (in A) when both sources
are applied will be (up to two decimal
places) _____.
***********
Answer :
1. 2. 3. 4. 5. 6. 7. 8. 9.
D D C C A * D A *
6. False
9. 0.95 to 1.05
www.targate.org Page 41
NETWORK
5 5
(A) A,2 (B) A,1
2 2
2 2
(C) A,1 (D) A,2
5 5
AC[IES – EC – 1992]
2. The equivalent circuit of the following
circuit is :
V Z
(A) 100 12
(B) 60 12
(C) 100 30
(D) 60 30
AA[IES – EC – 1994]
5. Thevenin's equivalent circuit of the network
(A) (B) shown in ssthe given figure, between
terminals T1 and T2 is :
(C) (D)
(A)
(B)
AD[IES – EC – 1992]
3. In the Fig., shown, if we connect a source of (C)
2 V, with internal resistance of 1 at A'A,
with positive terminal at A', then the current
through R will be (D)
AA[IES – EC – 1995]
6. Which one of the following combinations of
open circuit voltage and Thevenin's
equivalent resistance represents the
Thevenin's equivalent of the circuit shown in
the given figure?
(A) will be
(A) 1 V, 10 (B) 1 V, 1 k
(C) 1 mV, 1 k (D) 1 mV, 10
AB[IES – EC – 1996] (B) will be
7. In the network shown in the given figure
current i = 0 when E = 4 V, I = 2 A and i = 1
A when E = 8 V, I = 2 A. The Thevenin
voltage and the resistance looking into the
terminals AB are
(C) will be
(A) 4 V, 2 (B) 4 V, 4
(C) 8 V, 2 (D) 8 V, 4 (D) is Not feasible
AB[IES – EC – 1997] AB[IES – EC – 1998]
8. The Thevenin equivalent of the network 10. A battery charger can drive a current of 5 A
shown in Fig. I is 10 V is in series with into a 1 ohm resistance connected at its
resistance of 2 . If now, a resistance of output terminals. If it is able to charge an
3 is connected across AB as shown in ideal 2V battery at 7A rate, then its
Fig.II, the Thevenin equivalent of the Thevenin's equivalent will be
modified network across AB will be :
(A) 7.5 V in series with 0.5 ohm
(B) 12.5 V in series with 1.5 ohms
(C) 7.5 V in parallel with 0.5 ohm
(D) 1.25 V in parallel with 1.5 ohms
AD[IES – EC – 1999]
11. The resistance 'R' looking into the terminals
AB in the circuit shown in the Fig. will be
(A) 10 V in series with 1.2 resistance
www.targate.org Page 43
NETWORK
AD [IES - EE - 2001]
14. Assertion (A):
Norton theorem is applied to a network for
which no equivalent Thevenin’s network
exists.
(Figure – I) Reason(R):
Norton’s Theorem enables one to calculate
quickly current and voltage in a particular
branch of interest in a complicated network.
Direction :
(Figure - II) The following items consist of two statements, one
labelled the ‘Assertion (A)’ and the other labelled
5 the ‘Reason (R)’. You are to examine these two
(A) A and 2
2 statements carefully and select your answer to this
2 item using the Codes given below:
(B) A and 1 (A) Both A and R are individually true and R is
5
the correct explanation of A
4 12
(C) A and (B) Both A and R are true but R is NOT the
5 5 correct explanation of A
2 (C) A is true but R is false
(D) A and 2
5 (D) A is false but R is true
AB [IES - EE - 2001]
13. The Thevenin’s equivalent resistance Rth for
AC [IES - EE - 2004]
the given network is
15. Assertion (A):
If Thevenin’s equivalent of a circuit is
known, its Norton equivalent is also known.
Reason (R):
Noton’s equivalent is reciprocal of
Thevenin’s equivalent.
AD[IES – EC – 2005]
16. If two identical 3A, 4 Norton equivalent
(A) 1 (B) 2 circuits are connected in parallel with like
polarity, then combined Norton equivalent
(C) 4 (D) Infinity circuit will be :
Direction : (A) 3 A, 8 (B) 6A, 8
The following 4 (Four) items consist of two (C) 0A, 2 (D) 6 A, 2
statements, one labelled the ‘Assertion (A)’ and
the other labelled the ‘Reason (R)’. You are to AB [IES - EE - 2006]
examine these two statements carefully and decide 17. Norton equivalent to the network N to the
if the Assertion (A) and the Reason (R) are left of AB is a current source IN = 4A from
individually true and if so, whether the Reason is a B to A, RN = 2 . The current through R
correct explanation of the Assertion. Select your when it is connected across AB = 2A. What
answers to these items using the Codes given is the value of resistance R?
below and mark your answer sheet accordingly :
(A) Both A and R are true and R is the correct
explanation of A
(B) Both A and R are true but R is NOT the
correct explanation of A
(A) 1 (B) 2
(C) A is true but R is false
(D) A is false but R is true (C) 3 (D) 4
AA [IES - EE - 2010]
22. Applying Norton’s Theorem, the Norton’s
equivalent circuit to the left of the terminals
a and b in the below circuit is having
equivalent current source (IN) and equivalent
(A) 2 (B) 4 resistance (R N) as
(C) 8 (D) 12
AB[IES – EC – 2007]
19. What are the source voltage and source
resistance, respectively for the Thevenin’s
equivalent circuit as seen from the terminals
indicated in the circuit given below?
(A) IN = 5A; RN = 4
(B) I N 4 A; RN 6
(C) I N 9 A; RN 1.6
(D) I N 4 A; RN 3
AC[IES – EC – 2010]
(A) 2.0 V, 24 23. Thevenin equivalent voltage VAB and
(B) 20V, 48 resistance Rt across the terminals A, B in
(C) 20 V, 4.8 the below circuit are
(D) 20V, 12
AB [IES - EE - 2010]
20. Thevenin’s equivalent of the circuit shown
below is :
(A) 6V , 5 (B) 4V , 5
AA [IES - EE - 2010]
24. The current IX and voltage Vx in the below
(A) 0.75 V, 1.5 circuit are, respectively
(B) 1.5 V, 1.5
(C) 1.5 V, 0.75
(D) 5.0 V, 1.5
AB[IES – EC – 2010]
21. For the network shown in he figure below,
current delivered by the voltage source V
I (0.2V 2) A
www.targate.org Page 45
NETWORK
1.
2.
(A) 6 A (B) 4 A
(C) 2 A (D) 0
3.
AD [IES - EE - 2011]
10.
4.
(A) 0 V
(B) 1.5 V
(C) 6.0 V
(D) indeterminate
AB[IES – EC – 2012]
30. Thevenin's equivalent resistance as seen
from the terminals AB for the circuit is (A) j16(3 j 4) (B) j16(3 j 4)
(C) 16(3 j 4) (D) 16(3 j 4)
AD [GATE - EC - 2001]
34. The voltage e0 in Fig. is :
(A) 1 k (B) 10
(C) 100 (D) 10 k
AD[IES – EC – 2012]
31. In the circuit, Thevenin's voltage and
resistance across the terminals XY will be (A) 48 V (B) 24 V
(C) 36 V (D) 28 V
AA [GATE - EE - 2003]
35. In the Fig. Z1 =
0
10 60 , Z2 1060 ,
Z3 5053.130. Thevenin’s impedance
(A) 20 V and 100 Ω seen from X – Y is
(B) 40 V and 93.33 Ω
(C) 60 V and 93.33 Ω
(D) 100 V and 100 Ω
AB [GATE - EE - 1998]
32. Viewed fromss the terminals A, B, the
following circuit shown in Figure can be (A) 56.6 450 (B) 60300
reduced to an equivalent circuit of a single
voltage source in series with a single resistor (C) 70300 (D) 34.4 65 0
with the following parameters.
AB [GATE - EC - 2005]
36. For the circuit shown in the figure,
Thevenin’s voltage and Thevenin’s
equivalent resistance at terminals a – b is
www.targate.org Page 47
NETWORK
AB [GATE – EE – 2008]
41. The Thevenin’s equivalent of a circuit
operating at 5 rad/s, has
VOC 3.71 15.90 V and
Z 0 2.38 j 0.667 . At this frequency, the
(A) (2 V, 5 ) minimal realization of the Thevenin’s
(B) (2V, 7.5 ) impedance will have a
(C) (4 V, 5 ) (A) resistor and a capacitor and an inductor
(D) (4V, 7.5 ) (B) resistor and a capacitor
(C) resistor and an inductor
AD [GATE - EE - 2006]
(D) capacitor and an inductor
38. In the figure the current source is 10 A, R
= 1 , the impedances are Zc j , and AA [GATE - EC - 2008]
ZL 2 j. The Thevenin equivalent looking 42. The Thevenin equivalent impedance Z th
into the circuit across X – Y is between the nodes P and Q in the following
circuit is :
AB [GATE - EE - 2009]
43. For the circuit given above, the Thevenin’s
resistance across the terminals A and B is
A20 to 20 [GATE-IN-2014]
49. The circuit shown in the figure contains a
dependent current source between A and B
terminals. The Thevenin’s equivalent
resistance in kΩ between the terminals C
and D is ___________.
AA [GATE - EC - 2011]
46. In the circuit shown below, the Norton AD [GATE – EC – 2014]
equivalent current in amperes with aspect to 50. Norton’s theorem states that a complex
the terminals P and Q is network connected to a load can be replaced
with an equivalent impedance
(A) in series with a current source
(B) in parallel with a voltage source
(C) in parallel with a voltage source
(D) in parallel with a current source
(A) 2sin(t ), 4
(A) 50 (B) 100 (B) 1sin(t ),1
(C) 5 k (D) 10.1 k (C) 1sin(t ), 2
AC [GATE – EC/EE/IN– 2013] (D) 2sin(t ),0.5
48. In the circuit shown below, if the source
voltage Vs 10053.130 V then the A0 [GATE – EE – 2014]
Thevenin’s equivalent voltage in Volts as 52. The Norton’s equivalent source in amperes
seen by the load resistance R L is : as seen into the terminals X and Y is _____.
www.targate.org Page 49
NETWORK
A2 A, 4.5
61. For the circuit shown in Fig. The North
equivalent source current value is........... A
and its resistance is............ Ohms
A1.3 to 1.5[GATE-EE-2019]
62. The current I flowing in the circuit shown
below in amperes (round off to one decimal
place) is ____.
A1000 [GATE-IN-2019]
63. Consider a circuit comprising only resistors
with constant resistance and ideal
independent DC voltage sources. If all the
resistances are scaled down by a factor 10,
and all source voltages are scaled up by a
factor 10, the power dissipated in the circuit
scales up by a factor of ______ .
***********
www.targate.org Page 51
NETWORK
Answer :
1. 2. 3. 4. 5. 6. 7. 8. 9. 10.
D C D C A A B B D B
11. 12. 13. 14. 15. 16. 17. 18. 19. 20.
D D B D C D B A B B
21. 22. 23. 24. 25. 26. 27. 28. 29. 30.
B A C A A D C D A B
31. 32. 33. 34. 35. 36. 37. 38. 39. 40.
D B A D A B A D D C
41. 42. 43. 44. 45. 46. 47. 48. 49. 50.
B A B D A A A C * D
51. 52. 53. 54. 55. 56. 57. 58. 59. 60.
A 0 * * 10 * A A C *
61. 62. 63.
* * *
49. 20
53. 1.33
54. 3.36
56. –1.0 to -0.99
60. 50.0
61. 2 A & 4.5
62. 1.3 to 1.5
63. 1000
(A) 3 Ω (B) 9 Ω
(C) 12 Ω (D) 6 Ω
(A) 3 - j 1 (B) 3 + j 9
AD[IES – EC – 1999]
(C) 7.5 + j 2.5 (D) 7.5 - j 2.5 6. In the circuit shown in the Fig., the power
dissipated in 30 Ω resistor will be maximum
AC[IES – EC – 1992]
if the value of R is
2. The value of Rx so that power dissipated in it
is maximum, is :
www.targate.org Page 53
NETWORK
(A) 2 (B) 4
(C) 8 (D) 16
(A) 1 W (B) 3W
(C) 4 W (D) 5 W
AA [GATE - EC - 1989]
21. A load, Z L RL jX L is to be matched,
using an ideal transformer, to a generator of
(A) 2 (B) 4
internal impedance, ZS RS jX S . The
turns ratio of the transformer required is (C) 8 (D) 16
(C) | RL / ZS |
(D) | Z L / RS |
www.targate.org Page 55
NETWORK
(A) 5 (B) 10
(C) 15 (D) 20
AA [GATE - IN - 2012]
37. Assuming both the voltage sources are in
phase, the value of R for which maximum
power is transferred from circuit A to circuit AA [GATE – IN – 2015]
B is 42. A load resistor RL is connected to a battery
of voltage E with internal resistance Ri
through a resistance RS a shown in the
figure. For fixed values of R L and Ri, the
value of RS ( 0) for maximum power
transfer to RL is :
(C) 5 (D) 7
AC [GATE – EC – 2014]
39. For maximum power transfer between two
cascaded sections of an electrical network,
the relationship between the output
impedance Z1 of the first section to the input AB [GATE–S3–EC–2016]
impedance Z 2 of the second section is 44. In the circuit shown below, V S is a constant
(A) Z 2 Z1 (B) Z2 Z1 voltage source and I L is a constant current
* *
load.
(C) Z2 Z1 (D) Z2 Z1
AC [GATE – EE – 2014]
40. A non-ideal voltage source VS has an
internal impedance of Z s . If a purely
www.targate.org Page 57
NETWORK
AD [GATE–S2–EE–2017]
46. In the circuit shown below, the value of
capacitor C required for maximum power to
be transferred to the load is
(C) 1 mF (D) 10 mF
AA
47. Consider the following circuit:
8 3
(A) ohms (B) ohms
3 8
(C) 4 ohms (D) 8 ohms
A5 [GATE-IN-2019]
48. In the circuit shown below, maximum power
is transferred to the load resistance RL, when
RL = ________ .
Answer :
1. 2. 3. 4. 5. 6. 7. 8. 9. 10.
C C B D A D C B D D
11. 12. 13. 14. 15. 16. 17. 18. 19. 20.
C B A B C C D C B A
21. 22. 23. 24. 25. 26. 27. 28. 29. 30.
A C X A C A A C D C
31. 32. 33. 34. 35. 36. 37. 38. 39. 40.
D B C C A C A C C C
41. 42. 43. 44. 45. 46. 47. 48.
* A * B * D A 5
41. 1.649
43. 0.78 to 0.82
45. 3 to 3.1
www.targate.org Page 59
NETWORK
***********
(A) – 1 A
(B) 9 A
(C) 10 A
(D) 11 A
AC [GATE – EC – 2000]
2. Use the data of the figure (a). The current in
the circuit of the figure (b)
(A) –2 A
(B) 2 A
(C) –4 A
(D) +4 A
C [GATE - EC - 2005]
3. If R1 R2 R4 R and R3 1.1 R in the
bridge circuit shown in the Fig. then the
reading in the ideal voltmeter connected
between a and b is
Answer :
1. 2. 3.
D C C
www.targate.org Page 61
NETWORK
Codes: Code:
A B C D A B C D
(A) 7 6 3 1 (A) 2 5 1 3
(B) 1 3 2 4
(B) 8 5 4 2
(C) 2 3 1 4
(C) 8 6 4 1
(D) 1 5 2 3
(D) 7 5 3 2
AB [IES - EE - 2006]
8. Match List-I with List-II and select the
AB [IES – EC – 2005] correct answer using the code given below
6. Consider the following statements : the Lists:
Network NA in Fig. (A) can be replaced by List-I
the network NB shown in Fig. (B) below, (Term)
when IC and Rc, respectively are A. Norton equivalent of one port
B. Open-circuit output admittance
C. Reciprocal network
D. Transmission parameters
List – II
(Concept)
1. Network where loop and node
1. 5 A and 2 equations have a symmetric coefficient
matrix
2. 10 A and 1
2. Hybrid parameter h22
1
3. 15 A and 3. Parameters where V1 and I1 are
2
expressed as functions of V2 and –I2.
1 4. Current source in parallel with
4. 30 A and
5 Thevenin impedance
Which of the statements given above is/are Code:
correct? A B C D
(A) 1 only (B) 2, 3 and 4 (A) 1 3 4 2
(C) 1, 2 3 and 4 (D) 2 and 3 (B) 4 2 1 3
AB [IES - EE - 2005] (C) 1 2 4 3
7. Match List I (Property of Network) with List (D) 4 3 1 2
II (Relevant Theorem) and select the correct
answer using the code given below the Lists
AC[IES – EC – 2009]
List I 9. If in an electric network R, L and C are
connected in series and supplied by a
A. Linearity
voltage source, then its dual network will be
B. Structure described by the differential equation
C. Equivalent Circuit di(t ) 1
(A) v (t ) Ri (t ) L i (t ) dt
D. Bilateral dt C
List II 1 di (t ) 1
(B) v (t ) i (t ) C i (t ) dt
1. Super position Theorem G dt L
2. Norton’s Theorem dv (t ) 1
(C) i (t ) Gv (t ) C v (t ) dt
3. Tellegen’s Theorem dt L
4. Reciprocity Theorem di (t )
(D) v (t ) Ri (t ) L C i (t ) dt
5. Millman’s Theorem dt
www.targate.org Page 63
NETWORK
AB [IES - EE - 2011]
12. Match List I with List II and select the
correct answer using the code given below
the lists:
List – I List – II
A. Equivalent 1. Superposition
Circuit
(A) 3 sec
(B) 12 sec
(C) 32 sec
(D) unknown, unless the actual network is
specified
***********
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NETWORK
Answer :
1. 2. 3. 4. 5. 6. 7. 8. 9. 10.
B C B C D B B B C D
11. 12. 13. 14.
D B X A
-------0000-------
AC[IES – EC – 1991] 1
(C) A (D) 0 A
1. In the circuit shown in the figure.A, the 2
switch has been in position 1 for a long time,
AC[IES – EC – 1991]
When the switch is placed in position 2 at t
3. In the given circuit, he switch S1 is initially
= 0, the current i(t) (t>0) can be determined
in a closed position and switch S2 is in the
from the transformed circuit given in the
open position. If S1 is suddenly opened with
figure.
simultaneous closure of S2, then the
expression for instantaneous current would
be :
Rt
V
(A) 2 1 e L
R
Rt
V
(B) 2 1 e 2 L
R
Rt
V
(C) 2 e L
(A) R
Rt
V
(D) 2 2 e 2L
R
AA[IES – EC – 1993]
4. The time constant of the network shown in
(B)
he given Fig. is given by
(C)
L
(A) RR
R3 1 2
R1 R2
(D)
L
(B)
R1 R 2 R 3
AD[IES – EC – 1991] L
2. In the circuit shown, the switch is closed at t (C) 1
= 0. The current at t = 0 is (current through 1 1
inductance for t < 0 is 0) R1 R2 R3
L
(D) R1R2
R1 R2
AB[IES – EC – 1993]
5. The steady state current through the 1 H
inductance in the circuit shown in the given
Fig. is
(A) 1 H (B) 2 H
(A) V e R1t / L (C) 3 H (D) 4 H
R2
t
AB [IES - EE - 2001]
V L / R2 10. A unit step u (t 5) is applied to the RL
(B) e
R1 network.
VR2
(C) e L ( R1 R2 ).t / R1 R2
R1 R2
V
(D) e Lt / R2
R1 R 2
(A) 0.2 s
(B) 5 s The value of R is :
(C) 0.1 s
(A) 0.5 ohm (B) 2.0 ohm
(D) Dependent on R and hence cannot be
determined unless R is known (C) 4.0 ohm (D) 12 ohm
(A) 1 – 2 – 3 – 4
(B) 4 – 1 – 2 – 3
(C) 4 – 3 – 1 – 2
(D) 4 – 3 – 2 – 1
www.targate.org Page 69
NETWORK
AC[IES – EC – 2009]
(A) e10t (B) 1.5e10t 21. In the circuit given below, the switch is open
for a long time. At time t = 0, the switch is
(C) 2e10t (D) 10e10t
closed. What are the initial and final values
AB[IES – EC – 2006] of voltage across the inductor?
18. If switch S in the circuit shown below is
opened at t = 0, what are the values of v(0 )
dv
and (0 ), respectively?
di
(A) 0 V and 0 V
(B) 0 V and 80 V
(C) 80 V and 0 V
(D) 80 V and 80 V
(A) 100 V, 10,000 V/s AA[IES – EC – 2010]
22. In the circuit given below, the independent
(B) 100 V, - 10,000 V/s current source generates zero current for t <
4t
(C) -100V, 10000V/s 0 and a pulse 5 te A, for t 0. At what
(D) -100V, -10000 V/s instant of time, will the current attain the
maximum value in the circuit?
AB[IES – EC – 2006]
19. The circuit shown in the figure below is
under steady – state condition with the
switch closed. The switch is opened at t = 0.
What is the time constant of the circuit?
(A) 0.25 sec (B) 0.5 sec
(C) 1 sec (D) 2 sec
AC[IES – EC – 2010]
23. Voltage and current expressions for the
below circuit are given at t 0 as
V 125e50t V, i 5 e50t A. The value of L
(A) 0.1 s (B) 0.2 s will
be :
(C) 5 s (D) 10 s
AD [IES - EE - 2006]
20. In the circuit shown in the figure given
below, the switch is opened at t = 0 after
having been closed for a long time. What is
the current through 50 resistor?
(A) 0.005 H (B) 0.05 H
(C) 0.5 H (D) 5 H
AA[IES – EC – 2010]
24. The current in the network given below is
AA[IES – EC – 2011]
26. In the circuit shown, the initial current I0 A4.32 [GATE - EE - 1997]
through the inductor is given in the figure. 30. In the circuit shown in Fig. eg (t) 2.5 t volts.
The initial value of the voltage across the What are the values of i(t) and vL (t ) at t = 4
inductor V0 (0 ) is
seconds?
AC [GATE - EC - 2002]
33. In the Fig. the switch was closed for a long
time before opening at t = 0. The voltage VX
at t = 0 is :
(A)
(A) 25 V (B) 50 V
(C) – 50 V (D) 0 V
A [GATE - EC - 2002]
34. The switch in Fig. 1, has been in position 1
for a long time and is then moved to position (B)
2 at t = 0.
(C)
(A) Determine VC(0) and IL(0)
dVC (t )
(B) Determine at t = 0
dt
(C) Determine VC(t) for t > 0
A [GATE - EE - 2002]
35. A constant current source is supplying 10 A
to a circuit shown in Fig. The switch S,
which is initially closed for a sufficiently (D)
long time, is suddenly opened. Obtain the
differential equation governing the
behaviour of the inductor current and hence
obtain the complete time response of the
Statement for Linked Answer Question for Next
inductor current. What is the energy stored
Two Questions :
in L, a long time after the switch is opened?
A coil of inductance 10 H and resistance 40 is
connected as shown in the Fig. After the switch S
has been in contact with point 1 for a very long
time, it is moved to point 2 at t = 0.
AC [GATE - EE - 2005]
AC [GATE - EC - 2004] 37. If, at t 0 , the voltage across the coil is
36. For the R – L circuit shown in the figure, 120 V, the value of resistance R is :
the input voltage vi (t ) u (t ). The current
i(t) is :
AA [GATE – EC – 2010]
44. In the circuit shown, the switch S is open for
a long time and is closed at t = 0. The
current i(t ) for t 0 is :
(A) 0 (B) Rs I s
L
( R Rs ) I s
(C) (D)
L
www.targate.org Page 73
NETWORK
A8.0 – 8.3[GATE–S2–EC–2017]
51. The switch in the circuit, shown in the
figure, was open for a long time and is
closed at t = 0.
t
R(t ) R0 1 for 0 t T
t
where R0 1 , and C = 1 F. We are also
given that T = 3 R0C and the source voltage
is Vs = 1V. If the current at time t = 0 is 1 A,
then the current I(t), in amperes, at time t =
T/2 is _____ (rounded off to 2 decimal
places).
www.targate.org Page 75
NETWORK
Answer :
1. 2. 3. 4. 5. 6. 7. 8. 9. 10.
C D C A B B D B B B
11. 12. 13. 14. 15. 16. 17. 18. 19. 20.
A A A C A B A B B D
21. 22. 23. 24. 25. 26. 27. 28. 29. 30.
C A C A A A B A 2 *
31. 32. 33. 34. 35. 36. 37. 38. 39. 40.
A B C A A C C C C B
41. 42. 43. 44. 45. 46. 47. 48. 49. 50.
A B A A D * * D * *
51. 52. 53. 54. 55. 56. 57. 58.
* A * * * * * *
30. 4.32
46. 31.24 to 31.26
47. –30
49. 1.9 to 2.1
50. 1.55 to 1.65
51. 8.0 to 8.3
53. 0.284 to 0.348
54. 3.2 to 3.4
55. 0.23 to 0.27
56. 0.45 to 0.47
57. 1.87 to 1.91
58. 4
3.2 RC Circuit
AB[IES – EC – 1991]
1. In the circuit shown, the switch closes at
t = 0. The voltage across 4µF capacitor in
ideal condition is :
(A) 1, 2 (B) 2, 3
(C) 1, 3 (D) 2, 4
AC[IES – EC – 1992]
5. The voltage across R after t = 0 and t = 1
sec, will be
(A) 0 (B) 16 V
(C) 15 V (D) 24 V
AC[IES – EC – 1991]
2. The circuit shown in the figure is excited by
V (t). The peak voltage at the capacitor is
(A) 100 V, 632 V
(B) 0 V, 63.2 V
(C) 100 V, 36.8 V
AD[IES – EC – 1991]
3. The time constan for the circuit shown
below is :
www.targate.org Page 77
NETWORK
(A) 6 µs (B) 10 µs
(C) 15 µs (D) 25 µs The current through the capacitor will
decrease exponentially with a time constant
AA[IES – EC – 1998]
10. In the network shown in the figure, the (A) 0.5 s (B) 1 s
switch had remained closed for a long time
on the 10V source side. It at time t = 0, it is (C) 2 s (D) 10 s
changed to the 12 V side, then after one time
constant, the voltage across 5Ω in the circuit AC [IES - EE - 2002]
will be : 14.
(A) 2 K (B) 3 K
(B)
(C) 5 K (D) 10 K
AC[IES – EC – 2002]
15. For the following circuit a source of
v1(t) e2t is applied
(C)
dv dv
The capacitor in the circuit as shown (A) C Gv 0 (B) G Cv 0
dt dt
above is initially charged to 12 V with S1
and S2 open. S1 is closed at t = 0 while S2 1 dv dv
is closed at t = 3. The waveform of the (C) Gv 0 (D) C Gv 0
C dt dt
capacitor is represented by
AD [IES - EE - 2005]
(A) 20. In the circuit given below, the steady state is
attained with S open. S is closed at t = 0.
What is the value of current I at t = 0+ ?
www.targate.org Page 79
NETWORK
(A) 50 V, 90 mA
(B) 50 V, 100 mA
(A) 0.05 F (B) 0.1 F
(C) 50 V, 110 mA
(D) 50 V, 120 mA (C) 0.15 F (D) 0.2 F
1 1
(A) 0 V and 0.1 sec (A) (1 e t )and (1 e t )
2 2
(B) 20 V and 0.2 sec
t t
(C) 10 V and 0.2 sec (B) (1 e )and(1 e )
(D) 10 V and 0.1 sec 1 1
(C) (1 e t )and (1 e t )
2 2
AD [IES – EC – 2010]
31. In the circuit shown below, switch S is 1 1
(D) (1 et )and (1 et /2 )
closed at t = 0. The time constant of the 2 2
circuit and initial value of current i ( t ) are
AD [GATE - EE - 1992]
35. The time constant of the network shown in
Fig. is :
www.targate.org Page 81
NETWORK
(C) V
(D) V exp(-T/RC)
A [GATE - EE - 1999]
41. In the given circuit, the capacitor is initially
charged to 12 V. Find the mathematical
expression for the voltage across the
AB[GATE - EC - 1994]
capacitor VC after closing the switch at t = 0.
37. A ramp voltage, v(t) = 100 t Volts, is applied
to an RC differentiating circuit with R = 5
k and C = 4 F . The maximum output
voltage is :
(A) 0.2 volt (B) 2.0 volts
(C) 10.0 volts (D) 50.0 volts
AD [GATE - EE - 1996]
38. In the series RC circuit shown in Fig. the
voltage across C starts increasing when the
d.c. source is switched on. Therate of
AC [GATE - EE - 2002]
increase of voltage across C at the instant
42. An 11 V pulse of 10 s duration is applied
just after the switch is closed (i.e., at t = 0+),
will be : to the circuit shown in Fig. Assuming that
the capacitor is completely discharged prior
to applying the pulse, the peak value of the
capacitor voltage is
(A) 3 V (B) – 3 V
(C) 4 V (D) – 4 V
AC [GATE - EC - 2006]
(A) 20 V (B) 10 V 48. In the figure shown below, assume that all
the capacitors are initially uncharged. If
(C) 5 V (D) 0 V
vi (t) 10u(t) Volts, v0(t) is given by
Statement for Linked Answer for Next Two
Questions :
In the circuit shown below, the current through the
PMMC meter is assumed to be zero. The ideal
switch toggles between position 1 and position 2.
For each position, it is connected for time T/2.
Assume R4 C x T / 2 and R2 C x T / 2 .
(A) 8e0.004t Volts
2Vs R2Cx
(C)
T
2Vs R4C x
(D)
T
www.targate.org Page 83
NETWORK
Assume that the capacitor has zero initial (A) 1/9 s (B) 1/4 s
charge. Given that u(t) is a unit step (C) 4 s (D) 9 s
AB [GATE - EE - 2010]
56. The switch in the circuit has been closed for
a long time. It is opened at t = 0. At t = 0+,
the current through the 1 F capacitor is
AC [GATE – EE – 2014]
60. A combination of 1F capacitor with an
initial voltage vc (0) 2V in series with a
100 resistor is connected to a 20 mA ideal
(A) 0 A (B) 1 A
dc current source by operating both switches
(C) 1.25 A (D) 5 A at t = 0 s as shown. Which of the following
graphs shown in the options approximates
AA [GATE – EC – 2011] the voltage v s across the current source over
57. In the circuit shown below, the intial charge
on the capacitor is 2.5 mC, with the voltage the next few seconds ?
polarity as indicated. The switch is closed at
time t = 0. The current i(t) at a time t after
the switch is closed is :
AD [GATE - EE - 2012]
58. In the following figure, C1 and C2 are ideal
capacitors. C1 Has been charged to 12 V
(B)
before the ideal switch S is closed at t = 0.
The current i(t) for all t is
(C)
(A) Zero
(B) A step function
(C) An exponentially decaying function
(D) An impulse function
A1.5-1.6 [GATE-IN-2014]
59. In the circuit shown in the figure, initially
(D)
the capacitor is uncharged. The switch ‘S’ is
closed at = 0. Two milliseconds after the
switch is closed, the current through the
capacitor (in mA) is ___________.
www.targate.org Page 85
NETWORK
(A)
(B)
(C) Rx kRref
AA [GATE – EC – 2014]
62. In the figure shown, the capacitor is initially (D) Rx Rref ln k
uncharged. Which one of the following
expressions describes the current I(t) (in Ano answer is matching [GATE-EE-2014]
mA) for t > 0? 64. The switch SW shown in the circuit is kept
at position ‘1’ for a long duration. At t = 0+,
the switch is moved to position ‘2’.
Assuming | V02 | | V01 | , the voltage vc (t)
across the capacitor is :
(A) I (t ) 5 (1 e t / ), 2 msec
3 3
(B) I (t ) 5 (1 e t / ), 2 msec
2 3 (A) vc (t)= V02 (1 e
t/2RC
) V01|
(C) I (t ) 5 (1 e t / ), 3 msec (B) vc (t)=V02 (1 e t/2RC ) V01
3
(C) vc (t)= (V02 V01)(1 et/2RC ) V01
(D) I (t ) 5 (1 e t / ), 3 msec
2
(D) v c (t)=(V02 V01 )(1 e t/2RC ) V01
A6.8-7.2 [GATE–S8–EE–2016]
72. In the circuit shown below, the initial
capacitor voltage is 4 V. Switch S1 is closed
at t = 0. The charge (in µC) lost by the
capacitor from t = 25 µs to t = 100 µs is
A 95.35[GATE – IN – 2015] _________.
68. The output frequency of an LC tank
oscillator employing a capacitive sensor
acting as the capacitor of the tank is 100
kHz. If the sensor capacitance increases by
10%, the output frequency in kilo-hertz
becomes ____ kHz.
A 3.678[GATE – IN – 2015]
69. The capacitor shown in the figure is initially
charged to +10 V. The switch closes at time
t = 0. Then the value of v c ( t ) in volts at
A1.43-1.63 [GATE – IN – 2017]
time t = 10 ms is ____ V. 73. In the circuit diagram, shown in the figure,
S1 was closed and S2 was open for a very
long time. At t = 0, S1 is opened and S2 is
closed. The voltage across the capacitor, in
volts, at t = 5 s is ________.
www.targate.org Page 87
NETWORK
(A) 1 A (B) 2 A
(C) 3 A (D) 4 A
***********
Answer :
1. 2. 3. 4. 5. 6. 7. 8. 9. 10.
B C D C C A C C A A
11. 12. 13. 14. 15. 16. 17. 18. 19. 20.
C B B C C D A B A D
21. 22. 23. 24. 25. 26. 27. 28. 29. 30.
C B B C C B A B A D
31. 32. 33. 34. 35. 36. 37. 38. 39. 40.
D A C C D X B D X A
41. 42. 43. 44. 45. 46. 47. 48. 49. 50.
X C A C B B B C A A
51. 52. 53. 54. 55. 56. 57. 58. 59. 60.
A C C D C B A D * C
61. 62. 63. 64. 65. 66. 67. 68. 69. 70.
A A C * * * * * * D
71. 72. 73. 74. 75.
* * * * X
www.targate.org Page 89
NETWORK
AC [GATE - EC - 1995]
4. A DC voltage source is connected across a
series R-L-C circuit. Under steady-state (A)
conditions, the applied DC voltage drops
entirely across the
(B)
List - II
(3)
(A) 0 (B) 5 V
(C) 10 V (D) 15 V
(4)
AC[IES – EC – 1999]
11. In the circuit shown in the Fig., i(t) is a unit
step current. The steady-state value of v(t) is
Codes:
A B C D
(A) 4 3 1 2
(B) 3 4 1 2
(C) 3 4 2 1 (A) 2.5 V (B) 1 V
(D) 4 3 2 1
(C) 0.1 V (D) zero
AC[IES – EC – 1997]
8. In the network shown in the Fig., the switch AB[IES – EC – 1999]
'S' is closed and a steady state is attained. If 12. On closing switch 'S', the circuit in the given
the switch is opened at t = 0, then the current Fig. is steady-state. The current in the
i(t) through the inductor will be inductor after opening the switch 'S' will
www.targate.org Page 91
NETWORK
AA[IES – EC – 2001]
16. The circuit shown in the given figure is in
steady state with the switch S closed
AB [IES - EE - 2001]
2t
15. If i 10e , then voltage of the source of
the given circuit, Vs is given by
The impedance Z(s) in the above circuit is
(A) 1 2 s ( R / L)
C s ( R / L)s (1/ LC )
(C) 1 2 s ( R / L)
(A) 10e2t (B) 20e2t L s (1/ RC)s (1/ LC)
AB [IES - EE - 2004]
19. Consider the following circuit:
(D) Zero, V
R
(A) Undamped sinusoidal
AA[IES – EC – 2008]
(B) Overdamped 24. In the circuit shown in the figure given
below, the switch is closed at t = 0. What is
(C) Underdamped the initial value of th0e current through the
(D) Critically damped capacitor?
AB [IES - EE - 2006]
21. In the circuit shown below, the constant
current source of value I is switched on at t =
0. What are the values of currents i1 and i2
at t = 0, with zero initial conditions?
www.targate.org Page 93
NETWORK
AC[IES – EC – 2010]
30. In the circuit shown below, the switch is
closed after a long time. The current iS (0+)
through the switch is :
The network shown above is initially at
rest. What is the initial current I when the
switch S is closed at t = 0?
(A) 0 A (B) 5 A
(C) 10 A (D) 20 A
AB [IES - EE - 2009]
27. The circuit as shown below is in the steady (A) 1 A (B) 2/3 A
state. The switch S is closed at t = 0.
(C) 1/3 A (D) 0 A
AC[IES – EC – 2011]
31. In the circuit shown, the switch is opened at
t = 0. The circuit is
dV
What are the values of V and at
dt
t 0 ?
(A) 0 and 4 (B) 4 and 0 (A) Critically damped
(C) 2 and 0 (D) 0 and 2 (B) Under – damped
(C) Over – damped
AA [IES - EE - 2010]
28. For the given circuit, the initial inductor (D) Undamped
current and the voltage across the capacitor AB [IES - EE - 2011]
are zero and 2, respectively. When the 32.
switch S is closed at t = 0, the values of υ
and d υ are, respectively
dt
(B)
A [GATE - EC - 1994]
36. The circuit shown in Fig. below, is initially
in its steady-state. The switch is opened at
(C) t=0
(1) Determine the initial voltage, VC(0),
across the capacitor, and the initial
current, iL (0), through he inductor.
(2) Calculate the voltage, vL (t), across the
inductance for t > 0.
(D)
AA[IES – EC – 2011]
33.
A [GATE - EE - 1998]
37. The switch in the following circuit, shown in
Fig. has been connected to the 12 V source
for a long time. At t = 0. The switch is
The circuit shown in the figure is in steady thrown to 24 V.
state before the switch is closed at t = 0. The
current is (0 ) through the switch is
1 2
(A) A (B) A
3 3
(C) 1 A (D) 0 A
(A) Determine iL (0) and VC (0)
AB [GATE - EC - 1989]
34. A 10 resistor, a 1 H inductor and 1 F (B) Write the differential equation
capacitor are connected in parallel. The governing VC (t) for t > 0
combination is driven by a unit step current.
Under the steady state condition, the source (C) Compute the steady state value of VC(t)
current flows through: L=2 H,R1 =10 Ω,R2=2 Ω, C=0.25µF
(A) the resistor
A [GATE - EC - 2001]
(B) the inductor 38. The circuit shown in Fig. is operating in
(C) the capacitor only steady-state with switch S1 closed.
(D) all the three elements The switch S1 is opened at t = 0.
AA [GATE - EE - 1992]
35. In the circuit of Fig. the switch ‘S’ is closed
at t = 0 with iL (0) 0 and vC (0) 0. In the
steady state vC equals
www.targate.org Page 95
NETWORK
AB [GATE - EE - 2003] 1
39. In the circuit shown in Fig. the switch S is (D)
R Ls
Cs
Ls I1 ( s ) V
s
closed at time t = 0. The voltage across the 1 I 2 ( s )
Ls R Ls 0
inductance at t = 0+, is Cs
AB [GATE - EC - 2004]
42. The circuit shown in the figure has initial
current iL (0 ) 1A through the inductor and
an initial voltage vc (0 ) 1V across the
capacitor. For input v(t) = u(t), the Laplace
transform of the current i(t) for t 0 is
(A) 2 V (B) 4 V
(C) – 6 V (D) 8 V
Common Data for Next Two Questions :
The circuit for next two questions are given in Fig.
Assume that the switch S is in position 1 for a long
time and thrown to position 2 at t = 0. s s2
(A) (B)
s2 s 1 s2 s 1
(C) 2 s 2 (D) 2 s 2
s s 1 s s 1
AC [GATE - EC - 2005]
43. The condition on R, L and C such that the
step response y(t) in the figure has no
oscillations, is :
AA [GATE - EC - 2003]
40. At t = 0 , the current i1 is
(A) V (B) V
2R R
1
R Ls Ls V
(B) Cs
I1 ( s )
s
1 I 2 (s)
Ls R 0
Cs
(A) 0 and V
1
(C)
R Ls Ls I1 ( s ) V (B)
V VR2
Cs
s and
1 I 2 ( s ) R1 R1 R2
Ls R Ls 0
Cs
V VR2 1 3
t
1
t
(C) and (A) 2
e 2
R1 R2 R1 R2 e
3
V
(D) and V 3t 1
R1
1
t 3t
(B) e 2
cos sin
2 3 2
AD [GATE - EE - 2007]
45. In the circuit shown in Fig. switch Sw1 is 2 12 t 3t
initially CLOSED and Sw2 is OPEN. The (C) e sin
3 2
inductor L carries a current of 10 A and the
capacitor is charged to 10 V with polarities
as indicated. Sw2= is initially CLOSED at t = 2 12 t 3t
(D) e cos
0- and Sw1 is OPENED at t = 0. The current 3 2
through C and the voltage across L at t = 0+
is Statement for Linked Answer Questions for Next
Two Questions :
The L-C circuit shown in the figure has an
inductance L = 1 mH and a capacitance C 10F .
(A) 55 A, 4.5 V
(B) 5.5 A, 45 V
(C) 45 A, 5.5 V
(D) 4.5 A, 55 V AD [GATE – EE – 2010]
Common Data for Next Two Questions : 48. The initial current through the inductor is
The following series RLC circuit with zero initial zero, while the initial capacitor voltage is
conditions is excited by a unit impulse function 100 V. The switch is closed at t = 0. The
(t ) . current ‘i’ through the circuit is :
3
(A) 5cos(5 10 t)A
4
(B) 5sin(10 t)A
3
(C) 10cos(5 10 t)A
4
(D) 10sin(10 t)A
AA [GATE – EE – 2010]
AD [GATE – EC – 2008] 49. The L-C circuit of given figure is used to
46. For t > 0, the output voltage V c (t ) is : commutate a thyristor, which is initially
carrying a current of 5A as shown in the
2 12 t t
3
figure below. The values and initial
(A) e e 2
3 conditions of L and C are the same as in
previous question. The switch is closed at t =
1
2 t 0. If the forward drop is negligible, the time
2
(B) te taken for the device to turn off is
3
2 12 t 3
(C) e cos t
3 2
2 12 t 3
(D) e sin t
3 2
AB [GATE – EC – 2008]
(A) 52s (B) 156s
47. For t > 0, the voltage across the resistor is
(C) 312s (D) 26s
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NETWORK
A99-101 [GATE–S3–EC–2016]
52. The switch S in the circuit shown has been
closed for a long time. It is opened at time t
= 0 and remains open after that. Assume that
the diode has zero reverse current and zero
forward voltage drop.
***********
Answer :
1. 2. 3. 4. 5. 6. 7. 8. 9. 10.
D C B C B A D C C B
11. 12. 13. 14. 15. 16. 17. 18. 19. 20.
C B C C B A D A B D
21. 22. 23. 24. 25. 26. 27. 28. 29. 30.
B A C A B C B A B C
31. 32. 33. 34. 35. 36. 37. 38. 39. 40.
C B A B A X X X B A
41. 42. 43. 44. 45. 46. 47. 48. 49. 50.
C B C B D D B D A *
51. 52.
* *
50. 1.25
51. 9.99 to 10.01
52. 99 to 101
www.targate.org Page 99
NETWORK
t
(B) i f (i f i i )e T
(A) 100 amp/sec
t
(B) -100 amp/sec (C) i i (i f i i )e T
(A) 1 V (B) 2 V
-------0000-------
(A)
(A) 10 V
(B) 15 V
(B)
(C) 27 V
(D) 5 V
AD[IES – EC – 1995]
2. Two impedances are connected in series.
The 3voltmeters, one conneted across each
impedance and one across te combination,
read equal value. The phase angle between
the voltages across the two impedance is (C)
(A) 300 (B) 600
(C) 900 (D) 1200
AC[IES – EC – 1996]
3. In the series RC circuit shown in the given
figure, the rms value of the voltage E is 1 V.
(D)
If the average power dissipated is equal to
500 mW, then the phase angle between the
voltage and current will be
AA[IES – EC – 1999]
5. In the circuit shown in he Fig. if R0 is
adjusted such that VAB VBC , then
(C)
AA [GATE – EE – 1998]
9. A sinusoidal source of voltage V and
frequency f is connected to a series circuit of
AD [GATE - EC - 2007]
14. In the AC network shown in the figure, the
phasor voltage VAB (in Volts) is
(D)
AD [GATE – EE – 2004]
12. In figure, the admittance values of the
elements in Siemens are YR 0.5 j 0 ,
YL 0 j1.5 , YC 0 j 0.3 respectively. (A) 0 (B) 5300
The value of I as a phasor when the voltage (C) 12.530 0 (D) 17300
E across the elements is 1000 V is
A AA [GATE – EE – 2007]
15. The R-L-C series shown is supplied from a
variable frequency voltage source. The
admittance-locus of the R-L-C network at
terminals AB for increasing frequency is
(A) 1.5 + j0.5 (B) 5 – j18
(C) 0.5 + j1.8 (D) 5 – j12
AA [GATE – EE – 2006]
13. The circuit shown in the figure is energized
by a sinusoidal voltage source V1 at a
frequency which causes resonance with a
current of I.
(A)
(B)
(C)
(C)
(D)
(D)
AB [GATE – EE – 2015]
20. In the given network V1 10000 V ,
(B)
V2 1001200 V, V3 1001200 V. The
phasor current I (in Ampere) is
(C)
(D)
0
(A) 173.2 60
(B) 173.21200
0
AB [GATE – EE – 2011] (C) 100.0 60
17. The voltage applied to a circuit is (D) 100.01200
100 2 cos(100t) volts and the circuit
AA [GATE – IN – 2018]
draws a current of 10 2 sin(100t / 4) 21. A series R-C circuit is excited by a 10V
amperes. Taking the voltage as the reference sinusoidal ac voltage source. The locus
phasor, the phasor representation of the diagram of the phasor current I ( x jy )A ,
current in amperes is
when C is varied, while keeping R fixed, is
(A) 10 2 / 4
(B) 10 / 4
(C) 10 / 4
(A)
(D) 10 2 / 4
AD [GATE – EE – 2012]
18. A two-phase load draws the following phase
current:
i1 (t ) I m sin(t 1 ), i2 (t ) I m cos(t 2 ) T
hese currents are balanced if 1 is equal to (B)
(A) 2 (B) 2
(C) ( / 2 2 ) (D) ( / 2 2 )
A20000 [GATE-IN-2019]
23. In the circuit shown below, the angular
frequency at which the current is in
(C) phase with the voltage is _____ rad/s.
(D)
-------0000-------
AB [GATE – EE – 2018]
22. A DC voltage source is connected to a series
L-C circuit by turning on the switch S at
time t 0 as shown in the figure. Assume
i(0) 0 , v(0) 0 . Which one of the
following circular loci represents the plot of
i(t) versus v(t) ?
(A)
(B)
(C)
(D)
Answer :
1. 2. 3. 4. 5. 6. 7. 8. 9. 10.
D D C A A C B * A A
11. 12. 13. 14. 15. 16. 17. 18. 19. 20.
A D A D A A B D A B
21. 22. 23.
A B *
8. 60 0
23. 20000
AD [IES - EE - 2011]
4.
s 1
VC ( s )
s3 s2 s 1
(A) 0.5 A
(B) 2.0 A
(C) 1.0 A
(D) 0.0 A
AA [GATE - EC - 2011]
7. If the unit step response of a network is
(1 e t ), then its unit impulse response is
t 1 t
(A) e (B) e
1 t t
(C) (1 )e (D) (1)e
-------0000-------
Answer :
1. 2. 3. 4. 5. 6. 7.
C C D D C A A
-------0000-------
Answer :
1. 2. 3. 4. 5. 6. 7. 8.
A C A * B B A 10
-3
4. 100, 10
AA[IES – EC – 1991]
4. A series circuit consisting of a resistance an
inductance and a variable capacitance is
connected to a voltage source of fixed
voltage and frequency.The capacitance value
required for resonance is Cr. The variation of
the capacitance between half-power is ΔC.
L 2
(A) R12 R22 C
C The value of ΔC for <<1 is (Note.
Cr
L Qr is Q factor at resonance.)
(B) R12
C
(A) 2 C r (B) Q r
L L Qr 2C r
(C) R andR22
2
1
C C
2Q r 1
(C) (D)
L L Cr 2CrQr
(D) R andR22
2
1
C C
AB[IES – EC – 1992]
AA[IES – EC – 1991] 5. In a series R - L - C circuit excited by a
3. In a series resonance circuit consisting of R,
voltage, e = E sin Ωt, where LC < 12
L and C if LO is the value of L at resonance.
LA is the value of L at the lower half
frequency fA, LB is the value of L at the (A) current lags the applied voltage
upper half frequency fB, Q0 is the quality
factor at resonance, then the value of (B) current leads the applied voltage
L0 (C) current is in phase with the applied
is :
LB L A voltage
(D) voltage across L and C are equal
Q0
(A) (B) 2Q 0
2 AC[IES – EC – 1993]
6. A choke coil having a resistance of R ohms
Q0 and an inductance of L Henries is shunted by
(C) 2 (D)
Q0 4 a capacitor of C farads. The dynamic
impedance of the circuit at resonance will be
www.targate.org Page 114
Topic.07 – Resonance
(A) R/LC (B) C/RL Reason (R) : Series resonance implies unity
power factor condition.
(C) L/RC (D) 1/RLC
Codes :
AA[IES – EC – 1993]
7. An electric circuit contains R, L and C in (A) Both A and R are true and R is the
series with a voltage source. The current correct explanation of A
through the circuit is I0. The frequencies at
(B) Both A and R are true but R is NOT a
which the current would reduce to 0.707 I0
correct explanation of A
are given by f01 and f02 .The resonant
frequency of the circuit is the (C) A is true but R is false
(A) geometric mean of f01 and f02 (D) A is false but R is true
2. For a series RLC circuit, voltage (A) Both A and R are true and R is the
across C is minimum correct explanation of A
3. For a series RLC circuit, current is (B) Both A and R are true but R is NOT
maximum a correct explanation of A
4. For a parallel RLC circuit, total (C) A is true but R is false
impedance is maximum.
Of the statements (D) A is false but R is ture
AB[GATE - EC - 1990]
23. The resonant frequency of the series circuit
shown in figure is :
(C) 4 (D) 5
AB [GATE – IN – 2010]
46. The Q-factor of the coil at an angular
frequency of 1000 rad/s is
(A) 1 (B) 2
(C) 4 (D) 5
AC [GATE – EC – 2013]
47. Two magnetically uncoupled inductive coils
have Q factors q1 and q2 at the chosen
operating frequency. Their respective
resistance are R1 and R 2 . When connected
in series, their effective Q factor at the same
operating frequency is :
(A) q1 q2
(B) (1 / q1 ) (1 / q2 )
(C) ( q1 R1 q2 R2 ) / ( R1 R2 )
(D) ( q1 R2 q2 R1 ) / ( R1 R2 )
A2 [GATE – EC – 2014]
48. In the circuit shown in the figure, the A 100[GATE – IN – 2015]
angular frequency (in rad/s), at which the 52. The circuit shown in the figure is in series
Norton equivalent impedance as seen resonance at frequency fc Hz. The value of
fromterminals b-b’ is purely resistive, is ----. Vc in volts is ______ V.
A AB [GATE – EE – 2014]
49. A series RLC circuit is observed at two
A0.30-0.34 [GATE–S3–EC–2016]
frequencies. At 1 1krad/s , we note that
53. The figure shows an RLC circuit with a
source voltage V1 10000 V results in a sinusoidal current source.
current I1 0.03310 A . At 2 2 krad/s,
the source voltage V2 10000 V results in
a current I 2 200 A . The closest values
for R, L, C out of the following options are
(A) R 50 ; L 25mH; C =10F
At resonance, the ratio | I L | / | I R | , i.e., the
(B) R 50 ; L 10 mH; C =25F
ratio of the magnitudes of the inductor
(C) R 50 ; L 50mH; C =5F current phasor and the resistor current
phasor, is ________
(D) R 50 ; L 5mH; C =50F
A6-7 [GATE – IN – 2017]
AB [GATE – EC – 2015] 54. A series R-L-C circuit is excited with an
50. An LC tank circuit consists of an ideal A.C voltage source. The quality factor (Q)
capacitor C connected in parallel with a coil of the circuit is given as Q = 30. The
of inductance L having an internal resistance amplitude of current in ampere at upper half-
R. The resonant frequency of the tank circuit power freqneucy will be _______.
is :
1
(A)
2 LC
1 C
(B) 1 R2
2 LC L
1 L
(C) 1 2 A1009-1011 [GATE – IN – 2018]
2 LC R C 55. A coil having an impedance of
1 C (10 j100) is connected in parallel to a
(D) 1 R2
2 LC L variable capacitor as shown in figure.
Keeping the excitation frequency
A25 [GATE – EC1 – 2015] unchanged, the value of the capacitor is
51. In the circuit, shown at resonance, the changed so that parallel resonance occurs.
amplitude of the sinusoidal voltage (in The impedance across terminals p-q at
Volts) across the capacitor is ______ . resonance (in ) is ______.
AB [GATE-IN-2019]
56. If each of the values of inductance and
resistance of a series LCR circuit are
doubled, the Q-factor of the circuit would
-------0000-------
Answer :
1. 2. 3. 4. 5. 6. 7. 8. 9. 10.
C D A A B C A C B A
11. 12. 13. 14. 15. 16. 17. 18. 19. 20.
B B B A C B D A B C
21. 22. 23. 24. 25. 26. 27. 28. 29. 30.
D AD B A B A B D * D
31. 32. 33. 34. 35. 36. 37. 38. 39. 40.
B D C D B B B D D B
41. 42. 43. 44. 45. 46. 47. 48. 49. 50.
B D C D D B C 2 AB B
51. 52. 53. 54. 55. 56.
* * * * * B
29. 0.032
51. 25
52. 100
53. 0.30 to 0.34
54. 6 to 7
55. 1009 to 1011
1 1 L1 1
(A) (B) (A)
3 4 R1 C4 R4
2 3 (B)
L1
(C) (D) C 4 R4
3 4 R1
L1
(C) tan 1 tan 1 C 4 R 4 0
R1
L1 1
(D) tan 1 tan 1 0
R1 C 4 R4
AC[IES – EC – 2000]
7. The circuit shown in the below figure, will
act as an ideal current source with respect to The voltage V0 is independent of R, if the
terminals A and B, when frequency is input signal frequency is :
1 1
(A) (B)
LC 2 LC
AA[IES – EC – 2007]
(A) zero (B) 1 rad / s 11. What is the approximate steady state current
(C) 4 rad / s (D) 16 rad / s in the given below circuit?
AA[IES – EC – 2000]
8. In the below circuit, if the power dissipated
in the 6 resistor is zero then V is :
(A) 50 A (B) 25 A
(C) 5 A (D) 1 A
AA [GATE - EC - 1987]
12. The value of current through the 1 Farad
(A) 20 2450 (B) 20300 capacitor of figure is :
(C) 20450 (D) 20 2 30 0
AB[IES – EC – 2002]
9. The steady-state response of a network to
the excitation Vcos( t + ) may be found
in three steps. The first two steps are as
follows:
(A) zero (B) one
1. Determining the response of the
(C) two (D) three
network to the excitation e jt
2. Multiplying the above response by AC [GATE - EC - 1993]
V Ve j 13. In figure, A1 , A2 and A3 are ideal ammeters.
The third step is If A1 reads 5A, A2 reads 12 A, then A3
(A) finding the complex conjugate of the
should read
expression after step 2
(B) finding the magnitude of the expression
after atep 2
(C) finding the real part of the expression
after step 2
(D) finding the imaginary part of the
expression after step 2
AA[IES – EC – 2004]
10. For the circuit given below, which one of the
(A) 7 A (B) 12 A
following statements is correct?
(C) 13 A (D) 17 A
AD [GATE – EE – 1993]
14. In the following circuit, i(t) under steady
state is
AC [GATE - EC - 1995]
15. The current, i(t), through a 10- resistor in
series with an inductance, is given by
(A) 12 V (B) 10 V
(C) –6 V (D) 8 V
AC [GATE – EE – 2003]
21. In the circuit of figure, the magnitudes of V L
and V C are twice that of V R . Given that
(A)
sin(103 t 450 )
f = 50 Hz, the inductance of the coil is
3 0
(B) sin(10 t 45 )
3 0
(C) sin(10 t 53 )
3 0
(D) sin(10 t 53 )
AA [GATE - EC - 2005]
25. For the circuit shown in the figure the
(A) 2.14 mH (B) 5.30 mH instantaneous current i1(t) is
(C) 31.8 mH (D) 1.32 mH
AC [GATE - EC - 2003]
22. An input voltage v(t) =
10 5 cos(t 100 ) 10 5 cos(2t 100 )V is
applied to a series combination of resistance
R = 1 and an inductance L = 1H. The
resulting steady state current i(t) in ampere
is 10 3
(A) 90 0 A
0 0 1 2
(A) 10cos(t 55 ) 10cos(2t 10 tan 2)
3 10 3
0 (B) 90 0 A
(B) 10 cos(t 55 ) 10 cos(2t 55) 2
2
0 0 1 (C) 5600 A
(C) 10cos(t 35 ) 10cos(2t 10 tan 2)
(D) 5 60 0 A
3
(D) 10 cos(t 35) 10 cos(2t 350 )
2 AD [GATE – EE – 2006]
26. In the circuit shown in the figure, the current
AA[GATE - EC - 2004]
23. The circuit shown in figure, with R = 1/3 , source I 1A , the voltage source V 5V ,
L = 1/4, C = 3 F has input voltage v(t) = sin R1 R2 R3 1 , L1 L2 L3 1H ,
2t. The resulting current i(t) is : C1 C2 1F . The currents (in A) through
R 3 and the voltage source V respectively
will be
0
(A) 5sin(2t 53.1 )
0
(B) 5sin(2t 53.1 )
(A) 1, 4 (B) 5, 1
0
(C) 25sin(2t 53.1 ) (C) 5, 2 (D) 5, 4
0
(D) 25sin(2t 53.1 ) AA [GATE – IN – 2007]
27. In the circuit shown in the figure, the input
AA [GATE - EC - 2004] signal is vi (t ) 5 3cos t .
24. For the circuit shown in the figure, the time
constant RC = 1 ms. The input voltage is The steady state output is expressed as
vi (t ) 2sin103 t. The output voltage v0 (t ) v0 (t ) P Q cos(t ) . If C R 2 , the
is equal to values of P and Q are
6
(A) P 0 and Q
5 (A) j 1 A (B) j 1 A
(C) 0 A (D) 20 A
3
(B) P 0 and Q
5 AA [GATE - EC - 2011]
31. The circuit shown below is driven by a
6 sinusoidal input vi Vp cos(t / RC). The steady
(C) P 5 and Q
5
output v0 is :
(D) P 5and Q 3
A A [GATE - IN - 2008]
28. For the circuit shown below the steady-state
current I is
(B) (V p / 3)sin(t / RC )
(C) (0 + j100) V
AB [GATE – EE – 2011]
(D) (0 – j100) V 33. The power dissipated in the resistor R is
AA [GATE - EC - 2010] (A) 0.5 W (B) 1 W
30. The current I in the circuit shown is
(C) 2W (D) 2 W
AD [GATE – EE – 2011]
34. The current I C in the figure above is :
1
(A) –j2A (B) j A
2
1 2
1 (A) (B)
(C) j A (D) +j2A 3RC 3 RC
2 1 2
(C) (D)
Common Data for Next Two Questions: RC RC
Consider the circuit shown below A1.86 to 1.88 [GATE-IN-2014]
39. A capacitor ‘C’ is to be connected across the
terminals ‘A’ and ‘B’ as shown in the figure
so that the power factor of the parallel
combination becomes unity. The value of
the capacitance required in µF is________.
AA[GATE – IN – 2011]
35. The current i(t) through the capacitor is
(A) sin(5t )A
(B) cos(5t )A
0
(C) sin(5t 45 )A
(D) 1 A
AA[GATE – IN – 2011]
36. The average total power delivered by the AD [GATE – EC – 2014]
two sources is 40. In the circuit shown in the figure, the value
of node voltage V2 is :
(A) 0 W (B) 0.5 W
(C) 2 W (D) 4 W
AC [GATE –EC/EE/ IN – 2012]
37. In the circuit shown below, the current
through the inductor is
(A) 22 + j 2 V (B) 2 + j 22 V
(C) 22 – j 2 V (D) 2 – j 22 V
AA [GATE – EE – 2014]
41. The voltage across the capacitor, as shown
in the figure, is expressed as
2 1
(A) A (B) A Vc (t ) A1 sin(1t 1 ) A2 sin(2 t 2 )
1 j 1 j
1
(C) A (D) 0 A
1 j
AB [GATE – EC – 2014]
38. The steady state output of the circuit shown
in the figure is given The values of A1 and A2 respectively, are
by y t A sin t . If the amplitude
(A) 2.0 and 1.98
A 0.25, then the frequency is :
(B) 2.0 and 4.20
(A)
(B)
(C)
AMTA [GATE–S8–EE–2016]
47. A resistance and a coil are connected in
series and supplied from a single phase, 100
V, 50 Hz ac source as shown in the figure
AB [GATE–S4–EC–2016]
(A) 65, 35 (B) 50, 50 52. In the RLC circuit shown in the figure, the
input voltage is given by
(C) 60, 90 (D) 60, 803
vi (t ) 2 cos(200t ) 4sin(500t )
A1.0 [GATE–S6–EE–2016]
48. In the circuit shown below, the supply The output voltage v 0 (t ) is :
voltage is 10 sin(1000t) volts. The peak
value of the steady state current through the
1 Ω resistor, in amperes, is ____.
A99.5-100.5 [GATE–S4–IN–2016]
50. In the circuit shown below, VS 1010 V ,
R 10 and ΩL= 100 Ω. The current IS is
in phase with VS. The magnitude of IS in
milliampere is _________.
A0.30-0.40 [GATE–S1–EC–2017]
54. In the circuit shown, the voltage VIN t is
described by:
0, for t 0
VIN t
15Volts, for t0
A0.280-0.283 [GATE–S4–IN–2016]
51. In the circuit shown below (v1 + v2) = [1 Where t is in seconds. The time (in seconds)
sin(2 10000t) + 1 sin(2 30000t)] V. The at which the current I in the circuit will
RMS value of the current through the reach the value 2 Amperes is ______.
resistor R will be minimum if the value of
the capacitor C in microfarad is _______ .
Page 130 TARGATE EDUCATION GATE-(EE/EC)
Topic.08 – Sinusoidal Steady State Analysis
AC [GATE – EC – 2018]
58. For the circuit given in the figure, the
voltage V C (in volts) across the capacitor is
AD [GATE-EE-2019]
59. In the circuit shown below, the switch is
closed at t = 0. The value of in degrees
A2.55-2.65 [GATE–S1–EC–2017] which will give the maximum value of DC
56. The figure shows an RLC circuit excited by offset of the current at the time of switching
the sinusoidal voltage 100cos(3t) Volts, is :
where t is in seconds. The ratio
amplitude of V2
is _____
amplitude of V1
Answer :
1. 2. 3. 4. 5. 6. 7. 8. 9. 10.
A D A A B A C A B A
11. 12. 13. 14. 15. 16. 17. 18. 19. 20.
A A C D C B D A A C
21. 22. 23. 24. 25. 26. 27. 28. 29. 30.
C C A A A D A A D A
31. 32. 33. 34. 35. 36. 37. 38. 39. 40.
A B B D A A C B * D
41. 42. 43. 44. 45. 46. 47. 48. 49. 50.
A B * * * * * 1.0 * *
51. 52. 53. 54. 55. 56. 57. 58. 59. 60.
* B * * * * * C D D
10
(C) 150 (D)
2
AC[IES – EC – 1998] 8
3. A particular current is made up of two (A) I1will lead by tan 1 , I2 will lag by
6
components: a 10 A dc and a sinusoidal
8
current of peak value of 14.14 A. The tan 1 , .
average value of the resultant current is : 6
6
(A) zero (B) 24.14 A (B) I1 will lead by tan 1 , I2 will lag by
8
(C) 10 A (D) 14.14 A 6
tan 1
AA[IES – EC – 1999] 8
4. The average value of the periodic function 8
v(t) of the given Fig. is : (C) I1 will lag by tan 1 , I2 will lead by
6
1 8
tan
6
6
(D) I1 will lag by tan 1 , I2 will lead by
8
6
tan 1
8
www.targate.org Page 133
NETWORK
1
(A)
LC
1
(B)
LC R2C 2
1
(C) A 115.5 V[GATE – EE – 1992]
LC R 2C 2
12. Using Thevenin equivalent circuit,
1 determine the rms value of the voltage
(D) across the 100 ohm resistor after the switch
RC is closed in the 3-phase circuit shown in
AA [IES - EE - 2009] figure.
8. The current waveform as shown below, is
applied in a pure resistor of 10 . What is
the power dissipated in the resistor?
AD [GATE - EE - 1999]
16. When a periodic triangular voltage of peak
amplitude 1 V and frequency 0.5 Hz is
applied to a parallel combination of 1 5 2
(A) uRMS (B) uRMS
resistance and 1F capacitance, the current 8 3
through the voltage source has waveform
8 3
(C) uRMS (D) uRMS
(A) 5 2
AA [GATE – EE – 2005]
(B) 21. For the three-phase circuit shown in the
figure the ratio of the currents I R : I Y : I B is
(C) given by
(D)
AA [GATE – EE – 2002]
17. In the circuit shown in figure, what value of
C will cause a unity power factor at the ac
source ?
(A) 1:1: 3
(B) 1:1: 2
(C) 1:1:0
(A) 68.1F (B) 165 F (D) 1:1: 3/ 2
(C) 0.681F (D) 6.81F AC [GATE – IN – 2006]
22. The root-mean-square value of a voltage
A AD [GATE – EE – 2004] waveform consisting of a superimposition of
18. The rms value of the current in a wire which 2 V dc and a 4 V peak-to-peak square wave
carries a d.c. current of 10 A and a is :
sinusoidal alternating current of peak value
20 A is : (A) 2 V (B) 6V
(A) 10 A (B) 14.14 A
(C) 15 A (D) 17.32 A (C) 8V (D) 12 V
AB [GATE – EE – 2011]
30. The active power drawn by the convert is
(A) 181 W (B) 500 W
(C) 707 W (D) 887 W
AB [GATE – EE – 2011]
31. The input power factor of the converter is
(A) 8 VAR (B) 16 VAR (A) 0.31 (B) 0.44
(C) 28 VAR (D) 32 VAR (C) 0.5 (D) 1
AB [GATE – EE – 2011] AB[GATE – IN – 2012]
28. The r.m.s. value of the current i(t) in the 32. The average power delivered to an
circuit shown below is impedance (4 j 3) by a current
5cos(100 pt 100)A is
-------0000-------
Answer :
1. 2. 3. 4. 5. 6. 7. 8. 9. 10.
C C C A D C C A C C
11. 12. 13. 14. 15. 16. 17. 18. 19. 20.
* * D D A D A D A C
21. 22. 23. 24. 25. 26. 27. 28. 29. 30.
A C B B C D B B B B
31. 32. 33. 34. 35. 36. 37. 38. 39. 40.
B B B B A B B * C *
41. 42. 43. 44. 45. 46. 47. 48. 49.
* 0 5 * * 6 * * C
L1L2 M 2 L1 L2 M 2
(A) (B)
L1 L2 2 M L1 L2 2 M (A) 9 H (B) 21 H
AC [GATE – EE – 2002]
7. In the circuit shown in figure it is found that
the input ac voltage ( v i ) and current I are in
phase. The coupling coefficient is
M
K , where M is the mutual
AD [GATE - EC - 1995] L1 L2
3. Two 2H inductance coils are connected in inductance between the two coils. The value
series and are also magnetically coupled to of K and the dot polarity of the coil P-Q are
each other the coefficient of coupling being
0.1. The total inductance of the combination
can be
(A) 0.4 H (B) 3.2 H
(C) 4.0 H (D) 4.4 H
A1/9 [GATE – EE – 1997]
4. Two identical coils of negligible resistance (A) K = 0.25 and dot at P
when connected in series across a 200 V, 50
(B) K = 0.5 and dot at P
Hz source draws a current of 10 A. When
the terminals of one of the coils are reversed, (C) K = 0.25 and dot at Q
then current drawn is 8 A. The coefficient of
coupling between the two coils is _______. (D) K = 0.5 and dot at Q
AD [GATE - EC - 2004]
9. The equivalent inductance measured
between the terminals 1 and 2 for the circuit
shown in the figure is
(A) L1 L2 M (B) L1 L2 M
(C) L1 L2 2 M (D) L1 L2 2 M
AB [GATE - EC - 2005]
10. Impedance Z as shown in the given figure
is :
(A) j 29 (B) j9
Answer :
1. 2. 3. 4. 5. 6. 7. 8. 9. 10.
D * D * C D C X D B
11. 12.
* B
2. 8H
4. 1/9
11. 35
(A) 3 (B) 4
(C) 5 (D) 6
AC [GATE – EC – 2008]
10. In the following graph, the number of trees
(P) and the number of cut-sets (Q) are
(A) P = 2, Q = 2
(B) P = 2, Q = 6
(C) P = 4, Q = 6
(D) P = 4, Q = 10
Answer :
1. 2. 3. 4. 5. 6. 7. 8. 9. 10.
A B C C C A B B A C
11.
D
(C)
(D)
AB[IES – EC – 2004]
17. The input voltage V1 and current I1 for a
Z2 Z1
linear passive network is given by (A) (B)
Z1 Z2
V1 AV2 BI2
Z2 Z1
and I1 CV2 DI2 (C) 1 (D) 1
Z1 Z2
Now consider the following network:
AC[IES – EC – 2007]
21. A 2-terminal network consists of one of the
RLC elements. The element is connected to
an ac supply. The current through the
element is I A. When an inductor is inserted
in series between the source and the element,
Which one of the following is the transfer the current through the element becomes 2I
A. What is this element?
A B
matrix of the network shown (A) A resistor
C D (B) An inductor
above?
(C) An capacitor
1 0 1 10 (D) Cannot be a single element
(A) (B)
0 10 0 1 AD [GATE - EC - 1990]
22. The transfer function of a simple RC
0 1 0 10 network functioning as a controller is:
(C) (D)
10 0 1 0 Gc ( s )
s z1
s p1
AB[IES – EC – 2004]
18. Which one of the following is the transfer The condition for the RC network to act as a
function of an electrical low-pass filter using phase lead controller is:
R and C elements?
(A) p1 z1 (B) p1 0
(A) RCs (B) 1
1 R C s 1 R C s (C) p1 z1 (D) p1 z1
AA [GATE - EC - 1991]
23. The necessary and sufficient condition for a
rational function of s, T(s) to be a driving
point impedance of an RC network is that all
poles and zeros should be
(A) Simple and lie on the negative real axis
of the s - plane
(B) Complex and lie in the left half of the s
– plane
(C) Complex and lie in the right half of the
s – plane
(D) Simple and lie on the positive real axis
of the s - plane
AB [GATE - EC - 1992]
24. For the compensated attenuator of figure, the
impulse response under the condition
R1C1 R2C2 is :
AB [GATE – EE – 1997]
29. A major advantage of active filters is that
they can be realized without using
(A) op-amps (B) inductors
(C) resistors (D) capacitors
(A) 1 (B) 1
1
(C) 1 (D) 1 (A)
s 10 6 s 10 6
2
AC [GATE - EC - 2007]
40. The RC circuit shown in the figure is
0.2 s
Is given by Z(s) = . The
s 2 0.1s 2
component values are
-------0000-------
V3 S
The transfer function of the cascaded
V1 S
network is :
S S2
(A) (B)
1 S 1 3S S 2
2
S S
(C) (D)
1 S 2S
AA [GATE-EE-2014]
45. The driving point impedance Z(s) for the
circuit shown below is
s 4 3s 2 1 s4 2s2 4
(A) (B)
s3 2s s3 2
s2 1 s3 1
(C) (D)
s4 s 2 1 s4 s 2 1
AC [GATE – EC – 2015]
46. The damping ratio of a series RLC circuit
can be expressed as
R 2C
(A) (B) 22L
2L R C
R C 2 L
(C) (D)
2 L R C
Answer :
1. 2. 3. 4. 5. 6. 7. 8. 9. 10.
A B A B D AB D D A C
11. 12. 13. 14. 15. 16. 17. 18. 19. 20.
C B C C C C B B C A
21. 22. 23. 24. 25. 26. 27. 28. 29. 30.
C D A B BC C * * B B
31. 32. 33. 34. 35. 36. 37. 38. 39. 40.
D C B D D B A A A C
41. 42. 43. 44. 45. 46. 47.
D C D B A C *
27. 50 V
28. False
47. 19.5 to 20.5
2 3R AA[IES – EC – 1991]
(B)
1 / R 2 4. The 2-port network of Fig.A has open circuit
impedance parameters given by matrix
2 1/ R
(C)
3R 2
4 1/ R
(D)
3R 1
R R R O
(A) (B)
AD[IES – EC – 1991] R R O R
2. The input impedance of the circuit shown in
R R
the figure, if the respective coil impedance (C) (D)
Z1 = (5 + j8)Ω and Z2 = (3 + j 8) is R
R
AB[IES – EC – 1991]
5. The voltage transfer ratio for the network
shown in the Fig is
(A) 6 I (B) 4 I
(C) 2 I (D) I
1 2 AB[IES – EC – 1993]
(A) (B)
13 13 9. The voltage transfer ratio of two-port
3 4 networks connected in cascade may be
(C) (D) conveniently obtained from the
13 13
(A) product of the individual ABCD
AA[IES – EC – 1991] matrices of the two networks
6. For the following network input impedance
z(s) as s 0 and s are given by (B) product of voltage transfer ratios of
the two individual networks
(C) sum of the Z-matrices of the two
networks
(D) sum of the h-matrices of the two
networks
1 2 AC[IES – EC – 1993]
(A) ,1 (B) 1, 10. For the lattice type attenuator shown in the
2s s
given Fig., the characteristic impedance R0
2 2 1 is :
(C) ,1 (D) ,
s s s
AD[IES – EC – 1991]
V2
7. The value of G12 or for the circuit
V1
shown in the figure is :
R1 R2 2R1 R2
(A) (B)
2 R1 R2
R2
(C) R1R2 (D) R1
1 2
(A)
4s 2s2 1
4
AA[IES – EC – 1993]
11. Any two-port network having a 6 dB loss
1
(B) will give
s 4 2s 2 1
(A) an output power which is one-quarter
1 of the input power
(C) 4
s 1
(B) an output power which is one-half of
1 the input power
(D)
16s4 12s2 1 (C) an output voltage which is 0.707 of the
AD[IES – EC – 1991] input voltage
8. The network shown in the Fig. draws a (D) an output power which is 0.707 of the
current I. If the ends a, b are shorted the input power
current drawn, would be
2 0
(B)
0 0.5
Codes:
2 0
A B C (C)
(A) 3 1 2 0 0.5
(B) 1 3 2
0.5 0
(C) 2 3 1 (D)
(D) 3 2 1 0 2
(A)
5 1 4 3
(A) (B)
0 2 2 2
(B)
3 2 4 2
(C) (D)
1 2 1 1
(D)
List-I
(A) h11
(B) h12
(C) h21
1 2
(A) (B) (D) h22
3 3
List-II
3 4
(C) (D) rc rb
4 3 1. ( re rb ) rb
rc rb
AA[IES – EC – 1996]
rb rc
22. The network shown in the given figure is a 2.
rc rb
gyrator which satisfies the equations V1 RI
0 2
1 C. h21 3.
1
3. rc rd
rc rb
rb Codes:
4.
rc rb A B C
Codes: (A) 3 1 2
A B C D
(B) 2 3 1
(A) 1 2 3 4
(B) 1 3 2 4 (C) 1 3 2
(C) 1 4 2 3 (D) 3 2 1
(D) 2 3 4 1
AD[IES – EC – 1998]
AD[IES – EC – 1997] 26. Match List-I with List-II and select the
24. The two-port network shown in the Fig., is correct answer using the codes given below
characterzed by the impedance parameters the Lists:
z11 , z12 , z 21 and z 22 . For the List - I
equivalent Thevenin's source looking to the A. Bridged T - network
left of port 2, the VT and ZT will be B. Twin T network
respectively
C. Lattice network
D. Ladder network
List - II
(1)
(A) VT Z 11 V g ; Z T Z 22 Z 12
Z 11 Z g
(B) VT Z 12
V g ; Z T Z 22 Z 12
Z 11 Z g
(2)
Z 21V g Z Z
(C) V T ; Z T Z 22 12 21
Z 11 Z g Z 11 Z g
AA[IES – EC – 1998]
25. The model of a transistor in the common
emitter connection is shown in the following
figure :
(4)
Codes:
A B C D
(A) 2 4 3 1
Match List-I (Parameters) with List-II (B) 4 2 3 1
(Values) and select the correct answer using (C) 4 2 1 3
the codes given below the Lists:
(D) 2 4 1 3
List-I List-II
AC[IES – EC – 1998]
A. h22 1. rb re 27. In respect of the 2-port network shown in the
figure, the admittance parameters are:
B. h11 2. eb Y11 = 8 mho, Y12 = Y21 = -6 mho and Y22 = 6
mho.
AA[IES – EC – 2000]
32. If the transmission parameters of the below
network are A = C = 1, B = 2 and D = 3 ,
then the value of Zin is :
L
(A) Z1 R, Z2 Land T
R
L
(B) Z1 L, Z 2 Rand T
R
(C) Z1 R, Z2 CandRC T
(A) 12 (B) 13
(D) Z1 C , Z 2 RandRC T 13 12
If these two networks are connected in (A) Both A and R are true and R is the
series, the impedance matrix of the resulting correct explanation of A
two-port network will be : (B) Both A and R are true but R is NOT the
correct explanation of A
www.targate.org Page 159
NETWORK
AB[IES – EC – 2002]
35. Assertion (A) : The greater the ‘Q’ the
smaller the bandwidth of a resonant circuit.
Reason (R) : At high frequencies the Q of a
coil falls due to skin effect.
Codes : The lattice circuit has the following
impedances:
(A) Both A and R true and 'R' is the correct
explanation of 'A' ZA 3 j4,
(B) Both A and R true and 'R' is the not
correct explanation of 'A'
ZB 3 j4.
(C) 'A' is true, 'R' is false Then Z-parameters would be :
(D) 'A' is false, 'R' is true
3 j4 0
(A)
AC[IES – EC – 2002] 3 j4
0
36. Assertion (A) : A series R1 – L and a series
R2 – C are connected in parallel. Parallel 3 j4
(B)
resonance will occur at all frequencies when
j4 3
L
R12 R22 . 3 j4 3
C (C)
3 3 j 4
Reason (R) : An inductor must be operated
below the self-resonant frequency. j4 3
(D)
Codes: 3 j4
(A) Both A and R true and 'R' is the correct
explanation of 'A' AB[IES – EC – 2003]
39. If a two-port network is reciprocal as well as
(B) Both A and R true and 'R' is the not symmetrical, which one of the following
correct explanation of 'A' relationships is correct?
(C) 'A' is true, 'R' is false
(A) Z 12 Z 21 and Z11 Z 22
(D) 'A' is false, 'R' is true
(B) Y12 Y21 and Y11 Y22
AC [IES - EE - 2002]
37. (C) AD – BC = 1 and A = D
(D) All of these
AC [IES - EE - 2003]
40.
AD[IES – EC – 2006]
50. Which of the following are the conditions
for a two port passive network to be a
reciprocal one?
1. z12 z21
2. y12 y21
Z 2 Z1 Z1 Z 2
(A) (B)
Z1 Z 2 Z 2 Z1 3. h12 h21
Z1 Z 2 Z1 Z 2 Select the correct condition from the code
(C) (D)
Z1 Z 2 Z1 Z 2 given below:
(a) I1 = 5 V1 V2
(b) I 2 V1 V2
Which one of the following gives the
parameters of an equivalent network
shown below?
(A) 0.125 (B) 0.167
(C) 0.250 (D) 0.625
AC [IES – EC – 2007]
56.
(A) y1 4 , y2 0, y3 1
(B) y1 4 , y 2 4 , y3 1
(C) y1 1, y2 1, y3 1
(D) y1 4 , y 2 0, y3 2 Consider the two port transistor circuit as
given above
AA[IES – EC – 2006] Match List-I with List-II and select the
53. Two 2-port networks with transmission correct answer using the code given below
matrices the lists:
1 2 2 4 List I List II
TA and TB
0.1 4 0.5 3 (hybrid (Circuit Element)
Are connected in cascade. Which is the Parameter)
transmission matrix of the combination? A. 1. 1
h11
3 10 3 6 rc rd
(A) (B)
2.2 12.4 0.2 12.4 B. h12 2. rb re
1 10 3 10
(C) (D) C. h21 3. bc
2.0 12.0 12.4 2.2
AC[IES – EC – 2006] D. h22 4. eb
54. Which one of the following is the
transmission matrix for the network shown Codes:
in the figure given below? A B C D
(A) 2 1 4 3
(B) 4 3 2 1
(C) 2 3 4 1
(D) 4 1 2 3
1 1 yz 1 yz z
(A) (B) AA[IES – EC – 2007]
y z y 1 57. Which one of the following is correct ? The
circuit shown in the figure below is
1 z 1 1 yz
(C) (D)
y 1 yz z y
AC[IES – EC – 2006]
55. What is the value of the parameter h12 for
the 2-port network shown in the figure given (A) Reciprocal but not symmetrical
below ?
(B) Non reciprocal but symmetrical
B. h12 2. Admittance
B. A 2. V1 (C) AD – BC = 1 and A = D
I2 0
V2 (D) All of these
C AC [IES - EE - 2009]
C. 3. V1
I2 0 69. For the z-port network as shown, what is the
I1 value of Y21 parameter ?
D. Z22 4. I1
I2 0
V2
Codes:
A B C D
(A) 1 4 2 3
(A) Y1 Y3 (B) gm Y2
(B) 3 4 2 1
(C) 1 2 4 3 (C) gm Y3 (D) Y1 Y2 gm
(D) 3 2 4 1 AC[IES – EC – 2010]
70. The network given below contains resistors
AB[IES – EC – 2009] and controlled sources.
66. If the connection of two two-ports is such V2
that the transmission matrix of the overall G12
V1
network is the product of the transmission
matrices of the individual networks, what
type of connection is it?
(A) Series connection
(B) Cascade connection
(C) Parallel connection
(D) None of these
(A) 4 (B) 3
AA [IES - EE - 2009] 5 5
67. If the Z-parameters for the T-network as
shown below are (C) 2 (D) 1
5 5
Z11 = 40 , Z22 = 50 and Z12 = Z21 =
AB [IES - EE - 2010]
30 , then what are the values of Z1, Z2 and 71. A two-port network is described by the
Z3? following equations:
V1 50 I1 20 I 2
V2 30 I1 10 I 2
Which one of the following is not correct?
(A) Z12 = 20 (B) Y12 = 0.2
(A) 10 , 20 and 30
(B) 20, , 30 and 20 (C) h12 = 2.0 (D) A = 1.6
(C) 30 , 40 and 10 AA [IES - EE - 2010]
(D) 40 , 50 and 10 72. Consider the following statements:
z AC [IES - EE - 2010]
A. I1,I2 1.
76. A two-port network is defined by the
relation :
B. V1,V2 2. y I1 5V1 3V2
I 2 2V1 7V2
C. V1,I2 3. g
The value of Z12 is :
(A) 3 (B) – 3
D. I1,V2 4. h
3 2
(C) (D)
41 31
AC [IES - EE - 2010]
Codes :
77. For the circuit shown below, the natural
A B C D frequencies at port 2 are given by
(A) 1 2 3 4 s 2 0 and s5 0,
(B) 4 2 3 1
Without knowing which refers to open-
(C) 1 3 2 4 circuit and which to short-circuit.
(D) 4 3 2 1 Then the impedances Z11 and Z22 are given
respectively by
AA[IES – EC – 2010]
74. Consider the following statements for a
symmetrical T section :
1. Z11 and Z22 are equal
AD[IES – EC – 2010] 1 1
78. With reference to the network given below (A) (B)
2 2
the value of Z11 will be :
(C) 1 (D) 1
AB [IES - EE - 2011]
82.
(A) 3 (B) 3
(C) 1 (D) 5
AB[IES – EC – 2010] When port-1 of a two-port network is short
79. A two-port network has the ABCD circuited, I1 = 4I2 and V2 = 0.5 I2, then which
7 8 of the following is true?
parameters . Two such identical
3 4 (A) Y11 = 4 mho
networks are cascaded. The ABCD
parameters of the overall cascaded network (B) Y12 = 8 mho
will be Y21
(C) = 16 mho
14 16 73 88
(A) (B) (D) Y22 = 0.25 mho
6 8 33 40
AC[IES – EC – 2011]
1 1 49 64 83.
(C) (D)
1 1 9 16
AA[IES – EC – 2011]
80.
60 100
(A)
40 60
40 100
(B)
60 40
AC[IES – EC – 2012]
90. The h11 and h22 of a standard T-network with
Consider the two-port network as shown. series impedance 2Ω and 7Ω, and shut
The hybrid parameter h12 is : branch impedance of 3 Ω are
Y22 30103
Y12 10 103
Y12 10103 n1
n 1
2
(C)
Y21 10103 n2
0 n1
Y22 30 103
n1
3 n 0
(B) Y11 1010 2
(D)
n2
Y12 20 103 1 n1
Y21 20 103 AC&D [GATE - EC - 1989]
96. For the transfer function of a physical two –
Y22 30103 port network:
(A) all the zeros must lie only in the left
(C) Y11 10 103 half of the s-plane
www.targate.org Page 169
NETWORK
2 1 1 1 I 2 Y21 E1 Y22 E 2
(A) (B)
1 1 1 2
1 1 2 1
(C) (D)
1 2 1 1
AC [GATE - EC - 2001]
The admittance parameters, Y11 , Y12 , Y21 and
107. The admittance parameter y12 in the 2-pot
Y22 for the network shown are
network in Fig. is
(A) 0.5 mho, 1 mho, 2 mho and 1 mho
respectively
1 1 1 1
(B) mho, mho, mho and
3 6 6 3
mho respectively
(A) – 0.2 mho (B) 0.1 mho (C) 0.5 mho, 0.5 mho, 1.5 mho and 2 mho
(C) – 0.05 mho (D) 0.05 mho respectively
AC [GATE - EE - 2001] 2 3 3 2
(D) mho, mho, mho and
108. A passive 2 – port network is in a steady – 5 7 7 5
state. Compared to its input, the steady state mho respectively
output can never offer
AD [GATE - EE - 2003]
(A) Higher voltage
111. The h-parameters for a two – port network
(B) Lower impedance
E h11 h12 I1
(C) Greater power are defined by 1 . For the
(D) Better regulation I2 h21 h22 E2
two-port network shown in Fig., the value of
AC [GATE - EC - 2001] h12 is given by
109. The Z parameters Z11 and Z21 for the 2-
port network in the Fig are
AD [GATE - EE - 2004] Z1 Z1 Z 2
113. The Z matrix of a 2 – port network is given (A)
Z1 Z 2 Z 2
0.9 0.2
by . The element Y22 of the Z1 Z1
0.2 0.6 (B)
corresponding Y matrix of the same network Z1 Z 2 Z 2
is given by
(A) 1.2 (B) 0.4 Z1 Z2
(C)
(C) – 0.4 (D) 1.8 Z2 Z1 Z 2
AD [GATE - EC - 2004] Z1 Z1
114. For the lattice circuit shown in the Fig. (D)
Z1 Z1 Z 2
Za j 2 and Zb 2 . The value of the
open circuit impedance parameters AB [GATE - EE - 2005]
z z12 117. Two networks are connected in cascade as
Z 11 are shown in the Fig. With the usual notations
z21 z22 the equivalent A, B, C and D constants are
obtained. Given that, C = 0.02 5 45 0 , the
value of Z 2 is
0.1 0.1
(A)
0.1 0.3
10 1
(A) n (B) 1/n (B)
1 0.05
(C) n 2 (D) 1/ n2
30 20
AD [GATE - EE - 2005] (C)
116. For the two port network shown in the Fig. 20 20
the Z – matrix is given by
10 1
(D)
1 0.05
AB [GATE - EC - 2006]
119. In the two port network shown in the Fig.
below, z12 and z21 are, respectively
AC [GATE – EE – 2006]
121. The parameter type and the matrix
representation of the relevant two port
parameters that describe the circuit shown
are
Z 2 j ( L2 M 12 )
Z 3 j M 12
0 0
(A) z-parameters,
0 0 (B) Z 1 j ( L1 M 12 )
1 0 Z 2 j ( L2 M 12 )
(B) h-parameters,
0 1 Z 3 j M 12
0 0 (C) Z 1 j L1
(C) g-parameters,
0 0 Z 2 j L2
1 0 Z 3 j 12
(D) z-parameters,
0 1
(D) Z 1 j ( L1 M 12 )
AA [GATE - EE - 2006]
122. The parameters of the circuit shown in the Z 2 j ( L2 M 12 )
6
Fig., are Ri 1 M , R0 = 10 , A = 10 V/V. Z 3 j ( L1 L 2 M 12 )
If Vi 1 V, the output voltage, input
AD [GATE – EE – 2007]
impedance and output impedance
124. In the figure, transformer T1 has two
respectively are
secondaries, all three windings having the
same number of turns and with polarities as
indicated. One secondary is shorted by a Statement for Linked Answer Question for Next
10 resistor R, and the other by a 15 mF Two Questions :
capacitor. The switch SW is opened (t = 0) A two-port network shown below is excited by
when the capacitor is charged to 5 V with external dc sources. The voltages and currents are
the left plate as positive. At (t = 0+) the
measured with voltmeters V1,V2 and ammeters
voltage Vp and current I R are
A1, A2 (all assumed to be ideal), as indicated. Under
following switch conditions, the readings obtained
are:
(i) S1 Open, S 2 C losed
A1 0 A,V1 4.5V , V2 1.5V , A2 1A
(ii) S1 Closed , S2 Open
(A) –25 V, 0.0 A
A1 4 A, V1 6V , V2 6V , A2 0 A
(B) very large voltage, very large current
(C) 5.0 V, 0.5 A
(D) –5.0 V, –0.5 A
AA[GATE – IN – 2007]
V0
125. The DC voltage gain in the following
Vi
circuit is given by AC [GATE - EC - 2008]
127. The z-parameter matrix for this network is :
1.5 1.5 1.5 4.5
(A) (B)
4.5 1.5 1.5 4.5
1.5 4.5 4.5 1.5
(C) (D)
1.5 1.5 1.5 4.5
R2 AA [GATE - EC - 2008]
(A) Av 128. The h-parameter matrix for this network is
R1 R2
R1 3 3
(B) Av (A)
R1 R2 1 0.67
R2 3 1
(C) Av R0 (B)
R1 R2 3 0.67
(D) Av 3 3
(C)
1 0.67
AD [GATE - IN - 2008]
126. For the circuit shown below the input 3 1
(D)
V 3 0.67
resistance R11 1 is
I1 I 0
2 AA [GATE - EC - 2010]
129. For the two – port network shown below, the
short – circuit admittance parameter matrix
is
(A) 3 (B) 2
(C) 3 (D) 13
4 2
(A) S
2 4
0.5
(B) 1 S
0.5 1
(C) 1 0.5
S
0 .5 1
4 2
(D) S
2 4 (A) A, B are resistances and C, D
capacitances
AC [GATE - EE - 2010]
130. The two-port network P shown in the Fig., (B) A, C are resistances and B, D
has ports 1 and 2, denoted by terminals (a, b) capacitances
and (c, d), respectively. It has an impedance (C) A, B are capacitances and C, D
z jj . A resistances
matrix Z with parameters denoted by
(D) A, C are capacitances and B, D
1 resistor is connected in series with the resistances
network at port 1 as shown in the Fig. The
impedance matrix of the modified two – port AD [GATE - EC - 2011]
network (shown as a dashed bow) is 132. In the circuit shown below, the network N is
described by the following Y matrix:
0.1S 0.01S
Y . The voltage gain
0.01S 0.1S
V2
is :
V1
z11 1 z12 1
(A)
z21 z22 1
z11 1 z12
(B)
z21 z22 1
z11 1 z12
(C) (A) 1/90 (B) – 1/90
z21 z22 (C) – 1/99 (D) – 1/11
z11 1 z12 AC [GATE – EE – 2011]
(D)
z21 1 z22 133. A lossy capacitor C x , rated for operation at
5 kV, 50 Hz is represented by an equivalent
AD [GATE – EE – 2010] circuit with an ideal capacitor C P in parallel
131. If the electrical circuit of figure (b) is an with a resistor RP . The value of C P is found
equivalent of the coupled tank system of
figure (a), then to be 0.102F and the value of
R P 1.25M . Then the power loss and tan
of the lossy capacitor operating at the
rated voltage, respectively, are
(A) 10 W and 0.0002
(B) 10 W and 0.0025
(C) 20 W and 0.025
(D) 20 W and 0.04
AD [GATE–S1–EE–2017] V1 A B V2
149. Two passive two-port networks are I C D I
connected in cascade as shown in figure. A 1 2
voltage source is connected at port 1.
(b)
(A) 1 A (B) 0.5 A
(C) 2.5 A (D) 2 A
AB [GATE-IN-2019]
154. In the Figures (a) and (b) shown below, the
transformers are identical and ideal, except
that the transformer in Figure (b) is centre-
tapped. Assuming ideal diodes, the ratio of
the root-mean-square (RMS) voltage across
the resistor R in Figure (a) to that in Figure
(b) is
(A) 2 :1 (B) 2 : 1
(C) 2 2 :1 (D) 4 : 1
-------0000-------
1. 2. 3. 4. 5. 6. 7. 8. 9. 10.
147. 2.98 to 3.02
11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 152. 0.45 to 0.55
A C A A D C C B D D
21. 22. 23. 24. 25. 26. 27. 28. 29. 30.
A A C D A D C C D B
31. 32. 33. 34. 35. 36. 37. 38. 39. 40.
B A C C B C C B B C
41. 42. 43. 44. 45. 46. 47. 48. 49. 50.
C C A C A A B B C D
51. 52. 53. 54. 55. 56. 57. 58. 59. 60.
B A A C C C A B A D
61. 62. 63. 64. 65. 66. 67. 68. 69. 70.
A B D C D B A D C C
71. 72. 73. 74. 75. 76. 77. 78. 79. 80.
B A A A B C C D B A
81. 82. 83. 84. 85. 86. 87. 88. 89. 90.
C B C C A D A B D C
91. 92. 93. 94. 95. 96. 97. 98. 99. 100.
B A A C B CD A A D *
101. 102. 103. 104. 105. 106. 107. 108. 109. 110.
B * C B A B C C C B
111. 112. 113. 114. 115. 116. 117. 118. 119. 120.
D A D D B D B D B D
121. 122. 123. 124. 125. 126. 127. 128. 129. 130.
C A A D A D C A A C
131. 132. 133. 134. 135. 136. 137. 138. 139. 140.
D D C B C A C * B A
141. 142. 143. 144. 145. 146. 147. 148. 149. 150.
A B * D A * * 3 D A
151. 152. 153. 154.
* * A B
100. AB-CD = 1
0.2 0.1
102. [ y ]
0.1 0.2
138. 1.25
143. 0.54