An Improved Mutated Predictive Control For Two-Level Voltage Source Inverter With Reduced Switching Losses
An Improved Mutated Predictive Control For Two-Level Voltage Source Inverter With Reduced Switching Losses
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ABSTRACT This paper presents an approach called the mutated model predictive control strategy to reduce
switching losses and enhance the efficiency of voltage source inverter (VSI) operating with a three-phase
configuration. The high number of semiconductor commutations in VSIs can lead to significant switching
losses, which reduces efficiency and requires large heat sinks. Conventional model predictive control (MPC)
applies switching states directly to the VSI without modulation; the selection of the optimal state is
accomplished by evaluating criterion. However, since the two zero vectors (V 0, V7) generate identical output
voltage vectors(VVs), only a single zero voltage vector can be chosen. In contrast, the proposed method uses
both zero vectors based on the operating condition. The approach involves using a switching strategy with
pre-condition to select the suitable zero vector between (V 0, V7) and apply it for the next sampling period.
The efficacy of the proposed approach is validated by conducting simulations utilizing Matlab/Simulink and
PLECS software, as well as an experimental test setup is utilized, which includes a three-phase VSI connected
to a resistive-inductive load. The VSI is controlled using a dSPACE MicroLabBOX. The results clearly
demonstrate the superiority of the proposed control strategy, specifically in terms of reducing switching losses
and improving the efficiency of the VSI.
INDEX TERMS Model predictive control (MPC), power losses, switching pattern, voltage source inverter
(VSI).
Therefore, loss reduction become a primary objective in currents in the indirect matrix converter (IMC), effectively
power converters to attain lower temperature stress and lowering switching losses. Furthermore, a modified phase-
higher efficiency that can prolonging the lifetime of devices shifted -PWM structure, discussed in [10], incorporates
[12]. Recently, research and development on three phase clamping periods to decrease power losses and extend the
VSIs have been accelerated to achieve high energy lifespan of switching devices. In [26] , a novel approach to
conversion efficiency, making systems economically varying switching frequency method for a three-phase 2L-VSI
feasible and reducing energy losses [13]. To reduce power dynamically adjusts the switching frequency within the
losses of VSIs. Various methods can be applied to address this fundamental period to minimize switching losses.
concern, and one effective way to enhance VSI reliability is Additionally [27], presents optimized PWM strategies
by meticulously selecting high-quality components like designed to address switching losses. In [28] a comparison
resistors, capacitors, and semiconductor devices .However, it's between the carrier-based generalized DPWM (GDPWM)
important to note that this choice may come with a higher cost method and SVPWM reveals a decrease in switching losses
for the VSI. Furthermore, the heat sink size and weight and an improved converter switching frequency. In[29], a
become problematic for the designer, especially since combination of sliding mode control (SMC) and vector
including large cooling devices is considered a disadvantage operation technique (VOT) is explored for a three-phase shunt
for inverter topology [14]. In addition, VSI users cannot active power filter, resulting in reduced switching power
reduce static (conduction) losses because it is only possible losses by efficiently operating only two phase-legs at high
during the technological manufacturing process of device. On frequency. However, the previously mentioned modulation
the other hand, it is possible to reduce switching losses by techniques and lowering switching frequency techniques,
adjusting the switching frequency, considering various while reducing the number of commutations, it also leads to a
factors. decrease in the quality of the output current of a three phase
Table 1 summarizes three main strategies that exist to VSI. Moreover, the implementation of such methods is more
decrease switching losses . The inclusion of soft-switching intricate and demanding [30], [31].
techniques and advanced gate drivers brings extra hardware, In contrast, due to its simplified implementation
control, and complexity into the system, which may reduce its advantages with avoiding modulation strategy as well as
reliability. Modulation techniques have the ability to modify flexible control, ease of inclusion constraints to control
the number of commutations within the fundamental period of objectives and nonlinearities, with the superior dynamic
the output current, while switching frequency variation response, the huge computational capabilities due to
techniques can adjust the switching time interval. Both upgrading in the domain of digital processing, MPC raised
methods can effectively reduce switching losses without much interest for power electronic converters. In this control
increasing system complexity or requiring additional method, a mathematical model has the capability to predict
hardware. the future behaviors of converters and employs a predefined
Numerous effective techniques have been suggested in the cost function as a criterion to select the optimal switching
literature. There are some examples for a single-phase states [32],[33]. Unfortunately, there have been few literature
inverter [15] voltage-source inverters [16], active filters [17], reviews on 2L-VSI with the minimization of switching losses
Z-source inverters [18], and matrix converters [13]. using conventional MPC. This is because a significant amount
Discontinuous pulse width modulation (DPWM) is an of research has been devoted to solving the switching losses
effective technique used in power converters to reduce the problem for multilevel inverters or matrix converters due to
number of commutations. It achieves this by clamping one their higher quantity of switching devices and states compared
of the phases to either the higher or the lower DC-link to 2L-VSI. [34],[14] . Several variants of MPC have been
voltage. [19-21]. Several variations of DPWM, such as proposed with the objective of reducing switching losses and
DPWM0, DPWM1, DPWM2, and DPWM3, have been improving the efficiency of power inverters. According to the
proposed in the literature [22],[23]. These different forms of authors in [34], the inclusion of a linear low-pass filter in the
DPWM aim to improve switching losses and have cost function is suggested to minimize power loss during the
demonstrated an average reduction of 33% compared to the implementation of MPC. The primary goal of this filter is to
continuous PWM method [24]. These techniques, while reduce thermal stress, which could lead to higher power
effective in reducing switching losses, typically result in consumption. However, it is essential to note that the
lower output current quality when compared to SVPWM. accuracy of this linear filter can be influenced by the
The D-ZSVPWM, as proposed in [18] aims to optimize the presence of nonlinear constraints within the MPC problem
distribution of shoot-through states in Z-source inverters. It formulation. Therefore, it is advisable to refrain from
achieves this by minimizing switching losses through the use including nonlinear constraints in the objective function. The
of a single switch for each transition. Additionally, the author in[35] has formulated a switching strategy using
carrier-based modulation (CPM) technique introduced in [25] predictive control techniques to reduce switching loss in the
focuses on reducing the number of switches per carrier cycle three-phase VSI . An alternative method involves restricting
and selecting an offset voltage to prevent high output phase the accessible switching states based on the converter's prior
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switching state,as detailed in [36]. However, a decrease in from using only one zero vector in conventional MPC.
the sampling rate results in reduced dynamic performance, Numerical simulation and experimental testes conducted
particularly during transient periods. The multi-objective with the three-phase 2L-VSI, which obtained results serve as
capability stands out as a notable advantage of MPC. In the evidence for the effectiveness and the validity of the
conventional MPC method, additional terms can be integrated proposed method.
into the cost function to achieve control objectives such as The remaining sections of this paper are structured as
output currents, voltage, and other parameters, with the aim of follows: Section II shows the model of the system under
reducing the frequency of switching commutations [37]. In study along with the conventional MPC method for VSI. The
[38] a novel method based on MPC was developed to reduce proposed mutated model predictive current controller is
switching losses, this method involves predicting the extensively described in Section III. Section IV focuses on
switching losses associated with each switching state of the the presentation of simulation and experimental results,
power converter, then include switching losses prediction in which involve a comparison between the performance of the
the objective function for the next sampling time proposed m-MPC method and the conventional MPC
application. In [39], the finite-control set MPC methods are methods for a 2L-VSI. The conclusion is given in the last
used to select optimized nonzero VVs . However, the twice Section.
switching in one sampling period significant reduces the
Total Harmonic Distortion (THD) in comparison to directly II. SYSTEM MODEL AND CONVENTIONAL MODEL
discarding the zero voltage vector. However, the complexity PREDICTIVE CONTROL METHODS
A. DESCRIPTION OF THREE-PHASE TWO-LEVEL
of the calculation algorithms makes their practical
INVERTER
implementation challenging. In a recent publication, a per- Fig. 1 illustrates the structure of the three-phase 2L-VSI
phase switching frequency MPC method was presented by designed to simulate the laboratory experiment conditions.
the author in [40]. This method involves the addition of an The three-phase 2L-VSI comprise of three phase legs, each
extra term for phase switching frequency control to mitigate leg composed of two switches , the switches consist IGBT
switching losses in the oldest phase. In [21],[35], an effective and a retro antiparallel diode is necessary for freewheeling
method is proposed that incorporates the predictive control operation. The load terminal is connected to either the
approach with future zero-sequence voltage injection to positive (P) or negative (N) busbar through the inverter
minimize the switching losses of the VSI. However, in the switches. The DC-link is assumed as a constant voltage
previously mentioned methods, the necessity to design source.
weighting factors for the cost function becomes apparent.
Frequently, these weighting factors can only be determined s1 s2 s3
through experimentation process that is both intricate and
time-consuming. Moreover, the incorporation of an additional
a b c
cost function term may potentially lead to a decrease in the Vdc
converter's output performance. The authors in [41] and [42]
introduced a per-phase predictive control method based on s4 s5 s6
predictive zero-sequence voltage generation. According to
their conclusion, switching loss in a particular phase leg can
ia ib ic
be efficiently reduced using this strategy while maintaining
nearly equivalent THD for the output current. However, the La Lb Lc
method proposed in [41] is incapable of achieving the minimal
switching loss due to the restricted clamping angle. In this Ra Rb Rc
paper, a mutated predictive control (m-MPC) is proposed as
a method to reduce switching losses and enhance the ea eb ec
efficiency of VSIs. The m-MPC controller shares similarities
with the conventional predictive control algorithm. The
conventional algorithm selects the optimal switching state
n
from a predefined set of VVs allowed by the VSI based on a
FIGURE 1. 2L-VSI power structure.
predefined cost function. However, conventional MPC often
relies on one of the two available zero vectors. In contrast, the The power switches have a three gating signals that can take
proposed method employs both zero vectors based on the binary values, either “1” (on/close state) or “0” (off/open
operating conditions. It selects the appropriate zero vector to state). The lower switches always serve as complements to
ensure only one transition between the old previous voltage the upper switches, and vice versa. Since there are two
vector and the chosen zero vector (V0 or V7) for the upcoming possible switching state for one leg, and the total switching
sampling period. This operation reduces the number of states for three phases is equals to eight (23 = 8).
transitions, thereby decreasing the switching losses that result
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[52],[53],[54],[55],[56],
References [43],[44],[45], [46],[47] [48],[49], [50],[51]
[57],[58],[59]
-Modulation technique
Losses reduction
Soft switching techniques Advanced gate drive - Lower Switching
methods
frequency
changing the number
reducing voltage or
adjusting the switching of commutations in the
Loss dependence current of the switch
time interval fundamental period of the
during commutation
output current
Drawback:
- need Extra hardware yes yes no
- increase the complexity
yes yes no
of the system
- lower output current no no yes
- reducing reliability of
yes yes no
the system
The set of phase voltages is determined by switching the TABLE 2. Switching states (x = a, b ,c).
inverter state with respect to the negative DC-bus bar
( vaN , vbN , vcN ). The output voltage generated can be
Switching state Gate signal VSI output
expressed as:
Sx (Sx(upper),Sx(lower)) Vxo
2
v (vaN a vbN a 2 vcN ) (1) 1 (1,0) Vdc/2
3 (0,1) -Vdc/2
j (2 /3)
0
where a e
Eight VVs are obtained from eight switching states as The model of the three-phase 2L-VSI is depicted in Fig. 1,
shown in Fig. 2. Since the two zero vectors, V0 and V7 with a balanced three-phase resistive-inductive load the
generate the same output VVs, only seven control VVs are following equations for each phase-leg can be defined as
effectively available for the three-phase 2L-VSI. The follows:
di
switching states, accompanied by corresponding converter v a Ria L a
terminal voltages, are illustrated in Table 2. dt
dib
vb Rib L (2)
β dt
V3 V2 di
v c Ric L c
dt
II These equations can be reformulated in the form of a space
III I vector, which expressed in a stationary frame (α, β) as:
V1 di
V4 α v Ri L (3)
dt
V0,7 where R represents the load resistance, while L denotes the
IV VI
load inductance. In addition, v (a,b,c) and vαβ refer to the VVs
generated by the VSI and i(a,b,c) and iαβ refer to the load
V5 V current vector.
V6 Since the period of the output current is relatively larger
FIGURE 2. Voltage space vectors generated by the 2L-VSI.
compared to the short sampling period, the derivative of the
forward Euler method can be approximated as follows:
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di i (k 1) i ( k ) C. SWITCHING LOSSES
(4) The fundamental operating principle of power
dt Ts
semiconductors involves active and passive switching
where Ts is the sampling period. processes that occur during the cyclic switching of individual
The inverter can be mathematically represented in discrete switches. The switching frequency refers to the number of
form through the following model : times a switch changes its state per second. This transition
RT T involves switching from its on-state (closed) to its off-state
i (k 1) (1- s )i (k ) s v (k ) (5) (open), and vice versa. The higher switching frequency lead
L L
to switching losses in the inverter .The objective is to
where i (k 1) the one-step future is current values and increase the power conversion efficiency by reducing the
switching losses. One feasible approach to reduce switching
V (k ) is the voltage vector generated by VSI.
losses is to improve the gate drive circuit that enhances the
switching process [60],[61]. The semiconductor's
B. CONVENTIONAL MODEL PREDICTIVE CURRENT temperature rises due to the switching losses, which require
CONTROL the installation of cooling systems and consuming energy.
The predictive current controller utilizes a discrete-time One of the initial approaches to reduce switching losses in
model with one-step ahead prediction to anticipate the next the operation of a VSI is to minimize the number of
step behavior of the controlled load current in a three-phase commutations or transitions of the semiconductors per unit
2L-VSI connected to an RL load. It consists of the three main of time. The division of switching states, accompanied by
controller subsystems: reference current generation, cost their corresponding signal states, is illustrated in Table 3.
function minimization, and predictive model. Cost function
TABLE 3. Division switching states.
values are computed for each sampling period according to
predefined criteria for all possible commutation states, as Switching State Signal State
follows: State 0 000
Zero states
State 7 111
g i* (k 1) i (k 1) i* (k 1) i (k 1) (6) State 1 100
Odd states State 3 010
State 5 001
The cost function, as defined in equation (6), measures the State 2 110
variance between the predicted system output and a reference Even states State 4 011
value for the available switching state. The goal is to State 6 101
minimize the mathematical output of the cost function
III. PROPOSED IMPROVED MUTATED MODEL
equation, and the switching state that yields the smallest
PREDICTIVE CURRENT CONTROL
value for the cost function is selected as the optimal state for Since the RL load connected to the positive and negative DC-
the inverter in the next period [60] . Fig.3 illustrates the block links through the three-phase 2L-VSI as depicted in Fig.1. The
diagram of the conventional MPC implemented to a 2L-VSI. 2L-VSI is operated through six distinct commutations, each
involving the switching devices S1 - S6. The proposed m-MPC
is based on the inverter switching transition to mitigate the
2L-VSI Load
power losses and increase the efficiency of the inverter .This
idc R
ia(k) L objective is achieved by using the two zero vectors. Similar to
ib(k) the conventional MPC methods. The selection of the best VVs
Vdc ic(k)
among the seven- VVs due to minimization of cost function,
the control apply the suitable vector for the next sampling
Sa,Sb,Sc iα iβ
period. It is noticeable when applying classical MPC control,
always ,the evolution of cost function counting just seven
Minimization
ip(k+1)α
Cost
Predictive VVs rather than eight because V0 and V7 give the same results
Function ip(k+1)β Model
as zero vector but the zero vectors commutation to switching
iβ * iα * Current device is not the same V0(0 0 0),V7(1 1 1). Fig.4 illustrates the
Reference block diagram of the m- MPC implemented to a 2L-VSI.
Generator
Usually, the optimal switches would be operated
FIGURE 3. Conventional model predictive current control scheme. successively once in each sampling time. Therefore, the
switching transition is equal to three for the successive
combination between the VVs and its opposite (V1V4, V2V5,
V3V6, and V1V7). The other combination of transition between
VOLUME XX, 2017 2
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the odd and even vectors are equal to two. The zeros switching IV. RESULTS AND DISCUSSION
states are different in two opposite vector state (V0 states (0 0 To verify the feasibility of the proposed m-MPC, numerous
0) is equivalent to V7 (1 1 1) for three-phase 2L-VSI. numerical simulations and laboratory experiments have been
conducted. The results obtained from these studies are
2L-VSI presented and thoroughly analyzed in this section.
Load
ia(k) L R
sa
Overselection sb ib(k) A. SIMULATION RESULTS
Operation sc ic(k) The inverter feeding an RL load is simulated using
Matlab/Simulink and PLECS software, considering the
v(1~7)
3
control diagram in Fig. 3 and Fig.4 respectively. The
i*(k+1) Minimization i(k+1) simulation parameters are shown in Table 4.
of Cost 7 Predictive Control i(k)
Function
TABLE 4. Parameters of the system.
Conventional MPC
Symbol Description Value
L Resistance value 5Ω
FIGURE 4. Proposed m-MPC scheme. R Inductance value 10 mH
Vdc DC-link voltage 60 V
However, the combination between V0 and other voltage fs Sampling frequency 20 kHz
give just one transition for the odd vector and two transitions f Reference frequency 50 Hz
as an even vector for the conventional MPC. TS Sampling time 50 μs
yes
current.
no
If Xopt=1 II 8 Apply S(j)
yes
If 1 == x_old II 2 == x_old no
Apply S(j=8)
4 == x_old II 6 == x_old
yes
Apply S(j=1)
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FIGURE 6. Simulation results with conventional MPC: (a) output currents TABLE 5. Efficiency comparison based on PLECS simulation results.
of the 2L- VSI, (b) selected voltage vector.
The PLECS software is utilized for measuring conduction Power electronics device
and switching losses dissipated by the six switches of IGBT Inveter model SEMIKRON TWO-LEVEL VSI
(SK 60 GB 128) in steady-state operation. During the IGBT module SK 60 GB 128
Instruments for Measurement and Analysis
simulation test, the thermal models for the IGBT and its anti- -INSTEK GDS-1104B oscilloscope
parallel diodes used in constructing the inverter are obtained -YOKOGAWA WT500 power analyzer
from data sheet graphs available on the SEMIKRON -Fluke i400s Current probe
Hardware platform dSPACE DS1202 MicroLabBox
website. Measurements are taken for various current values
[ranging from 2A to 4A], and the results for switching losses
and power efficiency are presented in Table 5. The power Figs. 9 and 10 present the experimental waveforms of the
loss analysis indicates that conduction losses maintain small, three-phase output current obtained from both the
constant values for both conventional MPC and the proposed conventional MPC and the proposed m-MPC. The steady-
m-MPC, attributed to the utilization of high-performance state performance of both strategies is depicted in Figs. 9(a)
IGBTs and diodes. and 10(a).
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The experimental results obtained from the physical setup It is evident that the response of both methods during the
appear to be reasonably consistent with the simulation transient phase is remarkably fast, demonstrating accurate
results. reference tracking within a few milliseconds.
2L-VSI
Grid Vdc RL load
n
3 3
3
Vdc
i(a,b,c)
Switching
signals Measurement board
Implemented control:
1-conventional MPC (a)
2-proposed m-MPC
PC
dSPACE 1202
dSPACE
DS1202 Resistor
MicroLab s
Box
Inductors
Oscilloscope
YOKOGAWA
Power Analyzer Current Probe
(b)
FIGURE 10. Experimental waveforms of the three-phase load
currents for proposed m-MPC: (a) steady state , (b) dynamic state.
Two Level
Table 7 presents a comprehensive comparative analysis of
Inverter DC Supply the proposed m-MPC and conventional MPC, outlining their
quantitative differences. According to this Table, the
FIGURE 8. Photograph of experimental hardware setup. experimental values are almost the same as those of the
simulation values. This is because, the PLECS simulation
As illustrated in Fig. 9(b) and 10(b), dynamic tests were model use the data of the semiconductor device tested under
conducted during the experiment, where the current real operation conditions. In order to obtain the experimental
reference changed from 2A to 4A. The current waveform in measurement values, the output and input of the VSI are
the proposed method closely resembles that obtained from connected to the Power Analyzer (YOKOGAWAWT500).
the simulation results depicted in Fig. 7 The THD and Root Mean Square (RMS) values for voltage
and current are shown in Fig. 12. In Fig.12 (a), the THD of
the current measured using the conventional MPC is
approximately 1.35%. On the other hand, Fig.12(b)
illustrates that the THD of the current obtained through the
proposed m-MPC is around 1.01%. For both algorithms, the
THD of the current in m-MPC is lower than that in
conventional MPC, attributed to the reduction in switching
(a) transitions. However, the proposed m-MPC exhibits superior
output current quality compared to conventional MPC.
The performance of MPC methods is significantly
influenced by the sampling period, which reflects their
operating process. Table 7 presents a comparison of the
execution time between the two methods, despite the
presence of an additional algorithm. The execution time of
the proposed scheme increases by 3.12% compared to the
conventional MPC algorithm. This increase is attributed to
(b)
the need for calculations in selecting a suitable V0 or V7 for
FIGURE 9. Experimental waveforms of the three-phase load currents for the future period to reduce the number of transition, as
conventional MPC, (a) steady state , (b) dynamic state. illustrated in Fig. 11.
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(b)
1 1
0 1
1 1
0
(c)
FIGURE 11. Experimental switching signal Sa,Sb,Sc for (a)
conventional MPC (only V0), (b)- the proposed m-MPC with V0 and (a)
(c)- m-MPC with V7.
The efficiency of three-phase 2L-VSI is obtained using However, switching losses were reduced, and the conversion
Power Analyzer by the input and the output power system achieved better efficiency. The proposed m-MPC
measurement. The efficiency is derived according to method has the capability to enhance efficiency by
expression (8): effectively reducing switching losses of the VSI.
P
out 100(%) (8) V. CONCLUSION
Pin
This paper introduces a modified control scheme known as
Where Pout is the power consumed by the load and Pin is the mutated model predictive control (m-MPC) designed for a
power supplied by the source. Fig. 12. displays the three-phase 2L-VSI. The primary objective of this control
experimental efficiency results. The numerical value of approach is to minimize switching losses by reducing the
conventional MPC efficiency is presented in Fig. 12 (a) with number of transitions between zero and non-zero states during
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This work is licensed under a Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 License. For more information, see https://creativecommons.org/licenses/by-nc-nd/4
This article has been accepted for publication in IEEE Access. This is the author's version which has not been fully edited and
content may change prior to final publication. Citation information: DOI 10.1109/ACCESS.2024.3365689
This work is licensed under a Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 License. For more information, see https://creativecommons.org/licenses/by-nc-nd/4