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Quiz3 - Questions and Answers

This document contains 5 multiple choice questions related to computer architecture and interfacing. The questions cover topics like control registers, stepper motor control using ports, reading inputs from switches and displaying outputs on LEDs using ports, configuring an 8255 PPI chip, and interrupt handling order.

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36 views7 pages

Quiz3 - Questions and Answers

This document contains 5 multiple choice questions related to computer architecture and interfacing. The questions cover topics like control registers, stepper motor control using ports, reading inputs from switches and displaying outputs on LEDs using ports, configuring an 8255 PPI chip, and interrupt handling order.

Uploaded by

f20220301
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Questions

1. For the figure shown below, which of the following addresses


corresponds to Control Register or port?.
2. Consider that the lower 4 bits of Port A are connected to the 4
coils of a stepper motor having a stepping angle of 1.8 degrees
when used in full step mode of operation. Consider the following
code snippet:
MOV AL, 80H
OUT CR, AL ; CR is Control Register
MOV COUNT, 160 or 120 or 80 or 40
MOV AL, 08H
OUT PA, AL ; PA is Port A
CALL DELAY ;DELAY procedure is defined for 1 second
AGAIN:
ROR AL, 01
OUT PA, AL
CALL DELAY ;DELAY procedure is defined for 1 second
DEC COUNT
JNZ AGAIN
By what angle does the rotor of the stepper motor rotate (in the
direction of motor rotation)? Assume that the pins are
connected appropriately to the stepper motor coils to facilitate
its rotation as discussed in lectures and practical sessions.
3. 8 switches and 8 red LEDs are connected to 8086 via two ports
of 8255. A user provides 3 inputs to 8086 via the switches with a
gap of 1 second between the inputs. Based on the received
inputs, 8086 activates a subset of LEDs. Assume that D0 ad D7
are connected to the LSB and MSB of the output port,
respectively. Further assume that all intializations are done and
that a subroutine named DELAY_1S is available to provide the
requisite delay. If the input received from the user are 64H, C8H
and FAH, what pattern will be observed on the LEDs for the code
snippet shown below?

MOV AL, 92H


OUT CR, AL ; CR is the Control Register
CALL DELAY_1S
IN AL, PA ; PA is Port A
MOV BL, AL
CALL DELAY_1S
IN AL, PA
MOV BH, AL
CALL DELAY_1S
IN AL, PA
MOV CX, 0
MOV AH, 0
ADD CX, AX
MOV AL, BH
ADC CX, AX
MOV AL, BL
ADC CX, AX
CMP CX, 400
JAE L1
MOV AL, 0F0H
OUT PC, AL ; PC is Port C
JMP L2
L1:
MOV AL, 0FH
OUT PC, AL
L2:
.EXIT

4. 8255 is to be configured such that both groups operate in Mode


0. Further, Ports A, B and C are to be output ports. Then, the
control word should be

5. Consider the following code snippet. Suppose that a hardware


NMI occurs during the execution of the first ISR resulting from
the given code snippet. Assume that the hardware NMI occurs
before the IRET of the first ISR begins getting executed. Further,
assume that no hardware interrupts other than the
aforementioned hardware NMI occur during the execution of
the given code snippet. Then, the order in which the interrupts
complete their service is

MOV AX, 400


MOV BL, 1
DIV BL
INT 2H

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