3rd Module IGBT Notes
3rd Module IGBT Notes
The switching speeds of IGBTs are higher than those of bipolar power transistors. The
turn on time is about the same as in power MOSFETs. But turn OF times are longer.
Therefore, the maximum converter switching frequencies possible with IGBTs are
intermediate between bipolar power transistors and power MOSFETs.
Figure 3.1shows the junction structure of a typical IGBT cell. This should be compared
with the structure of an n-channel power MOSFET given earlier. It will then be noticed that
there is only one difference. In the IGBT, there is an additional p layer over the n drain layer
of the power MOSFET structure. This p region constitutes the "collector" of the IGBT. As in
the power MOSFET, the adjacent n region consists of an n and an n region. The n region
serves to achieve better performance, but does not materially change the operating principle of
the device. We shall therefore treat these two layers as together constituting a single 𝑛 layer
when explaining the switching operation of the IGBT.
The collector is a power terminal of the IGBT switch. The other power terminal is the
terminal labeled "emitter" in Fig. 3.1. Comparison with the power MOSFET structure shows
that the emitter's place in the structure is identical to that of the source in the power MOSFET.
This statement applies also to the "gate," which is the control terminal in both devices. The
switching control voltage for the IGBT is applied across the gate and the emitter, and this
controls the switching in exactly the same way as the control voltage applied across the gate
and the source in the power MOSFET.
The circuit symbol generally used for the IGBT is shown in Fig. 3.1(b). It is similar to
that of a npn bipolar junction power transistor, but with an insulated gate terminal in place of
the base.
Fig 3.1
PRINCIPLE OF WORKING.
The operation of the IGBT is very similar to that of the power MOSFET. The basic
difference is that the resistance offered by the 𝑛 region [on the top in Fig. 3.1(a)] when current
flows through the device in its ON state is very much smaller in the IGBT. This decrease in
resistance occurs because of the injection of holes from the top p zone into this n zone. This
effect is called conductivity modulation of the n region. But it can be stated here that the
resulting conductivity modulation significantly reduces the on state voltage drop. Because of
this, the current ratings go up from five to ten times in a chip of the same area, compared with
a power MOSFET.
In practical use, the collector terminal voltage polarity will be positive with respect to
the emitter. Figure 3.2(𝑎) shows the current flow paths in an IGBT cell when a positive gate-
to-emitter control voltage above the threshold level is applied. A positive gate voltage greater
than the threshold value creates an 𝑛 channel in exactly the same way as was for a power
MOSFET. The n channel so created in the IGBT is shown in Fig. 3.2(𝑎). This channel connects
the n emitter zone of the IGBT to the middle n region. The top p zone, the middle n region
and the lower p island constitute a pnp transistor. The top p region, which is the collector of
the IGBT, functions as the emitter of this pnp transistor under the normal circuit voltage
polarities. A circuit model on this basis is drawn in Fig. 3.2(b).
Fig 3.2
The p, n and p regions of the transistor in this model are labeled with appropriate
subscripts to identify them with the corresponding regions in the structure in Fig. 3.2(𝑎). We
notice that the middle n region constitutes the base of the pnp transistor. When a channel is
formed by the application of a gate voltage, a current flow path is created from the collector
terminal of the IGBT across the forward-biased top pn junction, across the middle 𝑛 zone, and
through the channel to the emitter terminal. The current flowing through the channel serves as
the base current for our pnp transistor. Therefore, this causes emitter current to flow in this
transistor, resulting in the large-scale injection of holes across the top pn junction. These
injected holes are responsible for the conductivity modulation of the middle n zone. There are
now two current flow paths to the emitter terminal. One is through the middle n zone and
through the channel. The other is across the collector junction of our pnp transistor and through
the lower p zone. The resistances in these two paths are shown separately in the circuit model
of Fig. 3.2. Of these two resistances, it is the one labeled 𝑅mod that is modulated by carrier
injection.
In the above description of current flow, in the interests of clarity, we did not look at
another parasitic transistor that is also present in the structure of the device in Fig. 3.2(a). This
is an npn transistor whose collector, base and emitter are respectively the middle 𝑛 region, the
lower p region and the lower n region. From an examination of the junction polarities, we
notice that the lower n region is the emitter of this transistor. Therefore, to complete our circuit
model, we include this npn transistor also, and the revised model is shown in Fig. 3.3.
Fig 3.3
The two transistors of opposite types, interconnected in the manner shown in Fig. 3.3,
constitute what may be described as a "regenerative" circuit, which creates difficulties in the
design and manufacture of the IGBT. In the circuit of Fig. 3.3 we notice that the collector of
the npn transistor is connected to the base of the pnp, and the collector of the pnp transistor is
connected to the base of the npn. Therefore, an increment in the base current of the npn can
cause an amplified increment in the base current of the pnp. This in turn can result in a further
amplified increase in the base current of the npn. In this manner, the two transistors can
mutually drive each other into the saturated-on state. Such an occurrence is called latch up. If
latch up occurs, the device will stay in the on state without the presence of a gate input. The
gate has lost control and is unable to implement turn OFF switching. It is therefore a faulty
condition. Earlier designs of IGBT suffered from latch up at relatively low values of on state
currents. But at the present time, the latch up problem has been overcome by suitable design
of the device. This is achieved primarily by designing the device in such a way, that the pnp
transistor has effectively a very low current gain.
The terminal capacitances of the IGBT are specified in the same manner as was
indicated for the power MOSFET. When looking at the capacitance specifications in the data
sheet, it should be remembered that the terminal labels are different. The collector of the
IGBT corresponds to the drain of the power MOSFET, and the emitter of the IGBT
corresponds to the source of the power MOSFET. These differences will be reflected in the
letter subscripts used in the labeling of the capacitances.
advantage resulting in a reduction of the effective input capacitance seen by the gate drive
circuit. The gate drive circuits for IGBTs are similar to those for power MOSFETs.
The switching times for the IGBT are specified in a manner similar to those of the
power MOSFET. The switching performance at turn on is very similar to that of the power
MOSFET and the time specifications are about the same. However, there is a difference as
regards turn OFF switching behavior. During turn OFF, the initial fall in current is steep,
similar to that of the power MOSFET. But this is followed by a longer "tail" during which the
decay takes place relatively slowly. Typically, the tail starts around 25% of the ON state
current. The tail in the current decay waveform is because of the time needed for the excess
minority carriers (injected holes) in the base region of the pnp transistor to disappear by
recombination. Since there is no external terminal in contact with this n zone through which
these excess carriers can be "sucked out," as can be done in a bipolar junction power
transistor, the carrier lifetime by and large determines this tail duration. The upper 𝑛 zone of
the 𝑛 region does help to speed up the recombination and shorten the tail. The overall turn on
time is longer than in the power MOSFET. During the duration of the tail, the device has the
ability to support the full forward voltage, while the tail current is flowing. But this causes
increased switching power loss, and therefore limits the upper usable frequency for repetitive
switching.