ECEN 248: Introduction to Digital System Design

LABORATORY MINI-PROJECT
Design of Car Safety Alarm Buzzer

Team members: Shaikha Almajed - Lolwa Almajid - Sara Al-Mahmoud

Instructor: Randa Al Qudah

ECEN-248-501
Lab bench used: 8

An Aggie does not lie, cheat or steal or tolerate those who do.
Table of contents
Abstract........................................................................................................................... 3
Introduction..................................................................................................................... 3
Experimental Procedure................................................................................................ 5
Results........................................................................................................................... 12
Discussion and Conclusion.........................................................................................13

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Abstract

Using the DE2-155 board from Altera and a computer with Quartus II software, this report
describes the development of a car safety alarm buzzer. The procedure for the experiment
includes the development of a truth table, the derivation of optimal boolean expressions by
means of Karnaugh maps, and the implementation of the circuit in both schematic and Verilog
code forms. After constructing gate networks and simulating them, and after comparing the two
sets of expressions for their cost in terms of gate count and fan-in. The outcomes prove that the
improved layout efficiently triggers the alert according to the input circumstances indicated. You
may learn more about the research process, the most important results, and the overall
effectiveness of the car safety alarm buzzer design by reading this paper.

Introduction

Developing a reliable car safety warning buzzer is crucial to make vehicles safer for drivers and
passengers. In this project, the Altera DE2-155 board and the Quartus II software program were
used to design and build a reliable security system. A Karnaugh map was used to find the
optimized boolean expression after a truth table had been constructed. In this test, how the
optimized design compared against the unoptimized design in terms of gate count and fan-in
efficiency was looked at. The Quartus II Graphic Editor was used to build the gate networks, and
Verilog was written to simulate the system's behavior. The significance of a well-designed
automotive safety alert and the strategy used in this experiment are presented in the
introduction.

Safety features are increasingly important in today's cars since they protect the lives of
motorists, passengers, and bystanders. Effective automobile alarm systems, meant to warn
users of possible dangers or illegal access, are an essential part of vehicle safety. This
experiment examines a vital component of vehicle safety: the automobile safety alert buzzer.
The value of an auto alarm system goes well beyond its ability to deter theft. While detecting
intrusion remains an essential function, modern systems like the one tested here now include
sensors to track things like speed, location, and more. The system may be programmed to
activate an alert in response to various situations, such as the lack of a seatbelt, an open door,
or insufficient lighting conditions. In addition to resolving security issues, this comprehensive
strategy also encourages safe driving habits, making it consistent with modern safety
regulations. There are many uses for a well-tuned automobile security alarm system beyond just
deterring theft.

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Some examples of their use are:

1. Safety Boosts: The automobile alarm system may function in tandem with other safety
aids like automatic emergency braking and lane departure alerts to form a multilayered
safety system.
2. Occupant Monitoring: The technology improves passenger security by promoting and
enforcing the use of safety belts by monitoring whether or not people in the vehicle are
using them.
3. Accidental lock-ins of children or pets may be avoided, and their safety is ensured with
the addition of elements designed for that purpose.
4. Anti-Theft Measures: In addition to unlawful entrance alarms, the system can incorporate
GPS tracking and remote control functions to aid in the recovery of stolen cars.
5. High amounts of carbon monoxide within a vehicle might be a sign of environmental
dangers.
6. Customizable Security Profiles: Users may create alert triggers based on particular
events, giving flexibility in personalizing the system to individual tastes and driving
patterns.

When these uses are taken into account, it becomes clear that the optimal automobile safety
alarm system is a flexible instrument for boosting overall vehicular safety, contributing to the
overarching objective of lowering accident rates and maximizing the health and happiness of
those traveling in motor vehicles.

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Experimental Procedure
Equipment used for this experiment: Altera's DE2-155 board connected to the power supply, a
computer and the Quartus Ⅱ software.

Figure 1: Altera's DE2-155 board

Quartus Ⅱ software was launched, creating a new project terminal. Connecting the software on
the computer to the Altera's DE2-155 board used. This software has Schematic Design, Verilog
Code and Waveform Simulation to test and verify the unoptimised and optimized expressions
derived from the truth table.

This has three main parts:

1. Constructing the truth table and K-maps using the parameters of the Sound Alarm
System. Finding two different boolean expressions to compare.
2. Calculating the cost of the unoptimised and optimized boolean expressions.
3. Verifying the calculations done by hand using the Quartus Ⅱ software through
Schematic Design, Verilog Code and Waveform Simulation.

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Part 1
Table 1: Truth table for the car safety alarm system
D K B L A

0 0 0 0 0

0 0 0 1 1

0 0 1 0 0

0 0 1 1 1

0 1 0 0 1

0 1 0 1 1

0 1 1 0 1

0 1 1 1 1

1 0 0 0 0

1 0 0 1 0

1 0 1 0 0

1 0 1 1 0

1 1 0 0 1

1 1 0 1 1

1 1 1 0 0

1 1 1 1 0

The truth table for the car safety alarm system was based on the alarm activation conditions
based on four sensor inputs: Door closed (D), Key in (K), Seat belt fastened (B), and Car lights
on (L). The truth table provides a clear view of when the alarm will sound. There are three
specific conditions for alarm activation:
1. The alarm sounds when the key is in and the door is not closed.
2. The alarm is activated when the door is closed, the key is in, and the seat belt is not
fastened.
3. The alarm is triggered if the key is not inserted, the door is open, and the car lights are
on.

Unoptimised expression:
The unoptimised expressions were found using the truth table:
𝐴 = 𝐷𝐾𝐵𝐿 + 𝐷𝐾𝐵𝐿 + 𝐷𝐾𝐵𝐿 + 𝐷𝐾𝐵𝐿 + 𝐷𝐾𝐵𝐿 + 𝐷𝐾𝐵𝐿 + 𝐷𝐾𝐵𝐿 + 𝐷𝐾𝐵𝐿

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Optimized expression:
The K-map found using the truth table in (table 1):

Figure 2: K-map derived from the truth table

The optimized expression found using the K-map rules of simplification:

𝐾𝐵𝐿 + 𝐷𝐵𝐿 + 𝐾𝐵
When it's less than the four input signals, the missings variables don't matter if they are on or off
for example: 𝐾 𝐵 𝐿 ,when the key is not inserted, and the seat belt is not fastened and the car
lights are on, the alarm will sound whether the door is closed or opened.

Part 2
Calculations of the total cost of the circuit in terms of gate count and fan-ins for the unoptimised
and optimized boolean expressions:
Unoptimised
AND gates OR gates

8 4-inputs 1 8-inputs

𝐶𝑜𝑠𝑡 = 8 + 1 + (4 × 8) + 8 → 𝐶𝑜𝑠𝑡 = 49
Optimised

AND gates OR gates

2 3-inputs 1 3-inputs

1 2-inputs
𝐶𝑜𝑠𝑡 = (2 × 3) + (1 × 2) + (1 × 3) + 2 + 1 + 1 → 𝐶𝑜𝑠𝑡 = 15

𝑇𝑜𝑡𝑎𝑙 𝐶𝑜𝑠𝑡 = 49 + 15 = 64

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Verilog code was used to write and test the boolean expressions following a data flow design.
Separate lines were used for declaring the inputs and outputs, and the continuous assignment
called assign to write the boolean expressions. The operations for the AND, OR and NOT gates
are &, | and ~ respectively. Module and endmodule can be seen at the beginning and end of
each code for it to run. Figures 3 and 6 use the same structure described.

Part 3
Unoptimised

Figure 3: Verilog Code of the unoptimised expression using dataflow modeling

After creating a new file named “unoptimised”, the Verilog Code using the unoptimised
expression can be written. The inputs are D, K, B and L for Door, Key, Seat belt and Car light
respectively and A is the output for the Sound alarm system. This data flow design shows the
inputs, outputs and the AND, OR and NOT gates used.

Figure 4: the pin assignments in Quartus II for both the optimized and unoptimised
circuits
This figure displays pin assignments for both optimized and unoptimized circuits in Quartus II
software. It shows which inputs and outputs are connected to specific FPGA pins. The inputs
are connected to switches and the output is the LED red light on the Altera's DE2-155 board.

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Optimised

The Graphic Editor window has functions that can add input and output PINS and logic gates
connected by wires. This was used to construct the gate networks in (Figure 5).

Figure 5: Schematic design of the gate network of the optimized expression

Building a gate network inputs are D, K, B and L for Door, Key, Seat belt and Car light
respectively and A is the output for the Sound alarm system corresponds to the optimized
expression found from the K-map as shown above. Using three AND, three NOT, one OR gates
and wires to connect each input signal to the gates. The input was controlled using the switches
on the Altera's DE2-155 board and the output is displayed by the lights on the board. The PIN
assignments can be seen in (Figure 4).

Figure 6: Verilog Code of the optimized expression using dataflow modeling

After creating a new file named “optimisedcode”, the Verilog code using of the optimized
expression can be written. The inputs are D, K, B and L for Door, Key, Seat belt and Car light
respectively and A is the output for the Sound alarm system. This data flow design shows the
inputs, outputs and the AND, OR and NOT gates used. This shows a shorter code than in
(Figure 3) with less gates and less inputs per expression.

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 Figure 7: Waveform Simulation of the optimized expression

The University Program Vector Wave Simulation of the optimized boolean expression based on
the Verilog Code in (Figure 6). Adding the inputs and outputs from the Node Finder and
changing the Grid Size and the End Time to 1600 ns as there are four input variables and 16
combinations of binary digits 0s and 1s.

A waveform was generated after running Functional Simulation. The line stays constant when
the input is 0 but moves up a step if it's 1. The output can be seen after moving the drag cursor
along the waves, the top wave represents A, the binary digits 0 and 1 represent off and on
respectively of the Sound Alarm.

Verilog code using behavioral modeling (using if statements) for the optimized and unoptimised
boolean expressions: When writing the Verilog code using behavioral modeling, the structure of
the code is the same as described above with a few added elements. This is another way of
writing the same code as in (Figure 3 and 6) however using if else statements. It can be easier
to read and predict the outcomes in this structure. Procedural assignments like if else
statements start with always@* which is sensitive to changes of all input ports and the output
must be in reg type as between assignments it can hold the values.

Figure 8: Verilog Code of the unoptimized expression using if else statements

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After creating a new file named “ifunoptimised”, the Verilog Code using if else statements can
be written. The inputs are D, K, B and L for Door, Key, Seat belt and Car light respectively and A
is the output for the Sound alarm system. In the if-else statements, if these signals are inputted
using the switches on the Altera's DE2-155 board then the output of A will be 1 for the light PIN
to be on. If it's not one of the expressions inputted then output of A will be 0 for the light PIN to
be off. In total this code has nine conditions with nine statements.

Figure 9: Verilog Code of the optimized expression using if else statements

After creating a new file named “ifoptimised”, the Verilog Code using if else statements can be
written. The inputs are D, K, B and L for Door, Key, Seat belt and Car light respectively and A is
the output for the Sound alarm system. In the if-else statements, if these signals are inputted
using the switches on the Altera's DE2-155 board then the output of A will be 1 for the light PIN
to be on. If it's not one of the expressions inputted then output of A will be 0 for the light PIN to
be off. In total four conditions with four statements.

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Results

Two gate networks generated by the Quartus Ⅱ software from the Verilog codes written:
Unoptimised

Figure 10: Gate Network generated by the Quartus II software for the unoptimised circuit

Based on the Verilog Code in (Figure 3). The inputs are D, K, B and L for Door, Key, Seat belt
and Car light respectively and A is the output for the Sound alarm system. Ten two-input AND
gates, three three-input AND gates and one eight-input OR gate.

This figure shows the extensive hardware requirements of the unoptimized circuit, highlighting
the difficulty of creating the car safety alarm system based on the original logic expressions.
Having many logic gates increases the complexity of the circuits which reduces its flexibility.
Making it more difficult to test the circuit for any errors or on other applications.

Optimised

Figure 11: Gate Network generated by the Quartus Ⅱ software for the optimized circuit

Based on the Verilog Code in (Figure 6). The inputs are D, K, B and L for Door, Key, Seat belt
and Car light respectively and A is the output for the Sound alarm system. Two three-input AND
gates, one two-input AND gates and one three-input OR gate. This gate network is the same as

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the gate network done in the schematic design in (Figure 5) however this is based on the code
of the optimized boolean expression while the other one was done manually.

This figure shows the hardware requirements of the optimized circuit, highlighting the simplicity
of the gate network. Having fewer gate networks improves the efficiency and functionality of the
circuit. Making it faster and flexible to change and test.

Discussion and Conclusion

The primary aim of this mini-project was to design and implement a car safety alarm system
using digital logic design techniques. The main focus in this section is to delve into the key
findings of the experiment and the impact of optimized Boolean expressions on the car's
security alarm's performance using the Altera DE2-155 board and Quartus II software.

Firstly, a truth table (Table 1) was created to specify under which the car safety alarm system
should activate. The truth table considered four input variables: Door closed (D), Key in (K),
Seat belt fastened (B), and Car lights on (L). This table was important in establishing the
behavior of the alarm system and served as the foundation for deriving the Boolean
expressions.

Two sets of Boolean expressions were obtained: unoptimized and optimized. The unoptimized
expression was derived directly from the truth table (Table 1), resulting in a lengthy and complex
expression. (Figure 3) represents the Verilog code based on dataflow modeling for the
unoptimized expression. In contrast, the optimized expressions were derived using Karnaugh
maps (Figure 2), leading to a more concise and efficient expression for the alarm’s logic system.

To evaluate the efficiency of the designs, logic cost calculations were performed, taking into
account the number of gates and fan-ins required for each design.The unoptimized design
needed a total cost of 49, whereas the optimized design significantly reduced this cost to 15,
showcasing the advantages of the optimized Boolean expression. Making it faster and less
complex to have the ability to be flexible, easier to debug and control.

The schematic design (Figure 5) of the optimized expression was implemented using Quartus II
software, showing how the gate networks may be built. This step allowed for a visual
representation of the optimized logic, which consisted of two three-input AND gates, one
two-input AND gate, and one three-input OR gate. This design was notably simpler and more
straightforward than the unoptimized expression.

To validate the functionality of the alarm system, a Verilog code was written using a dataflow
modeling approach (Figure 6). The Verilog code accurately reflected the optimized Boolean
expression and was implemented on the Altera DE2-155 board. Simulation results (Figure 7) for
all 16 cases of the truth table were generated and analyzed, confirming that the alarm system
behaved as intended.

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Additionally, a bonus task was done to provide a Verilog code using behavioral modeling with if
statements (Figure 8 and 9). This alternative approach allowed for a clearer and more simple
representation of the alarm system's behavior.

Gate networks for the unoptimized and optimized circuits were generated by the Quartus II
software, respectively (Figure 10 and 11). In Figure 10, representing the unoptimized circuit, a
complex network consisting of ten two-input AND gates, three three-input AND gates, and one
eight-input OR gate is evident. This complexity emphasizes the challenges associated with
handling extensive logic gates, reducing the circuit's flexibility and making it more challenging to
test for errors or adapt to other applications. In contrast, Figure 11 illustrates the gate network
for the optimized circuit, which displays simplicity with just two three-input AND gates, one
two-input AND gate, and one three-input OR gate. This simplified design enhances the circuit's
efficiency and functionality, allowing faster testing and flexibility for potential modifications.

In conclusion, this mini-project successfully designed and implemented a car safety alarm
system using digital logic design. The Karnaugh map-based optimized design provided simpler
and more efficient designs. The optimized Boolean expression significantly reduced logic costs,
enhancing efficiency. The Verilog code and simulations validated the system's functionality,
emphasizing its reliability in enhancing vehicle safety. This project highlights the importance of
digital system design in creating efficient safety systems for modern vehicles.

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