Mixed Signal System Lab Sept 2022 - Lab2 Manual
Mixed Signal System Lab Sept 2022 - Lab2 Manual
Note: Lab reports must be completed and submitted at the end of each week. The report should include the title of
the experiment, date, lab location, your name and ID, and the equipment and electronic components
used. Include also a brief procedure on how the experiment was performed, data obtained and a brief
conclusion. Please also include all required graphs.
I. Introduction
Differential Amplifiers are widely used as input stage for almost all Op-Amps. The Differential Amplifier is
considered the most used building block in analogue integrated-circuit design. This experiment focuses on the
basic MOSFET Differential Amplifier shown in Fig. 1.
II. Objectives
1. Design differential amplifier circuit
2. Design current source circuit to bias differential amplifier circuit
3. Analyze the differential amplifier gain and common-mode rejection ratio (CMRR)
Q1. Estimate the threshold voltage (Vt) and the conduction parameter (k) for the BS107A NMOS transistors,
assuming all transistors are matched. Use the same procedures as in Experiment 1.
Q2. For the circuit in Fig.2, if V+ = 5V and V- = -5V, design your circuit by obtaining IQ, I1, RD, R1 such that VDS1 =
VDS2 = 4V, RD1 = RD2, and ID1 = ID2 = 3 mA when v1 = v2 = -1V. Determine the values of VGS1 and VGS4. Calculate the
maximum and minimum common-mode voltage V that can be applied to v1 and v2, by keeping M1, M2 and M4 biased
𝑣𝑣𝑜𝑜2 𝑣𝑣𝑜𝑜2
in saturation. Calculate the differential gain, 𝐴𝐴𝑑𝑑 = , and its common-mode gain, 𝐴𝐴𝑐𝑐𝑐𝑐 = , by assuming λ =
𝑉𝑉𝑑𝑑 𝑉𝑉𝑐𝑐𝑚𝑚
0.01 V-1 for M4, and λ = 0 V for M1, M2 and M3. Finally, calculate the common-mode rejection ratio (CMRR) in
dB.
Q3. Simulate your circuit from Q2 using BS107 model in PSpice. Apply a differential voltage vd to v1 and apply its
inversion -v1 to v2. This can be done by applying the signal to an inverting Op-Amp circuit with a gain of -1. Sweep
𝐼𝐼𝐷𝐷1 𝐼𝐼𝐷𝐷2
the circuit from -1V to 1V in 0.1V steps. Plot and versus V. Determine the linear region of your circuit from
𝐼𝐼𝑄𝑄 𝐼𝐼𝑄𝑄
the plot/graph.
Q4. Apply a 1 kHz sinusoidal signal with peak of 20 mV to v1, and apply its inversion to v2. Measure the differential
𝑣𝑣𝑜𝑜2
input and output at vo2, and calculate the differential mode gain, 𝐴𝐴 = .
𝑉𝑉𝑑𝑑
Q5. Change your circuit configuration to common mode by directly connecting a 1 kHz sinusoidal signal with peak
of 20 mV to both v1 and v2. Measure the common mode input and the output at vo2, and calculate the common mode
𝑣𝑣𝑜𝑜2
gain, 𝐴𝐴𝑐𝑐𝑐𝑐 = . Calculate the CMRR from your measured gains in dB.
𝑉𝑉𝑐𝑐𝑚𝑚
Q6. Propose 2 modifications to your circuit to enhance the CMRR of your amplifier. Justify your answer.
V. Lab Experiments
Experiment E1.
1. Build the circuit from Q2.
2. Measure the DC currents I1, IQ, ID1, ID2.
3. Measure the DC voltages, VGS1, VGS4, VDS1, VD1, VDS4.
4. Compare your measurements with both designed and simulated values.
Experiment E2.
1. Build the circuit from Q3.
2. Sweep Vd from -1V to 1V in steps of 0.2V.
3. Measure the DC current ID1 and ID2 using multi-meter at each sweeping step. Tabulate the measured results.
4. Measure DC current, IQ.
𝐼𝐼𝐷𝐷1 𝐼𝐼𝐷𝐷2
5. Plot and versus Vd.
𝐼𝐼𝑄𝑄 𝐼𝐼𝑄𝑄
Experiment E3.
1. Build the circuit from Q4.
2. Measure the differential input and output at vo2 using oscilloscope and calculate the differential mode gain,
Ad.
3. Compare your measurements with both designed and simulated values.
Experiment E4.
1. Build circuit from Q5.
2. Measure the common-mode input and output at vo2, and calculate the common mode gain, Acm.
3. Calculate the CMRR from measured gains in dB.
4. Compare your measurements with both designed and simulated values.
VII. References
[1] D.A. Neamen, Microlectronics: Circuit Analysis and Design, McGraw- Hill, 2010
[2] K.R.K.Rao., (2008) Analog ICs, Current Mirrors, Available: http://nptel.ac.in/courses/108106068/