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01 Sheet

This document contains 16 questions about digital electronics concepts including latches, flip-flops, and 555 timer circuits. The questions ask the reader to draw output waveforms given different input signals and circuit configurations, determine output frequencies and duty cycles for 555 timer circuits, and calculate external component values. The questions include diagrams of different digital logic circuits and input/output signal patterns.

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15 views

01 Sheet

This document contains 16 questions about digital electronics concepts including latches, flip-flops, and 555 timer circuits. The questions ask the reader to draw output waveforms given different input signals and circuit configurations, determine output frequencies and duty cycles for 555 timer circuits, and calculate external component values. The questions include diagrams of different digital logic circuits and input/output signal patterns.

Uploaded by

mohamedems719
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Electrical Engineering Department Subject: Digital Electronics

Faculty of Engineering at Shoubra 2st semester, 2015/2016


Banha university Sheet No. 1

1- If the waveforms in Fig (1) is applied to an active-LOW input S-R latch, draw the
resulting Q output waveform in relation to the inputs. Assume that Q starts LOW.

2- Solve Problem 1 for the input waveforms in Fig(2) applied to an active-HIGH S-R latch.

3- For a gated S-R latch, determine the Q and Q ’ outputs for the inputs in Figure (3) Show
them in proper relation to the enable input. Assume that Q starts LOW.

4- For a gated D latch, Determine the output Q If the input waveform shown in fig (4) are
applied. if the latch is initially RESET

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5-Two edge-triggered S-R flip-flops are shown in Fig(5) If the inputs are as shown, draw the
Q output of each flip-flop relative to the clock, and explain the difference between the two.
The flip-flops are initially RESET.

6- Draw the Q output relative to the clock for a D flip-flop with the inputs as shown in Fig(6).
Assume positive edge-triggering and Q initially LOW.

7- Draw the Q output relative to the clock signal for a D flip-flop with the inputs as shown in
Fig (7). Assume negative edge-triggering and Q initially LOW.

8- The Q output of an edge-triggered S-R flip-flop is shown in relation to the clock signal in
Fig(8) . Determine the input waveforms on the S and R inputs that are required to produce
this output if the flip-flop is a positive edge-triggered type.

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9- For a positive edge-triggered J-K flip-flop with inputs as shown in (9). determine the Q
output relative to the clock. Assume that Q starts LOW.

10- For a negative edge-triggered J-K flip-flop with the inputs in Fig(10), develop the Q
output waveform relative to the clock. Assume that Q is initially LOW.

11- Determine the Q waveform relative to the clock if the signals shown in Fig(11) are
applied to the inputs of the J-K flip-flop. Assume that Q is initially LOW.

12- Determine the Q waveform relative to the clock if the signals shown in Fig(12) are
applied to the inputs of the T flip-flop. Assume that Q is initially HIGH.

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13- Determine the frequency of 555 time circuit run as astable multivibrator. if the resistance
RA = 10 kΩ , RB = 3 kΩ and the capacitor C = 0.1 uF.

14- calculate the pulse width for the 555 time circuit run as monostable multivibrator. if the
resistance RA = 10 kΩ and the capacitor C = 0.01 uF.

15- A 555 timer is configured to run as an astable multivibrator as shown in Fig(13).


Determine its frequency and duty cycle.

16- Determine the values of external resistances for 555 timers used as an astable
multivibrator with an output frequency of 20 kHz. If the external capacitor C is 0.002 uF and
the duty cycle is to be approximately 75%.

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