Serial Communication Protocol

Serial communication:
Serial communication is a communication method that uses one or two transmission lines
to send and receive data, and that data is continuously sent and received one bit at a time.

Parallel communication
In data transmission, parallel communication is a method of conveying multiple binary
digits (bits) simultaneously using multiple conductors.
 UART(Universal Asynchronous Receiver Transmitter)

 UART Communication stands for Universal asynchronous receiver-transmitter. Asynchronous

means there is no clock signal to synchronize the output bits from the transmitting device going to
the receiving end.
 Atmega 32  pin number PD0 & PD1 are used for UART . PD0 (Receiver) ,PD1(Tranmitter)
 It transfers data between devices by connecting two wires between the devices, one is the
transmission line while the other is the receiving line.
 The main advantage of this communication protocol is that its not necessary for both the devices to
have the same operating frequency.
 For example, two microcontrollers operating at different clock frequencies can communicate with
each other easily via serial communication.
 Communication between two UART devices may be simplex, full-duplex or half-duplex. A full-
duplex device is capable of bi-directional network data transmissions at the same time. Half-duplex
devices can only transmit in one direction at one time. With half-duplex mode, data can move in two
directions, but not at the same time.
 It takes two UART’s to communicate directly with each other. On one end the transmitting UART
converts parallel data from a CPU into serial form then transmits the data in serial form to the second
UART which will receive the serial data and convert it back into parallel data. This data can then be
accessed from the receiving device.
 Instead of clock signals the transmitting and receiving bit use start and stop bit signals for the data
packages. These start and stop bits define the beginning and the end of the data packages.
 Therefore, the receiving UART knows when to start and stop reading the bits.
Features
• Full Duplex Operation (Independent Serial Receive and Transmit Registers)

• Asynchronous or Synchronous Operation

• Master or Slave Clocked Synchronous Operation
• High Resolution Baud Rate Generator
• Supports Serial Frames with 5, 6, 7, 8, or 9 Data Bits and 1 or 2 Stop Bits
• Odd or Even Parity Generation and Parity Check Supported by Hardware
• Data OverRun Detection
• Framing Error Detection

 The transmitting UART receives data from a data bus. A data bus is used to send data
from another device such as a microcontroller, memory or CPU.
 When the transmitting UART receives the data it processes the data by adding a start
bit and a stop bit. This, in turn, creates a data package.
 Bit by bit the data packet is serially output at the Tx pin. UART will then read the
data packet bit by bit through its Rx pin.
 The receiving UART will convert the data back to its original form through removing
the start bit, parity bit and stop bits. Receiver will finally transfer the data packet in
parallel to the data bus.
Explanation of Timing Diagram

This is how UART transmitted data is organized: It is organized into packets that have one start bit, 5 to
9 data bits. A parity bit is optional, and 2 stop bits.
Start Bit: When we are not transmitting data, the UART data transmission line is usually high voltage. In
order to start the transfer process the transmitting UART switches from high voltage to low voltage for one
clock cycle. The receiving UART will detect the high to low voltage transition and start reading the bits at
the accurate baud rate.

Parity: Parity is the oddness or evenness of a number. The parity bit functions to tell the receiving UART
if the data has changed during transmission. If the parity bit is a 0 then it is even parity. If the bit is a 1 then
it is an odd parity. For the UART to know that the transmission is free of errors the parity bit has to match
the data.

Stop bits: For at least two-bit duration the transmitting UART drives the transmission line from a low to a
high voltage.

Baud Rate
The communication between two devices via UART Protocol occurs by transmission of bits. A total of 8
bits are sent one right after the other to transmit a byte. A bit is either a logical low or high. The time interval
between two bits is called the baud rate or bit rate.

Errors in UART:-

Overrun error: When the receiving UART cannot process the incoming characters before the next
characters, this is known as an overrun error.

Underrun error: When the UART transmitter has finished sending a character and the transmit buffer is
empty then an underrun error has occurred. This is due to the fact that in asynchronous modes this is treated
as a sign that no data remains transmitted.

Framing error: When there is no stop bit at the expected interval A UART will detect an error. The start
bit is used to identify the beginning of an incoming data packet. If the data packet does not arrive at the
expected state at the expected time the UART will signal a framing error. If the data line experiences a
break condition it will also be signalled as a framing error.

Parity error: A parity error happens when the parity of the number of one-bits does not match the one
specified by the parity bit. Since the use of parity bits is optional, this error will occur if you enable the
parity-checking.

ACTIVITY:
Application of UART:

SPI (Serial peripheral interface)

MOSI  Master out Slave In

MISO Master In Slave out
SCLK  Serial clock
SSSlave select /CS CHIP SELECT

 SPI is called as a 4-wire bus as it requires four wires for its communication
 Serial Peripheral Interface or SPI is a synchronous serial communication protocol that provides full –
duplex communication at very high speeds. Serial Peripheral Interface (SPI) is a master – slave type
protocol that provides a simple and low cost interface between a microcontroller and its peripherals.
 SPI used for short distance communications. SPI devices communicates each other using a master
slave architecture with a single master. Multiple slaves are supported through individual slave select
lines.
 SPI Interface bus is commonly used for interfacing microprocessor or microcontroller with memory
like EEPROM, RTC (Real Time Clock), ADC (Analog – to – Digital Converters), DAC (Digital – to
– Analog Converters), displays like LCDs, Audio ICs, sensors like temperature and pressure,
memory cards like MMC or SD Cards or even other microcontrollers.
Master will generate clock whenever it wants to write data to a Slave device. After 8 clock pulses
data in the master device (A7 ~ A0) is transferred to slave device and data in the slave device (B7 ~ B0)
is transferred to the master device.
Buffer Register, it acts as an interface between user (processor, programmer) and SPI.
Usually shift register won’t be directly accessible. So if we need to transmit data, we will write it to the
buffer register.
So it will automatically written to shift register when it is free and transmission will start.
Similarly data is received in the shift register is automatically transferred to buffer register once the action is
complete.
We can easily read from it. Thus buffer register will avoid all glitches that can happen if we try to read or
write to shift register directly while transmission is taking place.

ACTIVITY:

Application of SPI:
 I2C (Inter Integrated Circuit or 2 wired protocol)

 I2C stands for Inter-Integrated Circuit. Its is two wired protocol (SDA & SCL).
 The I2C protocol is synchronous and half duplex protocol(one way
communication)
 It is a bus interface connection protocol incorporated into devices for serial
communication. It was originally designed by Philips Semiconductor in 1982.
Recently, it is a widely used protocol for short-distance communication.
 I2C combines the best features of SPI and UARTs. With I2C, you can connect
multiple slaves to a single master (like SPI) and you can have multiple masters
controlling single, or multiple slaves. This is really useful when you want to have
more than one microcontroller logging data to a single memory card or displaying text
to a single LCD.

 SDA (Serial Data) – The line for the master and slave to send and receive data.
 SCL (Serial Clock) – The line that carries the clock signal.


 WORKING OF I2C

With I2C, data is transferred in messages. Messages are broken up into frames of data.
Each message has an address frame that contains the binary address of the slave, and one or
more data frames that contain the data being transmitted. The message also includes start and
stop conditions, read/write bits, and ACK/NACK bits between each data frame

Start Condition: The SDA line switches from a high voltage level to a low voltage
level before the SCL line switches from high to low.
Stop Condition: The SDA line switches from a low voltage level to a high voltage
level after the SCL line switches from low to high.

Address Frame: A 7 or 10 bit sequence unique to each slave that identifies the slave when the master wants
to talk to it.
Read/Write Bit: A single bit specifying whether the master is sending data to the slave (low voltage level)
or slave is sending , master is receiving (high voltage level).
ACK/NACK Bit: Each frame in a message is followed by an acknowledge/no-acknowledge bit. If
an address frame or data frame was successfully received, an ACK bit is returned to the sender from the
receiving device.

ADDRESSING

I2C doesn’t have slave select lines like SPI, so it needs another way to let the slave know that data is being
sent to it, and not another slave. It does this by addressing. The address frame is always the first frame after
the start bit in a new message.
The master sends the address of the slave it wants to communicate with to every slave connected to it. Each
slave then compares the address sent from the master to its own address. If the address matches, it sends a
low voltage ACK bit back to the master. If the address doesn’t match, the slave does nothing and the SDA
line remains high.

READ/WRITE BIT
The address frame includes a single bit at the end that informs the slave whether the master wants to write
data to it or receive data from it. If the master wants to send data to the slave, the read/write bit is a low
voltage level. If the master is requesting data from the slave, the bit is a high voltage level.
THE DATA FRAME
After the master detects the ACK bit from the slave, the first data frame is ready to be sent.

The data frame is always 8 bits long, and sent with the most significant bit first. Each data frame is
immediately followed by an ACK/NACK bit to verify that the frame has been received successfully. The
ACK bit must be received by either the master or the slave (depending on who is sending the data) before
the next data frame can be sent.

After all of the data frames have been sent, the master can send a stop condition to the slave to halt the
transmission. The stop condition is a voltage transition from low to high on the SDA line after a low to high
transition on the SCL line, with the SCL line remaining high.

Sending Data to a Slave Device:

Reading Data from a slave device:

Bit rate generator unit

The bit rate generator unit controls the SCL period in the master mode to generate SCL frequency. It is
calculated by,

SCL frequency = (CPU CLK frequency)/(16+2(TWBR)*4^TWPS )

Find TWBR using above equation.

Where TWPS is a value of a pre-scaler bit in TWSR.

ACTIVITY:
Application of I2C