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ASIC Verification Brochure

This document provides information about Takshila VLSI's ASIC Design and Verification course. The 5-month course teaches SystemVerilog, UVM, and HDL design and verification through hands-on projects. Students learn verification planning, testing, and coverage analysis. The course is taught by an instructor with 15+ years of industry experience in CPU and IP design/verification. Students receive tool access and 100% placement assistance. Successful graduates are placed in companies like Capgemini, L&T, HCL, Wipro, and Synopsys.

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tariq786
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34 views

ASIC Verification Brochure

This document provides information about Takshila VLSI's ASIC Design and Verification course. The 5-month course teaches SystemVerilog, UVM, and HDL design and verification through hands-on projects. Students learn verification planning, testing, and coverage analysis. The course is taught by an instructor with 15+ years of industry experience in CPU and IP design/verification. Students receive tool access and 100% placement assistance. Successful graduates are placed in companies like Capgemini, L&T, HCL, Wipro, and Synopsys.

Uploaded by

tariq786
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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ASIC Design

& Verification
ABOUT TAKSHILA VLSI
Takshila VLSI is among the top VLSI training institutes in India. At Takshila, we under-
stand the changing demands in the field of VLSI. Our courses are designed to offer
students hands-on experience in industry trends. We focus on the overall growth and
development of the student. At Takshila, our courses are job oriented and our trainers
have over 15+ year’s industry experience.

Since our inception, we have strived to remain


among the best VLSI training institute. We do
this through intensive training, affiliation with
top-tier semiconductor companies and effec-
tive placement programs. Our primary aim at
Takshila is to connect the student’s skill set
with industry requirements. We have a very
conducive learning environment with modern
facilities and tools. Our student’s excellent
performance in the field has continually
ranked us the best VLSI institute in India.

TAKSHILA VLSI UNIQUE FEATURES

Expert Trainers and Curriculum Online/Offline Courses & Affordable Fee


We collaborate with trainers who have over 15+ Our online/offline VLSI courses are designed to
years in the industry. All our courses are profes- ensure that our students gain access to training
sionally designed and are job-oriented to satisfy materials and classrooms at their convenience.
the demands of the VLSI industry. Our courses We offer state-of-the-art courses at very affordable
are designed and delivered by Professionals in prices. Our prices are very affordable and competi-
The Industry. tive with monthly EMI facility.

100% Placement Support Powerful EDA Tools


At Takshila VLSI technologies we provide place- We utilize industrial standard EDA tools for
ment support for our students till they get hands-on training of our students. During your
placed. We collaborate with over 200+ top-level period as a trainee in our VLSI institute, EDA tools
semiconductor companies that provide us with are accessible 24×7 through our vpn service.
placement opportunities for our students.
ASIC DESIGN & VERIFICATION
COURSE DESCRIPTION
Takshila VLSI’s job oriented ASIC Design & Verification course is designed
to give industry standard live experience to a student. Course majorly
focuses on giving handson experience in Verilog, System Verilog and UVM
using EDA tools. Live projects such as AXI to I2C bridge protocol cover all
aspects of design verification using system Verilog and universal
verification methodology (UVM). By end of the course student will have all
knowledge required to kick-start their career in ASIC verification domain.

TRAINER DETAILS
Trainer is having 15+ years of experience in CPU Design and Verification,
Universal Verification Methodology (UVM), IP/SOC verification, He worked on
protocols such as DDR5, PCIe, USB, SATA, Ethernet IP and Sub-System level
Verification. Having experience in writing/analysing coverage matrix such as
functional coverage, code coverage and SVA assertions. Worked and lead
across functional Design and Verification teams. Experience in both ARM as
well as ARC Architectures. Having working experience with tools modelsim,
Questasim, VCS, Simvision, DVE, Debussy, NCSim, and Verdi. He is our expert
for providing hands-on experience to our students.

LEARNING OUTCOME ELIGIBILITY


Get handson experience in System Verilog, UVM and HDL’s by B.E/B.Tech in EEE, ECE & EIE pursuing or completed.
executing industry standard live projects.
M.E/M.Tech/M.S in VLSI/Embedded/Any other
Gain deep knowledge in developing Verification Plan, Test Plan, specialization
Functional Coverage Plan and Coverage Analysis.
Acquire skill in Regression flow automation.
Complete understanding of ASIC and FPGA design flows. MODE OF STUDY
Placements ready with improved soft skills and strong digital
basics. Offline, Online – Daily and Weekends

KEY COURSE FEATURES


TOOLS & VPN
100% placement and tool support till placement is done.
24×7 tool access through vpn. Questasim, VCS and DVE with 24x7 VPN access to tools.

Affordable fee and EMI facility.


Industry live projects under the supervision of 15+ experienced
trainer. 200+ LIST OF PLACEMENT
Course material, hand-outs, quizzes, assignments to assist in
learning.
COMPANIES
100% Assured Placement Assistance Till get placed.
DURATION: 5 Months Typical placement companies: Capgemini, L&T, HCL, Wipro,
Cyient, AMD, Tessolve, Synapse, Synopsys, Altencalsoft, Insemi,

COURSE LINK: PerfectVIPs, Sankalp, Samsung, Atria, Mirafra, Incise and many
more.
https://www.takshila-vlsi.com/course/asic-verification/ For more info see: https://www.takshila-vlsi.com/placements/

CONTACT INFO: [email protected] +91- 97429 72744


COURSE CURRICULUM
S.No Module Name Sub-Modules
Module 1 Basics of Unix/Linux Introduction to Unix/Linux OS Architecture

UNIX Directory Structures and Unix Commands

UNIX Shells

Module 2 Advanced Digital Electronics and Revision of Digital Electronics


Digital Logic Designs
Basics of CMOS Logic Design and Realization of Digital Circuits

Advanced Arithmetic and Logic Designs

FPGA Design Flows and Architectures

Module 3 Scripting Languages (Widely Used Basics of PERL /PYTHON


in Industry)
Basics of TCL

Introduction to Process Automation using Perl Scripting

Module 4 EDA Tool Introduction Logic Simulation Tools – Questa sim

Logic Synthesis Tools - Xilinx for synthesis of design

Module 5 HDLs For Digital Logic Design and Introduction to HDLs


Verification
Verilog HDL's

Module 6 Digital Logic Design and Verification


using Verilog

Module 7 Mini Project on Verilog

Module 8 Introduction to Logic Synthesis

Module 9 Design Verification using System 1) Introduction to System Verilog


Verilog 2) Introduction to OOPs
3) Threads and Mailbox
4) Introduction to Callbacks
5) Functional Coverage
6) Introduction to Assertions

Module 10 Mini Project on System Verilog

Module 11 Design Verification using UVM

Module 12 Mini Project on UVM

Module 13 UVM-RAL UVM environment using register layer of UVM

Module 14 Developing Verification Plan, A Major project AXI-I2C/SPI bridge covering the SV-UVM features
Test Plan, Functional Coverage Plan
and Coverage Analysis

Module 15 Soft Skills Development Programs

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