COURSE CODE: 20CS0503 R20

SIDDARTH INSTITUTE OF ENGINEERING & TECHNOLOGY: PUTTUR

(AUTONOMOUS)
Siddharth Nagar, Narayanavanam Road – 517583
QUESTION BANK (DESCRIPTIVE)

Subject with Code: DLD(20CS0503)

Course& Branch: B.Tech & CSE,CSM,CAD,CCC,CIC,CAI,CSIT
Year & Sem: I-B.Tech.& II-Sem. Regulation: R20

UNIT III
COMBINATIONAL LOGIC

1 a) Define combinational circuit and explain its analysis procedure.

combinational circuit:
The circuit whose output at a given instant of time depends only on the present input variables is
known as combinational circuits. The combinational circuit consists of input variables, logic gates,
and output variables.

The block diagram of n*m combinational circuit is show in figure

FIGURE: Block diagram of combinational circuit

ANALYSIS PROCEDURE:

The analysis of a combinational circuit is the procedure by which we can determine the function that
the circuit implements. In this procedure from the given circuit diagram we have to obtain a set of
Boolean functions for outputs of circuit, a truth table, or a possible explanation of the circuit operation.
Let us see the procedure to determine the Boolean functions for outputs of circuits from the given
circuit.

 First make sure that the given circuit is combinational circuit and not the sequential circuit. The
combinational circuit has logic gates with no feedback path or memory elements.
 Label all gate outputs that are a function of input variables with arbitrary symbols, and
determine the Boolean functions for each gate output.
 Label the gates that are a function of input variables and previously labelled gates and determine
the Boolean function for them.
 Repeat the step 3 until the Boolean function for outputs of the circuit are obtained.
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 Finally, substituting previously defined Boolean functions, obtain the output Boolean functions
in terms of input variables.

1 b) Explain the procedure for designing a combinational circuit.

DESIGN PROCEDURE:

The design of combinational circuits starts from the outline of the problem statement and ends in a logic
circuit diagram or a set of Boolean functions from which the logic diagram can be easily obtained. The
design procedure of the combinational circuit involves following steps:
 The problem definition.
 The determination of number of available input variables and required output variables.
 Assigning letter symbols to input and output variables.
 The derivation of truth table indicating the relationships between input and output variables.
 Obtain simplified Boolean expression for each output.
 Obtain the logic diagram.

2 a) Explain about Binary Half Adder with truth table and logic diagram.
Half Adder:
The Half adder operation needs two binary inputs: augend and addend bits; and two binary outputs:
sum and carry. The truth table shown in table gives the relation between input and output variables for
half adder operation.

Block diagram

Truth Table
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K-Map simplification for carry and sum:

For carry For sum

Carry=AB sum= A’B + AB’

Logic Diagram:
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2 b) Design and draw a full adder circuit.

Full Adder:

A full adder is a combinational circuit that forms the arithmetic sum of three input bits. It consists of
three inputs and two outputs. Two of the input variables, denoted by A and B, represent the two
significant bits to be added. The third input Cin represents the carry from the previous lower significant
position.

Block diagram

Truth Table
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3 a) Design a 4-bit adder-subtractor circuit and explain its operation.

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3 b) Explain about Decimal Adder with a neat diagram.

The digital systems handles the decimal number in the form of binary coded decimal numbers (BCD).
A BCD Adder Circuit that adds two BCD digits and produces a sum digit also in BCD. BCD numbers
use 10 digits, 0 to 9 which are represented in the binary form 0 0 0 0 to 1 0 0 1, i.e. each BCD digit is
represented as a 4-bit binary number. When we write BCD number say 526, it can be represented as
Here, we should note that BCD cannot be greater than 9.

The addition of two BCD numbers can be best understood by considering the three cases that occur
when two BCD digits are added.

Sum Equals 9 or less with carry 0

Let us consider additions of 3 and 6 in BCD.

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The addition is carried out as in normal binary addition and the sum is 1 0 0 1, which is BCD code for
9.

Sum greater than 9 with carry 0

Let us consider addition of 6 and 8 in BCD

The sum 1 1 1 0 is an invalid BCD number. This has occurred because the sum of the two digits exceeds
9. Whenever this occurs the sum has to be corrected by the addition of six (0110) in the invalid BCD
number, as shown below

After addition of 6 carry is produced into the second decimal position.

Sum equals 9 or less with carry 1

Let us consider addition of 8 and 9 in BCD

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In this, case, result (0001 0001) is valid BCD number, but it is incorrect. To get the correct BCD result
correction factor of 6 has to be added to the least significant digit sum, as shown below

Going through these three cases of BCD addition we can summarize the BCD addition procedure as
follows:

1. Add two BCD numbers using ordinary binary addition.

2. If four-bit sum is equal to or less than 9, no correction is needed. The sum is in proper BCD
form.
3. If the four-bit sum is greater than 9 or if a carry is generated from the four-bit sum, the sum is
invalid.
4. To correct the invalid sum, add 01102 to the four-bit sum. If a carry results from this addition,
add it to the next higher-order BCD digit.

The logic circuit to detect sum greater than 9 can be determined by simplifying the Boolean expression
of given BCD Adder Truth Table.
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With this design information we can draw the BCD Adder Block Diagram, as shown in the Fig. 3.32.
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4 a) Explain the working of a Carry- Look ahead adder.

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COURSE CODE: 20CS0503 R20

4 b) Sketch BCD adder block diagram and explain its working.

The digital systems handles the decimal number in the form of binary coded decimal numbers (BCD).
A BCD Adder Circuit that adds two BCD digits and produces a sum digit also in BCD. BCD numbers
use 10 digits, 0 to 9 which are represented in the binary form 0 0 0 0 to 1 0 0 1, i.e. each BCD digit is
represented as a 4-bit binary number. When we write BCD number say 526, it can be represented as
Here, we should note that BCD cannot be greater than 9.

The addition of two BCD numbers can be best understood by considering the three cases that occur
when two BCD digits are added.
COURSE CODE: 20CS0503 R20
Sum Equals 9 or less with carry 0

Let us consider additions of 3 and 6 in BCD.

The addition is carried out as in normal binary addition and the sum is 1 0 0 1, which is BCD code for
9.

Sum greater than 9 with carry 0

Let us consider addition of 6 and 8 in BCD

The sum 1 1 1 0 is an invalid BCD number. This has occurred because the sum of the two digits exceeds
9. Whenever this occurs the sum has to be corrected by the addition of six (0110) in the invalid BCD
number, as shown below

After addition of 6 carry is produced into the second decimal position.

Sum equals 9 or less with carry 1

Let us consider addition of 8 and 9 in BCD

COURSE CODE: 20CS0503 R20

In this, case, result (0001 0001) is valid BCD number, but it is incorrect. To get the correct BCD result
correction factor of 6 has to be added to the least significant digit sum, as shown below

Going through these three cases of BCD addition we can summarize the BCD addition procedure as
follows:

 Add two BCD numbers using ordinary binary addition.

 If four-bit sum is equal to or less than 9, no correction is needed. The sum is in proper BCD
form.
 If the four-bit sum is greater than 9 or if a carry is generated from the four-bit sum, the sum is
invalid.
 To correct the invalid sum, add 01102 to the four-bit sum. If a carry results from this addition,
add it to the next higher-order BCD digit.

The logic circuit to detect sum greater than 9 can be determined by simplifying the Boolean expression
of given BCD Adder Truth Table.
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With this design information we can draw the BCD Adder Block Diagram, as shown in the Fig. 3.32.
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5 a) Design the combinational circuit of Binary to Excess-3 code convertor.

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5 b) Design and implement 2-bit by 2-bit binary multiplier.

2-bit binary multiplier circuit implementation: Let us implement a two-bit binary multiplier. Let the
two binary numbers be A1 A0 and B1B0. The multiplication table will, then, look as:
A1 A0
X B1 B0
-------------------------------------------------------------------

B0A1 B0A0
B1A1 B1A0 x

-------------------------------------------------------------------

P3 P2 P1 P0

Thus, we get the partial products as:

P0 = A0*B0
P1 = A0*B1 xor A1 * B0 ; carry generated here goes to next stage
P2 = A1*B1 xor (A0*B1) * (A1*B0)
P3 = A1*B1 and (A0*B1) * (A1*B0)

Two-bit binary multiplier circuit diagram

Thus, we can see that a 2-bit binary multiplier can be implemented using two half-adders only.
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6 a) What is a Magnitude comparator?
A comparator is a special combinational circuit designed primarily to compare the relative magnitude
of two binary numbers. It shows the block diagram of an n bit comparator. It receives two n bit numbers
A and B as inputs and the outputs are A>B, A=B, A<B. Depending upon the relatives magnitudes of
the two numbers, one of the outputs will be high.

6 b) Design and implement a 2-bit Magnitude comparator.

2-bit Magnitude Comparator

A comparator that compares two binary numbers (each number having 2 bits) and produces three
outputs based on the relative magnitudes of given binary bits is called a 2-bit magnitude comparator.

Truth Table

A0 B1 B0 A<B A=B A>B

A1
0 0 0 0 0 1 0

0 0 0 1 1 0 0

0 0 1 0 1 0 0

0 0 1 1 1 0 0

0 1 0 0 0 0 1

0 1 0 1 0 1 0

0 1 1 0 1 0 0

0 1 1 1 1 0 0
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1 0 0 0 0 0 1

1 0 0 1 0 0 1

1 0 1 0 0 1 0

1 0 1 1 1 0 0

1 1 0 0 0 0 1

1 1 0 1 0 0 1

1 1 1 0 0 0 1

1 1 1 1 0 1 0

The truth table derives the expressions of A<B, A>B, and A=B as below

A<B – A1’B1’+ A0’B1B0 + A1’A0’B0

A>B – A1B1’ + A0B1’B0’ + A1A0B0’
A=B – (A0 Ex-Nor B0) (A1 Ex-Nor B1)
With these expressions, the Circuit diagram can be as follows
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7 a) What is a Decoder? List its advantages.
Decoder:

A decoder is a combinational circuit. It has n input and to a maximum m = 2 n outputs. Decoder is

identical to a Demultiplexer without any data input. It performs operations which are exactly opposite
to those of an encoder.

Block diagram

Examples of Decoders are following.

 Code converters
 BCD to seven segment decoders
 Nixie tube decoders
 Relay actuator

Advantages of decoder:

1. Increased flexibility: Binary decoders provide a flexible way to select one of multiple outputs
based on a binary code, allowing for a wide range of applications.
2. Improved performance: By converting a serial code into a parallel set of outputs, binary decoders
can improve the performance of a digital system by reducing the amount of time required to
transmit information from a single input to multiple outputs.
3. Improved reliability: By reducing the number of lines required to transmit information from a
single input to multiple outputs, binary decoders can reduce the possibility of errors in the
transmission of information.

7 b) Implement Full Adder using a Decoder and an OR gate.

A full adder circuit can be implemented using a decoder and two OR gates. Here
is one possible implementation:
1. Connect the two input bits (A and B) to the input pins of the decoder.
2. Connect the carry-in (Cin) input to the enable pin of the decoder.
3. Connect the output pins of the decoder to the input pins of the two OR gates.
4. Connect the output pins of the OR gates to the S (sum) and Cout (carry-out)
outputs of the full adder circuit.
It is important to note that this is just one possible implementation and there are
other ways to implement a full adder circuit as well. Additionally, it may be
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necessary to include additional logic gates such as AND gates to fully implement
the circuit.

Truth Table
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8 a) What is encoder? Design octal to binary encoder.

Encoder

Encoder is a combinational circuit which is designed to perform the inverse operation of the decoder.
An encoder has n number of input lines and m number of output lines. An encoder produces an m bit
binary code corresponding to the digital input number. The encoder accepts an n input digital word
and converts it into an m bit another digital word.

Block diagram

Examples of Encoders are following.

 Priority encoders
 Decimal to BCD encoder
 Octal to binary encoder
 Hexadecimal to binary encoder
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8 b) Explain in detail about Priority Encoder.

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9 a) Design and implement the following Boolean function by 8:1 Multiplexer.

(A,B,C.D)=Σm(0,1,2,5,7,8,9,14,15).
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9 b) Implement the following Boolean function by 8:1 multiplexer. F(A, B, C, D) = A’BD’ + ACD +
A’C’ D +B’CD.

Convert into standard SOP form

= A‘BD‘ (C‘+C) + ACD (B‘+B) + B‘CD (A‘+A) + A‘C‘D (B‘+B)
= A‘BC‘D‘ + A‘BCD‘+ AB‘CD+ ABCD +A‘B‘CD + AB‘CD+A‘B‘C‘D+ A‘BC‘D
= A‘BC‘D‘ + A‘BCD‘+ AB‘CD + ABCD +A‘B‘CD +A‘B‘C‘D+ A‘BC‘D
= m4+ m6+ m11+ m15+ m3+ m1+ m5
= ∑m (1, 3, 4, 5, 6, 11, 15)

Implementation table:

Multiplexer Implementation:
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10 a) Design and implement a full subtractor using Demultiplexer.
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10 b) Design 1:8 Demultiplexer using two 1:4 Demultiplexer.