ST 33 KTPM 2 Xi 2 C
ST 33 KTPM 2 Xi 2 C
Data brief
Features
TPM features
Hardware features
• Highly reliable flash memory with error correction code
• Extended temperature range: −40 °C to 105 °C
• ESD (electrostatic discharge) protection up to 4 kV (HBM)
• 1.8 V or 3.3 V supply voltage range
Security features
• Active shield
• Monitoring of environmental parameters
• Hardware and software protection against fault injection
• FIPS SP800-90A and AIS20-compliant deterministic random-bit generator
(DRBG)
• FIPS SP800-90B and AIS31-compliant true random-number generator (TRNG)
• Cryptographic algorithms:
– RSA key generation (1024, 2048, 3072 and 4096 bits)
– RSA signature (RSASSA-PSS, RSASSA-PKCS1v1_5)
– RSA encryption (RSAES-OAEP, RSAESPKCS1-v1_5)
– SHA-1, SHA-2 (256 and 384 bits), SHA-3 (256 and 384 bits)
– HMAC SHA-1, SHA-2 and SHA-3
– AES-128,192 and 256 bits
– ECC (NIST P-256, P-384 curves): key generation, ECDH and ECDSA,
ECSchnorr
– ECDAA (BN-256 curve)
• Device provided with 3 endorsement keys (EK) and EK certificates (RSA2048,
ECC NIST P_256 and ECC NIST P_384)
• Device provisioned with three 2048-bit RSA key pairs to reduce the TPM
provisioning time
1 Description
The STSAFE-TPM (trusted platform module) family of products offers a broad portfolio of standardized solutions
for embedded, PC, mobile, and computing applications.
It includes turnkey products compliant with the Trusted Computing Group (TCG) standards that provide services
to protect the confidentiality, integrity, and authenticity of information and devices.
The STSAFE-TPM devices are easy to integrate thanks to the variety of supported interfaces and the availability
of TPM ecosystem software solutions.
They target Common Criteria, TCG, and FIPS certification.
The ST33KTPM2XSPI offers a slave serial peripheral interface (SPI) by default whereas the ST33KTPM2XI2C
offers exclusively a slave SPI or a slave I²C interface. Both devices are compliant with the TCG PC Client TPM
Profile specifications.
It offers resilience services during the TPM firmware upgrade process, and self-recovery of TPM firmware and
critical data upon failure detection.
The ST33KTPM2XSPI and ST33KTPM2XI2C operate in the –40 °C to 105 °C extended temperature range.
The device is offered in the UFQFPN32 ECOPACK2 package. ECOPACK is an ST trademark.
The figure below gives the pinout of the UFQFPN32 package in which the devices are delivered. Table 1
describes the associated signals.
I2C_SDA/GPIO_6
I2C_SCL/GPIO_5
NiC
NiC
NiC
NiC
NiC
NiC
32 31 30 29 28 27 26 25
VPS 1 24 SPI_MISO/GPIO_0
GND 2 23 NiC
NiC 3 22 VPS
UFQFPN32
NiC 4 21 SPI_MOSI/GPIO_3
NiC 33
NiC 5 20 SPI_CS/GPIO_2
GPI_I2C_Select/NC(1) 6 19 SPI_CLK/GPIO_1
GPIO_PP 7 18 PIRQ
NiC 8 17 RST
9 10 11 12 13 14 15 16
DT70353V2
(1) GPI_I2C_Select for ST33KTPM2XI2C products
NiC
NiC
NiC
NiC
NiC
NiC
NiC
GND
Power supply. This pin must be connected to 1.8 V or 3.3 V DC power rail supplied by
VPS Input
the motherboard.
GND Input Ground, has to be connected to the main motherboard ground.
Reset, active low, used to re-initialize the device. Must not be unconnected. External
RST Input
pull-up resistor required if it cannot be driven.
SPI master input, slave output (output from slave) / General-purpose input/output if I2C
SPI_MISO/GPIO_0 Output(1)
is activated
SPI master output, slave input (output from master) / General-purpose input/output if
SPI_MOSI/GPIO_3 Input(1)
I2C is activated
SPI_CLK/GPIO_1 Input(1) SPI serial clock (output from master) / General-purpose input/output if I2C is activated
SPI chip (or slave) select, internal pull-up (active low; output from master) / General-
SPI_CS/GPIO_2 Input(1)
purpose input/output if I2C is activated
PIRQ Output IRQ, active low, open drain, used by the TPM to generate an interrupt
Physical presence, active high, internal pull-down. Used to indicate physical presence to
GPIO_PP Input
the TPM.
This pin must be connected to an external pull-down resistor to activate the I²C protocol
GPI_I2C_Select Input during product boot time. It can remain unconnected for the SPI protocol.
This pin is internal pull-up by default and becomes internal floating after I²C activation.
Not internally connected: not connected to the die. May be left unconnected but no
NiC -
impact on TPM if connected.
NC - Not connected: connected to the die but unused. Must be left unconnected.
Input/ Bidirectional I²C serial data (open drain without a weak pull-up resistor) / General-
I2C_SDA/GPIO_6
output(1) purpose input/output if SPI is activated
Input I²C serial clock (open drain without a weak pull-up resistor) / General-purpose
I2C_SCL/GPIO_5 Input(1)
input/output if SPI is activated
Note: The UFQFPN32 package has a central pad (PIN33) on the bottom, which is not connected to the die. This pin
does not impact the TPM, be it connected or not.
This section gives some guidance on how to integrate the ST33KTPM2XSPI or ST33KTPM2XI2C device in an
application.
VCC
VCC1
VCC2
1 µF
100 nF
(Min)
Device +
GND
GND1
DT64224V1
GND2
32
NiC 31
NC 30
29
NiC 28
NiC 27
NiC 26
NiC 25
NiC
NC
VPS 1 VPS SPI_MISO
SPI_MISO 24 33 Ω
GND 2 GND NiC 23 VPS
3 22
NiC VPS
UFQFPN32 SPI_MOSI 10 kΩ
4 NiC SPI_MOSI 21 33 Ω
NiC 33 SPI_CS
5 NiC SPI_CS 20 1 µF
6 SPI_CLK 100 nF
(Min)
GPI_I2C_Select SPI_CLK 19 33 Ω
GPIO_PP (opt) 7 GPIO_PP PIRQ
PIRQ 18
56 pF
8 NiC RST 17 RST
16 GND
NiC
10 NiC
11 NiC
NiC
13 NiC
14 NiC
15 NiC
9
12
DT68966V1
Surrounds optional
components
GND
Note: The use of a low-value resistor (typically 33 Ω) on SPI_MISO, SPI_MOSI and SPI_CLK can be recommended
for line adaptation when the signals are affected by parasite spikes. Its use is mandatory to avoid disturbance of
the ramp-up and ramp-down signals.
Note: The capacitor on SPI_CS is optional (see Section 3.2 SPI_CS optional filtering).
Note: The pull-up resistor on the PIRQ line is mandatory to optimize the power consumption in standby mode.
1 kΩ
1 kΩ
SDA
SCL
32
31
30
29
NiC 26
NiC 25
28
27
VPS
SDA
NiC
NiC
SCL
NiC
NiC
1 VPS NC 24
2
GND GND NiC 23
1 µF
100 nF
(Min)
3 NiC VPS 22
4 NiC NC 21
10 kΩ
5 UFQFPN32
NiC NC 20
GPI_I2C_Select 6
GND 2.2 kΩ GPI_I2C_Select NC 19
GPIO_PP (opt) 7 PIRQ
GPIO_PP PIRQ 18
8 RST
NiC RST 17
16 GND
9 NiC
10 NiC
11 NiC
NiC
NiC
14 NiC
15 NiC
12
13
DT68967V2
GND
Note: The pull-up resistor on the PIRQ line is mandatory to optimize the power consumption in standby mode.
4 Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
status are available at: www.st.com. ECOPACK is an ST trademark.
ddd C
e A1
C
A3
SEATING PLANE
D1
b
E2 b
E1 E
1
L
32
D2 L
PIN 1 Identifier A0B8_ME_V3
Millimeters Inches(1)
Symbol
Min Typ Max Min Typ Max
5.30
3.80
0.60
3.45
5.30 3.80
3.45
0.50
0.30
0.75
3.80 A0B8_FP_V2
5 Delivery packing
Surface-mount packages can be supplied with tape and reel packing. The reels have a 13" typical diameter.
Reels are in plastic, either anti-static or conductive, with a black conductive cavity tape. The cover tape is
transparent anti-static or conductive.
The devices are positioned in the cavities with the identifying pin (normally Pin “1”) on the same side as the
sprocket holes in the tape.
The STMicroelectronics tape and reel specifications are compliant with the EIA 481-A standard specification.
Package Description Tape width Tape pitch Reel diameter Quantity per reel
UFQFPN32 Very thin fine pitch quad flat pack no-lead package 12 mm 8 mm 13 in. 3000
A N
D C
Reel size Tape width A Max. B Min. C D Min. G Max. N Min. T Max. Unit
D1
F
W
B0
Y
K0 P A0
Section Y - Y
User direction of feed
UFQFPN 5×5 5.3 ±0.1 5.3 ±0.1 0.75 ±0.1 1.5 8 ±0.1 2 ±0.05 1.55 ±0.05 4 ±0.1 1.75 ±0.1 5.5 ±0.1 12 ±0.3 0.3 ±0.05 mm
Parts marked as E or ES (for engineering sample) are not yet qualified and therefore not approved for use in
production. ST is not responsible for any consequences resulting from such use. In no event will ST be liable for
the customer using any of these engineering samples in production. ST’s Quality department must be contacted
prior to any decision to use these engineering samples to run a qualification activity.
Unmarkable surface
A
Marking composition field
B C
D E F G
I
J
H
Legend:
7 Ordering information
Factory
Supported A marking B marking
Product family Ordering code Package firmware
interface(s) area area
version
Additional information regarding ST TPM devices can be obtained from the www.st.com website.
For any specific support information you can contact STMicroelectronics through the following e-mail:
[email protected].
STMicroelectronics has put in place a Product Security Incident Response Team (ST PSIRT). We encourage you
to report any potential security vulnerability that you might suspect in our products through the ST PSIRT web
page: https://www.st.com/psirt.
Revision history
Table 8. Document revision history
Glossary
AES Advanced encryption standard RSASSA Rivest Shamir Adelman signature scheme
with appendix
CA Certification Authority
SHA Secure Hash algorithm
CC Common Criteria
SPI Serial peripheral interface
DRBG Deterministic random bit generator
TCG Trusted Computing Group®
EC Elliptic curve
TPM Trusted platform module
ECC Elliptic curve cryptography
TRNG True random number generator
ECDAA Elliptic curve direct anonymous attestation
(algorithm) TSS TPM software stack
EK Endorsement key
NV Nonvolatile
Contents
1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
2 UFQFPN32 pin and signal description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Electrical integration guidance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1 Recommended power supply filtering. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.2 SPI_CS optional filtering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.3 Device integration for SPI communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.4 Device integration for I²C communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.1 UFQFPN32 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5 Delivery packing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
6 UFQFPN32 package marking information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
7 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
8 Support and information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
List of tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
List of figures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
List of tables
Table 1. UFQFPN32 descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 2. VCC rising slope. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. UFQFPN32 - Mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 4. Packages on tape and reel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 5. Reel dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 6. UFQFPN32 - Carrier tape dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 7. Ordering information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 8. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
List of figures
Figure 1. UFQFPN32 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 2. Recommended filtering capacitors on VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Typical hardware implementation for SPI communication (UFQFPN32 package). . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Typical hardware implementation for I²C communication (UFQFPN32 package) . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 5. UFQFPN32 - Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 6. UFQFPN32 - Recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 7. Reel diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 8. UFQFPN32 - Embossed carrier tape . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 9. UFQFPN32 - Chip orientation in the embossed carrier tape . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 10. UFQFPN32 standard marking example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13