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Electronic Circuit
Analysis and Design
Electronic
Circuit Analysis

and Design

Second Edition

William H. Hayt, Jr.

Gerold W. Neudeck

Purdue University

JOHN WILEY & SONS, INC.

New York • Chichester • Brisbane • Toronto • Singapore
Copyright © 1995 by John Wiley & Sons, Inc.
Previously published by Houghton Mifflin Company.

Reproduction or translation of any part of this work beyond that

permitted by Sections 107 and 108 of the 1976 United States
Copyright Act without the permission of the copyright owner is
unlawful. Request for permission or further information should
be addressed to the Permission Department, John Wiley & Sons, Inc.
ISBN: 471 12501 6

Printed in the Unites States of America

1098765432

Cover photograph: © 1983, Gabriel Keller, Keller and Peet Associates

The following data sheets are reprinted by permission: FD600, used with
permission of Fairchild Camera and Instrument Corporation; AD547,
courtesy of Analog Devices; LM308, courtesy of National Semiconductor
Corporation; HA-2107/2207/2307, courtesy of Harris Intertype Corpora-
tion; 2N3823, courtesy of Texas Instruments Incorporated; HP5082-4487,
5082-4488, courtesy of Hewlett Packard; 2N5088, 2N5089, courtesy of
Motorola Incorporated; 2N5376, 2N5377, courtesy of Sprague Electric
Company.
To our families:

Marly, Peg, and David

Mariellen, Philip, and Alexander
 Contents

Preface xi

List of Symbols xv

1 Diodes, Diode Models, and Applications 1

1.1 The semiconductor diode 2

1.2 Diode dc 7
circuit models:
1.3 Diode circuit models: low-frequency small-signal 12
1.4 Applications of the diode models 16
1.5 Diode circuit models: high-frequency small-signal 24
1.6 Applications of diodes 27

2 Bipolar and Field-Effect Transistors 48

2.1 npn bipolar transistors 48
2.2 pnp bipolar transistors 53
2.3 Junction field-effect transistors: n-channel 55
2.4 The p-channel JFET 63
2.5 Insulated-gate FET: depletion mode 64
2.6 The enhancement-mode MOSFET 69
2.7 Monolithic resistors 74

3 Transistor dc Models 84
3.1 Bipolar transistor linear dc models 84
3.2 Examples of the use of dc models 92
3.3 Nonlinear dc models: JFETs and depletion- mode MOSFETs 97
3.4 Nonlinear dc models: enhancement-mode MOSFETs 102
3.5 Load lines 106

4 Designing for a Stable Operating Point 120

4.1 Operating-point design against variation in jSjc-

common-emitter 120

Vll
Vlll Contents

4.2 Operating-point design against variation in temperature:

common-emitter 128
4.3 The thermal environment and maximum junction
temperature 131
4.4 Common-collector and common-base biasing 136
4.5 Integrated-circuit operating-point design 138
4.6 JFET and depletion-mode IGFET operating-point design 141
4.7 Enhancement-mode IGFET operating-point design 148
4.8 Common-drain and common-gate biasing 151

5 Small-Signal Circuit Models 162

5.1 Bipolar transistor hybrid- TT models: small-signal low-frequency 163
5.2 Bipolar transistor hybrid-7r models: small-signal high-frequency 166
5.3 Low^-frequency bipolar-model parameter values 167
5.4 High-frequency bipolar-model parameter values 172
5.5 The temperature on bipolar-model parameters 181
effect of
5.6 Bipolar transistor /i-parameter model 184
5.7 FET models: small-signal low-frequency 187
5.8 FET models: small-signal high-frequency 190
5.9 The effect of temperature on FET-model parameters 195

6 Single-Stage Amplifiers at Mid-Frequencies 208

6.1 The common-emitter amplifier: analysis 208
6.2 The common-emitter amplifier: design 215
6.3 Common-base and common-collector amplifiers 219
6.4 The common-source amplifier: mid-frequency analysis 227
6.5 The common-source amplifier: design 231
6.6 Common-gate and common-drain amplifiers 234
6.7 Amplifier analysis in terms of ^-parameters 239

7 Single-stage Amplifiers at Low and

High Frequencies 248
7.1 Frequency response 248
7.2 Decibels and Break Frequencies 250
7.3 High-frequency FET response: common-source 256
7.4 Miller-effect capacitance 261
7.5 High-frequency FET response: common-gate and
common-drain 263
7.6 High-frequency bipolar response: common-emitter 267
7.7 High-frequency bipolar response: common-base and
common-collector 271
Contents IX

7.8 Low-frequency FET response 277

7.9 Low-frequency bipolar response 282
7.10 A common-emitter example: analysis and design 293

8 Multistage Amplifiers 307

8.1 The multistage amplifier at mid-frequencies 307
8.2 An approximation for oj^ 313
8.3 An approximation for 319ojjr^

8.4 An example of multistage amplifier design 322

8.5 The design of a broadband amplifier 329

9 The Operational Amplifier 340

9.1 The ideal operational amplifier 341
9.2 The noninverting amplifier 346
9.3 The inverting amplifier 348
9.4 The differential amplifier 350
9.5 Characteristics of a real operational amplifier 352
9.6 The real inverting amplifier 357
9.7 The real voltage follower 360
9.8 Offset and drift 364

10 Applications of Operational Amplifiers 376

10.1 Reference voltage sources 376
10.2 Voltage detectors and comparators 379
10.3 Differential amplifiers 381
10.4 Bridge amplifiers 384
10.5 Frequency dependence of open-loop gain 388
10.6 Closed-loop frequency response 391
10.7 Stabilityand compensation 395
10.8 Differentiators and integrators 397

Appendixes 477
A. Manufacturers' data sheets 413
B. Answers to odd-numbered problems 441

Index 449
 —

Preface

One of the subjects in which beginning electrical engineering students

profess a strong interest is electronics. This book serves as a basis for a
course ip electronics that a sophomore or junior will find appealing, moti-
vational, and useful. The course should be preceded by an introductory
course in circuit analysis. Students majoring in other disciplines should
also find this introduction to electronics and electronic design interesting,
helpful, and well within the range of their academic abilities.
We hope that students will find this text useful for individual study,
whether at home or in a more formal self-paced course. New topics are
introduced with a minimum of theory and derivation. Whenever possible,
the subjects are related to familiar material. The examples far outnumber
the proofs. As we introduce each new circuit, we analyze it, then give a
numerical example to illustrate the procedure and give a feeling for the
range of practical values of the parameters. This usually leads to a design
example, sometimes to an analysis of the design, and occasionally to a
redesign.
Most sections end with one or two drill problems that stress the topics
just discussed and provide immediate reinforcement of the material. An-
swers to all parts of each drill problem are given, in order, immediately
after the problem. Problems of a more extensive and challenging nature
appear at the end of each chapter. They are presented in the same general
order as the text material, and include many design problems. Several
problems extend the theory or involve circuits not covered explicitly in the
chapter.
Although design problems, unlike analysis problems, usually do not
have unique answers, their practical nature has shown them to be highly
motivational. Most design problems do not, of course, have a single "best"
solution, so our answers are not necessarily any better or worse than yours.
For a few design problems, we give two possible solutions.
Answers to odd-numbered problems are given at the back of the book.
The best way to learn electronic circuit design is by designing circuits
over and over again. It's almost as hard to become adept at designing cir-
cuits by merely reading a book about the subject as it is to become a good
swimmer or tennis player by reading books about swimming or tennis.
Working problems is the recommended way to practice circuit design.
xi
Xll Preface

Engineers earn their salaries by solving problems. Thus we offer a large

selection of problems as the sure road to success.
In this second edition;* our basic philosophy of presenting a student-
oriented text remains unchanged. Rather than covering a vast number of
topics in an encyclopedic fashion, we have chosen to emphasize those ba-
sic concepts underlying the analysis and design of all discrete and inte-
grated circuits. We have retained those features that users of the previous
edition have found desirable. However, we have incorporated a number
of changes that should enhance the book's usefulness. One of the more per-
tinent changes is the inclusion of integrated-circuit components and con-
figurations throughout the text. Many of the examples and all of the prob-
lems are new.
Chapter 1 has been almost completely rewritten. We have expanded
the treatment of semiconductor fundamentals slightly to enhance the un-
derstanding of the junction diode (and, in a later chapter, the understand-
ing of the differences in the various regions of operation of a transistor,
and the current and voltage polarities involved) . The concept of the load
line is also introduced here. We have added new material on power sup-
and Schottky barrier diodes. Useful models for diodes
plies in avalanche
breakdown and cutoff also appear for the first time.
Chapter 2 has been revised to emphasize IEEE standard notation for
and voltages. A simple mathematical treatment is of-
transistor currents
fered for the FET operating in both the ohmic region and in saturation.
We have also expanded and modernized the section on integrated-circuit
resistors.
Chapter 3 presents dc models for various types of transistors and then
uses them to predict circuit operation. We have included a more accurate
linear model for the bipolar transistor, and have added load lines as a con-
ceptual tool, although we have not used them as a technique for graphical
analysis.
In Chapter 4 we have extended biasing techniques to include inte-
grated-circuit methods, particularly the current mirror. Linear models
for FETs have been deleted.
Chapters 5 and 6 have not been substantially changed, although some
material has been rewritten to reflect both improved models and the inte-
grated circuits introduced earlier. The concept of the Early voltage is also
included for the first time.
Chapter 7 has been rewritten completely to give an improved treatment
of frequency response. The high-frequency response of the FET appears
first, and the approach is made without specific application of Bode dia-

grams or complex frequencies. We emphasize the use of open-circuit time

constants and establish them as a concept that is used in all calculations
for CO//. We also present a more complete treatment of common-base and
common-gate frequency response.
 Preface Xlll

Except for the inclusion of IC circuits, Chapter 8 is basically un-

changed. More emphasis is placed on the determination of the high-
frequency response.
Chapter 9 is a new chapter, devoted to the operational amplifier and its
I specifications. We use the concept of the ideal op- amp to introduce the
basic circuits, then consider a real op-amp from the viewpoint of its data
sheets. The internal circuits of the op-amp are not emphasized. We
present basic inverting and noninverting amplifiers, as well as voltage fol-
lowers.
Chapter 10 is also new. It illustrates the use of the op- amp, with a num-
ber ofits important applications, including voltage references, compara-

bridge amplifiers, differentiators, and inte-

tors, differential amplifiers,
frequency response and system stability.
grators.' It also covers
We would like to thank the many students, instructors, and engineers
who have suggested changes that might be made in this edition. We
also wish to thank the reviewers of the second edition: Michael E.
McKaughan, U.S. Coast Guard Academy; Paul D. Smith, Rose-Hulman
Institute of Technology; and Jacek M. Zurada, University of Louisville.
All their comments have been extremely valuable.
To new students, we wish you enjoyment as you design your first elec-
tronic circuits. And we assure you that your confidence and competence
will grow rapidly together.

William H. Hayt, Jr.

Ceroid W. Neudeck
 List of Symbols

A, 57, 249, 341 ^0., 169

AcM, 382 Ke, 185
|A|dB,251 ^CBO> 86
Ai, Ar, 212 ^c£o> 85
|AUid,Fig. 7.1 /C(sat), 94

Av, 164, 251 /dss, 61

Avi, Av„ 210, 211 ho, 168
Ao, 393 /o,4
B, 27 /z, 377
Ccfe, C(,i, 173 k,5
Cd,27 K:(diode), 39
^ds") ^gdy ^gsf 191 K(enh.-iiiode), 70
C^, Ci„ C<,„ C„, 191-192 K(gain), 385
C/ss> Cjss, Coss, Cr^, 191 n,5
C;, C^o, 25 N, 25
Cwiller, 262 Pd, 132
CMRR, CMRRdB, 383 9,5
Cob, 173 r, 13
C„ C„ 166 ru; 166
C,o, 173 Rbb, 85
D, 59 rd, 170
£g,39 flgd, 259

///,/l,249 Rgs, 258

/r, 176 Ri, 341

/<3, 175 Bin, 348

g, 13 B.0, 341
G, 393 Bout, 348
gp, 192 R, (diode), 27
g., 163 B, (sheet), 75
go., 192 Bsat, 90
Go, 393 B», 108
V
K, 185
167 Bref,
flTh,
75
121

XV
XVI List of symbols

r„ 166 Vxh, 121

Rz, 10 ^threshold? 380
R^, 268 v., Fig. 6.1
r., 163 Vo (diode), 9
R., 272 Vo (base), 85
Bo, 9 yfs^ Vis^ yos-> Vrsi
191
T (temp.), 5 Zi, Z„ 212
T (period), 32 aj, 75
T (gain), 395 «dc, 86
Ta, 132 ^,166
Tc, T„, T;, 133 0dc, 85
75
Tref, 00, 167
Va, 170 6, 385

n,, 25 AH, 384

V^BR,4 Av, 31
V^C£(sat), 90 ^5 ^CA, ^HA, ^M' ^/C» 133
«CM, 382 a, 57
Uf, 37 7,259
V„,31 ^gs> '''gd? 259
V„s, 364 r^, r„ 267, 268
Vp, 59 03h, wl, 249
V,ef, 377 coj, 176
Vs, 377 cj„ 266

Vsat, 379 w^, 175

Vj. (thermal volt.), 6 cjo, 38

Vj. (enh.-mode), 70
1

Diodes, diode models, and

applications

This chapter has two important objectives. The first follows directly from
the chapter title, the introduction of the semiconductor diode as an elec-
tronic device.
The second objective is more subtle, introduces several analysis and
as it

design techniques that we shall apply later to every electronic device that
we consider. If we regard the diode as our first example of a general elec-
tronic device, then we can view this chapter as a sneak preview of the
entire book.
Our study of an electronic device will generally begin with a qualitative
description of that semiconductor behavior on which the operation of the
element is based. This followed by a discussion of a voltage-current {V-
is

I) characteristic (or characteristics) illustrating the unit's response to dc

voltages and currents applied at the external terminals. The V-I charac-
teristics are then used to develop a nonlinear dc model. This in turn guides
us in establishing models based on a piecewise-linear approximation.
These latter models are usually valid only within certain operating ranges
of voltage and current. We use both the nonlinear and piecewise-linear dc
models to analyze circuits, whereby we find values of the currents and
voltages, or determine the operating point, as well as to design the circuits
that will establish the desired values of current and voltage.
We then consider the ac or signal model; we shall develop models that
are applicable to small signal amplitudes at either low, medium, or high
frequencies.
After we have considered both ac and dc models, our final task is to join
them number of practical examples of signal processing. When we are
in a
finished with this chapter, we should be able to set up a dc model and find
the dc operating point, determine an appropriate small-signal model at
that operating point, and calculate the signal response.
Some skills be present. Given a desired
in the design process should also
signal response, weshould be able to select a suitable circuit configura-
tion, establish values for the circuit elements that will yield an acceptable
operating point, and finally check the design by analysis to make certain
that it satisfies the required specifications.
 —

Diodes, diode models, and applications

We begin in this chapter by taking a look at the circuit aspects of one of

the simplest electronic devices: the two-terminal semiconductor diode.
We devote only a few paragraphs to the solid-state physics of the diode
operation, although we shall make free use of the results of the theory
whenever enables us to analyze or design circuits more intelligently. In
it

neglecting the solid-state physics now, we certainly do not want to mini-

mize its importance. We want only to focus our attention on circuits first.
We will begin with a rather qualitative description of semiconductors, fol-
lowed by a few words describing the major phenomena occurring in diode
operation. We shall then use these relatively few concepts to describe the
circuit models for the diode and, in later chapters, for other semiconduc-
tor devices.
There are a very large number of different types of semiconductor de-
We shall have to focus our at-
vices that are useful in electronic circuitry.
tention on the most common and most representative types diodes and
transistors.

1.1 The semiconductor diode

Diode manufacture begins with the growth of a very pure crystal of semi-
conductor material. Today's diodes are made almost exclusively from sili-
con (Si) for reasons that involve improved or more convenient methods of
fabrication, leading to superior diode characteristics. Pure silicon in itself
is neither a good insulator nor a good conductor, as the prefix semi- im-

plies. At room temperature its conductivity is about 10 ~ ^^ times that of a

metallic conductor and about 10^^ times that of a good insulator.
However, it is quite easy to increase the conductivity of a semiconduc-
tor such as silicon. For example, it may be heated to provide a greater
number of charge carriers, causing the conductivity to increase roughly by
a factor of ten for every 25 °C increase in temperature. The number of free
charges within the crystal may also be increased by shining light on the
semiconductor material so that the radiant energy can create more of the
charge carriers. Although it is evident that these mechanisms may be use-
ful in measuring or controlling temperature and illumination, sensitivity
to heat and light are not usually desirable characteristics in, say, a good
hi-fisystem.
At room temperature, a pure (intrinsic) crystal of silicon has about
5 X W^ atoms per cubic meter, where about 10^^ electrons per cubic me-
ter are available for conduction, or one electron for every 5 x 10^^ silicon
atoms. Compared to a metallic conductor in which there is at least one
conduction electron for each atom, it is apparent that silicon is not a very
good conductor. To increase its conductivity, the number of conduction
electrons must be increased.
1.1 The semiconductor diode

The most effective and convenient method of providing the desired

semiconductor conductivity through the carefully controlled introduc-
is

tion of impurities, a process knov^n as doping. The addition of an n-type

impurity, such as antimony or phosphorus, increases the number of nega-
tive charge carriers, or electrons, in the semiconductor. We find that
when one atom in ten million is replaced by an n-type impurity atom, the
conductivity of silicon at room temperature increases by a factor of about
10^. Conductivity increases with the level of the doping being closely pro-
,

portional to the number of impurity atoms per unit volume at typical dop-
ing levels.
A semiconductor is unusual in that electrons are not the only charge
carriers present. Even in intrinsic silicon there are positively charged car -
r iers, cafled holes that contribute to the conductivity. For pure material,
,

the number of electrons is equal to the number of holes. At room tempera-

ture, intrinsic silicon has about 10^ holes per cubic meter that are available
for electrical conduction.
The number of holes can be increased by adding a p-type impurity,
such as boron or aluminum, to the silicon crystal. For example, if we add
10^ boron atoms per cubic meter to the 5 x iO^^ silicon atoms per cubic
meter, the concentration of holes increases to about 10^ holes per cubic
meter, an increase of five orders of magnitude from the intrinsic value of
10^ holes per cubic meter. Doping a semiconductor with a p-type impurity
has almost the same effect on the conductivity as does the addition of an
equal number of atoms of n-type material. As a matter of fact, if equa l
amounts of n- and p-type impurities are added to a pure semiconducto r,
there is no appreciable change in conductivit y, for the two added types of
charge carriers recombine with each other.
A silicon semiconductor junction diode may be produced in a single
crystal by introducing p-type impurities in one half and n-type in the
other, as suggested by Fig. 1.1a. So-called ohmic contacts are provided at
the external ends of the two regions to permit low-resistance connections
to the external circuitry. Figure I. lb shows the circuit symbol for a semi-
conductor diode as it is connected to a dc source V through a current-
limiting resistor R. Either R or V may be varied to compile data for a
Vd-Id characteristic, such as that shown in Fig. 1.2. The parts of this illus-
tration show several different aspects of the diode characteristic. In Fig.
1.2a we can see that large currents may be obtained by connecting the
positive terminal of the source to the p-type material, while the negative
terminal goes to the n-type material. This large current is called the for-
ward current. It results from the application of forward bias This current
.

is said to flow in the easy direction.

The forward current is composed of two components, the movements of

holes from the p side to the n side of the junction, and of electrons moving
in the opposite direction, as illustrated in Fig. 1.1c. Their effects are addi-
 Diodes, diode models, and applications

p-type silicon n-type silicon (P)..(«)

Ohmic / y p-type A7-type
contact! ^
— I

^ h Vr

ir(^B—
Ohmic
contact
€^
(a) ib) (c)

Fig. 1.1 (a) The semiconductor diode contains a planar junction between p- and n-
type semiconductor materials, (b) When the positive terminal of the source V is con-
nected to the p-type material, the diode is forward-biased and Ij^ is relatively large.
The arrow or triangle on the circuit symbol for the semiconductor diode indicates the
direction of forward current, (c) The diode current I^ has both hole and electron com-
ponents.

tive, foreach is equivalent to a conventional current entering the positive

terminal of the diode. If the doping levels are the same on the two sides of
the junction, the two components of the current are essentially equal.
Many diodes are produced by methods that lead to unequal doping levels,
and therefore the current is primarily provided by the movement of the
more abundant carrier.
Figure 1. 2b shows the diode characteristic in the neighborhood of the
origin. Note that the diode-current scale is now labeled in nanoamperes
(10-9 A).
—
When the diode is reverse-biased or V^ is negative so that the positive-
source voltage is connected to the n-type material then a very small re- —
verse current flows. When the reverse bias is greater than a few hun-
dredths of a volt, the reverse current remains quite constant at a level
known as the reverse saturation current, Ip = - /p as shown in Fig. 1. 2b. ,

Iq is taken as a positive quantity.

As the reverse bias becomes much larger, the reverse current begins to
increase somewhat, as shown in the region between - 50 and - 100 V in
Fig. 1.2c. This is a result of surface leakage around the p-n junction, and it
follows Ohm*s law to a first approximation. At a sufficiently large voltage,
the reverse current increases abruptly with only a small change in reverse
voltage. Here the electric field in the junction region is strong enough to
ionize the semiconductor atoms and produce an avalanche of additional
charge carriers. The phenomenon is called Zener, or avalanche, break-
down, and the magnitude of the voltage at which it occurs is called the
breakdown voltage Vbr- This value is a function of the doping levels in the
p- and n-type regions.
Except in the high-forward-current region, where ohmic voltage drops
in the semiconductor material and the contacts become appreciable, and
1.1 The semiconductor diode

Id (mA) Id (nA)
500
30-

20-

10-
^z>(V)
H h- H H ^
1.0 -0.5 0.5 1.0 -0.1 -0.05 0.05 0.1
10-
-200-

(a) (b)

.
Id (nA) ^Id (A)
(logarithmic scale)
- -30

VdC^)
1
1

-100 -SO^^^j-^ 50

-
--30
-^0 1
In/z, =ln/o+'-pr;^
[

\
Zener
--60
Vd(^)
breakdown 0.4 0.6 (linear scale)

(c)

Fig. 1.2 (a) The diode Vj) - /^ characteristic with scales that display the sharp in-
crease in current when is a few tenths of a volt, (b) The Vq - Iq
the forward bias
characteristic near the originshows an exponential increase in forward current and
the asymptotic approach to the reverse saturation current, (c) For larger reverse volt-
ages, we see an increasing surface leakage current and then Zener breakdown at the
breakdown voltage Vbr- (d) A semilog plot oi Ip ior Vq > 0.1 V.

in theZener breakdown region, the volt-ampere characteristics of Fig. 1.2

obey the Shockley diode equation,

7^ = I^(e^Vj,/nkT _ 1) (1)

Here q is the electronic charge, 1.6022 x 10"^^ C; fc is Boltzmann's con-

stant,1.3806 X 10 "23 J/K; Iq is the reverse saturation current, typically

between 10" ^^ A and 1 fiA; T is the temperature in kelvins (K); and n is a
dimensionless factor that is theoretically unity, but ranges from one to two
in real diodes. We shall usually let n =
except on several occasions
1,
when we wish to model a particular diode accurately.
At standard temperature (25°C, 77°F, 298.16 K), qlkT = 38.92 V"i,
and for this temperature we have

h = /o(^^«-^2VD/n - 1) (at25°C) (2)

 Diodes, diode models, and applications

The curves of Fig. 1.2 are plotted for /q = 10 nA, T = 298 K, and n = 1;
they follow Eq. (2) for Vd > - 30'V and 1^ < 10 mA.
The exponent in Eq. (1) or Eq. (2) is often simplified by recognizing the
reciprocal of qlkT as a voltage,

Vr-^ (3)

This voltage is a function only of temperature; it is called the thermal vol t-

age. Thus we may write
lo = hie^DiVrn - 1) (4)

At 25°C, Vj = 25.69 mV, and we have

/d = /o(^V^/0.02569n _ J) (5)

It is often possible to neglect the unity term in the parentheses of Eqs. (1),
(2), (4), or (5) when the diode is Thus, if we
sufficientlv forward-biased .

let n = 1, then a diode voltage V^ = 0. 1 V leads to an exponential term of

^3.892^ or 49.01. Therefore, if we can tolerate about a 2% maximum error,

we may simplify the diode equation by neglecting - 1:

/d = he'^D^'^T^ (for Vo > 0.1 V) (6)

Itshould also be apparent that for reverse bias with V^ < - 0.1 V, the
exponential term can be neglected compared to unity, and therefore

/o = -h (foryo< -0.1 V) (7)

Figure \.1d illustrates the forward diode characteristic as it is usually

plotted on manufacturers' data sheets. Since /^ may vary over a range
from picoamperes to amperes, while V^) varies less than one volt, the semi-
log plot is the most convenient. Taking the natural logarithm of Eq. (6)
yields

ln/o = ln/o + ^^ (V,,>0.1V) (8)

This is a straight line on semilog paper. The intercept at V/) = (where

our approximate relationship is not valid) is In Ij) = In /q or /^ = /q , ,

whereas the correct value is /^ = 0. The plot, however, is useful in that it

enables us to see the value of the reverse saturation current readily.
Finally, the slope of the straight line is 1/ V^n. This value may be found
from two representative points on the straight line,

^
1 ^ In/pi - ln/p2 ^ In (/di//d2) .g.
1.2 Diode circuit models: dc

Dl.l Let a diode operate at 25°C with a reverse saturation current of

"^^ A) and n = 1.1. Find (a)
1 fA (1 femtoampere = 10 Id when Vp
= - 12 V, (b) Id when Vd = - 0.1 V, (c) Vd when Id = 10 mA.

Answers. - 1.000 fA; - 0.971 fA; 0.846 V

D1.2 Experimental data at 25°C indicate that /^ = 1 ^A at Vd = 0.59
V and Id = I mA at Vd = 0.82 V. Determine (a) n, (b) /q, (c) Id at Vd
= 0.6 V.
Answers, 1.296; 20.2 fA; 1.350 /xA

1.2 Diode circuit models: dc

Before wedevelop our first model for a semiconductor diode, it may be
profitable to philosophize for a moment about models in general. What
are they used for? What forms do they take? Which one should we select?
The answers to these questions are important, for the accuracy of a model,
the conditions under which it is applicable, and the frequency or signal-
amplitude restrictions on its use are crucial considerations. In designing or
analyzing an electronic circuit, we must choose the proper model for our
particular problem. This does not mean that there is exactly one correct
model, but rather that there is no model that is absolutely accurate. We
have to select from a range of models, some of which are more appropriate
than others. The choice is governed by the amount of information avail-
able on which to base our design or analysis, on the accuracy we require,
and on the time we are able to devote to the solution. For a student, of
course, time may be unlimited, but when employers are paying a few
thousand dollars a month, they may place some severe time restrictions on
the problem. In general, the most accurate models are detailed and com-
plicated; solutions are apt to be time-consuming and difficult.
Figure 1.3 shows a broad classification of models for electronic devices.
The basic subdivision is between the dc model, which is useful not only
in operating at direct current but also in determining the operating point
in a circuit where a signal is also present, and the ac model, which applies
only to signal analysis. The ac model is used to determine such signal-
processing characteristics as voltage gain, current gain, power gain, input
impedance, output impedance, voltage isolation, and so forth. Further
subdivision is based on the use of linear models and linear mathematical
analysis, or nonlinear models and nonlinear techniques, including graphi-
cal analysis. Models are also developed for various frequency and signal-
amplitude ranges. Although we could make use of a single model that
would be applicable under all these conditions, it would probably involve
s Diodes, diode models, and applications

General
circuit models

dc ac
(operating point) (signal)

Small-signal Large-signal
Linear Nonlinear
(linear) (nonlinear)

Piecewise-
linear

Low- High-
frequency frequency

Discrete- Distributed-
element element

Fig. 1.3 Circuit models for electronic devices are separated into dc models, used to
determine operating points, and ac models, which involve only the signal. Other sub-
divisions are linear and nonlinear, small-signal and large-signal, low-frequency and
high-frequency, and discrete- and distributed-element.

a large number of linear elements, a few v-i characteristics, an equation or

two, several idealized nonlinear elements, and a bottle of aspirin. It is pos-
sible to approximate such a general approach by using the storage capac-
ity and the computational abilities of a digital computer, as we shall see
later, but there are many problems for which it is not worthwhile bring-
ing all this power into play.
Now let's models for the semiconductor diode. We already
talk about
have two: the Vd-Iq characteristic of Fig. 1.2; and Eq. (1) of Section 1.1.
Both are valid at dc, although Eq. (1) is restricted to the smaller voltage
and current amplitudes. These two models may be thought of as dc non-
linear models for the- semiconductor diode. In using them we must use
either the generally difficult techniques for solving nonlinear equations
(such as trial-and-error and numerical iteration, for example) or graphical
methods that are often inconvenient or inaccurate or both.
Linear equations are obtained from linear circuits, which are much eas-
ier to solve. As a result, we may prefer to use a somewhat inaccurate linear
model of a device because it leads to equations that are much more tracta-
ble. Beware, however, of the tendency to obtain four significant figures
 .

1.2 Diode circuit models: dc

from a equations applying to a linear model that represents a

set of linear
circuit to no better accuracy than one significant figure.
The choice of model is important, and it is a matter of engineering
judgment.
There are several useful linear models for the semiconductor diode. The
dc models are piecewise-linear models That is, they approximate the v- i
.

characteristic of Eg. (1) by a series of straight-line segments. Figure 1.4

shows four piecewise-linear models. The simplest is the ideal-diode
model, shown in Fig. 1.4a. Here the forward voltage is zero for all values
of forward current, and the reverse current is zero for all values of nega-
tive voltage. The diode is a short circuit for forward current and an op en
circuit for reverse current This very simple model appears quite often,
.

both as a* model of the semiconductor diode per se and with added linear
elements that provide improved models. The circuit symbol that we shall
use for the ideal diode is the same as that for the semiconductor diode,
except that the word ideal appears adjacent to the symbol.
A somewhat more accurate model is shown in Fig. lAb. The resistor Rq
enables the forward voltage to take on nonzero values, and the value se-
lected for J^o n^^y w^ll depend on the general level of the currents and
voltages expected in the circuit. In Fig. 1.4c, a battery Vq is added. In
using this model we now have the ideal (nonlinear) diode plus two linear
elements. The circuit is becoming complicated, and we are also faced with
the problem of specifying appropriate values for the resistor and voltage

Fig. 1.4 Four piecewise-linear models, (a) The ideal diode. Note that Vj^Iq = 0.
(b) The forward resistance Rq (c) The ideal diode with resistor Rq
ideal diode plus a .

and breakpoint at Vjj = Vq (d) A model useful in the region of avalanche (Zener)
.

breakdown, which occurs at the breakpoint where Vj) = - VgR

Ideal Ideal Ideal ^0 Ideal ^^BR

J

|lpNAA^

(a) (b) (c) (d)

 .

10 Diodes, diode models, and applications

source. Typically, Rq ranges from 1 to 50 12, and Vq is between 0.4 and 0.7
V for diode currents greater than several milliamperes. Note that the cir-
cuit of Fig. 1.4c leads to- the linear equation

Vd - Vo + IdRo {iorVo> Vq) (10)

whenever V^ is greater than Vq This equation is much easier to solve or

.

use in a system of equations than the nonlinear relationship of Eq. (1).

Even so, we must always make certain that Vq > Vq usually as a check ,

after the solution is completed.

We first saw the reverse-bias breakdown region in which the current
increases very rapidly in Fig. 1.2c. This region can be modeled by the cir-
cuitshown in Fig. I Ad. Note that the battery has a voltage that is equal to
Vbr for the diode, and l/Rz represents the slope of the curve in break-
down. Both the diode and the battery have the opposite polarity in the
breakdown model to that in the forward models.
As an example of the use of the piecewise-linear models in finding the
values of V^ and I^ at the operating point in a diode circuit, consider Fig.
1.5a. Since this is a simple series circuit, the current in each element is Ij) ,

and Kirchhoff s voltage law leads to

2 = 1001D + Vd (11)

Our goal is to determine V^ and I^ , and we shall use four different

methods.

Solution 1

We first replace the diode by the simple ideal-diode model of Fig. 1.4a;
the result appears in Fig. 1. 5b. Since the polarity of the 2-V source sug-
gests forward bias, then V^ = 0, or a short circuit. From Eq. (11), we
therefore have I^ = 20 mA. Since Ip > 0, our assumption of forward bias
was correct, and we have an operating point at (0.0 V, 20 mA). If our

Fig. 1.5 (a) A simple series circuit containing a semiconductor diode, (b) The diode is
modeled by an ideal diode, (c) A more accurate model for the diode includes Vq = 0.7

V and Ho = 5 fi
Ideal Ideal 0.7 V 5 12

>h

100^ : V

(b)
1.2 Diode circuit models: dc 11

solution for Iq had led to a negative value, then it would have been neces-
sary to start over with an assumption of reverse bias.

Solution 2

Let us assume that we need a more accurate solution. It is therefore neces-

sary to use a more complex model, so we first turn to the data sheets for the
diode to establish suitable values for Vq and Rq in the model of Fig. 1.4c.
This procedure will be discussed in the following sections, but let us as-
sume for now that Vq = 0.7 V and Rq = ^ ^ ^^e selected. Using these
values to model the diode, as shown in Fig. 1.5c, we again assume current
flow in the easy direction,

Thus the diode voltage is

Vd = 0.7 + (12.38 X 10-3)5 = 0.762 V

Since both Vq and and V^ > Vq, our assumption of for-
I^, are positive
ward bias was correct, and we have our new estimate of the operating
point (0.762 V, 12.38 mA).

Solution 3

Being desperate for accuracy and fond of algebraic obfuscation, let us try
the nonlinear model represented by Eq. (1). The values n = 1.1 and Iq
= 10" ^^ A are compatible with our earlier selection of Vq = 0.7 V and Rq
= 5 fi. Thus, at 25°C,

Id = 10-14(g38.92Vo/l.l _ 1)

and
2 = 100 X 10-14(^38.92Vd/11 - 1) + Vq
This is a transcendental equation, and it must be solved by numerical
methods. The simplest is probably trial and error, particularly if a pro-
grammable calculator is handy. The SOLVE routine also leads to a quick
solution. The solution is Vd = 0.786 V, and this leads to Id = 12.14 mA.
This is the most accurate solution, but it also requires the most work.

Solution 4

Instead of using the nonlinear diode equation, we may also adopt a non-
linear approach that utilizes a graph of Id vs. Vd such as that shown in
,

Fig. 1.6. Equation (11) can be plotted on the graph and the intersection of
12 Diodes, diode modeh, and applications

Nonlinear curve for diode

Operating point or Q point

Linear load line

Slope = -1//? = -10 mU

Fig. 1.6 The operating point is the intersection obtained by plotting the Unear load
line, 2 = lOOIj) + Vq, and the diode Vq vs. I^ curve on the same axes.

this straight linewith the V^-Id curve for the diode yields the operating
point or quiescent point Q often called simply the Q point A simple way
, .

of plotting the load line is by use of the intercepts:

D = y =
Vn 2 V when I]j =
and

h =
R
= 20 mA when V^ =

Since this is a graphical method,

it is rarely used in analyzing circuits.

However, a valuable conceptual tool. For example, if R were dou-

it is

bled, then the Iq intercept would halve, and both V^ and Iq at the operat-
ing point would decrease.

D1.3 (a) Calculate values for Rq and Vq in the model of Fig. 1 .4c so that
Id = 0.5 mA for V^ = 0.6 V and I^ = 12 mA for Vd = 0.7 V. (b) How
much current will flow if this diode is connected in series with 50 Q and 1
V, assuming forward bias?

Answers. 8.70 fi, 0.596 V; 6.89 mA

1.3 Diode circuit models: low^-frequency small-signal

The dc models we developed in the previous section serve to establish a dc

operating point (Vd, Id) for the semiconductor diode. Once this has been
determined, we may begin to think about the next part of the problem,
the application of an ac signal at some point in the circuit. At this time we
will consider small or incremental signals whose amplitudes are small
1.3 Diode circuit models: low -frequency small-signal 13

compared with the do voltages and currents at the operating point. When
the signals are small, a linear signal model is usually sufficient. When the
frequency components in the signal are low, the capacitive effects in the
diode may be neglected. Therefore we may use a low-frequency small-
signal linear model. For the p-n junction diode, this model is simply a re-
sistor, which we shall call the diinamic resistanc e.
We begin with the Shockley diode equation, written in Section 1.1 as

/^ = /o(^^V^/nfcT - I) = I^ieyolVrn - 1) (12)

The diode current I^ and voltage V^ were written as capital letters with
capital-letter subscripts. We
nomenclature consistently to
shall use this
represent dc quantities . Now, however, we
are beginning to talk about
signals, that is, currents and voltages that vary with time. We use i^ and
Vd as variables, where the lowe r-case letter with the capital-lette r sub-
script is reserved exclusively for the total instantaneous quant ity, the dc
plus the signal component. Finally, the instantaneous signal alon e is rep-
resented by a lower-case symbol with a lower-case subscrip t, such as v^
and id. It follows therefore that the following equations may be written:

Vd = Vo -^ Vd (13)

in = Id -^ id (14)

One additional form of nomenclature will be introduced in Section 5.4.

Rewriting Eq. (12) in terms of i^ and Vd we have ,

Id = loie'D'Vjn _ i) (15)

In order to investigate the effects of small variations from the dc values,

we first find the slope of the characteristic at the operating point (Vj), Id),

diD
= Iq -— e^'Diyrn = /o
— e^Diyjn
dvD
By solving Eq. (12) for the exponential factor and substituting the result
into the equation above, we have the simpler result
diD
dvD
The ratio of t he current differential to the voltage differential at the oper -

ating point is called the dynamic conductance g :

^''^
g= dvD Vrn
^
(Id + lo) (16)

The dynamic resistance r is the inverse ratio, r = 1/g:

14 Diodes, diode models, and applications

Note that the dynamic resistance and conductance depend on l^ the dc ,

value of ij) at the operating point. -They also depend on Vj and hence on
temperature. The fact that the values of the dynamic signal model depend
on the dc operating point and on temperature is very important, for it is a
concept that affects every signal model for diodes and for transistors.
Figure 1.7 shows an enlarged view of the diode characteristic in the
neighborhood of the operating point {v^ = V^ io = Id)- The slope of the ,

tangent here is g, or II r. When small signals are present, we may use the
notation of Eqs. (13) and (14), u^ = Vd + VdSindiD = /^ + i^, to see that
the signals act as small increments in vq and i^. Thus the slope may also be
expressed as the ratio of these small signals,

g = (18)

r = (19)

Either of these relationships between the ac components of the voltage

and current serves as the complete low-frequency small-signal ac diode
model, as shown in Fig. 1.8. Remember that the value of r, or g, depends
on the dc operating point selected and on temperature.
Now that we have considered the theoretical problems of the dc and ac
models, let us take a slightly more practical approach by trying to deter-
mine these models on which we have the manufacturer's speci-
for a diode
fications. Figure 1.9 shows the forward characteristic for the FD600 di-
ode. (The complete data sheet for this device appears in Appendix A
through the courtesy of the Fairchild Semiconductor Corporation.) Note

Fig. 1.7 The slope of the diode characteristic at the operating point is g or 1/r . The
small signal voltage v^ and small signal current i^ are interpreted as incremental in-
creases in t?£) and t/) respectively. Thus g = 1/r = idl^d-

Slope =g =
1.3 Diode circuit models: low-frequency small-signal 15

In +Ir

Fig. 1.8 The low-frequency model of the semiconductor diode serves

small-signal ac
to relate the incremental signal voltage v^ and incremental signal current i^. The
value of r depends on the operating point and on temperature.

that the forward-bias curves are presented on semilog scales similar to

those of Fig. 1. 2d.

We first use the curve for the "typical" diode in Fig. 1.9 to establish
values for Iq and n. With these available, we have a nonlinear model as
represented by the diode equation. Let us assume that our model is to be
used at an operating point below 10mA. We therefore select two points on
make use of Eq. (9) to determine n,
the straight-line portion of the curve,
and then find Iq from Eq. (1), the diode equation. At Vd = 0.4 V, we
estimate Id = 22 /xA, and for Vd = 0.6 V, /^ = 1.3 mA. Thus,

1 ln(/Di//D2) In (1.3/0.022)
= 20.4
nV, VDl D2 0.6 - 0.4

At25°C, then, n = 38.92/20.4 = 1.908, which we may take as n = 1.9.

To find Iq we may use either point of the curve. Choosing the larger
, cur-
rent, we have
1.3 X 10-3 = 7(^(^38.92x0.6/1.9 _ 1)

and Iq is 5.97 nA, which we round off to /q = 6 nA.

Fig. 1.9 The forward (Vj)- 1^) characteristics of the FD600 diode as given on the
manufacturer's data sheets.

FORWARD VOLTAGE VERSUS

FORWARD CURRENT
•inn

100
T '(P\U L /
y
..//
frJ
1 n (/
'^-
^^^A >~
l/t^
7^
f/ —
— -/
0.01 //
0.2 0.4 06 0.8 1.0

Vp - FORWARD VOLTAGE - VOLTS

16 Diodes, diode models, and applications

We shall use these values ( /p = 6 nA and n = 1.9) in the next section

when we obtain both do and ac models for the FD600 diode and then use
,

them to analyze and design special diode circuits.

If a more accurate model is necessary, then we might select five or ten
< 10 mA) and
pairs of values in the straight-line region of Fig. 1.9 (say Iq
use the linear-regression feature available on many calculators. This
would give us the straight line that represents the best least-squares fit to
the data.
We should also note that the curves on Fig. 1.9 are not straight lines for
lo > 10 mA, or even slightly below that value. This effect may be in-
cluded by adding a small resistor in series with every diode model to ac-
count for ohmic resistances in the diode contacts as well as in the bulk
semiconductor material. For the FD600, a series resistance R^ = 2Q works
well, but the improved accuracy this leads to may not be worth the added
complexity.

D1.4 /q = 2 pA and n = 1.2 for a certain semiconductor diode, (a)

Let
Find T = 25°C and /d = 1 mA. In order to increase r by 10% to
r at ,

what value must: (b) T be changed if /^ = 1 mA? (c) I^ be changed if T

= 25°C?
Answers. 30.8 Q; 54.8°C; 0.909 mA

1.4 Applications of the diode models

In this section we shall consider three examples that involve the use of di-
ode models. In the first example, we must determine an ac model for a
given circuit. This model is then used in the second example to find the
value of a signal-output voltage. Both these problems have to do with
analysis. The third problem has to do with design: We must consider both
dc and ac models to design an attenuator circuit that will meet a set of
prescribed electrical specifications.
As we look at these progressively more difficult problems, note that we
follow a logical sequence of steps each time. The first step is that of prob-
lem identification. What kind of problem do we have? What kind of in-
formation do we need to solve it? Sometimes the type of data we are given
or can find governs the manner in which we identify the problem. For
example, the complete absence of data on a device would identify our
problem as an experimental one, at least at the beginning.
The second the establishment of a plan of attack. How do we
step is

solve the problem? Which method is best? What kind of accuracy is re-
quired? We
were probably thinking about this step as we identified the
problem, and now we should be able to see the sequence of steps that we
must take to arrive at the required answer. If several methods are avail-
1.4 Applications of the diode models 17

able, we should try to decide which is preferable. Perhaps we will need to

start several different methods before we can decide which will be best.
And what does "best" mean for our problem? It may mean easiest or
quickest if accuracy is not too important, or it may mean the most accu-
rate if we are not concerned with the time it takes.
The last step is the solution itself. If we have done our thinking effec-
tively in the first two steps, we should not find later that we are lost half-
way through the problem, or that we are wasting our time in solving some
problem that no one is interested in.

Example 1

With these philosophical considerations completed, let's look at the first

example, shown in Fig. 1.10a. We are asked to find the dynamic resis-
tance of the FD600 diode as it is operated in this circuit at room tempera-
ture.
We identify this problem as one in which we have to obtain a value for
f, a value that depends on both operating point and temperature. Tem-

perature is fixed at 25° C, so that is no worry here. But we do have to find a

dc operating point. Therefore the problem is one of first locating an oper-
ating point and then finding r at that point.
As a plan of attack on the operating point, we consider several possibili-
ties. We
have data on the FD600, and we have the complete specifications
on the circuit in which it is installed. We
could write an equation for the
linear portion of the circuit and then represent it as a linear load line on
the diode characteristic. The intersection would establish the operating
point. We
might choose to solve the nonlinear Shockley diode equation
numerically. Or we could represent the diode by a piecewise-linear dc
model and then solve the resulting linear circuit equation. Since we are
emphasizing models at this time, let's select this last plan of attack and

Fig. 1.10 (a) A circuit containing an FD600 diode whose dynamic resistance is to be
determined at 25°C. (b) The diode is replaced by a dc model in order to find the oper-
ating point. We use Rq = 9.3 12 and Vq = 0.62 V as the piecewise-linear model.

soon I

^
3 V 3 V

Ideal

dc model

(a) ib)
18 Diodes, diode models, and applications

leave nonlinear models for later attention. After we have the operating
point located, what is left? A value for the dynamic resistance can be ob-
tained by using an appropriate value for 1^ in the simple equation for r,

Eq. (17).
To get a linear dc model for the FD600 that will locate an operating
point accurately, we model, as shown in Fig.
select the three-element
1 lOZ?.
. Values for Hq arid Vq must be chosen that are valid in the neighbor-
hood of the (as yet unknown) operating point. With the 3-V battery and
500-Q resistance connected to the diode, it is obvious that the diode cur-
rent cannot be any larger than 3/500, or 6 mA, the value that would be
obtained if the diode were considered to be ideal. With 6 mA through the
real diode. Fig. 1.9 indicates that the diode voltage will be about 0.68 V.
A better guess at /^ is obtained by assuming 3 - 0.68 = 2.32 V across the
500-Q resistor, leading to a loop current of 2.32/500, or 4.64 mA. There-
fore we are looking for a piecewise-linear model that is useful from per-
haps Id = 4.5 to 6 mA.
In Section 1 .3, we established n = 1 .9 and /q = 6 nA for this diode. We
may V^ corresponding to /^
use the diode equation to find the values of
= 4.5 and 6 obtaining the operating points (0.660 V, 4.5 mA) and
mA,
(0.674 V, 6 mA). Passing a straight line through these points, we find

0.674 - 0.66
Ho = -li , ^, ;^_3
= 9.33 fi
(6 - 4.5) 10

Vo = 0.674 - 9.33(6 x lO-^) = 0.618 V

Let us use Ho = 9.3Qand Vq = 0.62 V in the circuit of Fig. l.lOfc, leading
to the operating point

3 - 0.62 , ^^ ,
'-= 500^9.3 =^-^^"^
and
Vj) = 0.62 + 9.3(4.67 x lO-^) = 0.663 V
Since the point (0.663 V, 4.67 mA) seems to lie on the FD600 characteris-
tic, this shows that our model was correctly chosen for the problem and

that the solution for the Q point is valid. Figure 1.11 shows the diode char-
acteristic and the piecewise-linear approximation on linear axes. If the Q
point lies too far from the true curve of /^ vs. V^, then a new model must

be obtained and the analysis repeated.

We complete this example by calculating the dynamic resistance at
room temperature with I^ = 4.67 mA, /q = 6 nA, and n = 1.9:
1 Q
^ ^ 38.92(0.00467 + 6 x lO'^) " *
1.4 Applications of the diode models 19

(mA)

FD600
n=\.9
/n = 6 nA

6--

4--

^/ 0.7 VdC^)
0.62

Fig. 1.11 The solid curve is a linear plot of Iq vs. V^) for an FD600 diode with n
= and /q = 6 nA. The broken line is a piecewise-linear model that is applicable in
1.9
the neighborhood of the Q point shown. The breakpoint is at V^) = 0.62 V and the
slope is 1/9.3 Q.

Example 2
The second example is illustrated by the circuit shown in Fig. 1.12a. A
signal source, Vs = 10"^ cos lOt volts, has been added to the last example,
and we are asked to find Vd the signal component of Vd. Room tempera-
,

ture is still assumed.

Problem identification comes first, and we see that we have both dc and
ac quantities present in the circuit. Although we are asked only for the ac
output voltage, both ac and dc models are needed, since the ac model de-
pends on the dc operating point. The circuit contains an FD600 diode, so
we will need to make use of its v-i characteristics or of models we have
already developed.
This is an analysis- type problem. The circuit is given and the element
values are specified, and we are asked to compute a specific response, here
the signal component of VD(t).
Next comes the plan of attack. To obtain the output signal voltage as
our result, we must have an ac model. Since 10"^ V looks like a pretty
small voltage compared with 1.5 V or so and 10 rad/s is an exceedingly low
radian frequency, we may choose the low-frequency small-signal ac
model developed in Section 1.3 (which is just the dynamic resistance r) To .
20 Diodes, diode models, and applications

wv

Ideal

I ac model Idc model

(b) (c)

Fig. 1.12 (a) A diode circuit containing a signal voltage source Vg The signal compo-
.

nent of vd is desired. (fo)The ac-equivalent circuit contains the diode ac model. The
signal voltage across the diode is v^ and the total voltage is v^ = Vq + v^. (c) The
,

dc-equivalent circuit contains a dc diode model. It is identical to the circuit of Fig.

1.10b.

continue planning our attack, we can find a value for r once we know the
dc diode current. This we obtain by working with the dc-equivalent cir-
cuit, which contains only the dc diode model and the dc source. The
(small) signal source is set equal to zero. We shall see that we then have the
exact circuit of the first example, and we need not repeat that work in
analyzing this circuit. Once is enough.
With these thoughts in mind, we may now carry out the solution. The
ac-equivalent circuit with which we shall determine the signal component
of the diode voltage is shown in Fig. 1.12b. Note that the dc voltage source
has been set equal to zero. Once it has been used to determine Id we are ,

no longer concerned with it. The signal voltage is identified by the symbol
Vd the lower-case v indicating an instantaneous or time- varying voltage,
,

and the lower-case subscript d signifying the signal component of the di-
ode voltage. Note that a lower-case subscript is also used on the signal in-
put voltage Vg. That is, if we wished, we could let Us = u^ + 3.
From Fig. 1.12Z7 and the rules for voltage division, the signal output
voltage is found:

Vd = 10-3 (cos 100

r + 500
1.4 Applications of the diode models 21

Once we obtain a suitable value for the dynamic resistance r, the problem
is completed. To do this, we need to determine the dc component of the

diode current. We do this with the help of a dc-equivalent circuit, shown

in Fig. 1.12c. This circuit is the same as the one that we analyzed in the
first example. Hence I^ = 4.67 mA and V^ = 0.663 V again.
Using the results of that earlier example, we have r = 10.45 12, which
leads to

Vd = 1000 (cos 10^) ,^ }^'^^r.r.r. = ^0.5 COS 10^ ^lY

10.45 + 500

Note that the signal has been attenuated from a 1-mV amplitude to about
20 fxW; this is a large reduction. The rati o of the signal output voltage v^ to
the signal input voltage Vg is called the attenuation ratio . In this case it is

0.0205.
Problem 22 at the end of the chapter requests the value of v^ if the 3-V
battery voltage is increased to 6 V. Without doing any detailed work, try
to visualize the change in operating point and inand determine qualita-
r,

tively whether v^ will increase or decrease. Conversely, what will Vd do as

the battery voltage is reduced?

Example 3
As our last example of the use of diode models, let us consider the follow-
ing problem;

Design an attenuator for a 1-mV, 100-Hz sine- wave signal source so that the
attenuation ratio Vdlv^ can be varied electrically and continuously from 0.1
to 0.5.

No circuitdiagram comes with the problem, and there is no unique solu-

tion. We are expected to select a circuit and specify suitable element val-
ues. When the answer is given and we are asked to determine the circuit
and the element values, we have a design problem.
The preceding example showed that a diode and a resistor can be used
as an attenuator. It seems possible that the degree of attenuation can be
controlled by changing the dynamic resistance of the diode. Since this re-
sistance is a function of temperature, it would be possible to locate a small
resistive heating element adjacent to the diode and let the diode tempera-
ture change as the resistor current varied. The scheme is possible, but the
thermal response time is apt to be rather long and power consumption or
heat radiation may cause difficulties. Also, we would need to provide two
separate circuits carrying dc currents.
As a better solution, let's plan to vary the value of /^ by changing the
value of the dc-source voltage. We
propose a circuit of the form of Fig.
1.13a.
22 Diodes, diode models, and applications

^s = Vs+Vs(T^ ^l^D = Vd -^
^d

ia)
,dc

'W
Ideal

(b) (c)

Fig. 1.13 (a) The proposed circuit for an electrically controlled attenuator for which
0.1 < v^/Vg < 0.5. (b) The ac-equivalent circuit for the signal, (c) The dc-equivalent
circuit that determines the Q point.

For the diode, we should try to use the FD600, since it is the only one we
have any data on at this time. We also know that the dynamic resistance is
about 10 Q when I^ = 4.67 mA. Because the series resistance R^ is about
2 Q, the smallest dynamic resistance we can achieve is approximately 3 Q,
although much larger values are available. Notice, however, that we can-
not make I^ too small and still satisfy the small-signal approximation i^ <$C
/jD and Vd <^ Vd- To allow ourselves some leeway, suppose we select the
minimum value of r as 10 1}. If the design does not work out well, we can
try another value later. With this first step taken, we can now determine
^max ^^^ the series resistance R by considering the ac-equivalent circuit.
Fig. 1.13b. That is, r^m provides the attenuation ratio of 0.1, while r^ax
leads to 0.5:

10
= 0.1 and = 0.5
10 + fl ^max + ^
With no great difficulty, we find that r^^^ = 90 fi and /? = 90 fi also. If
we can vary the dynamic resistance between 10 and 90 Q, we have a work-
able design. To do this, we specify room-temperature operation, and it
follows from Eq. (17) that

0.02569n
^D
ih » /o)
 -

1.4 Applications of the diode models 23

16--

14--

12 —

10--

6--

4__

2-
Slope = 15^
/ 1 1—
0.3 0.4 O.'S I 0.6 0.7K^(V)
Fq = 0.54 V

Fig. 1.14 A piecewise- linear approximation to the FD600 characteristic is shown for
the range 0.542 < Ip < 4.88 mA.

Therefore

0.02569(1.9)
^D(min)
= 0.542 mA
90

while

0.02569(1.9)
D(max) = 4.88 mA
10

To specify the variation of Vg (the dc component of the source voltage)

that is needed to provide the required range of Iq , we turn our attention
to the dc-equivalent circuit, Fig. 1.13c. To use this circuit effectively, we
must determine new values for Rq and Vq appropriate to the region in
which the Q point will be found. The v-i characteristic of the FD600 is
shown again as Fig. 1.14. Note the portion of the curve lying between I^
= 0.542 and 4.88 mA. A reasonable piecewise-linear approximation here
intersects the curve at I^ - 0.5 and 5 mA, where V^ is calculated to be
0.553 and 0.666 V, respectively. Therefore

0.666 - 0.553
i?n = = 25Q
(5 - 0.5) 10-3
 ) .

^4 Diodes, diode models, and applications

and
Vo = 0.666 - 25 (5 X lO-^) = 0.54 V
Using these values, we can now find the maximum and minimum values
of Vs:

^S(max) = ^0 + ^D(max) (^ + ^0
= 0.54 + 0.00488 (90 + 25)
= I.IOV
and

Vsimin) = 0.54 + 0.000542 (90 + 25)

= 0.602 V
Our design may be summarized with reference to Fig. 1 . 13a: H = 90 Q,
the diode an FD600, and a variation of Vs from approximately 0.6 V to
is

approximately 1 1 V will cause the ratio of Vd to v^ to vary from 0.5 to 0. 1

.

We also specify that f ^ <IC Vs. For example, u^ < 0.6 V, for a maximum
amplitude. Operation is at room temperature.

D1.5 A
2-V dc source and a 100-0 resistor are in series with an FD600
diode. Calculate the diode voltage and current if the battery is connected
to supply (a) forward current, (b) reverse current.

Answers, 0.712 V, 12.88 mA; - 2 V, - 6 nA

D1.6 Refer to the circuit of Fig. 1.15 and determine (a) /^ ,
(b) i^ , and
(c) Vd .

Answers. 4.02 mA; 0.476 cos lOOOf mA; 0.597 + 0.00487 cos lOOOf V

1.5 Diode circuit models:

high-frequency small-signal
The final diode models that we shall consider include one or more lumped
capacitances that have strong effects on diode operation at high frequen-
cies or for fast transients. Although these models have some application in
circuits containing only diodes, their greatest interest for us lies in their
direct applicability to transistor models that we shall develop in later
chapters.
We first consider the semiconductor diode operating under reverse bias,
where only the small reverse saturation current flows. The large number
of electrons available on the n side and the large number of holes available
on the p side are not forced across the junction, because the positive termi-
nal of the voltage source is connected to the n-type material, and vice
versa; see Fig. 1.16. Instead, the electrons in the n-type material are
pulled away from the junction toward the positive source terminal. A cor-
1.5 Diode circuit models: high-frequency small-signal 25

1.4 + 0.1 cos \0^t

n = 1.6, /q =2 nA

Fig. 1.15 See Problem D1.6.

responding action in the p-type material opens up a region at the junction

that is depleted of almost all mobile charges, both electrons and holes.

This region at the junction is called the depletion layer.

Without free charge carriers, the transition region has the characteris-
tics of an insulator.
Farther away from the junction, both the p- and n-type materials are
rich in carriers, and their resistance is therefore low in comparison with
that of the transition region. These regionsmay be compared to the metal-
licconducting plates on both sides of the dielectric in a capacitor, and the
depletion layer correspondingly acts like a capacitor. This effect is termed
the depletion, or junction, capacitance C^.
The depletion capacitance is generally quite small, on the order of sev-
eral picofarads. Its effect is important in high-frequency diode models.
The value of the junction capacitance depends on the dc operating point
of the diode; it is represented quite well by the relationship

'/•o
(Vd ^ 0) (20)
(1 - VdIVu) N
Strictly speaking, the expression is valid only under conditions of reverse
bias, Vd < 0, but it holds fairly well for V^ < 0.2 V. It is evident that C,o
is the depletion capacitance when the external voltage across the diode is
zero. The positive voltage Vbi ^s the built-in potential It is a function of .

the type of semiconductor material, the degree of doping, and the temper-

Fig. 1.16 Under reverse-bias conditions all the mobile charge carriers are forced
away from the junction, leaving a depletion layer having no free charge.

(Reverse bias)
R
-^lil AAAr

tnQ Depletion layer

26 Diodes, diode models, and applications

fi (PF)

O^^d(V)

Fig. 1.17 A plot of junction capacitance vs. reverse-bias voltage for a diode with Ciq
= 10 pF, N = V2, and Vbi = 0.9 V.

ature. For silicon, typical values range from 0.8 to 0.9 V. The value of the
exponent N depends on the characteristics of the junction itself, particu-
larly the manner in which the material varies from n-type to p-type. Typi-
cal values of N range between V2 for an abrupt change and Vs for a linear
change. Figure 1.17 illustrates typical behavior of C, on the operating-
point voltage Vd Note that as V^ becomes slightly positive, the capaci-
.

tance increases rapidly.

When the junction capacitance is combined with the dynamic resis-
tance, we obtain a first-order model for the reverse- biased semiconductor
junction diode at high frequencies for small signals; see Fig. 1.18. The
dashed arrows in the diagram are a reminder that the values of the ele-
ments vary with the operating point of the diode. The model is not satis-
factory for forward bias.
When the junction is forward-biased, there is an additional component
of capacitance that is much larger than the junction capacitance. It is

Fig. 1.18 With reverse bias, the small-signal high-frequency diode model is simply
the parallel combination of the (very large) dynamic resistance and the junction ca-
pacitance, both calculated at the pertinent dc operating point.
1 . 6 Applications of diodes 27

called the diffusion capacitance . With forward current, holes are injected
from the p side across the junction into the n-type material. They are mo-
mentarily stored there before recombining with the large number of free
electrons present in the n-type material. In a similar manner, electrons are
injected into and stored in the p-type material. Changing the forward cur-
rent or voltage requires a change in the value of this stored charge, which
is again a capacitive effect. It turns out that the diffusion capacitance Cd
is proportional to the (forward) current lo :

Cd = BId (21)

where B is a constant at any given temperature. At a forward current of

1 mA, C^) is several hundred times as large as C^o typically ranging from
»

100 to 1000 pF.

The small-signal high-frequency model for forward bias is shown as
Fig. 1.19. The series resistance Rg represents contact resistance and bulk
resistance. It has a value of several ohms and has the same value as for the
dc model at large forward currents.

D1.7 Let Vbi = 0.43 V for a diode. If C^ = 4 pF for V^ = " 6 V and 7

pF for Vd = - 1 V, find (a) iV, (b) C^o, (c) Cj for V^ = - 10 V.

Answers. 0.372; 10.96 pF; 3.34 pF

D1.8 Let Cj = 10 pF and R^ = 3 Q for a certain forward-biased diode.
At /£) = 1 mA, r = 20 Q, and Cp = 90 pF. Find the input impedance of
the high-frequency equivalent circuit for (a) co = 5 x 10^ rad/s and I^
= 1 mA; (b) a; = 2 X 10^ rad/s and /d = 1 mA; (c) oo = 5 x 10^ rad/s and
Id = 2 mA.

Answers. 16.40 /- 37.6° Q; 6.29 /- 48.4° Q; 9.65 /- 31.2° Q

1.6 Applications of diodes

There are very few electronic circuits that do not contain several semicon-
ductor diodes. These diodes may be used in many different ways. We shall
discuss just a few that are of particular importance. In general, we will
assume that the diode may be replaced by its ideal model, in order to keep

Fig. 1.19 With forward bias, the diffusion capacitance is present in the small-signal
high-frequency model. The series resistance Rg represents contact and bulk resistance
of the semiconductor diode.

^
AAAr
^
 .

2S Diodes, diode models, and applications

our discussion as simple and brief as possible. More accurate models can
always be used if necessary.

Rectifiers

Except for devices that are purely battery-operated, most electronic

equipment contains some type of rectifier circuit to convert the sinusoidal
voltage present at the electrical power outlet to one or more required dc
levels. Figure 1.20a shows a simple half-wave rectifier circuit. The trans-
former serves to isolate the rectifier circuit from the line voltage. It may
also provide a voltage Vi whose peak amplitude is greater or less than
120V2rV. When the voltage Vi is positive, the diode is forward-biased, and
D^ is equal to Uj. When Vi is negative, during the succeeding half-cycle, the
diode is reverse- biased, no current flows through it, and t;^ = 0, at least
for the case of the ideal diode. The output voltage of Fig. 1.20fc is thus a
replica of the positive half of the input waveform; hence the name half-
wave rectifier. A Fourier analysis of the output voltage (or a simple calcu-
lation of its average value by integration) shows that its average, or dc ,

va lue is I/tt times the maximum value of V \. The analysis also shows that
the lowest- frequency component is at 60 Hz. Filters must often be sup-

Fig. 1.20 (a) A transformer and a half-wave rectifier are used to supply a resistive
load Ri with (b) a pulsating voltage v^ having a dc average value equal to I/tt times
the crest value of uj

-.a
1
f-

6
120 Vrms
60 Hz
Q

Transformer Rectifier Load

(a)

Vl (V)

l20V2a--

Average or
dc value

t(s)

ib)
1 ,6 Applications of diodes 29

plied to minimize the frequency content of the output, so that it is almost

entirely dc. We shall consider such a filter later in this section.
The dc average value of the half-wave rectifier output would be twice
as great the negative half-cycles of the source voltage could somehow be
if

flipped over and used to fill the empty spaces in Fig. 1. 20b. A circuit that
accomplishes this is the full-wave rectifier shown in Fig. 1. 21a. If we as-
sume that the positive half-cycle of t^i begins at f = 0, then diode Di is
forward-biased, and current flows through it into the load. Meanwhile V2
is and diode D2 is reverse-biased, so that it behaves as an open
also positive
circuit.In the succeeding half-cycle, Vi is negative, diode Di is noncon-
ducting, V2 is also negative, diode D2 is forward-biased, and current there-
fore flows through it into the load. The output voltage v^ is once again

positive. Figure 1.21^7 indicates which diode is conducting each half-cy-

cle, assuming that Vi is positive in the initial half-cycle shown. It is appar-
ent that the dc, or average, value of the load voltage is twice that for a
comparable half- wave rectifier. Moreover, the lowest frequency compo-
nent of the load voltage is now at 120 Hz and it has a smaller amplitude. It
is therefore easier to filter out the high frequencies.

A popular bridge- type full- wave rectifier circuit is shown in Fig. 1.22a.
This arrangement does not require a center tap on the transformer second-
ary winding. It also provides a greater dc output voltage than does the

Fig. 1.21 (a) A transformer with a center-tapped secondary and a full- wave rectifier
are used with a resistive load, (b) The average value of the load voltage is twice that of
the comparable half- wave rectifier.

U/, (V) Average value

30 Diodes, diode models, and applications

1 -.a

^L (V)

\20V2a-
lAQyJla _
/-^
i
/ ^
Average value

/\ _
f
^-^
/ \
TT

/ ^1 \ / ^3 / ^1 \ / ^3

l'\ / ^'
W
\
^2 W ^4

tis)
60

Fig. 1.22 (a) The full- wave bridge rectifier with the same transformer used in the
half- wave circuit of Fig. 1.19a provides an output waveform (b) that has twice the dc
voltage of the half- wave circuit and a ripple frequency twice as high.

plain full- wave circuit for a transformer with the same turns ratio. In op-
eration, two of the four diodes conduct during each half-cycle. When Vi is
positive, Di and D2 are forward-biased, and current flows through them
into the load. During this half-cycle, D3 and D4 are reverse- biased and
behave as open circuits. In the succeeding half-cycle, D3 and D4 conduct
while Di and D2 are cut off. Positive current enters the left terminal of R^
in both cases. The output voltage waveform is shown in Fig. 1. 22b. If the
turns ratio of the transformer is l:a, just as it was in the case of the half-
wave rectifier, the average value of the output voltage is 240V2a/7r, and
the lowest frequency of the output waveform is 120 Hz. This is the best of
the three rectifier circuits that we have considered, but it also requires
four diodes.

Power supplies

Many applications of rectifiers require that the output of the circuit be

much smoother than the waveforms shown in Figs. 1.20 to 1.22. For ex-
ample, the hum present in a poorly designed (or ailing) audio system is
usually intolerable and is often due to the power supply not having a
smooth output.
1.6 Applications of diodes 31

A simple filter that is often satisfactory in smoothing the output consists

of a large capacitor placed in parallel with the load resistor R^. Figure
1.23a shows a half- wave rectifier with a capacitor filter. This is called a
low -pass filter, since it passes lower frequencies (dc) while attenuating
higher frequencies (60 Hz and higher) The capacitor charges up during a
.

part of the positive half cycle, as current flows through the diode into C
and R[^, and discharges into H^ during the remainder of the cycle when the
diode is cut off. Thus the voltage across C and R^ is held more constant. As
indicated in Fig. 1. 23b, the output voltage shows a much smaller varia-
tion in amplitude, and its average value is larger than it would be for the
rectifier without the filter capacitor. Filter capacitors are also added to
the full-wave rectifiers of Figs. 1.21 and 1.22, with similar results.
The p eak-to-peak ripple voltage Av is defined in Fig. 1 .24a as the differ -
ence between the peak output (or input) voltage V^^ and the minim um
value of the output voltage. Note that the diode in Fig. 1.23fl conducts
only when Vi is greater than v^. This occurs in the interval ti < t < t2, as
shown in Fig. 1. 24b. During this time, current flows through the diode
and charges the capacitor, as well as furnishing load current. In the inter-
val t2 < t < ^3, the diode is off and charge flows out of the capacitor and
through the load Ri. The time constant R^C is chosen to be much larger

Fig. 1.23 (a) A half-wave rectifier with a capacitor filter, (b) The output voltage
waveform is shown by the solid curve.

1 -.a
^
120Vrms
60 Hz
Rr>VL

Transformer Rectifier Filter Load

(a)

Vl (V) Average or dc value = F^

V^ = \20V2a-
-V
/ \ /
/ \ / \
/ \ / \ 1
/ \ / \ 1

\ / \ 1

Ms)
ib)
32 Diodes, diode models, and applications

^i.
(V)

\20V2a-
•
c\
_>_^j_ .
r
-~7 \
1
\
\
1
\ I\ \ 1 1
1 1
1
\ 1 1 \ 1
/ 1
1 \ / 1 \ 1
/ 1
1 \ / 1 \ 1
1
1 V / 1 \ 1
/, t-
t^=t,+ 60 tis)

(a)

t, h t; t(s)

(b)

Fig. 1.24 (a) The output voltage of a half-wave rectifier with a capacitor filter is

shown fortwo values of capacitance; C2 > Cj The ripple voltage At; is indicated for .

the output when Cj is used. For this waveform, diode conduction begins at fj stops at ,

t2, and begins again at ^3 = ^1 + T. (b) The pulsating diode current is shown for the

smaller capacitor, Cj . A larger capacitor produces a greater maximum value, a

slightly greater average value, and a shorter conduction time.

than the period of the input sine wave in order to reduce At;, as indicated
in Fig. 1.24a. During discharge, the capacitor or output voltage v^ is
given by the familiar negative exponential.

vl V^e -(^-^VRlC {t2< t < ts) (22)

Since the minimum value of Vi occurs at ^3 while the , maximum value is

Vjn for our ideal diode, the ripple voltage is

At; = V^[l - ^-(^3-^2)/«lC]

Well-designed power supplies use large capacitors, and therefore ^3 occurs

very near the peak of v^. Thus ^3 - ^2 = T, the period of the input, and
this leads to a conservative (slightly too large) estimate of the peak-to-peak
ripple voltage:

At; = V^(l - c-T'^lC) (23)

1.6 Applications of diodes 33

This result may be simplified if we use the power-series expansion for the
exponential,

In Eq. (23), T <^ Rl^, and we may approximate the series by its first two
terms.

e-TiR^c = 1 _ T^ fiUx)^ ^0 fitojiv (iX^tQAjuQjL'

RrC
Therefore

At; = K 1 - 1 -
RrC
or

V" T
Av = (24)
RjC
Note that the larger we make C, the smaller At; becomes- a very desirable
result.
To calculate the average or dc output voltage, shown in Fig. 1.23^ as

^L = ^L(av)j we assume that the exponential portion of the curve may be

approximated by a straight line. Thus V^ = V^^ - V2 At;, and

Vj. = V^ 1 - (25)
2RlC
Powersupplies may be operated with load resistances that are not con-
stant. For example, increasing the volume level of a hi-fi system is equiva-
lent to a reduction of R^. Equation (24) shows that the ripple voltage in-
creases as Ri decreases, and Eq. (25) indicates that a small decrease in V^
also accompanies a reduction in R^. Since V^ remains fairly constant, the
dc power varies inversely as R^.
We define the dc load current as I^, where //^ = VJR^, and it therefore
may also vary over a wide range. No-load conditions exist when I^ = 0,
Rl = 00, and Vi^ = VL(max) = ^m- At maximum loading, /^^ = /L(max), Rl
- Rl (min)^ ai^d Vi = V^(min)- The decrease of V^ is expressed in terms of
regulation, defined as a percentage:

- V.
Percentage regulation = ^^""^^^^ ^_L(rn}i}L
x 100% (26)
VL{no load)
Diode current flows only in the interval ti< t < t2, sls illustrated in
Fig, 1 .24i>. Because the average value of the current is /^, it is obvious that
34 Diodes, diode models, and applications

very large spikes of diode current must flow in order to average out to 7^.
As C is made larger, ^2 ~ ^i becomes smaller, and the peak current
through the diode is even larger. Since we are using ideal diodes, there is
no danger of burning them out. But in a real circuit, care must be taken
not to exceed the peak-current specifications of the diode.
If we model a real diode with jRq and Vq in a piecewise-linear circuit, or
even include Rs for very large currents, the effect of Rq and H^ is a reduc-
tion of the peak output voltage caused by the diode voltage drop. Only in
low- voltage rectifiers is the effect of Vq significant. Usually Rq and R^ are
small compared to R^, and their effects are negligible. But in high-current
power supplies, V^ is reduced and the voltage regulation shows even more
loading effects.
For a full-wave rectifier, T is replaced by T/2 in Eqs. (22) through (25),
and thus At; is reduced by a factor of two, easing the conditions for choos-
ing C. Again we see that there are good reasons for using a full- wave recti-
fier instead of the half -wave circuit.

Voltage regulators

In order to make a major improvement in the percentage regulation and

the magnitude of the ripple voltage, the designer must incorporate an ad-
ditional circuit in the power supply. Such a voltage regulator circuit is
shown with a full- wave bridge rectifier in Fig. 1.25.
Many different circuits find use as voltage regulators. Some of these are
available as integrated circuits and thus they are quite inexpensive, even
though their internal circuitry may be quite involved.
As an example of one type of regulator circuit, we consider the very
simple arrangement of Fig. 1.26a, consisting of one resistor and a Zener
diode. This diode application also gives us a chance to model a diode in
breakdown. The Zener diode is a diode that is designed to be operated in
the avalanche-breakdown region. It is represented by the special diode
symbol shown. Note the suggestion of the breakdown characteristic built
into the symbol.

Fig. 1.25 A voltage regulator is used between the load and the capacitor filter in a
power supply driven by a full- wave bridge rectifier.

120Vrms
60 Hz
1.6 Applications of diodes «35

"/? Ik Rl< ^l

Load
(a)

ib) (c)

Fig. 1.26 (a) A simple shunt regulator circuit includes an added series resistance R

and a diode operating in avalanche breakdown. The special symbol represents a Zener
diode, one designed to operate in the breakdown region, (b) The dc equivalent circuit
includes the dc model of a Zener diode, first shown in Fig. l.4d. (c) The ac or signal
equivalent circuit also uses the resistance Rz •

Under normal operation, the Zener diode is in avalanche breakdown and

the load voltage is closely equal to

Vbr over a wide range of load currents.
Figure 1. 26b illustrates the dc equivalent circuit for the regulator with the
diode replaced by its piecewise-linear equivalent circuit for avalanche
breakdown, Fig. 1.4 J. Normal operation occurs only for Vr > Vbr and
for a diode currenthaving a magnitude greater than the minimum value
required to get beyond the knee on the breakdown characteristic and less
than some maximum value that will not damage the diode. note that We
an ideal Zener diode would have Rz = 0, and thus the dc load voltage V^
remains equal to Vbr ^ ^l is varied. Moreover, /^ would remain constant,
since the voltage across R is constant. In other words, when R^ decreases
and li increases, the diode current must decrease to maintain I^ constant.
Thus the regulator current is shared between the diode and the load. The
range of possible load currents is therefore equal to the range of values of
the Zener diode current. This range is greater than the minimum required
to operate in avalanche breakdown, but less than the maximum that the
diode can tolerate.
«3^ Diodes, diode models, and applications

As an example of a regulator in which Hz is not zero, let us analyze a

circuit in which
fi = 500 Q,
^

Vbr= 11.8 V,

Rz = SQ,
Vr = 25.5 V
We first let R^ = 6 kQ.
In the dc equivalent circuit of Fig. 1. 26b, the ideal diode is a short cir-
cuit, and we may replace the network to the left of jR^ by its Thevenin
equivalent. We find
Hth = R\\Rz = 500||8 = 7.871]
and an open-circuit voltage,

Vr - Vbr

Figure 1.27 shows this equivalent circuit. With R^ = 6 kQ, we find that
II = 12.02/(7.87 + 6000) = 2.00 mA, and V^ = 12 V.
If Rl now decreases by a factor of 10 to 600 fi, then I^ = 12.02/(7.87 +
600) = 19.77 mA, and V^^ = 11.86 V. Although the load current has in-
creased almost ten times, the load voltage has decreased by only about
1 % Note that the answer to Drill Problem Dl.lO indicates that the out-
.

put voltage would have changed by more than 16% if the regulator had
not been present.
Now let us consider how a voltage regulator can reduce the ripple volt-
age. To do so, we interpret the ripple as a signal and construct the signal

Fig. 1.27 A load R^ is supplied by the Thevenin equivalent of a Zener diode, shunt
regulator circuit.

7.87 n
^AA

12.02 V
1.6 Applications of diodes 37

equivalent circuit of the regulator, shown as Fig. 1.26c. The ratio of the
output ripple voltage Vg to the input ripple voltage At; is easily found by
voltage division,

V, RzWRl __
8 116000
^ ^^^^^
At) Rz\\Rl -^ R 8 II
6000 + 500

for Ri^ = 6000 fi. A similar calculation when fi^ = 600 Q shows a similar
ratio of 0.0155. Thus the ripple voltage is reduced by almost two orders of
magnitude. Excessively large values of C are therefore not required.
integrated circuit (IC) voltage regulator may be obtained with
An
either a fixed or an adjustable output voltage. The former holds the output
voltage to less than a few percent of a specified value. The adjustable unit
allows an external resistor to be varied to establish V^. The permissible
range of load current is also specified.

Light-emitting diodes

A light-emitting diode, or LED, is a special two-terminal semiconductor

diode that emits light when it is forward- biased. The intensity is roughly
proportional to the forward current. Appendix A presents the data sheet
for the Hewlett-Packard 5082-4487 or 5082-4488 LED. Light-emitting di-
odes are used to provide the numerical displays in hand-held calculators
and other small instruments that use optical read-outs.

Schottky barrier diodes

If a thin layer of aluminum

is placed on lightly doped n-type silicon, a

form between the metal and the semiconductor.

rectifying junction will
The ohmic or nonrectifying contacts that we have seen on the junction
diodes are made when the semiconductor material is heavily doped. The
rectifying junction is called a Schottky barrier, and the resultant diode
is a

Schottky barrier diode. This device also obeys the Shockley diode equa-
tion. Figure 1.28 illustrates its V^-Z^ relationship. Larger values of /q
and n cause the curve to be shifted to the left, compared to the junction
diode.
The important difference between the two types of diode occurs with
the diffusion capacitance C^ , which is negligible in the Schottky barrier
diode. Only the depletion capacitance Cj appears in the high-frequency
model. Therefore the diode operates at higher frequencies than the junc-
tion diode,and is several orders of magnitude faster in switching applica-
tions.
There are several important applications in which Schottky barrier di-
odes are used in conjunction with transistors to obtain short switching
times.
38 Diodes, diode models, and applications

Junction
diode

Vn (V)

Fig. 1.28 The V^ - 1^ characteristic of a Schottky barrier diode is similar to that of a

junction diode, except that the breakpoint occurs in the neighborhood of O.SV.

Varactor diode

As a example of the applications of diodes, we note that the depletion

final
capacitance of the diode may be used as an electronic tuning means for
FM radio, television circuits, certain microwave oscillators, and any other
circuits in which a small variation in capacitance can effect a significant
change in frequency. This may be accomplished by placing the diode in
parallel with the capacitor in a parallel RLC circuit so that the resonant
frequency is given by

1
0)Q =
y/L(C + Cj)

where Cj may be varied electrically. Schemes based on this effect are used
to implement automatic frequency control (AFC) circuits.

We have discussed only a few of the more important applications of the

semiconductor diode in electronic circuits. Others are described in more
advanced treatments, while several appear in problems at the end of this
chapter.
From our point of view, perhaps the most important lesson to be
learned from this brief study of diodes is the insight into several techniques
of analysis and design that we will use in succeeding chapters.

D1.9 In Fig. 1.23a, let/ = 60 Hz and C = 100 ^F. It is desired that Vjr
= 12 V for /l = 2 mA. Calculate (a) the value of V^ required, (b) At;,
(c) the percentage regulation.

Answers. 12.17 V; 0.338 V; 1.39%

 .

Problems *J^

Dl.lO In Fig. 1.23a, let/ = 60 Hz, C = 100 /xF, and V^ = 12.17 V. If

/l = 20 mA, calculate (a) V^? (b) Au, (c) the percentage regulation.

Answers, 10.18 V; 3.99 V; 16.4%

Dl.ll Let Vr = 25.5 V, R = 500 fi, and Vbr = 12 V for the dc equiva-
lent circuit of Fig. 1 .26^7. Calculate V^ for (a) Rz = 4 Q, ^l = 6 kQ; (b) Hz
= 4 Q, Rz. = 600 fi; (c) Rz = SQ,Rl = 6 kQ.
An5w;^r5. 12.10; 12.03; 12.20 V

Problems
1. A diode at 25°C has Id = 3.373 x 10" lo A when Vd = 0.3 V, and
Id = 22.75
= 0.7 V.
Mat V^) = 0.6 V. Calculate (a) n, (b) /q, (c) /^ for V^,

2. Let /q = 4 nA and n = 1.1 for a semiconductor diode operating at

25°C. (a) Find Id when Vd = 0.4 V. (b) What value of Vd will cause
a current 1 mA greater than the value of (a)?
3. Two data points for a diode are Id = I mA at V^ = 0.35 V and Id
= 5 mA at V/) = 0.39 V. Assuming that the Shockley diode equation
applies, let n = 1.05 and find /q, Vr, and the operating temperature.
4. A diode is modeled by the equation. Id = 20 (e^^^o - 1) nA at 25°C.
Sketch the V-I characteristic of the combination if the diode is oper-
ated with forward bias (a) in series with 25 fi, (b) in parallel with
25 Q.
5. The value of /q for a junction diode is typically given by /q = XT^
X e~^G>^T^ where the width of the energy gap is £g = L12 eV
(1 electron-volt = 1.6022 x lO'i^ J) for silicon, (a) Determine X if /q
= 10-14 A at 25°C. (b) Let n = 1.07 and /^ = 1 mA, and calculate
Vd at 10°C and 50° C. (c) Derive an equation for the rate of change of
Vd with respect to T if Id is constant and much greater than /q (d) .

Evaluate dVD/dT for T = 25°C, Id = 1 mA.

6. A diode operating at T = 300 K has 0.4 V across it when the current
through it is 10 mA, and 0.42 V when the current is twice as large.
What values of /q and n allow this diode to be modeled by the diode
equation?
7. A diode for which Id = e^^^o - 1 nA is in series with a dc source of
0.5 V. Sketch a curve of Id vs. Vj^ the voltage across the series combi-
,

nation, for the two possible battery polarities. Include both positive
and negative values of Vj^
8. Two identical diodes are connected in series with 100 Q and a 2-V
battery such that each diode is forward-biased. Let Iq = 10 fA,
n = 1, and T = 25° C. Calculate the loop current if (a) ideal diodes
 .

40 Diodes, diode models, and applications

are assumed; (b) Vq = 0.6 V for each diode; (c) each diode is rep-
resented by a piecewise-Hneaf model that is exact at /^ = 1 and mA
10 mA; (d) each diode is modeled by the nonlinear diode equation.
9. Two identical diodes, each having /q = 1 f A and n =
1.1, are con-
nected in parallel. The combination is connected in series with 150 fi
and a 1.5-V battery so that the diodes are forward-biased. Calculate
the source current at 25°C if (a) each diode is represented by a piece-
wise-linear model that is exact at 0.5 and 5 mA; (b) each diode is mod-
eled by the nonlinear diode equation.
10. At 25° C, a semiconductor diode has a forward current of 2 mA when
a voltage of 0.3 V is applied across it. Assume that n = 1. (a) Find I^
when Vq = 0.4 V. (b) Determine Iq. (c) Use the diode equation to
find /£) if the diode is placed in the circuit of Fig. I. lb with R = 100 fl
and V = 1.5 V.
11. A semiconductor diode is modeled at 25° C by n = 1.2. Let Id = 2.5
mA when Vp = 0.25 V. (a) Find Vd when I^ = 15 mA. (b) Deter-
mine /q. (c) The diode is now connected in series with 2 V dc and
200 Q. Find I^ if the diode is operating with forward bias.
12. A diode has the parameters /q = 1 nA and n = 1 and operates at
25° C. (a) Select values of Vq and Rq for a dc model so that the model
and the diode equation give the same results when /^ = 5 mA and
10 mA. The diode is connected in series with 100 fi and a 1.5-V bat-
tery so that it is forward-biased, (b) Represent the diode by its piece-
wise-linear model and determine Id (c) Represent the diode by the
.

nonlinear diode equation and determine Ip

13. Determine i^ in the circuit of Fig. 1.29 if (a) both diodes are consid-

ered to be ideal; (b) both diodes are modeled by i^o = 10 fi and Vq

= 0.5 V. (c) What dc voltage source should be placed in series with
the 20-Q resistor to just reduce i^ to zero? Assume that the piecewise-
linear model applies.

Fig. 1.29 See Problem 13.

5n Di d:

3 V_^
Problems 41

0.5 A

Fig. 1.30 See Problem 14.

14. The diode in the circuit of Fig. 1 .30 is characterized by /q = 8 nA and

n = 1.3 and is operating at 25° C. Determine the power being ab-
sorbed by each of the three circuit elements if (a) V^ = 0.4 V; (b) I^
= 250 mA; (c)H, = 5 fi.
15. The diode of Fig. 1.31 may be represented by Vq = 0.45 V and Rq
= 12 fi for forward bias, and by Vbr = 10 V and Rz = SQ for Zener
breakdown. Determine V^ if V, equals (a) 5 V, (b) 2.5 V, (c) - 10 V,
(d) -30 V, (e) -50 V.
16. Let Vbri = 20 V and Rzi = 20 Q for Dl, while Vbr2 = 25 V and Rz2
= 35 Q for D2. Find / and V for the circuit shown in (a) Fig. 1.32a,
(b) Fig. 1.32b.
17. Let Iq = 15 nA and qlnkT = 30 for a semiconductor diode. If Ij)
= 7.5 mA, find (a) V^, (b) Vd/Id, (c) r. If /^ varies over the range 7.4
< /o < 7.6 mA, what is the range of (d) V^,? (e) of r ?
18. A certain diode is described by the equation I^ = 16 (^ ^^^d - 1) nA.
Let Vd = 0.42 V and find (a) Id, (b) r, (c) R^ = VdUd- (d) Let V^
increase by AV^ = 1 mV. Is the change in Ij) given more accurately
hyAIo = AVDlRxOrAVo/r?
19. Determine a value for the dynamic resistance of the diode labeled
"maximum" in Fig. 1.9 for an operating point at /^ = 1 mA.
20. Let n = 1.2 and Iq = 1.5 nA for a diode operating at 40°C. Deter-
mine Vd if r equals (a) 2 Q, (b) 200 kfl.

Fig. 1.31 See Problem 15.

42 Diodes, diode models, and applications

55 V ia)

25 V V ib)

Fig. 1.32 See Problem 16.

21. A diode is modeled by n = 1.15and/o = 0.5 nA at 25 °C. The voltage

Vd = 0.4 + 0.002 cos 1207r^ V is applied across the diode. Find i^ and
io-
22. In the example illustrated by Fig. 1.12a, increase the battery voltage
to 6 V and determine the new^ operating point and the dynamic resis-
tance.
23. The forw^ard characteristic of the diode in the circuit of Fig. 1.33 is
given hyio = 10 " s^Ou^ a, and Vg is a small signal voltage. Determine
a linear relationship betw^een i^ and Vg, such asio = a bvg, w^here a -\-

and b are expressed numerical values.

as
24. A source Vs, a 30-Q resistor, and a diode governed by i^ = 20(e^^D
- 1) nA are in series, (a) If Us = 0.5 V (forward bias), find Iq. (b) If
Vg = 0.5 + Vg, w^here i;^ is a small signal voltage, find i^ as a function
of Vs, such SiS io = a + bv^.
25. (a) Assume that the diode in Fig. 1.34 is ideal, and prepare plots of Vd
vs. Vs and Vr vs. Vs, - 2 < Vg < 2 V. (b) Plot new^ curves for a dc

Fig. 7.33 See Problem 23.

AA/V 1'.
20 n

0.4 V_=L
Problems 43

Fc-=

Fig. 1.34 See Problem 25.

diode model having Vq = 0.5 V and Rq = 20 Q. (c) Using the model

of (b)and Vs = 0.8 V, what ac resistance is offered to a small signal
source in series with Vg? Assume that T = 25 °C and n = 1.
26. A loop contains a diode with n = 1.5 and /q = 2 nA, a 50-Q
series
resistor, an 0.8-V battery providing forward bias, and a signal volt-
age source, 6 cos lOH mV. Assuming that T = 25°C, find (a) I^,
(b)id, (c)iD, (d) t;^).

27. Two /qi = 1 nA, rii = 1.1, /02 = 5 nA, and

diodes are described by
n2 = Calculate the small-signal resistance of the combination at
1.2.
25°C if the diodes are connected (a) in parallel, with V^ = 0.45 V;

(b) in parallel, with V^ = 0.55 V; (c) in series, with I^ = 0.5 mA.

28. Two identical diodes at 25 °C have /o = 10 nA, n = 1.1, Vbr = 18 V,
and Rz = 25 They are connected in series, back to back. A source
.

Vs = Vi + 20 W and a 1-kfi resistor are connected in series with the

combination. Find the ratio of the signal voltage across the two diodes
to Vi.
29. (a)Assume that the ideal diode in Fig. 1 .35 is forward-biased and find
Id (b) Assume that the diode is reverse- biased and find V^ (c) Which
. .

one of these possible conditions is correct? (d) Find 4 •

Fig. 1.35 See Problem 29.

4^
 1

44 Diodes, diode models, and applications

i5on son
—W\/— —Wv
I
T
1

5 cos co/i v/> 0.6 V

mV

Fig. 1.36 See Problem 30.

30. Two points on the nonlinear characteristic of the diode shown in the
circuit of Fig. 1.36 are (0.4 V, 1 mA) and (0.42 V, 2 mA). Assume
operation at 320 K and find i^ .

31. Design a low-frequency current attenuator of the form shown in Fig.

1.37 so that the ratio id/ is may be varied electrically and continuously
from 0.2 to 0.8. Use a typical FD600 diode at 25°C.
32. Let /o = 10- 10 A, n = 1, and r = 25°C
for both diodes in the circuit
of Fig. 1.38. If Vi is a small, low-frequency signal voltage, calculate
Voi/Vi and Vo2lVi if V equals (a) 1.6 V, (b) - 1.6 V. (c) Which name
better describes this circuit: an electronic switch or a diffusion pump?
33. Values suitable for the small-signal, high-frequency model of a cer-
tain diode under forward bias conditions are Rg = 2 Q r = 5Q, Cj ,

= 2 pF, and C^ = 48 pF. Plot curves of the magnitude and angle of

the high-frequency diode impedance vs. co on a linear scale, < o)
< 5 X 1010 rad/s.
34. (a) Plot a curve of Cj vs. Vq for a junction diode having Cjq =1.3 pF,
Vbi = 0.8 V, and N = 0.4. (b) Calculate the value of Vd that would
produce parallel resonance at 100 MHz if the diode were in parallel
with 2 pF and 1 /xH.
35. Let C,o = 4 pF, Vbi = 0.75 V, and N
= 0.48 for a reverse-biased
diode with Vd = - 2 V. (a) Find Cj. (b) If the diode is in parallel
with a 10-pF capacitor and a l-/xH inductor, what change in the reso-

Fig. 1.37 See Problem 3

FD600
Problems 45

>^

^oi<ioon lOon 1 00 n <" ^o2

Fig. 7.38 See Problem 32.

nant frequency (in Hz) occurs for an 0.1-V increase in the magnitude
of V^,?
36. A curve of the depletion capacitance as a function of reverse voltage
includes these three points: {Vd = 0, Cj = 3.5 pF), (-2 V, 2.15 pF),
and ( - 5 V, 1.6 pF). Determine values for Cjq, Vbi? ^^^ ^•
37. The dependence of the diffusion capacitance on temperature is ex-
pressed by

QT
Cp =
2kT D
where r is a constant that is essentially independent of temperature.
With r = 10"^ s and Ip held constant at 1 mA, calculate C^ for T
equals (a) 25°C, (b) 0°C, (c) 100°C. (d) Find the rate of change of Co
with T at 25°C.
38. A junction diode operating with a forward current of 1 mA shows an
impedance of 7/0° Q at very low frequencies, 1/0.° Q at very high
frequencies, and an impedance with a phase angle of - 45° at
CO = 109 rad/s. Find Cj + C^.

39. A junction diode is found to have Cjq =1.9 pF, V^i = 0.85 V, and N
= 0.5. What fixed capacitance Cq and fixed inductance L should be
placed in parallel with it to provide resonance at coq = 1.2 x 10^ rad/s
with Vd = - 1 V and at coq = 1.25 x 10^ rad/s with Vd = - 2 V?
40. In Fig. 1.39, let t;, = 100 V for < f < 1 ms, and t;, = - 100 V for 1
< t < 2 ms. The waveform is periodic with a period of 2 ms. (a)
Assume that the diode is ideal and calculate the average voltage
across, and current through, the 250-Q resistor, (b) Repeat for a diode
that is modeled by Vq = 0.5 V and Hq = 20 fi.
41 . The supply voltage Vs in the power supply of Fig. 1 .40a is composed of
semicircles if the waveform is plotted with a scale of 100 V = 2.5 ms,
as shown in Fig. lAOb. (a) Sketch u^. (b) Determine the average
value of Vo and compare the result with that for a sinusoid of equal
maximum amplitude and frequency, (c) Sketch v^ if a 50- V battery is
 . .

46 Diodes, diode models, and applications

25012

Fig. 1.39 See Problem 40.

placed between the diode and Rj^ with its positive terminal connected
to the diode.
42. Install a 50-|iF capacitor across the load resistor in Fig. 1.39 and let
u, = 100 V for ms, and - 100 V for 1 < f < 2 ms. The per-
< f < 1
iod is 2 ms. Assume an ideal diode, (a) Calculate Vo(t),0 < t < 2 ms.
(b) Determine V^ and Ii. (c) Find At*, (d) Calculate the regulation,
(e) What is the regulation if Ri is decreased to 125 Q?

43. The full-wave bridge rectifier shown in Fig. 1.22 has a turns ratio
a = 5. The diodes are ideal, Ri^ = 5 IcQ, and there is a 25-jLtF capaci-
tor in parallel with R^. Determine (a) At;, (b) V^, (c) the regulation.
44. A half- wave power supply uses an ideal diode with V^ = 100 V, Ri^
= 2 kfi and C = 50 /^F. The sinusoidal source has a period of 1/60 s.
,

Refer to Fig. 1.24 and calculate exact values for ti, t^, ts, and Av.
45. In the full-wave rectifier of Fig. 1.21, Dj = = 20 cos o)t V and Ri
V2
= 1200 Q Assume that
. the diodes are ideal. If/ = 60 Hz, specify the
size of a capacitor to be placed across Rl so that (a) At; = IV, (b) V^
= 18 V, (c) the regulation is 4%
46. Design a half -wave unregulated power supply to give V^^ = 15Vat//^
= 10 mA with At; < Assume a 120-V, 60-Hz supply. What is
0.1 V.
the regulation of your power supply?

Ff g. 1.40 See Problem 4 1

Ideal
1:1

r (ms)

(a) (b)
 .

Problems 47

47. Design a full- wave, unregulated, bridge rectifier to give V^ = - 15 V

at |/z.|
= 10 mA with At; < 0.1 V. Assume a 120-V, 60-Hz supply.
What is the regulation of your power supply?
48. Let R = 200 fi, V^r = 15 V, and Rz = 25 Q in the simple voltage-
regulator circuit of Fig. 1.26a. Given a supply V^ = 30 V, calculate
Vl when I^^ equals (a) 0, (b) 1 mA, (c) 10 mA, (d) 70 mA. (e) Plot V^
vs. /^. (f) If the ripple voltage in V^^ is 0. 1 V, what is the ripple voltage
in Vi^ when /^ = 70 mA?
49. Values applicable to the regulator circuit and Zener diode of Fig.
1.26a are Vr = 60 V, Vbr = 30 V, i?z = 25 Q, and 5000 < R^
< 30,000 Q The diode current should remain within a range from 2
.

to 10 mA. Specify a suitable value for R and then calculate the mini-
mum-and maximum values of V^, /^, and |/d| •

50. There are numerous applications, such as Schottky-clamped TTL

(transistor-transistor-logic) integrated circuits, in which Schottky
barrier diodes and junction diodes are placed in parallel. Assume that
Iq = InAandn = 1.9 for the SBD, and /q = 1 pA and n = 1.02 for
the junction diode, (a) What forward voltage across the parallel com-
bination will cause the diodes to carry equal currents? (b) At Vq
= 0.5 V, what is the ratio of the current in the junction diode to that
in the SBD?
51 (a)Design a circuit in which a light-emitting diode will supply at least
1.5 mcd of luminous intensity on its central axis when a 25- V source is
applied. (See Appendix A for an LED.) (b) Modify your circuit so that
the 25-V source may have either polarity.
 Bipolar and field-effect

transistors

The functions involved in amplifying small signals and processing digital

information are generally accomplished through the use of solid-state de-
vices, most often transistors. We shall devote the next several chapters to
such devices. We begin in this chapter by looking at the way the bipolar
and field-effect transistors operate, the nature of their voltage-current
characteristics, and the circuit symbols and conventions that are used. In
the next chapter we proceed with the circuit use of transistors by working
with dc models and the problems associated with establishing an operat-
ing point. Chapter 4 describes methods of circuit design to provide a stable
operating point, and Chapter 5 deals with the small-signal transistor
models. Chapter 6 combines the results of Chapters 4 and 5 to develop
methods of analyzing and designing practical amplifier circuits.
With the exception of the elementary concepts presented in the next few
sections, we shall not become involved in the solid-state theory on which
transistor operation is based. It's easier to accept the transistor as a three-
terminal device, even with an insufficient background in solid-state phys-
ics, than it is to absorb the physics without any idea of how it is applied.

2.1 npn bipolar transistors

Bipolar transistors appear in several different forms, each appropriate for

a particular application. They are used at high frequencies, for switching
circuits, in high-power applications, and under extreme environmental
stress. In this section we will discuss characteristics that all these transis-
tors have in common.
The bipolar transistor may appear in discrete form as an individually
encapsulated component, in monolithic form (made in and from a com-
mon material) in integrated circuits, or as a "chip" in a hybrid integrated
circuit. Regardless of its use or the manufacturing process, each form con-
tains an emitter and a collector region separated by a very thin base re-

48
2.1 npn bipolar transistors 49

gion. This is which shows an npn

illustrated symbolically in Fig. 2.1a,
bipolar transistor. These transistors appear in two configurations, npn or
pnp. The npn is much more widely used than the pnp, and we therefore
look at it first and in much more detail.
We note first that the bipolar transistor possesses two junctions, the
emitter-base junction and the collector-base junction. It is possible to de-
scribe a large part of transistor operation by interpreting the device some-
what like a pair of back- to-back diodes. The emitter-base junction is usu-
ally forward-biased, or Vbe > 0. This voltage is small, but the forward
current across the junction is relatively large, just as in the forward-biased
diode. To see the direction of this current, we note that the majority carri-
ers in the emitter region (n-type) are electrons. These are injected across
the junctio'n into the base region, which is quite thin, being on the order of
0.5 to 2 fim. Now the base-collector junction is reverse-biased ( Vcb > 0),
and thus the holes that are present in the p-type base material do not cross
it.However, the electrons that have just been injected into the very thin
base region from the emitter diffuse across the base-collector junction and
are then collected under the influence of the positive collector potential, as
illustrated by Fig. 2Ab.
This electron current across the base-collector junction is almost as large
as the electron current crossing from the emitter into the base region. In
general, it runs from 99 to 99.99% of the emitter current, the small de-
crease being accounted for by electrons that are lost in the narrow base
region. In terms of electron currents, we might find that for every hun-
dred electrons flowing into the emitter from the external contact and

Fig. 2.1 (a) A symbolic picture of an npn bipolar transistor. Ohmic contacts to the

semiconductor material are provided at the base, emitter, and collector, (b) The
movement of electrons and holes across the two junctions is indicated.

Collector
o

Baseo-

6
Emitter

ia) ib)
50 Bipolar and field-effect transistors

crossing into the base region, perhaps one flows out the base lead into the
external circuit, whereas 99 cross over into the collector and flow out into
the external collector circuit.
To And the total current
across any junction, however, we have to con-
sider both holeand electron motion. In the semiconductor diode operating
with forward bias, electrons are injected from the n region into the p re-
gion, while holes move in the opposite direction. The sum of these two
currents crossing the junction determines the total diode current. This is
also true for the emitter-base junction in the npn transistor; there is a hole-
current component produced by holes in the p-type base material crossing
over to the n-type emitter (Fig. 2.1b). However, this current is usually
several orders of magnitude less than the electron current, a consequence
of much heavier doping in the emitter region. This heavily doped n-type
region is often signified by the term n + as indicated in Fig. 2.1b. The
,

heavier doping means that the supply of electrons is simply much greater
than the supply of holes. The small hole current contributes to the current
entering the base lead.
The emitter and collector current magnitudes are thus about equal, and
the base current is very much smaller than either.
The circuit symbol for an npn bipolar transistor is shown in Fig. 2.2a.
The direction of the arrowhead on th e emitter lead indicates w hether the
t ransistor is npn or pnp by showing the sense of the current as if it were

caused by the motion of positive charges Since we actually have electrons

.

flowing in from the emitter to the base, the sense of the emitter current in
the npn transistor is the same as if positive charges were leaving that ter-
minal. Hence, the arrowhead points outward.
Figure 2.2^? shows the npn symbol with the IEEE (Institute of Electri-
cal and Electronics Engineers) standard reference directions for currents.
Note that Ie, Ib, and Ic all have a reference direction into the specified
terminal. As a consequence of this definition and Kirchhoff s current law,
at least one of the currents must be negative, unless all are zero.
Keeping in mind the electron currents by which we first described the
operation of the npn transistor, let's consider the polarities of Ie, /b, and
Ic, as defined in Fig. 2.2b. Remember that hole currents are very small
compared with electron currents, and total currents are thus almost en-
tirely electron currents. The emitter current Ie is actually negative, the
collector current Ic is positive and about equal to the magnitude of the
emitter current, and the base current Ig is a small positive quantity. As we

establish an operating point for this transistor and analyze its operation,
we find that the base and collector currents appear much more often in
our work than the emitter current; these are both positive values for the
npn transistor. We might thus find that we are considering a certain npn
transistor having an emitter current of - 10 mA, a base current equal to
0.1 mA, and a collector current of 9.9 mA.
 .

2.1 npn bipolar transistors 51

Collector C
+ 9

BaseO—
© "^rC 'CE

6
Emitter
(a) ib)

Fig. 2.2 (a) The circuit symbol for an npn bipolar transistor. The arrow on the emit-
ter indicates that the sense of the emitter current is that of positive charges flowing out
of the emitter, (b) The IEEE standard reference direction for all currents is into the
device, even though some may have negative values.

The voltages between electrodes are identified in Fig. 2.2& by the famil-
iar double-subscript notation,such as Vce ot V^b The first su bscript de -•

notes t he assumed positive vol tage reference.

In describing transistor operation above, we have talked as if the emit-
ter were the input and the collector the output. In practice, by far the
greatest use of the transistor with the base as the input and the collector
is

as the output. Certainly, it does not make any difference which two of the
three currents we establish in any (linear or nonlinear) three-terminal de-
vice; the third is then fixed by Kirchhoff s current law. So let us think of
squirting a small current into the base as our input, 0.1 mA in the example
above, and obtaining a relatively large current into the collector as the
output (9.9 mA). Current gain is obviously present. shall show a little We
later that voltage gain and therefore power gain are also available in this
configuration. This configuration is called the common-emitter (CE) con-
figuration since the emitter is common to both the input and output.
Voltage-current characteristics for a low-power npn transistor as it is
normally operated are shown in Fig. 2.3. Figure 2.3a gives the input char-
acteristics, a family of curves of Is vs. Vbe for various values of Vce Note •

that a single curve is sufficient if Vce ^ 1 V, a condition that applies al-

most all the time. This curve is nearly identical to the forward characteris-
tic of a semiconductor diode, even though it shows Ig instead of Ie .

Typical output characteristics appear in Fig. 2.3^7. These are curves of

Ic vs. Vce with the base current /g as an independent parameter. Without
studying these curves for too long, it is easy to see two general characteris-
tics. First, once Vce is greater than 1 or 2 V, /c is relatively independent of

Vce that is, each curve flattens out. Second, TntTiis^i^gioir/cTsaHo 100
;

times Ib (or the collector current is about 99 % of the emitter current)

52 Bipolar and field-effect transistors

Ib (mA)

= 0.5 V
150 15--
Vrf.- =
^1 V
100 I0--

50

"05 ^beC^)
LO
ia)

Fig. 2.3 (a) The CE input characteristics of a typical low-power npn bipolar transis-

tor. When VcE > 1 V, the curves coincide, (b) The CE output characteristics. As a
first approximation, Ic = 100 /g when Vce is greater than a few volts.

The v-i characteristics emphasize the regions where the emitter-base

junction forward-biased (Vqe > 0) and the collector-base junction is
is

reverse-biased {Vcb > 0)- These bias conditions define the active region
for a bipolar transistor. A quick glance at the input characteristics shows
that Ib > under these conditions. Thus, the active region on the outp ut
characteris tics must lie above the /g = curve. Next, we note that Vcb is
not shown explicitly on the output characteristics (nor on the input char-
acteristics either, for that matter), and it is therefore a little difficult to
identify a sharp upper-left edge for the active region. We usually consider
it to include everything to the right of the "knees" on the Ib = constant

curves, and above the /^ = curve. The active region is crosshatched in

Fig. 2.4.
When both junctions are reverse- biased any currents that flow are of ,

the order of magnitude of reverse saturation currents for the emitter-base

and collector-base diodes, and thus Ib and Ic are very small (as is /g). This
condition evidently occurs near the Vce ^xis and is termed the cutoff re-
gion. This region is also shown in Fig. 2.4. The boundary between the
active and cutoff regions occurs at /g = 0.
If b oth junctions are forward-biased this defines the saturation region.
,

Both Vbe and Vbc are small positive values, and Vce, their difference, is
also small and positive. The boundary between the active and satura tion
regions occurs at Vcb = Q-

D2.1 If 10"^ electrons per nanosecond are moving from left to right
across a certain junction while 10^ holes per nanosecond are moving from
2.2 pnp bipolar transistors 53

Saturation
region

Cutoff region

Fig. 2. 4 Normal transistor operation is obtained in the active region where the emitter-
base junction is forward-biased and the collector- base junction is reverse-biased. For
cutoff, both junctions are reverse-biased; and in saturation, both junctions are forward-
biased.

right to left, what is (a) the hole current from left to right, (b) the electron
current from left to right, (c) the total current from left to right?

Answers. -0.016 mA; -1.602 mA; -1.618 mA

D2.2 Let h = 50 /xA, Ic = 15 mA, Vbe = 0.65 V, and V^e = 5 V for an
npn transistor operating in the active region. Calculate (a) Z^, (b) V^b,
and (c) the total power dissipated by the transistor.
Answers. - 15.05 mA; 4.35 V; 75.0325 mW
D2.3 Let Vbe = 0.78 V, Vce = 0.21 V, /c = 8 mA, and /^ = 1.2 mA
for an npn transistor operating in the saturation region. Find (a) Vcb? (t>)
/£, and (c) the total power dissipated.

Answers. - 0.57 V; - 9.2 mA; 2.616 mW

2.2 pnp bipolar transistors

The pnp transistor contains a narrow n-type base layer sandwiched

between p-type emitter and collector regions. The physical structure is
suggested by Fig. 2.5a. As compared with the npn transistor, the n- and p-
type regions are interchanged; we term this a complementary arrange-
ment. Forward bias on the emitter-base junction causes holes to be in-
jected into the base region, most of which diffuse across the base and are
collected by the reverse- biased base-collector junction. The total emitter
54 Bipolar and field-effect transistors

Collector
o

Baseo
© -^vC)
6
Emitter

(a) (b) (c)

Fig. 2.5 (a) A symbolic picture of a pnp bipolar transistor, The circuit symbol for
(b)
a pnp bipolar transistor. Note that the emitter arrowhead is (c) The
directed inward,
IEEE standard reference direction for all currents is into the device, just as for the npn
transistor. In normal operation, Iq and /^ and Vg^ and Vce are all negative quantities
for the pnp transistor.

current /^ is thus composed of the sum of this large hole current plus a
much smaller electron current directed from the base toward the emitter.
The direction of conventional current is thus into the transistor at the
emitter terminal, and this is the basis for the arrowhead on the circuit
symbol shown in Fig. 2.5b.
The collector current magnitude is just slightly less than that of the
emitter current. Referring to Fig. 2.5c, we see that the IEEE standard
reference directions for all currents are into the device (as they are for the
npn transistor), and therefore Ic and /g are both negative quantit ies for
the pnp transistor in the active region.
Figures 2.6a and b show the input characteristics and output characteris-
tics, respectively. The currents and voltages are those defined in Fig. 2.5c.

The three regions of operation are also defined in the same manner as
they are for the npn transistor. In the active region, the emitter-base junc-
tion is forward-biased and the collector-base junction is reverse-biased. In
cutoff, both junctions are reverse-biased, and saturation occurs when the
junctions are both forward-biased.

D2.4 If /£ = 5 mA, /b = 0.15 mA, \Vbe\ = 0.7 V, and Vec

I I I I
|
I

= 4.3 V for a certain pnp transistor, find (a) Ic, (b) Vcb, and (c) the total
power dissipated in the transistor.
Answers. - 4.85 mA; - 3.6 V; 20.96 mW
2.3 Junction field-effect transistors: n-channel 55

t
Ib (mA) /r (mA)

0.5 V -150mA
-15- -125

-100
. -10- -75

-50
-5- -25

\ \

10 -20 ^CE (V)

ib)

Fig. 2.6 (a) The CE input characteristics of a representative low-power pnp bipolar
transistor, (b) The CE output characteristics.

2.3 Junction field-effect transistors: n-channel

To complete our discussion of transistors, the next several sections describe
field-effect transistors. The name derives from the effect produced on an
output current by an electric field inside the body of the device. Field-
effect transistors are also called unipolar transistors because the charge
motion takes place in a single type of material, either n- or p-type. The
operation should be contrasted with that of the bipolar junction transis-
tor, where the carriers move through both n- and p-type semiconductor
material in series.
Transistors may be broadly classified as shown in Fig. 2.7. We have
already considered the bipolar transistors at the left side of the drawing;
we now turn to the field-effect transistors. Note that they fall into two
broad classifications, depending on the method by which they are fabri-
cated and the resultant mode of operation. The two major categories are
the /unction /ield-effect transistors (JFET) and the insulated gate /ield-
^ffect transistors (IGFET). The most common type of IGFET is termed
the metal — silicon dioxide — silicon /ield-rffect transistor (MOSFET).
We shall begin with the junction field-effect transistor, covering first
the n-channel type and then (very briefly) the p-channel type in the fol-
lowing section. We
shall look at circuit symbols, current reference direc-
tions, and voltage reference polarities and try to gain some preliminary
understanding of their physical operation. The n-channel JFET forms the
basis for most of our discussion of FETs because many of the ideas used in
explaining its operation carry over to the other FETs. Later we will
 H

56 Bipolar and field-effect transistors

c
c

1—1 ^^

c
c 'rt 1
If -s •+-»

H
<D

if ^ e
en
%r\

O O
1c K :^
^
C 0)
.

V rt c
'4-*

&I
-g
%
<X^ r
11 c>
a>

CO
T3
•—
A
-\ •

1^ (U

T3
1
o
"ca ^^ C
•22
c«
H
c c
c
c« W
1 Ig a
V
s: 31
c
c2

5 ^
IX
CO
i c
43 ID
O ^ •5
a ^
o
c« O
c
o a
c «-M
-Q
JZ
V ^ &
C5.
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<; (U
a J3
-'
s c
r^
cv<
S
L
hV, ^
c
1

1C
1

V
s:
2.3 Junction field-effect transistors: n-channel 57

emphasize the circuit performance of the JFET because it is often used in

Hnear ampHfier appHcations, especially at high frequencies.
The construction of the n-channel JFET is suggested by the sketch
shown in Fig. 2.8a. The channel is formed from lightly doped (low con-
ductivity) n-type material, usually silicon, with ohmic contacts at the two
ends of the channel. The two gate regions are made of heavily doped (high
conductivity) p -type material, and they are usually tied together electri-
"^

cally. We shall always assume that this is the case when referring to "the
gate." We shall also keep the drawings cleaner by showing the connection
to only one gate. In reference to Fig. 2.8a, if we should connect a low-
voltage source of a few tenths of a volt between the two ends (top and
bottom) of the channel, the current that would flow could be calculated
from Ohm's law by determining the resistance of the channel between
source and drain:

I
^SD =
gA
where I is the length (m) of the channel from source to drain, a is the con-
ductivity (U/m) of the n-type material, and A is the cross-sectional area
(m^) of the channel.

Fig. 2.8 (a) An n-channel JFET contains a channel of n-type material from source to
drain. The channel passes between p"*"-type gate regions, (b) When reverse bias is

applied between the gate and channel, the cross-sectional area of the channel is re-
duced, the channel resistance increases, and Iq decreases.

n channel

Gateo
58 Bipolar and field-effect transistors

Now let's apply a small reverse-bias voltage to the p-n junction formed
by the gate and the channel; we establish such a reverse bias in Fig. 2.Sb
by setting Vqs = - 1 V. This reverse bias creates a depletion region that is
nearly void of mobile carriers, just as was the case with the reverse-biased
diode. The depletion region effectively narrows the width of the channel,
and its resistance therefore increases. Note that a positive drain-to-source
voltage is applied (V^s = 0.1 V), and that we are keeping it small for the
present. The majority carriers in the n-type channel are electrons. They
flow from source to drain, as indicated in Fig. 2.Sb; we thus have an n-
channel JFET. The drain current Iq is directed into the transistor, and is a
positive current.
As the magnitude of the reverse bias on the gate is increased, the width
of the depletion region increases while the channel width decreases. We
are effectively increasing the value of the resistance Rsd Curves of Id vs.•

Vds for several different reverse-bias voltages are shown in Fig. 2.9. The
drain-to-source voltage is still kept small, say < V^s < 0.5 V. The resis-
tance Rsd is the reciprocal of the slope of the straight line corresponding to
the gate-to-source voltage applied. Note that we have a voltage-controlled
linear resistance in this region of small values for Vds We also say that•

Vqs modulates, or changes, the drain-to-source resistance.

There are numerous applications of the JFET in the linear resistance
region, but larger values of signal gain are achieved for larger values of the
drain-to-source voltage, as we shall see shortly.
When Vqs becomes sufficiently negative, the width of each depletion
layer increases until the channel vanishes, as shown in Fig. 2.10. We say
that the channel is "pinched off," and Id is essentially zero. Alternatively,

Fig. 2.9 For small values of the drain-to-source voltage, the JFET acts as a linear
resistor whose resistance is controlled by Vqs the reverse-bias voltage across the gate-to-
,

channel junction.
2.3 Junction field-effect transistors: n-channel 59

RsD is nearly infinite. The value of Vqs for which this occurs is termed the
pinch-off voltage Vp It is evaluated for small ViDS

Vp = V,GS

For the n-channel JFET illustrated in Fig. 2.9 or 2.10, we see that Vp
= -4V.
JFET characteristics in the ohmic region obey the relationship

Vds'
Id = D (V,GS Vp)Vds - (small Vos) (1)

where D -is a constant that depends on the material parameters and the
geometry of the device. The magnitude of V^s is limited to a few tenths of
a volt. The curves shown in Fig. 2.9 are obtained by letting Vp = - 4 V
and D = 5 X 10 "^ A/V^. Their linear nature shows that the Vds^I2 term
is negligible when V^s ^ 0.1 V.

Now let us look at the region of the characteristics used in linear ampli-
fication by considering larger values of V^s We begin by setting Vqs = 0;
•

this is the maximum value that we normally apply, for satisfactory opera-
tion of the JFET is not obtained when the gate-to-channel junction is for-
ward-biased. The depletion region and channel are shown in Fig. 2.11a,
b, c for successively larger drain-to-source voltages. In Fig. 2.11a, V^s
= 2 V. Note that the gate-to-channel voltage is essentially the same as
Vqs at the source end of the channel, but that it is more closely Vqd

Fig. 2.10 When Vqs becomes sufficiently negative, the channel is pinched off and Iq
drops to zero. For small V^s, this value of Vqs is called the pinch-off voltage Vp.
Here, Vp = - 4 V.

Depletion
region

^0 tlijj
60 Bipolar and field-effect transistors

Fig. 2.11 An n-channel JFET is shown with Vqs = for successively larger values of
V/^S-The channel narrows at the drain end because the gate-to-channel voltage is
approximately Vqs ( = 0) at the source end and Vqq ( = - Vj)s) at the drain end. (a)
Below pinch-off. (b) At pinch-off. (c) Beyond pinch-off (in saturation).

= ^GS ~ ^DS = - 2 V at the drain end. The depletion region is thus wider
at the top of the channelthan it is at the bottom, so the channel itself is nar-
rower at the drain end than it is at the source end. There is an increase in
RsD^ ai^d the drain current is a little less than a straight-line /^-vs.-Vos rela-
tionship would predict.
In Fig. 2.lib, V^s = 4 V, and thus the gate-to-channel voltage is about
-4 V near the drain (Vqd = - 4 V) This is the pinch-off voltage, and the
.
 2.3 Junction field-effect transistors: n-channel 61

h (mA)

hss - 32

I
(V)

10

Fig. 2.12 With Vqs = 0, the relationship between Iq and V^s is seen to be linear for
small Vj)s nonlinear for intermediate values, and saturated at Iqss for Vj^s
, > ~ Vp-

channel is pinched off only at the drain end. Although we describe the
channel as pinched off, it might be better to say it is pinched down, for
with these larger values of V^s, Id is not zero. The value of Id when Vds
= -Vp (with Vqs = 0) is about as large as it can ever be. This is shown in
Fig. 2.12, and this maximum value of Id is termed Idss^ the drain-to-
source current saturation value:

loss - I
^DS=-^?'^GS =
For the transistor shown, Idss = 32 mA.
As Vds increases to 10 V, Fig. 2.11c, a gate-to-channel voltage of - 4 V
or less is found across a longer section of the channel, and a longer section
of the channel is pinched down. We call this operating condition beyond
pinch-off, or saturation, and we say the FET is operating in the heyond-
pinch-off region or the saturation region. The drain-to-channel voltage
and the length of the constricted section of the channel increase almost
exactly in proportion, and the current remains constant (saturated) at the
value Idss In practice, there is a very slight increase in Id as Vds increases.
•

We shall take this into account later whenever it becomes necessary.

When the gate-to-source voltage is reduced below zero, pinch-off and
saturation occur at smaller values of Vds- Figure 2.13 shows curves for
several values of Vqs Note that saturation occurs at a value of Vds such
.

that the gate-to-channel voltage equals Vp at the drain end:

Vnn — Vn<i
GS — Vnc
DS = Vv

or

DS = Vn.
Vn. GS - V (2)
62 Bipolar and field-effect transistors

Vgs=0

Beyond-pinch-off or saturation region

-2V

-3V
DS (V)

10 12 14

Fig. 2.13 The common-source output characteristics of an n-channel JFET show

curves of I^ vs. V^s for various values of Vqs, Vp < Vqs < 0. We see that I^ss
= 32 mA and Vp = - 4 V.

Equation (2) represents the border between the ohmic and saturation re-
gions. Larger values of V^s cause operation to be in the region beyond
pinch-off,

Vds ^ Vgs - Vj (saturation, or beyond pinch-off) (3)

while smaller values of V^s cause operation in the ohmic region. For the
transistor we have been considering, operation is in the beyond-pinch-off
region when V^s ^ Vqs + 4, assuming, of course, that - 4 < Vqs < 0.
When Vqs = - 2 V in Fig. 2.13, any V^s greater than 2 V is in the
region where the current is nearly constant. Thus to the right of the bro-
ken line in Fig. 2.13 the JFET is beyond pinch-off and in current satura-
tion; it acts much like a voltage- (Vqs) controlled current source. To the
left, operation is in the ohmic region, linear for small V^g and nonlinear for

slightly larger values. The complete set of curves represents the common-
source output characteristics.
Figure 2.14 illustrates the circuit symbol for the n-channel JFET. Note
that the arrow on the gate follows the convention used for the diode: It
points into the device at a terminal connected to p-type material. Also the
positive reference direction for all currents is consistently taken into the
device. Thus Ip is normally positive and Is is normally negative Since the .

gate is reverse-biased, Iq is negative, essentially the reverse saturation cur-

rent of the gate-to-channel diode, a fraction of a nanoampere for silicon
devices. We shall find that the input characteristics of a JFET are well
represented by a single number, the value of the gate leakage current.
Furthermore, many of the dc and ac models we develop will be based
largely on just two values, Vp and I^ss •
2.4 Thep-channelJFET 63

\'^

Go

Fig. 2.14 The circuit symbol and current reference directions for the n-channel
JFET.

D2.5 An n-channel JFET has Vp = - 2.8 V. It is operating in the ohmic

region with Vcs = - 1 V, V^s = 0.05 V, and If, = 0.3 mA. Find Id if (a)
Vcs = -1 V, Vos = 0.08 V; (b) Vos = 0„ Vos = 0.1 V; (c) Vcs
= -3.2 V, Vds = 0.06 V.
Answers. 0.476 mA; 0.930 mA;

D2.6 The border between the ohmic and saturation regions for a certain
n-channel JFET occurs when Vcs = - 1 V and V^s = 2.2 V. Find the
value of Vcs that just produces pinch-off when Vds equals (a) 2 V, (b) 3 V.
Determine whether this transistor is operating in the ohmic, saturation, or
cutoff region when (c) Vcs = 0, Vds = 4 V; (d) Vcs = - 4 V, Vds = 8 V;
{e)VGs = -2V, Vos = IV.
Answers. 1.2 V; - 0.2 V; saturation; cutoff; ohmic

2.4 The p-channel JFET

The p-channel JFET is the exact complement of the n-channel JFET because
the n- and p-type regions are interchanged. We again take the positive-current
reference directions into the transistor, and all voltages and currents are
therefore the negative of those we just finished considering for the n-channel
case. Figure 2.15a, b shows the circuit symbol (where only the arrowhead on
the gate is reversed in direction) and a representative set of common-source
output characteristics. In this case we see that Idss is - 20 mA while Vp is

+ 3V.
Equation (1) of Section 2.3 continues to apply in the ohmic region:

Vds'
In = D (Vcs - Vp)Vds - (small Vds)

although D is now found to be a negative constant.

64 Bipolar and field-effect transistors

In order to establish an operating point for the p-channel JFET that hes
in the region beyond pinch-off, it is necessary that V^s ^ Vqs - Vp, as
well as < Vqs < Vp Comparing these conditions with those for the n-
.

channel device, we note that all inequality signs are reversed, a conse-
quence of multiplying every term in an inequality by - 1.
Either the n- or p-channel JFET may be used as a current-limiting de-
vice to protect circuits from current overloads. By connecting the gate to
the source (Vqs = 0), Fig. 2.13 or 2.15b indicates that the drain-current
magnitude is limited to Idss |
We shall assume that the drain-to-source
\
.

voltage is not so large that avalanche breakdown between the gate and
drain results, for this could destroy the transistor if the power dissipation
(VdsId) is too great. Since there are effectively only two connections to the
external circuit, this configuration is sometimes called a current-limiting
diode. In integrated circuits, it is called a pinch resistor.

D2.7 Identify the region of operation for a JFET having (a) V^s
= -4V, yGs = 2v,yp= iy;{h)Vos= -4v,Vgs = iv,yp = 2V;
(c) Vos = 2V, Vcs = 0, Vp = -3 V; (d) Vos = 4 V, V^s = "2 V, Vp

= -4V;(e)y,,s = 2V,yGS= -2V,yp= -lY;{i)Vos= -3V,yGS

= 1 V, Vp = 4 V.

Answers, cutoff; saturation; ohmic; saturation; cutoff; ohmic-saturation

edge

2.5 Insulated-gate FET: depletion mode

We now leave the junction FET and consider the insulated- gate FET, or
IGFET. The most important member of this class is the MOSFET, so
named because it has layers of metal (usually aluminum), oxide (usually
silicon dioxide), and silicon (either n- or p-type), in that order. A similar
type of IGFET has a gate made of polycrystalline silicon (polysilicon) that is
doped so that it is conducting. It is called a silicon-gate MOS.
The MOSFET can be constructed to operate either in the depletion
mode, in the enhancement mode, or in both (but not at the same time). In
this section we shall look at the depletion-mode MOSFET because its op-
eration has many similarities to that of the JFET we just considered. We
shall limitour attention mainly to the n-channel device, for again the p-
channel unit is its complement.
The term n-channel depletion-mode suggests the manner of operation. As
shown in Fig. 2.16a, there is a channel of n-type material, and it connects
two very heavily doped n-type regions, customarily designated as n -type. "^

The channel itself is only lightly doped and therefore has a low conductiv-
ity. The two n -type regions act as low-resistance connections to the
"^

source and drain ends of the channel. Ohmic contacts are provided to the
n"*" -regions for connection to the external circuit. The drain, source, and
 2.5 Insulated-gate FET: depletion mode 65

Vn, =

Saturation or beyond-pinch-off

GO
In Vb 1.0

1.5

Vn, = 3 V 2.0

•2.5'
I
12 ^z)5(V)
(a) (b)

Fig. 2.15 (a) The symbol for the p-channel JFET

circuit differs from that for the n-
channel JFET in only one way: the arrowhead on the gate is reversed in direction, (b)
Common-source output characteristics for the p-channel JFET: Vp = -f- 3 V.

channel are built on a p-type substrate. Under normal operating conditions

the p-n junction formed between these three regions and the substrate is
reverse-biased, and the resultant depletion region adjacent to the substrate
leads to a negligible current through the substrate; the substrate therefore
plays a relatively insignificant role in the operation of the device.
The gate electrode is insulated from the channel by a layer of silicon
dioxide that provides a resistance from the gate to any other terminal that

Fig. 2.16 (a) The physical construction of an n-channel depletion-mode MOSFET.

The solid black regions are metal, usually aluminum, (b) With the substrate con-
nected to the source and with Vqs > 0, the p-n junction between substrate and source
has zero bias, and the junctions between substrate and channel and substrate and
drain are reverse-biased. This results in the depletion regions shown.

Drain
(silicon)

Substrate
(silicon)

Channel
(silicon)

Go

Substrate

(a) ib)
66 Bipolar and field-effect transistors

In (mA)

V \r) 24- Vn. =0

16--

(a)

Fig. 2.17 (a)With a negative voltage applied between gate and source on an n-channel
depletion-mode MOSFET, a depletion region is established in the channel; V^g is
small, (b) The channel acts like a variable linear resistor with its value controlled by
Vgs-

is typically 10 ^^ to 10^^ Q. We shall consider the gate c urrent to be zero.^

Thus the only current we need consider is along the channel.
Let us first shown in Fig- 2.16b, and apply a
leave the gate floating, as
small positive drain-to-source voltage, V^s = 2 V. The substrate is often
connected to the source, and we therefore would see a voltage across the p-n
junction varying from zero at the source end of the channel to - 2 V at the
drain end. This is the reverse bias mentioned above, and the depletion
region shown in Fig. 2.16b effectively isolates the channel from the sub-
strate. The depletion region lies on both sides of the channel-substrate
junction.
The electron current flows from source to drain, and therefore I^ > 0.
The channel acts as a resistor, the value depending on the dimensions and
the conductivity of the n-type silicon.
Now let us apply a negative voltage to the gate: Vqs = - 1 V. We let
Vds be very small, say V^s = 0.2 V, as shown in Fig. 2.17a. The negative
potential on the gate acts through an electric field in the oxide layer to
repel electrons in the n-type channel material. A depletion layer adjacent
to the insulator thus develops and the channel conductivity decreases.
When Vqs is reduced to the pinch-off voltage Vp the channel is pinched ,

off and Id = 0. For these small values of V^s, we obtain a family of

With 0.16 mV applied across 10^^ Q, only one electron passes by each second, on the average.
 —
2.5 Insulated-gate FET: depletion mode 67

straight lines for /^ vs. Vps , as shown in Fig. 2. lib. The result is like that
for the JFET, with

Vds'
Id = D (Vcs- Vp)Vos - (small Vds) (4)

and we again have a voltage-controHed linear resistance. From these

curves we can see that Vp = - 3 V for this device.
Once more, our main interest lies in the region beyond pinch-off (satu-
ration), where Vj)s is larger. In Fig. 2.18a we increase V^s to 5 V while
keeping Vqs = - 1 V. It is evident now that much of the channel is
pinched off, because at one end, Vqs = - 1 V (below pinch-off), whereas

Fig. 2.18 (a) Beyond pinch-off we find the channel is pinched down over part of its

length. Here I^ stays relatively constant as V^s increases, (b) The output characteris-
tics for the n-channel depletion-mode MOSFET; Vp = - 3 V and Ij^ss = 32 mA.

(a)

Ohmic
region
Vgs =
J
'/)iA'
= 32-
Beyond-pinch-off or saturation region
24-
-0.5 V

16- j/l\ -1 v

jj/f -1.5 V
8-
m 1
Vp=--3 V -2V
w \ / H H 1 ..
6 9 12 ^DS (V)
68 Bipolar and field-effect transistors

at the other, V^d = - 6 V (beyond pinch-off). The d rain current Iq is

essentially constant for all values of V^s that are larger than Vc^~^^^~Vp:

Vqs ^ Vgs ~ ^p (beyond pinch-off)

We see that this constant value

is about 14 mA
in Fig. 2. 18^, w^hich shoves
the complete output characteristics for the n-channel depletion-mode
MOSFET. When Vqs = 0, this constant value of Id is again called I^ss-
For this transistor, it is 32 mA.
Figure 2.19 shows the circuit symbol for an n-channel depletion-mode
MOSFET in which the substrate and source are connected internally. The
indication that the device is n-channel is the arrow on the substrate, show-
ing that the easy direction of current flow is from the p-type substrate to
the n-type channel. The open circuit at the gate signifies the insulated
gate. All currents have a positive reference direction that is inward, and
therefore Is is negative for normal operation; Iq is so small that we usually
need not bother to place it on the diagram, for it rarely enters into a circuit
calculation.
We can explain the operation of the p- channel depletion-mode
MOSFET in terms of the n-channel unit by interchanging all n's and p's
and changing the sign of all voltages and currents. Figure 2.20 shows the
symbol for the p-channel unit; only the direction of the arrow at the sub-
strate is reversed. The pinch-off voltage is now positive, Idss is negative,
and Id normally negative. Thus, Eq. (4) continues to apply in the ohmic
is

region, while saturation occurs whenever

Vds ^ Vgs ~ ^p (beyond pinch-off)

D2.8 p-channel depletion-mode MOSFET has a pinch-off voltage of

A
3.7 V. (a) For what range of Vqs is operation beyond pinch-off if Vds
= -3.1 V? (b) For what range of Vds is operation beyond pinch-off if
Vgs = 1.7 V?
Amwers. 0.6 < Vqs ^ 3.7 V;Vds ^ - 2 V

Ftg. 2.19 The circuit symbol for an n-channel depletion-mode MOSFET having the
substrate and source connected.

D
Q
.In

GO-

1'.
 ,

2.6 The enhancement-mode MOSFET 69

Go-

Fig. 2.20 The circuit symbol for a p-channel depletion-mode MOSFET with the
source connected to the substrate.

2.6 The enhancement-mode MOSFET

An n-channel enhancement-mode MOSFET differs in its construction
from the depletion-mode unit in that it does not have a region of n-type
material built into the unit as a channel. Instead, the effect of the electric
field between the gate and substrate enhances the conductivity of a por-
tion of the substrate and produces a channel.
Figure 2.21a suggests the structure of the device. The substrate is lightly
doped p-type material; it has about the same conductivity as the substrate

used with the depletion mode. The source and drain regions are again n "^

and an insulating layer separates the metal gate from the substrate. If we

Fig. 2.21 (a) The structure of an n-channel enhancement-mode MOSFET shows

that the n-type channel is not built into the transistor, (b) For a sufficiently large Vqs ,

part of the p-type substrate inverts to n-type; this forms the channel.

Drain
(silicon)

Substrate
(silicon)

Depletion
region

Gate
(aluminum)
Vgs>o(1^

Substrate

ib)
70 Bipolar and field-effect transistors

leave the gate open-circuited and apply a voltage (of either polarity) be-
tween drain and source, there is oiily a negligible current. It is a reverse-
saturation current because either the substrate-source or substrate-drain
p-n junction is reverse-biased. There is no channel.
Now us apply a positive Vqs and a small V^s; see Fig. 2.21b. An
let
electric field is established across the insulating layer, which acts to repel
positive carriers in the substrate and to attract negative carriers. As a
result, a layer of substrate near the insulator becomes less p-type and its
conductivity reduced. As Vqs increases, this surface region of the sub-
is

strate eventually has more electrons than holes, and it inverts to n-type.
Figure 2.2lb shows this n-channel. Between the p-type substrate and the
n-type channel is a depletion region that serves to isolate the substrate
from the channel.
The smallest value of Vqs that will produce a channel and a resulta nt
value of In greater than the few nanoampere s of reverse-saturation cur-
rent is called the threshold voltage Vj typically 0.5 to 3 V. As Vqs in-
,

creases beyond Vj, more electrons are pulled into the channel and its
width and electron concentration increase. Thus the channel resistance
decreases and I^ increases for the same source-to-drain voltage. In Fig.
2.22a we see a family of curves showing I^ vs. V^s for several values of
Vqs, where V^s is small. We
again see a voltage-controlled linear resis-
tance. Note that the threshold voltage is + 2 V. These curves ^ are de-
scribed by

In = K (Vcs - yT)Vos - -^ (Vds small and Vqs > Vj)

(5)

where K is a positive constant for the n-channel device.

The complete output characteristics are shown in Fig. 2.22^. When
Vds becomes sufficiently large, the gate-to-drain voltage is less than Vj,
and pinch-off occurs at the drain end of the channel; that is, Vq^ = Vqs
- V^s — ^T Further increases in V^s do not lead to larger values of I^
' ,

and the transistor is operating in the region beyond pinch-off. This region
is identified in the figure. The device behaves as a voltage-controlled cur-
rent source, just as every FET
does in saturation. For very large values of
Vj^s avalanche breakdown in the channel can lead to catastrophic values
->

of //) For very large values of Vcs dielectric breakdown in the oxide layer
. ,

will also ruin the device.

Figure 2.23 shows the circuit symbol for an n-channel enhancement-
mode MOSFET with the substrate connected to the source. Note that the

^This equation yields slightly larger currents than a real device, but it is often used in circuit
design because of its simplicity. See Vol. IV of G. W. Neudeck and R. F. Pierret, Modular Series
on Solid State Devices (Reading, MA: Addison- Wesley, 1983).
2.6 The enhancement-mode MOSFET 71

Id (mA)

(a)

In (mA)

Beyond-pinch-off or saturation region

I \ \ \ h-H \ \ \ f

10 ^DS (V)

ib)

Fig. 2.22 The n-channel enhancement-mode MOSFET is a voltage-controlled

(a)

(b) The complete output characteristics. Operation is

linear resistance for small V/^s .

beyond pinch-off when V^s — ^GS ~ ^T •

Fig. 2.23 The circuit symbol for an n-channel enhancement-mode MOSFET with an
internal connection between substrate and source.

1/.

Go-

t'^
72 Bipolar and field-effect transistors

arrow shows the direction from the p side (substrate) to the n side (chan-
nel) of the junction, as usual, while the segmented line indicates the en-
hancement mode; no channel is present until enhancement occurs.
The p-channel enhancement-mode MOSFET is the complement of the
n-channel device. It has an n-type silicon substrate in which a p-type
channel is induced by making the gate sufficiently negative, Vqs < V^.
The threshold voltage is a negative number The family . of curves in the
ohmic region may be represented by the equation

In = K {Vcs- Vr)Vos-^- (Vds small, and Vqs ^ Vj)

(6)

where K is a negative constant, and I^, Vqs, V^s? ^^^ ^r ^re negative.
Operation is in the region beyond pinch-off when V^s — ^gs ~ ^r- Fig-
ure 2.24 shows the circuit symbol.
Figure 2.25 brings together the eight transistor circuit symbols that we
shall be using. All current arrows are directed into the device in accor-
dance with IEEE standards.
Before we conclude this initial look at IGFETs and MOSFETs, one ad-
ditional point is of interest. The depletion-mode MOSFET studied in Sec-
tion 2.5 can operate in either the enhancement or depletion mode. If, for
example, we have a low-conductivity n-type channel, the application of a
between gate and source will draw additional electrons to
positive voltage
the channel-insulator surface, thus increasing the conductivity of the
channel. Figure 2.26 shows representative output characteristics.

D2.9 An n-channel enhancement-mode MOSFET with Vj = 1.5 V has

a drain current of 0.6 mA when Vqs = 3 V and Vqs = 1 V. Find Iq if (a)
Vqs = 3.1 V and V^s = 1.1 V; (b) V^d = 2 V and Vqs = 3.2 V. (c) What

Fig. 2.24 The symbol for a p-channel enhancement-mode

circuit MOSFET with an
internal connection between substrate and source.

D
Q

GO-
2 6 The enhancement-mode MOSFE T
.
73

\'c

f^:-
BE 'BE
— 6
npn pnp

\'o

GS

^-channel JFET p-channel JFET

Vp<Vgs<0

DS DS

"GS "GS
w-channel p-channel
depletion-mode IGFET depletion-mode IGFET
Vp<Vgs<0 0<Vas<Vp

DS \§: DS

"GS
n-channel p-channel
enhancement-mode IGFET enhancement-mode IGFET
0<Vr<VGs Vas<VT<0

Fig. 2.25 Circuit symbols and standard reference directions for currents and volt-
ages.
74 Bipolar and field-effect transistors

+ 1

; Beyond-pinch-off region
Ohmi?
region / / +0.5 Enhancement
mode

-0.5
Depletion
mode

-3
10 ^DSC^)

Fig. 2.26 An n-channel depletion-mode MOSFET may operate in either the deple-
tion mode or the enhancement mode, as the output characteristics show. Similar p-
channel devices exist.

is the equivalent resistance of the channel when Vqs = 3.8 V, V^s

= 0.1 V?
Answers. 0.693 mA; 0.792 mA; 741 Q

2,7 Monolithic resistors

A monolithic integrated circuit has all its components produced by various
processes on or within a single substrate, usually silicon. The components
are interconnected along the surface by vaccum-deposited aluminum. If
about 20 or fewer circuits are interconnected on one chip, we term it
medium-scale integration (MSI); large-scale integration (LSI) refers to a
chip containing several hundred circuits; and very large-scale integration
(VLSI) is typically reserved for a chip containing an entire system, often
more than 1000 circuits or 10,000 elements. Each circuit may contain on
the order of two transistors, several diodes, and the associated resistors.
Monolithic integrated circuits are composed of four basic types of cir-
cuit elements: resistors, capacitors, diodes, and transistors. All the resis-
tors in the integrated circuit are made at the same time. One common
method is by the diffusion of a p-type channel into an n-type substrate, or
vice versa. The thickness or depth of the channel and its conductivity are
therefore the same for every resistor; the resistance is found by

I I
R =
aA atw
where /, t, and w are the length, thickness, and width respectively, as
shown in Fig. 2.27. If the length and width are equal, the resistor occupies
 :

2.7 Monolithic resistors 75

a square portion of the surface and its sheet resistance is

1
fie = (ohms per square) (7)
at

The commonly called ohms per square, but the phrase "ohms for
units are
a square'' would be better because Eq. (7) shows that the dimensions are
ohms and not ohms per square meter. With the range of conductivity and
thickness that are practical, R^ commonly ranges between one or two and
several hundred ohms per square. Other techniques can provide larger
values of sheet resistance, ranging up to 25 k 12 per square, as for example a
pinch resistor.
For a sheet resistance Rg, the total resistance between the ohmic con-
tacts is

The ratio l/w (the number of "squares") may vary between

perhaps one-
quarter and fifty, the latter design requiring a serpentine course along the
surface in order to maintain reasonable dimensions.
An important design consideration for resistors is their change of value
with temperature. The temperature coefficient of resistance (TCR) a j en-
ables us to find the resistance fi at a temperature T, knowing the resistance
Href at a temperature T^ef

R = H,ef + CCt{T - T,ef)firef

or

R = fi,ef(l + cirM) (8)

The temperature difference is commonly measured in degrees Celsius,

and a^ is expressed in parts per million per degree Celsius. Thus, a TCR of

Fig. 2.27 The resistance of the p-type channel is l/atw, where a is the conductivity of
the p-type material. We assume that the p-n junction is reverse-biased to isolate the
channel from the substrate.

Ohmic
contacts

A2-type substrate
76 Bipolar and field-effect transistors

2000 ppm/°C would lead to a 10% increase in resistance for a tempera-

(1 + 2000 X 10-6 X 50 = 1.10). The value of 0:7^ may
ture rise of 50° C,
range from - 500 to +^000 ppm/°C for monolithic resistors, depending
on the method of manufacture and the materials used.
One of the disadvantages of monolithic resistors is the large tolerance in
their manufacture, as high as ± 20 % How^ever, all the resistors on the
.

substrate are apt to be above or below^ the nominal value by the same
amount. Thus we might find that two resistors that we wished were 100 Q
ended up as 119 and 120 Q. However, it is possible to design circuits so that
their operation is more sensitive to the ratio of two resistances than it is to
either absolute value, and the ratios can be maintained within several per-
cent. Since all the resistors in the same substrate have the same a^, the
resistance ratio is constant over a wide range of temperature, and this is a
distinct advantage of their design.
A typical sheet resistor, formed at the same time that the diffusion cre-
ating the base region takes place, has a sheet resistance of 200 12 per
square, a tolerance of ± 20 % a matching tolerance with respect to other
,

units of ± 1 % and a temperature coefficient of resistance of + 2000 ppm/

,

°C.

D2.10 A monolithic resistor is constructed with a sheet resistance of

200 per square at 25°C, a length / = 500 ^m, and a width w = 40 ^m.
12

(a) Find R. If H^ has a tolerance of ± 15 % / has a tolerance of ±2%, w

,

has a tolerance of ± 8% aj = 2000 ppm/°C at 25°C, and a temperature

,

range from - 55° C to 125° C is possible, find (b) the maximum expected
value of R, (c) the minimum expected value of R.

Answers, 2500 12; 3825 12; 1620 12

Problems
1. Active-region operation of an npn transistor is present with junction
voltages of 0.65 and 8.2 V, and with a collector current- to-base cur-
rent ratio of 100. If /g = - 4 mA, find hJc. ^be ^C£ Vcb and the , . ,

total power dissipated by the device.

2. An npn transistor operating in the active region has |/£;| =8 mA,
\Ib\ = 150 /xA, \Vse\ = 0.6 V, and IVceI = 15 V. Find (a) Z^, (b)
Ib, (c) /c, (d) Vb£, (e) VcE, (f) Vcb, (g) the power entering the B-E
port Pbe and (h) the power entering the C-E port Pce If the transis-
,
•

tor were connected common-base, what power would enter (i) the E-B
port? (j) the C-B port?
3. The active-region operating point for an npn transistor is located at
\Ib\ = 120 M, \Ic\ = 6mA, IV^^I = 0.7 V, \Vcb\ = 8 V. Find (a)
 .

Problems 77

20 V

Fig. 2.28 See Problem 4.

Ib, (b)-/c, (c) Ie, (d) Vbe, (e) Vcb, (f) Vce, (g) the power entering the
base-emitter port Pbe assuming the emitter is the common terminal;
,

(h) the power entering the emitter-base port Pes , assuming the base is
the common terminal, and (i) the total power being dissipated by the
transistor.
4. Determine the region of operation for the transistor shown in Fig.
2.28 if (a) Ic = 1 mA, Ib = 20 fxA, Vbe = 0.7 V; (b) Ic = 3.2 mA, Ib
= 0.3 mA, Vbe = 0.8V;(c)/c = 3 mA, /^ = 1.5 mA, Vb^ = 0.85 V.
5. Determine the region of operation for transistors Tl and T2 in the
circuit shown in Fig. 2.29 if (a) /ci = Ic2 = 1 rnA, /^i = Ib2 = 20 /^A,
V, = V2 = 21 V; (b) Iei= - 1 mA, Ie2 = - 1.5 mA, Ibi = 20 ^A,
Ib2 = 25 /xA, Vbei = 0.5 V, Vbe2 = 0.55 V. (c) Determine the power
dissipated in each of the eight circuit elements in (b)
6. Find Ic, Vbe, ^ce, ^^id Vcb for the transistor shown in Fig. 2.30 if it

is known that Ie = -2 mA and Ib = 25 /xA.

Fig. 2.29 See Problem 5.

78 Bipolar and field-effect transistors

"5 kn
153 kJ2
2kn

'62.67 kn ( )20V

Fig. 2.30 See Problem 6.

7. For each transistor shown in Fig. 2.31, state whether each junction is
forward- or reverse-biased, and whether the transistor is operating in
the active, cutoff, or saturation region.
8. Determine the region of operation for each of these transistors: (a)
npn, Vbe = 0.8 V, Vce = 0.4 V; (b) npn, Vcb = 1.5 V, Vce = 2 V;
(c) pnp, Vcb = 0.9 V, Vce = 0.4 V; (d) npn, Vbe = "1 V, Vcb
= 0.6 V; (e) pnp, Vcb = 0.7 V, Vce = 1.5 V
9. (a) The potentials of the three terminals of an npn transistor are meas-
ured with respect to ground as: emitter, 5.5 V; base, 6.3 V; and
collector, 6.0 V. Is the transistor cut off, saturated, or operating in

Fig. 2.31 See Problem 7.

0.7 V +

0.2 V

(b)

4.6 V
0.3 V 5.4 V

0.7 V

(c) id)
 .

Problems •"

4.5 V

Fig, 2.32 See Problem 10.

the active region? (b) Repeat for a pnp transistor with: emitter,
- 3 V; base, - 3.5 V; collector, - 5.5 V.
10. (a) Aft npn bipolar transistor is operating in the active region w^ith
\Ic\ = 2 mA, \Ib\ = 0.1mA, IV^^I = 0.8 V, and \Vsc\ = 3 V.
Find Ic, Ib, h^ ^be ^cb ^ce and the total power dissipated by the
? ? ?

transistor, (b) Repeat if the transistor is pnp. (c) The bipolar transistor
shown in Fig. 2.32 is operating in the active region. Identify the emit-
ter, collector, and base terminals, and draw the transistor symbol in-
side the box.

11 The JFET whose output characteristics are shown in Fig. 2. 13 is oper-

ating with Vds = 0.1 V. Determine the source-to-drain resistance for
Vgs equals (a) 0, (b) - 1 V, (c) -2V.
12. An n-channel JFET with Vp = - 5 V has a drain current of 2.5 mA
when Vqs = - 3 V and V^s = 2 V. (a) What is the drain-to-source
channel resistance when Vqs = - 4 V and V^s is small? (b) Calculate
Id for Vcs= - 1 V, Vos = 3 V.
13. The gate leakage current of the JFET whose characteristics are shown
in Fig. 2. 13 is - 40 nA. (a) If Vgs = " 2 V and V^s = 8 V, what is the
total power being dissipated by the transistor? (b) Repeat for Vqs
= -2V, Vos = IV.
14. Install the correct circuit symbol for a JFET in each box of Fig. 2.33,
showing proper connections to the external terminals. Identify the
source and drain. Assume normal operation in the region beyond
pinch-off.
15. In the normal operating region, a JFET has these values: I^ss
= 20 mA, Vp = -3 V, and Id = {A - BVgsV (mA, V). (a) Is the
JFET n-channel or p-channel? (b) Find A and B. (c) Find Iq if Vqs
= - 1 V and Vos = 8 V. (d) Find Vqs if /d = 10 mA
and V^s = 6 V.
16. In the region beyond pinch-off, a certain JFET is described by the
relationship /^ = - (5 - 2yGs)^ (mA, V). (a) Is the JFET n-channel
or p-channel? (b) Find Vp. (c) Find I^ss- Identify the following oper-
ating points as ohmic, cutoff, or in saturation: (d) {Vqs = 2 V, Vqs
= - 1 V); (e) (1, - 2); (f) (3, - 6); (g) (1.5, - 0.5). (h) Give the equa-
80 Bipolar and field-effect transistors

OV -3 V 15 V 5 mA
(a)

(c) id)

Fig. 2.33 See Problem 14.

tion of the curve (I^ as a function of V^s) that represents the bound-
ary between the ohmic and saturation regions.
17. (a) An n-channel JFET is operating in the region beyond pinch-off
vi^ith \Id\ = 2mA, \Ig\ =
0.1 M, I^dsI = 5V, |Vp| = 2.5 V, and
\Vgs\ = 0.5 V. Find h, h, h, Vcs, Vp, Vds, Vog, and the total
powder dissipated by the transistor, (b) Repeat if the JFET is p-channel.
(c) An unknow^n JFET having Vp = 3 V is operating normally in
| |

the saturation region. If Terminal A is at 4 V, B is at V, and C is at

4.5 V, state w^hether the JFET is n-channel or p-channel, and identify
the gate, source, and drain.
18. If each of the following facts applies to normal operation of a depletion-
mode MOSFET in the saturation region, identify the unit as DN (def-
initely n-channel), DP (definitely p-channel), or MBE
(might be ei-
ther): (a) /d= 4 mA, (b) Vp = -3.5 V, (c) Ic = 20 pA, (d) loss
= - 8 mA, (e) Vgd = - 2 V, (f) Ig = 0, (g) h = 3.5 mA, (h) Vos
= 10 V, (i) VoG = 6 V, (j) Vgs = 2 V, (k) Vgs = 0.
19. (a) Normal operation in the region beyond pinch-off for an n-channel
depletion-mode MOSFET occurs where \Id\ = 5 mA, \Ig\ = 2 nA,
{VdsI = 6 V, \Vp\ = 3 V, and \Vgs\ = 1 V. Find h, Ig, h, V^s,
^GS, ^p? ^00, and the power being dissipated by the transistor, (b)
if the MOSFET is p-channel. (c) Another depletion-mode
Repeat
MOSFET operating in the saturation region has voltages between ter-
Problems 81

minals of Vab = 5 V and Vgc - - 6 V. Identify the gate, source, and

drain.
20. Each of the transistors shown in Fig. 2.34 is characterized either by
\Vp\ = 4 V or Vrl = 3 V. Identify each device and state the region
I

in which it is operating.
21. Let \Id\ = 1mA, /g = 0, \Vds\ = 3V, and |VgsI = 2VforaMOS-
FET operating normally in the region beyond pinch-off. Find I^, Is,
Vcsy ^Ds^ and the total power dissipated by the transistor if it is (a) an
n-channel depletion-mode unit with Vp = 3 V; (b) a p-channel deple-
| |

tion-mode unit with \Vp\ = 2.5 V; (c) an n-channel enhancement-

mode unit with Vj = 1 V; (d) a p-channel enhancement-mode unit
| |

with \Vt\ = 1.5V.

22. Draw 'the circuitsymbols of appropriate depletion-mode MOSFETs
in the circuit diagram of Fig. 2.35.
23. In Fig. 2.36, let V^ =
Tl and Vp 1 V
4 V for 72. For each
for
pair of voltage values given below, state the region of opera-
(Vi^ , t?out)
tion of each MOSFET and specify whether or not Id O: (a) (8, 0.2),
(b)(4,l),(c)(2,3), (d)(1.5,5),(e)(l,8).
24. Two Ri = 1 kl2 and R2 = 3 kQ, are made by a diffusion
resistors,
process in which R^ = 200 ± 10 Q per square. Assume that Rg is uni-
form over the chip. Calculate the maximum and minimum values of
(a) Ri + R2, {h)Ri/{Ri -h R2). (c) Calculate the percentage errors in
(a) and (b).

Fig. 2.34 See Problem 20.

2.5 V

6 V

2V
+
 ;
82 Bipolar and field-effect transistors

1.5 V-=.

1.5 V..ZI

Fig. 2.35 See Problem 22.

25. Two monolithic resistors, jR^ =500 Q and Rb = 1000 Q, are made by
using Rg = 200 Q per square and a channel width having an uncer-
tainty of ± 10 % If the channel length is assumed to be exact, deter-
.

mine maximum and minimum values of (a) H^, (b) Rg, (c) R/^ Rb, -I-

{d)R^\\RBAe)RAl{RA + Rb).
26. A sheet resistance of 250 Q per square used to form the monolithic
is

resistor shown in Fig. 2.37. The width is 100 ^m. (a) Find
of the path
R. (b) What are the worst-case values of R that might be obtained if
the dimensional tolerance is ± 10% for the length, ± 15% for the
width, and ±20% fori?,?
27. A conducting material with a = 250 U/m is printed uniformly as a
layer 0.025 mm
thick to form a thick- film resistor on an insulating
substrate. The region is a rectangle with sides 1.5 and 7.5 mm. Find
the total resistance between (a) the two shorter edges, (b) the two
longer edges, (c) Find the width and length of a 2000-12 resistor hav-
ing the same surface area as the 1.5 x 7.5 unit. mm

Fig. 2.36 See Problem 23.

8 V

-r^..
Problems 83

r^

100 Mm

500 Mm
V.C
1800 /Ltm-
T
Fig. 2.37 See Problem 26.

28. A resistor has a resistance of 4704 12 at 25°C and 4818 Q at 55°C. As-
sume a linear relationship between R and T in degrees Celsius, (a)
Find ar in ppm/°C, using T^ef = 25°C. (b) Find R at 105°F. (c) Esti-
mate the temperature in degrees Fahrenheit at which H = 440012. (d)
Assuming that your linear relationship may be extrapolated, at what
temperature in kelvins would H = 0?
29. Some resistors in integrated circuits show a nonlinear variation of R
with T. As an example in which this is represented by a piecewise-
linear model, let aj be 800 ppm/°C for T < 0°C and 1800 ppm/°C
for T > 0°C. Determine R (a) at 30°C HR = 450 12 at - 20°C; (b) at
- 55°C if H = 2000 12 at 125°C. (c) As another example, consider a
resistance having a value Rq at 150°C, O.ORq at 25°C, and 0.8fio at
- 55°C. Assume a piecewise-linear model for H vs. T having a break
point at 0°C, and calculate values for aj for T < 0°C and T > 0°C.
30. A certain material has a surface resistivity of 700 12 per square at 0°C
and 750 12per square at 60°C. Find aj using a reference temperature
of (a) 0°C, (b) 60° C. Calculate the predicted resistivity at 20°C using
(c) ajfi, (d) ar,60? (g) linear interpolation of the original data.
 3

Transistor "dc models

In analyzing or designing electronic circuits, one of the most difficult

questions to answer concerns the selection of the model for the device. As
we found in Chapter 1, there is a trade-off between accuracy and com-
plexity. To obtain an extremely accurate model we may have to determine
data experimentally, as well as using powerful circuit- analysis techniques
to arrive at a solution. Linear models are simple and may be analyzed
easily, but they are applicable only to certain problems. Thus the selection
of a model often depends on the available data and our own abilities and
eagerness. Our guiding philosophy will be to use the simplest model that is
consistent with the needed accuracy. We cannot offer a single answer to
the model-selection question; it is often a matter of preference or opinion.
(In case of a tie, the instructor wins.)
As with the semiconductor diode, we may subdivide the model collec-
tion into dc and ac models. In determining or selecting an operating point,
we need a dc model; in specifying or obtaining a certain voltage or power
gain, we require an ac model. Figure 3.1 suggests how we might classify
the bipolar transistor models. This chapter and the following one refer to
the dc models; the ac models are discussed in Chapter 5.

3.1 Bipolar transistor linear dc models

As we have done we will pay attention first to the npn transistor,
before,
for the extension to thepnp bipolar transistor then follows easily.
—
There are three regions to consider active, saturation, and cutoff.
Rather than use one complicated model that may serve all three possibili-
ties, we will develop a simpler model for each condition alone. We con-

sider the active region first, since it is the region in which most signal-
amplifying devices operate.

Active- region model

Following the discussion of the bipolar transistor and its characteristics in
the previous chapter, our first and simplest attempt at a model for the npn
transistor of Fig. 3.2a is shown in Fig. 3.2b. We have provided a depen-
dent current source that supplies a collector current precisely ^^c times as

84
3.1 Bipolar transistor linear dc models 85

Bipolar
transistor
models

Operating point Signal

dc ac
models models

Piecewise-
Linear Nonlinear
linear

Ebers- Active
Moll region

Saturation Active Cutoff Low- Mid- High-

region region region frequency frequency frequency

Fig. 3.1 A classification scheme for bipolar transistor models. The ac models are dis-
cussed in Chapter 5.

large as the base current, and a voltage Vq between base and emitter.
From the characteristic curves discussed before (Fig. 2.3b, for example),
we see that jSjc may range from about 50 to perhaps 1000. Figures 3.2c
and d compare the characteristics predicted by this model with those of a
real device. Note that the model is reasonably accurate in the active re-
gion, but that it does not indicate where the active region ends and satura-
tion begins. We will have more to say about this later.
The accuracy of this model is improved by the addition of a base resistor
Rbb and the independent current source I ceo i^^ Fig. 3.3. The collector
current is now the sum of two source currents, Pdch as a dependent source
and I CEO as an independent source. This latter current is defined as

CEO = / C\h {VCE > 0)

The current Iceo flows from collector to emitter with the base open -
circuited as the three subscripts suggest. It ranges in value
, from the order
of 1 nA to 1 )LtA for silicon transistors at room temperature, but increases
exponentially as the temperature increases.
To improve the input characteristics of the model, we insert a resistor
Rbb Note the similarity between the base-emitter branch
in the base lead.
of the model and the diode model of Chapter 1 The value of Vq is typi- .

cally between 0.5 and 0.75 V, while Rbb ranges from 1 kfi to 20 kQ.
 —
86 Transistor dc models

CQ

^,J,

(a) (b)

(mA) 1^ —-VcB =

Saturation ,'
Active region
Is =40mA
CE
il^ CE > V 1
30 M A
/ ;

20 mA
'
Actual
Model
// / '
Actual
IOmA
// / /

11/ ^r
I,=0

f
ic) (d)

Fig. 3.2 (a) The circuit symbol for the npn bipolar transistor, (b) A simple dc model
for the active region, (c) Input and (d) output characteristics predicted by the model
compared with typical curves for a real device.

The effect of Rbb on the input characteristics predicted by the model is

that the solid line in Fig. 3.2c leans slightly to the right, thus agreeing
better with the actual characteristics. The addition of the independent
current source I ceo raises every one of the horizontal lines in Fig. 3. 2d
slightly.They remain horizontal, however.
Before we make one last addition to our model, let us spend a few alge-
braic moments relating the several currents and defining two other useful
quantities, ajc ^^^ ^cbo •

The basic relationship among the currents arises from KirchhofFs cur-
rent law,

/C + /b + /£ = (1)

where Ic and Ig are positive in the active region for the npn transistor.
From the linear model of Fig. 3.3, we have
Ic = 0A.In + I^CEO (2)
3. 1 Bipolar transistor linear dc models 87

IcEo(T) \/ hJ.

Bo-

t'.
npn

Fig. 3.3 A more accurate dc model for the bipolar transistor in the active region in-
cludes an independent current source Iqeo ^^^ ^ resistor Rqb in the base lead.

Using Eq. (1) to eliminate Is, we find

Ic = Pdci-h - Ic) + ICEO
which may be solved easily for Ic :

— OAr^lr
ic^£ I CEO
Ir = (3)
1 + /5d< 1 + ^d<

If we now define

/5dc
ttdc = (4)
1 + iSdc

then

CEO
h = -Qfdc^E +
1 + ^dc
(5)

Since /Sjc ranges typically from 50 to 1000, we see that ajc is a fraction just
slightly less than unity.
Our final new defined by inspecting Eq. (3) or (5) above.
quantity is

When the emitter is open-circuited, the current from the collector to base
(collector to fease with emitter open-circuited) is

r ^CEO
^CBO
J I

(VcE > 0) (6)

1 + ^dc

W IcEO is of the order of 1 ^A, then Iq^q is of the order of 10 nA.

Equation (3) or (5) may now be written concisely in terms of these new
parameters:

^C = -«dc^£ + ^ChO (7)

8S Transistor dc models

A simple relationship between Iq and /^ may also be obtained from Eqs.

(3) and (6):

^dc
Ir. — "- /F — in — — J .
J
1 + ^dc

or
-u . ;,(. -
^ /3dc

0io
+ / CBO

1
Ib= - Iv - /,CBO (8)
1 + /3dc

Therefore, whenever Icbo ^^Y be neglected in comparison with Ig, we

have

The two collector-current expressions, Eq. (2) in terms of 0^c and Iceo^
and Eq. (7) in terms of a^c and Icbo are well worth memorizing. A third
>

memorable equation is Eq. (4), the relationship between jSjc and aac-
As our final and most accurate model for the bipolar transistor, we pro-
vide a slight slope to the output characteristics of the model by including a
resistor Rq between the collector and emitter terminals. The slope of the Ic
vs. VcE curves is therefore I/Rq- The model is shown in Fig. 3.4;

CE
^C = ^dc-^B + ^CEO +
Ri

Typical values of Rq range from 50 kfl to 2 MQ.

Fig. 3. 4 This dc model for the bipolar transistor allows for a slight slope to the output
characteristics.
3.1 Bipolar transistor linear dc models 89

For the pn p transistor Eqs. (1) through (8) apply to the active region,
,

where /^ is positive and Ib, Ic, Iceo^ Icbo^ and Vq are all negative Also,
.

Vbe and Vce are negative.

As an example of the differences and similarities of the npn and pnp
devices, consider a set of experimental data for the npn transistor, as mod-
eled by Fig. 3.3:

Ib = 20 /iA

06c = 100

IcEo = 0.1 /iA

Vq = 0.6 V
Rbb = 5 kl2

Therefore

Ic = 2000 + 0.1 = 2000.1mA

Ie = -2000.1 - 20 = -2020.1 /xA

Vbe = 0.6 + 20 x 10-6(5000) = 0.7 V

We also find that a^^ = 100/101 = 0.990, and Icbo = lO'^/lOl

= 0.990 nA.
For a comparable pnp transistor:

Ib = - 20 fiA

/3dc = 100

IcEO = -0.1 /xA

Vo = -0.6V
Rbb = 5 kl2

Therefore

Ic = -2000 - 0.1 = -2000.1 ^A

Vbe = -0.6 - 20 X 10-6(5000) - -0.7 V

Veb = 0.7 V
adc = 0.990

Icbo = - 0.990 nA
90 Transistor dc models

For the npn transistor above, if we let Vqe = 10 V and Rq = 50 kQ,

then Ic increases by 10/(50 x 10^) A, or 200 /iA, to 2200.1 /xA, and is h
-2220.1 /I A.

Saturation model

Saturation characterized by having both junctions (emitter-base and

is

collector-base) operating with forward bias and very small voltage dro ps.
The voltages at the three transistor terminals rarely differ by more than
several tenths of a volt, which leads to the simple model shown in Fig.
3.5a. The dc source Vq in the base lead has a value of 0,6 to 0.8 V, Rbb
ranges from 1 to 20 kQ, and the saturation resistance i^sat ^^ ^he collector
lead is typically 1 to 200 Q. We
can obtain a reasonable value for i^sat by
dividing the manufacturer's values for the collector-emitter saturation
voltage Vc£(sat) (0.2 to 1 V) by the collector current at which it is mea-
sured, /c(sat) • Figures 3.5fe and c show the input and output characteristics of
the model.

Cutoff model

At cutoff, both junctions are reverse-biased, and only small leakage cur-
model applicable
rents flow to the external leads. Figure 3.6 illustrates a
to theboundary between the cutoff and the active region. Note that Iq
= IcEo^ since /g = 0. Smaller collector currents are possible if 1b is made
negative, although this is not reflected in the model. When the emitter-
base junction is made sufficiently reverse-biased, Iq " IcBO*

D3.1 A bipolar transistor is operating with jSdc - 80, Vq = 0.65 V, Rbb

= 4 kQ, IcEo = 2 /iA, and /^ = - 1.5 mA. (a) Is the transistor npn or
pnp? Determine (b) 7^, (c) /c, (d) Vbe^ (©) ofdc.
Answers, npn; 18.49 ptA; 1.482 mA; 0.724 V; 0.988

D3.2 A certain transistor in saturation is modeled with Vq = - 0.62 V,

Rbb = 2 kfi, and Rsat = 40 Q, If /£ = 6 mA and V^b = 0.78 V, determine
(a)/B,(b)/c,(c)Vc£.
Answers, -SOfiA; -5.92 mA; -0.237 V
D3.3 Let Vo = 0.6 V, Rbb = 5 kQ, Iceo = 1 mA, i^dc = 120, and i^^at
= 40 Q for an npn transistor. The transistor is operated in the circuit of
Fig. 3.7. Let Vbb = and find (a) Vbe (b) Vce Now let V^b = - 1 V and
, -

hnd{c) VBE,{d)VcE>
Answers. 0; 5.99; - 1; 6 V
 J

3.1 Bipolar transistor linear dc models 91

'C(sat)

^C£(sat) ^—

(a)

Io\

Slope

ib) (c)

Fig. 3.5 (a) A saturation model for a bipolar transistor that is valid for both npn and
pnp units. The input (b) and output (c) characteristics predicted by the model.

Fig. 3.6 This cutoff dc model for the bipolar transistor is a simple approximation for
the boundary between the cutoff and active regions.

CUTOPF
o
 A —

92 Transistor dc models

10 kn

10kJ2

e
Fig. 3. 7 See Problem D3.3

3.2 Examples of the use of dc models

We are now ready to look at several examples that illustrate the use of the
various dc models for the bipolar transistor. The examples will progress
from analysis to design as we get smarter.
The first example is presented in Fig. 3.8. Note the use of the ground
symbol on the emitter lead and the voltage-supply symbols on the upper
ends of the base and load resistors to permit neater schematics. They indi-
cate that 15-V independent dc voltage sources are connected between
each upper end and ground. The dashed lines in Fig. 3.8 indicate an
equivalent arrangement using a single 15-V source. In this problem we are
asked to find all currents and voltages, or to specify the operating point
completely.
We identify the problem as a dc- analysis problem that requires the use
of a transistor dc model. Our plan of attack is to select a dc model using the
parameter values given in Fig. 3.8. Which type of model do we choose
active, saturation, or cutoff? We do not in general know in which region
the device is attempt, let's t ry an active-region mod el;
operating. As a first

if we're wrong, well find that one or more currents or voltages have inap-

propriate signs, indicating that we're not located in the active region. We
can then try a saturation or cutoff model.
In Fig. 3.9 we show the active- region model inserted into the specified
circuit. Around the left mesh (through a 15-V source), and using a consis-
tent set of units (V, mA, kQ), we have
15 = 100/r + 0.6 + 1/,

so that

Ib = 0.1426 mA = 142.6 fx
3.2 Examples of the use of dc models 93

+ 15 V 15 V
A^

lOOk^ 0.5 kn
15 V
= 100 j
/3dc

Vbe = 0.6V 1

€) ^CEO = )uA
/?s.t
== 70^
1 ]

^BB = 1 kn 1

Fig. 3.8 A circuit for which we are asked to find all the transistor voltages and currents.

The collector current is the sum of the two source currents,

Ic = 0.001 + 100(0.1426) = 14.26 mA

Writing the loop equation from the collector, through the 0.5-kQ load re-
and the powder supply, back to the emitter, gives us
sistor

VcE = 15 - (14.26)(0.5) = 7.87 V

Also,

Vbe = 0.6 + l/g = 0.743 V

Fig. 3.9 The active- region dc model for the npn bipolar transistor is installed in the
circuit of Fig. 3.8.

A + 15 V A+15 V
/cj|o.5kn

nC

100 kr2

"(b <J>
100/.

1 kn

J^n = 0.6 V ' • E

94 Transistor dc models

and therefore

VcB = 7.87 - 0.74 = 7.13 V

The last current to be found is

Ie = -Ib - Ic =" -0.1426 - 14.26 = -14.40mA

This completes the solution, provided that our assumption of an active-
region model was correct. We now see that it was, for the set of currents and
voltages we have obtained locate the operating point in the active region.
Now let us change the problem slightly by increasing the value of the
load resistance from 0.5 to 2 IcQ. Selecting the same active- region model,
we again obtain Iq = 142.6 ^A and Iq = 14.26 mA. But next we see that
VcE = 15 - (14.26)(2) = - 13.52 V
This indicates that something has gone astray for Vce must be positive for ,

an npn transistor in the active region. It follows that we are not operating
in the active region, so we need a different model. Since the emitter-base
junction is still forward-biased, let us assume that the increase in load re-
sistance has caused the collector-base junction to change from reverse- to
forward-bias. Thus we try a saturation-region model, as shown in Fig.
3.10. Once again, Ib = 142.6 /xA; but we now see that Ic does not depend
on that value. It is

15
C(sat)
= 7.25 mA
2 + 0.07

It then follows that

Vc£(sat) = 7.25(0.07) = 0.507 V

Fig. 3.10 When the load resistor of Fig. 3.8 is increased to 2 kli, operation is in the

saturation region.

A + 15V

lOOkfi C

70 n
C£(sat)

-(+-) — —
^AA/ <•

0.6 V iE
3 2 Examples of the use of dc models
.
95

and

VcB = 0.507 - 0.6 - (0.1426)(1) = -0.235 V

This is forward bias for the collector-base junction (collector is n-type and
base is p-type), and we are operating The model
in the saturation region.
and the solution therefore agree.
If we had assumed saturation operation for the circuit of Fig. 3.8 and
used the saturation model for the npn transistor, we would have obtained

15
'^^'^'^
26.3 mA
0.5 + 0.07
and

VcE - (26.3)(0.07) - 1.842 V

Thus

VcB - 1'842 - 0.743 - 1.099 V

This indicates that the collector-base junction is reverse-biased, which
does not agree with our assumption. Therefore the model and the solution
do not agree, and the transistor is not in saturation.
Some care must be taken when selecting flgat to model a particular de-
vice. If the value used is too small for the given values of Vq and Rbb then ,

an am biguous situation can result in which the active-region model says

'^saturati on,'* while the saturation-region model screams "acti v e region.^
Let us now try our hands at a design problem, as outlined by Fig. 3.11.
The same npn transistor we have been working with must operate at Ic
2 mA, Vqe - 5 V; the form of the external circuit is specified. Note that
for a design problem we are given the answer (the operating point) and
must find the circuit elements necessary to yield that result; it is often the

Fig, 3,11 Using the circuit and transistor parameter values given, we are to provide
an oparating point at /^ - 2 mA, Vqe 5 V.

^Kcc

Vq = 0.6 V

Rbb = 1 k"
96 Transistor dc models

case that the circuit and the circuit elements required are not unique. We
identify this as a dc-design problem that involves the use of a dc model for
the npn transistor. Since the given values of Ic and Vce provide operation
in the active region, the active-region model is obviously required. A solu-
tion consists of suitable values for the three unspecified quantities on the
circuit diagram: Vca Rb^ and Re Our plan of attack will be to use the
simplest active-region model, to make any arbitrary choices as intelli-
gently as possible, and to check our results by an analysis using our most
accurate dc model.
We begin with the simple model, as shown in Fig. 3.12a, and select a
value for the supply voltage Vcc It certainly must be larger than Vce
•
>

which is 5 V. Also, the difference between Vcc and Vce must appear
across Re, through which the collector current of 2 passes. As Vcc is mA
made larger, the power dissipated in Re increases proportionately. On the
other hand, as we shall discover later, greater values of signal gain are
associated with larger values of Re and Vcc Let us select Vcc = 20 V as a
•

reasonable compromise. The voltage across Re is then 15 V, and Re = 15/2

= 7.5 kl2. Since the dependent source shows that

Ic = lOO/fi = 2 mA
we find that /fi = 20 /i A, and thus Vb£ = 0.6 + 0.02(1) = 0.62 V, and i?g
= (20 - 0.62)/0.02 = 969 kQ.
This is the last of the three circuit values that are required, but the de-
signproblem is not quite complete. A circuit analysis must still be per-
formed as a check on the design. In this case we are being a little unfair to

Fig. 3.12 (a) The transistor in Fig. 3. 1 1 is replaced by a simple dc model, (b) A more
detailed dc model is used to check the design.

AK.cc A20V

2mA\<R,

•969 kn

100/,
4>"
1 kfi ^-^ 1 k^
{+-) —V/v ^> -(+ -) —Wv <•

0.6 V 0.6 V

(a) (b)
3.3 Nonlinear dc models: JFE Ts and depletion-mode MOSFE Ts 97

ourselves in analyzing our design with a more accurate dc model than we

used to develop it, as shown in Fig. 3. 12fe. But let us see how the operating
point comes out. We
find that

20 = 969/b + 0.6 + lis and Ib = 20 /xA

Also,
Ic = 0.001 + 100(0.02) = 2.001 mA
VcE = 20 - 2.001(7.5) = 4.993 V
which not a serious deviation from the desired operating point.
is

We shall take up other applications of the dc models for the bipolar

transistor after we have gained some familiarity with the dc models for the
FETs. •

D3,4 Determine Ic and Vce for the circuit of Fig, 3.11 if Vcc = 12 V,
Re = 800 0, and Rb equals (a) 150 kO, (b) 50 kQ.
Answers. 7.55 mA, 5.96 V; 14.29 mA, 0.571 V
D3,5 Specify a set of circuit values for the circuit of Fig. 3,11 that will
establish an operating point at /c = 3 mA, Vce = 4,5 V,
Answers. Vcc = 15 V; Re = 3.5 kfi; Rb = 479 kO

3,3 Nonlinear dc models: JFETs and depletion-mode MOSFETs

If we refer to Fig. 2.7, we see that there are many more varieties of FETs
than there are of bipolar transistors. Fortunately, however, the number of
nonlinear dc models required is considerably less than the number of vari-
eties of FETs. In the last chapter we found that both the JFET and the
depletion-mode MOSFET (or IGFET) are depletion-mode devices. They
have circuit models of the same form. The FETs therefore fall into two
groups for modeling. The first group includes the JFET and the depletion-
mode MOSFET, in either n-channel or p-channel form; the second con-
tains the enhancement-mode MOSFET, either as n-channel or p-channel.
Thus, two nonlinear dc models are sufficient to encompass all n-channel
FETs, and a simple reversal of sign for all voltages and currents is the only
change required for the p-channel models.
We begin with the nonlinear dc model for the n-channel JFET, It is
normally biased in the region beyond pinch-off where the signal gain is
the greatest; we shall content ourselves with a single model for this region.
To use this model, we must thus show that the transistor operates in the
region beyond pinch-off.
 h

98 Transistor dc models

Beyond pinch-off

-0.5 V

I V

1.5 V

-2.5 V
-^/
._-3.5V
1=1-
12
II .

16
'

F^^(V)
-4V
(a)

I) (mA)
//.
I

/
-32 =W
-r d^ /:
/
-24

\S
-16

I
\

«
>

-8
\ -

^^"--
1 ^— 1 1— — —H- ^

H
^cs(V)

(^)

Fig. 3,13 (a) The drain characteristics for an n-channel JFET. Here Ij^ss 32 mA
and Vp » - 4 V. (ib) A plot of l^ vs. V^^^g is a portion of a parabola in the region
beyond pinch-off, and it can be approximated by Id - (//)ss/^/^)(^GS ^ ^p)^'

The drain current is relatively independent of the drain-to-source volt-

age in the region beyond pinch-off, as shown in Fig, 3.13a. Because these
curves have almost zero slope in the region beyond pinch-off, this region
can be modeled by a transfer characteristic (/^ vs. V^s) at any value of
Vos that provides operation in the region beyond pinch-off. Such a trans-
fer characteristic is shown in Fig. 3.13ib,
In Chapter 2 we found that for operation at or beyond pinch-off, it was
necessary that

^Ds ^ ^Gs - y? (n-channel)

Since the characteristics are flat for V^s ^ ^gs " Vp, we may simplify
3 3 Nonlinear dc models:
. JFE Ts and depletion-mode MOSFE Ts 99

matters by selecting the limiting condition in which

Vds = Vos - Vp
Substituting this equation into Eq. (1) of Chapter 2, we eliminate V^s and
have

^^^^ ^'^'
Id = D {Vcs - Vp)(Vcs - Vp) - ^

or

/d = -^ (Vgs - Vp)2 for Vqs ^ Vcs ' ^r and Vp < Vcs ^

(9)

This equation may be simplified by remembering that Ij^^^ is defined as

/o when Vgs = and V/^s = -Vp. Thus

and
2/dss
D =

We thus have the important result,

Id = -^ (Vgs - Vp)2 for V^s ^ Vcs - Vp and Vp < V^s ^

(10)

Note that /pss ^s positive, while Yq^ and Vp are both negative quantities
for the n-channel JFET In the case of the p-channel unit, Ids?> Is negativ e
.

and Vgs and Vp are positive.

Equation (10) graphs in the form of a parabola, as illustrated in the
curve of Fig. 3.13^?. Note that the curve is completely specified by two
values, the drain-to-source saturation current /£>§§ and the pinch-off volt-
age Vp.
Equation with 90% of the desired nonlinear model for
(10) provides us
the n-channel JFET. We may need to consider the gate leakage current
^G?>% ?but since it is the leakage current of the gate-to-drain diode under
reverse bias, it is often small enough to be neglected.
It should be noted that although Eq. (10) defines a complete parabola,

the only part of the curve that re presents the n-channel JFET is the righ t
half, for which Vp < Vgs '^ and/j) < Ij^^^. We may therefore obtain two
formal mathematical solutions to a certain problem, corresponding to points
on the two halves of the parabola; one makes sense, the other does not. Only
the solution for which Vp < Vq^ < applies to the real device.
100 Transistor dc models

Let us use this nonlinear model to calculate the operating point for the
FET shown in Fig. 3.14. From the data given near the circuit diagram,
Eq. (10) becomes
10
/n = [Vgs - (-2)]2 mA
(-2)
Since the gate current equals the gate leakage current when Vp < Vqs ^
and Iqss = - 1 nA, the voltage across fig is only 1 mV. Thus for all practi-
cal purposes, V^s is Vq. From Eq. (10),

/d = ^(-1 + 2)2 = 2.5 mA

The loop equation through the drain-supply voltage leads to

Vds = Vdd - Rnh = 20 - 2(2.5) = 15 V

We thus find that we are well beyond pinch-off at an operating point spec-
ified by Vds = 15 V, Id = 2.5 mA, and Vcs = - 1 V. That is, 15 > - 1
- ( - 2) = 1, and the model agrees with the solution.
Now let us make two changes in our viewpoint. Instead of analysis, let
us attempt a design problem; we also use a p-channel JFET. The problem
is outlined in Fig. 3.15a: We want an external circuit (of the form indi-

cated) that will provide an operating point at a drain current of - 8 mA

and a drain-to-source voltage of - 10 V. Operation in the saturation re-
gion is assumed. The problem involves finding a suitable set of values for
Vg, Vdd, Rd, andi^g.
For this p-channel JFET, operation beyond pinch-off requires that Vds
= - 10 < Vqs - Vp = Vqs - 2, where Vqs and Vp are both positive.

Fig. 3.14 An example in which an n-channel JFET is analyzed to determine the op-
erating point.
3 3 Nonlinear dc models:
. JFE Ts and depletion-mode MOSFE Ts 101

Also,

^ (^Gs - Vp)2 for Vds ^ Vgs - VpandO < Vcs ^ Vp

(11)

SO that

-10
Id (V.GS 2)2 8 mA
(2)2

Solving for Vgs > we find that

-8
(22) = (V,GS - 9\2
2)
-10
and
Vr.,
GS = 2 ± V3.2 = 2 ± 1.788 V
Since Vgs is constrained to be less than yp(2 V), we see that the only root
that makes sense is 2 - 1 .788, or 0.212 V. This is illustrated by Fig. 3. I5b,
which shows the transfer characteristic for the p-channel unit and identi-
fies the two mathematical results. We conclude then that

Vgs = 2 - 1-788 = 0.212 V

The gate leakage current is once again negligible, and we therefore set Vq
= 0.212 V. The value of Rq does not affect the operating point, unless it is

Fig. 3.15 (a) Circuit values are to be specified for this p-channel JFET that will pro-
vide an operating point at /^ = - 8 mA, Vqs = - 10 V. (Z?) The left half of the
parabola forms the transfer characteristic for the p-channel unit. On this portion of
the curve, < Vqs < Vp = 2 V.
Id (mA)

^/5.M =-10

^/).w =-10mA

I 1 Vp=2V 3 j
4
0.212 V 3.788 V
(a) ib)
102 Transistor dc models

large enough to produce an appreciable voltage drop when Iqss ( = 1 nA)

flows through it. We arbitrarily select fig = 1 MQ.
In the drain circuit, ^

^DS + ^D^D = ^DD

or

10 - 8Rd = V.DD

Vdd = - 26 V, a value that

Arbitrarily picking is several times greater in
magnitude than V^s? we have
- 26 + 10 ^ ^
Rd = = 2 kQ
,

^Tg

Thus Vc = 0.212 V, Vdd = - 26 V, fi^ = 2 kO, and fi^ = 1 provide MQ

a suitable set of values for the external circuit. These values are certainly
not unique, and other considerations might very well lead to different se-
lections.For example, with an available voltage supply of - 18 V we
might select R^ = 1 kfi, assuming other considerations were not seriously
affected.
In checking our results by analysis, we can use only the same nonlinear
model, Eq. (10), and the result therefore checks perfectly.
Equations (10) and (11) also serve as nonlinear models for the n- and p-
channel depletion-mode MOSFETs respectively. Values for I^ss ^^^ ^?
are in the same range as those for the JFETs, the only appreciable differ-
ence in the dc models being the magnitude of the gate leakage current
IqsS' Since the MOSFET (or IGFET) has an insulated gate, Iq^^ is quite
small, usually in the neighborhood of 1 pA (10 ~ ^^ A). For the JFET, it is
more often around 1 nA (10 "^ A).

D3.6 An n-channel JFET with Ij^^s = 12 mA, Vp = - 1.8 V, and Iq

=-100 pA is used in a circuit similar to that of Fig. 3.15a. Specify values
for Vg Vdd and Rd if Rb = 12 kQ, Vds = ^^,Rd dissipates 25 mW, and
, ,

the JFET dissipates 20 mW.

Answers. - 1.025 V; 20.25 V; 5.06 kQ

3.4 Nonlinear dc models: enhancement-mode MOSFETs

Let us review by comparing the operation of depletion-mode and
enhancement-mode MOSFETs. The n-channel depletion-mode device we
considered in the previous section is normally operated in the region be-
yond pinch-off with Vqs greater than the negative pinch-off voltage Vp
but less than zero. The n-channel enhancement-mode unit, however, is
normally biased with Vqs greater than the positive threshold v oltage Vj (a
3 4 Nonlinear dc models: enhancement-mode MOSFE Ts
.
103

symbol that sh ould not be confused with Vj = kTlq for the bipolar tran-
sistor). The drain current increases as the difference ( Vgs - Vj) increases,
assuming that the drain-to-source voltage is sufficiently large, V^s ^ ^gs
- Vj. The device is then operating in the region beyond pinch-off.
Figure 3.16« shows the output characteristics and Fig. 3,166 illustrates
the parabolic transfer characteristic relating /p and Vqs for an n-channel
enhancement-mode MOSFET in the region beyond pinch-off. Using Eq.
(5) from Chapter 2 at the boundary between the ohmic and saturation
regions, Vps = Vqs - Vj, we have

{Vgs- Vt)'
h- K {Vgs - Vt){Vgs - Vj) -

Fig. 3.16 (a) The output characteristics for an n-channel enhancement-mode

MOSFET. Here, Vy = 2 V. (b) A plot of Ip vs. Vgs is a portion of a parabola and
follows the relationship /£) = (K/2)(Vgs - Vj)^ in the region beyond pinch-off.

Beyond pinch-off

t"GS
= 6V

5.5 V

5V
4.5 V
4V
3.5 V
3V .2,5 V

8| 12 16 r^(V)

(a)

Id (mA)
104 Transistor dc models

or

Id = ^{Vgs- Vr)2 for Vps ^ Vcs - Vj and Vgs ^ Vr

(12)

where X is a positive constant that must be found from a knowledge of t he

value of /p at some specific Vqs ;

For the device of Fig. 3. 16fl or fc, we see that Vt- = 2 V, while /^ is 8 mA
when Vqs is 4 V. Therefore

/z,
= 8 = y(4 - 2)2

and K = 4 mA/V^. So the nonlinear model for this n-channel enhancement-

mode IGFET is

Id = 2(Vgs - 2)2 (mA)

To illustrate the use of this nonlinear dc model, let us determine the

operating point for the FET shown in Fig. 3.17. From the symbol, we see
that we have an n-channel enhancement-mode MOSFET. The data given
adjacent to the circuit indicate that Vj = 1 V, /^ = 10 when Vqs mA
= 5 V, and the gate saturation current Iqss = - 1 pA, a truly negligible
value. We decide that the values of Ij^ V^s and Vqs must be determined.
, ,

Since we are able to neglect Iq, resistors R] and ^2 ^ct as a simple volt-
age divider, and we find the gate-to-source voltage.

0.1 X 106
Vqs = 15 3V
0.4 X 106 + 0.1 X 106

Fig. 3.17 An n-channel enhancement-mode IGFET appears as an example in which

the operating point is desired.

15 V

f^D
= 1 kO

Uo

^T = 1 v
h;ss = 1/;A
Id = 10mA at
GS = 5 V
3.4 Nonlinear dc models: enhancement-mode MOSFETs 105

This is greater than the threshold voltage; therefore the transistor is not
cut off. We select the nonlinear model, Eq. (12), valid in the region be-
yond pinch-off, as our first try at this analysis problem:

= _ 1)
n2
Id
f (Vgs
Using the data supplied for the MOSFET, we determine K first:

10 = |(5-1)2
or

K •= 1.25mA/V2
Since Vgs = 3 V in the circuit given, we find

1 2^
/o = -y-(3 - 1)2 = 2.5 mA
Thus the voltage across Rd is 2.5 V and V^s = 12.5 V. This indicates that
operation is well beyond pinch-off, 12.5 > 3 - 1, and our model is appro-
priate.
Once more, we have slighted the p-channel unit, but it should suffice to
remind ourselves that all currents and voltages simply have the opposite
sense; even K becomes negative. Thus the transfer characteristic flakes the
form shown in Fig. 3.18. Problem D3.8 gives us the opportunity to prac-
tice this art of sign reversal.

D3.7 In the circuit and data of Fig. 3. 17, let Vdd = 12V,JRi = 0.4 Mfl,
Vr = 1.2 V, less = 100 fA, and /^ = 4 mA at Vcs = 4.4 V. Select values

Fig, 3.18 The transfer characteristic for a p-channel enhancement-mode IGFET for
which Vj = -2V.

-1 ^GSC^)
106 Transistor dc modeb

for Ro and R2 that will establish an operating point at V^s = 6 V, /^ = 2

mA.
»

Answers. 3 and 162.2 kU

D3.8 A p-channel enhancement-mode MOSFET has V^ = | |

2.4 V and
\Io\ =6 mA at
Vgs |
I
= 4.8 V. Assume that Iqss is negligible and find (a)
lo when Vgs = 4 V, (b) Vqs when /^ =5 mA, (c) the value of Vds at
|
I
| |

the boundary between the ohmic and saturation regions when |/o|
= 5 mA.
Answers, -2.67 mA; -4.59 V; -2.19 V

3.5 Load Lines

The concept was introduced for the diode in Section 1.2
of the load line
of Chapter 1 means of analyzing or visualizing the solution
as a simple
of a nonlinear problem. Many times the effect of making a certain change
in a circuit can be seen qualitatively by a rough sketch of the load line
on the nonlinear characteristics of the device. Let us see how we can use
the load line in analyzing circuits containing bipolar and field-effect
transistors.

Bipolar load lines

Figure 3. 19a shows a bipolar transistor in a circuit of the type we analyzed

in Section 3.2 using linear, active- region models. Now let us see how the
use of a load line enables us to answer the question, "How is the operating
point affected by changing Re J^" ^^ write the loop equation for the output,

Vcc = IcRc + VcE (13)

This linear equation in the variables Ic and Vce is called the load-lin e
equation and it is plotted as a straight line on the Ic-Vce output charac-
,

teristics in Figure 3,l9b. Note the intercepts at Ic = 0, Vce = ^cc^ ^^^

Vce = 0, /c = Vcc/Rc- The operating point (O. P.) lies at the intersection
of the load line and the output curve for the specified value of Ig .

From Fig. 3.19b we see that any increase in Is results in an increase in

Ic and a decrease in Vce We also observe that if /g is made sufficiently
•

large, the device will go into saturation.

The s lope of the load line is - l/flc Thus, as Re decreases, the magni-
tude of the slope increases, as shown in Fig. 3. 19Z? We now see clearly an
.

important effect of changing Re'- If Re is made large enough, the operat-

ing point will move into the saturation region for a fixed value of Ib .

We may also consider the input characteristics (Ig vs. V^e) of Fig.
3.5 Load lines 107

3.19c. The loop equation around the input circuit is

cc =
Vrr /«i?«
B^^B + VBE (14)

This equation is linear in /^ and Vqe • It leads to the input load line, as
plotted on the input characteristics in Fig. 3.19c. Note that the intersec-
tion of the load lineand the nonlinear input characteristic establishes the
operating point, (Ig Vqe)- Again, it is easy to see the effect of changing Rb
,

or Vcc on the operating point. We

will use these concepts in Chapters 4
and 5 in designing circuits to provide a desired operating point.

Field-effect load lines

Only an output load line is needed for a JFET or a MOSFET, because Iq is

negligibly small. Figure 3.20 illustrates the use of the load line for an n-
channel JFET. The load-line equation is

DD = InRn + VDS
or

VDD
Id= - Vds + (15)
R R,

The V^s = 0, Id = Vdd/Rd^ ^^^ ^ds = ^dd^ ^d = 0-

intercepts are at
For a fixed value of Vqs note that V^s decreases as i^^ increases. In fact, if
,

Fig. 3.19 (a) An npn transistor is shown in a simple linear external circuit, (b) The
output load line is drawn on the output characteristics, and an operating point is iden-
tified for Ig = Iq2' a change in Rq causes the slope of the load line to change as
indicated, (c) An input load line is shown. Note that Vqc ^^ ^BE a* the O.P., and it is
necessary to show a break in the abscissa and in the load line.

'cc VrF=0\ /^C£->1 V

'.^-
// ^^ 1 "KBE

(fl) ib) (c)

108 Transistor dc models

(a) {b)

Fig. 3.20 (a) An n-channel JFET is shown in a linear external circuit, (b) An output
load line is drawn on the output characteristics. Increasing H^) without changing Vqs
jnay cause the operating point to shift into the ohmic region.

Rd is made large enough, the operating point will go from the saturation
region into the ohmic region.
Figure 3.21 shows another application of load lines that applies only
when the FET is operating beyond pinch-off. If we write the equation
around the input loop of Fig. 3.21a,

Neglecting /g,

Id- GS (16)
R SS R SS
Note that Eq. a linear equation in the variables I^ and Vqs There-
(16) is .

fore this equation appears as a straight lineon the transfer characteristic of

Fig. 3.21b. The intersection of the load line and the transfer characteristic
locates the operating point (7^, Vqs). The value of V^s at the operating
point is obtained by solving the equation y^o = IdRd + ^ds + Id^ss^^^
VdS'
Figure 3.21Z7 also illustrates the effect of changing Rss on the operating
point. For example, if Rss is made larger, I^ decreases. Similarly, an in-
crease in the value of Vq moves the V^s int ercept to the right and resul ts in
a larger value of Ip at the operating poin t.
Load lines similar to these are obtained for p-channel JFETs, as well as
n- and p-channel MOSFETs.
Problems 109

N ~hss
\ J
Leadline ^^
/ \
^^\/
1

\ y Smaller/? 55
OP^^^^ \
/ ^~^
\^^ \
-----_/ ^"--.^^^ ^\
yr- — __ ^"~~\^ \

y ^ - Larger ^^^ ^ --^^^^

\~^^ 1

=^H ,

(a) (b)

Fig. 3.21 (a) An n-channel JFET is shown with a linear external circuit that includes
a resistor in the source lead, (b) When the FET is operating in the region beyond
pinch-off, a load line with slope -1/Rss may be drawn on the transfer characteristic.

D3.9 A p-channel JFET is used in a circuit similar to that of Fig. 3.21a,

but having Vdd = - 25 V, Vc = - 4 V, H^ = 1 M12, and Rd = 2 kl2. The
transfer characteristic is given in Fig. 3.15^. Use a load line to estimate I^
if Rss equals (a) 0.5 IcQ, (b) 1 kQ, (c) 4 kQ.

Answers. -8.3; -4.6; -1.3 mA

D3.10 An n-channel enhancement-mode MOSFET with V^ = 1 V and
Id = 4 mA when Vqs = 2 V is operating in a circuit with Vq = 4 V, i^jg
= 1 M12, Vdd = 20V, Rd = 2 kl2, and Rss = 0.5 kfi. Let the value of Rss
increase. State whether each of the following quantities will increase or
decrease in value: (a) Id, (b) Vds, (c) Vcs-
Answers. Decrease; increase; decrease

Problems
1. Let Rbb = 6 Vq = 0.57 V, p^, = 120, and Iceo = 1.6 ^t A in the
kl2,
active-region model of an npn transistor. Determine Ic if (a) Is = 250
/iA, and (b) Ie = - 2.8 mA. (c) Find Vbe when Ic = 2.5 mA.

For an npn transistor, let jSdc = 200, Iceo = 1 mA, Rq = 50 kQ, Vq

= 0.6 V, and Rbb = 5 kQ. Let V^e = 5 V and calculate Ic if (a) Vqe
= 0.65 V, (b) VcB = 4.3 V, (c) Vbe = 0.75 V.
 U

11 Transistor dc models

3. In Problem 2(a), calculate the power dissipated at (a) the emitter-

base junction, (b) the collector-base junction, (c) the entire transistor.
4. Let the active region model of an npn transistor contain R^b = 1 kQ,
Vo = 0.6 V, iSdc = 49, IcEo = 1.5 M, andRo = 100 kQ. If /g = 100
/iA and Vqe = 4 V, find the power supplied by each of the three ideal
sources in the model.
5. Let IcEo = - 1 mA, Vo = - 0.6 V, Rbb = 3 kQ, and 0^^ = 50 for a
bipolar transistor. Calculate (a) Iqbo^ (b) ^c when Vbe = - 0.65 V,
(c)/£whenyB£ = -0.7 V.
6. Knowing that Icbo = - 24 nA, oidc = 0.997, and Vq = - 0.66 V for a
pnp transistor operating with /f = 3 mA, find Iq and Ib .

7. (a) Establish suitable values for Hsat> ^bb» and Vq if measurements

show that VcE = 0.4 V and Vbe = 0.68 V when 1b = 100 a^A and Ic
= 12 mA, but Vbe increases to 0.8 V when Ib = 200 fiA. (b) Calculate
Ic, h^ and Vce when Ib = 0.3 mA and Vcb = -0.3 V.
8. A saturation model of the type shown in Fig. 3.5a includes i^sat
= 50 fl, Vo = 0.6 V, and Rbb = 700 12. Find Ic, h, and Vce if h
= 0.2 mA and Vbc = 0.28 V.
9. Modify the cutoff model of Fig. 3.6 by adding Rq between collector
and emitter, (a) Express /c as a function of Vce (b) Plot ^he output
•

characteristics on Ic-Vce axes if I ceo = 1 /^A and Rq = 50 kQ.

10. Parameters for an npn model are Rbb - 2 kQ, Vq = 0.68 V, jSjc
= 120, /ceo = 1 mA, and R^at = 60 Q. (a) If Ib = 180 /xA, find the
values of Ic Vbe and Vce for the point on the output characteristics
, ,

lying on the border between the active and saturation regions in the
model, (b) If Vce = 4 V, determine Ic and Ib at the point separating
the active and cutoff regions in the model.
11. The dc model of Fig. 3.12b is improved by adding a 20-kQ resistor
across the dependent current source. Find Ic, Ib, and Vce-
12. Parameter values for the transistor of Fig. 3.22 are: jSjc = '75, Vq
= 0.6 V, IcEo = 1.3 mA, and R,^^ = 40 Q. (a) Find ajc and Icbo- Let
Vbb = 6 V, Rb = 27 kQ, and Vce = 9 V. (b) Calculate Ic if Re
= 400 fi. (c) Find Ic if Re = 800 Q.

Fig. 3.22 See Problems 12, 16, and 18.

Problems 111

Fig, 3,23 See Problem 13.

13. The transistor in the circuit of Fig. 3.23 is operating essentially as a

diode. Find Ic and Vce •

14.The transistor used in Fig. 3.24 has 0^^ = 75, Vq = 0.6 V, and Iceo
= 2 /iA. Let Vcc = 15 V and R2 = 50 kl2, and select values ioiRi and
Re so that /c = 2 mA and Vce = 8 V.
15 LetjSdc = 60, Vo = 0.65 V,i?sat = 5012, and /c£o = for the transis-
tor shown in Fig. 3.24. If jRc = 4 kl2 and Vcc = 10 V, select values
for Ri and R2S0 that /c = 1.8 mA while the downward current in Ri
is 30/5.
16. Circuit values for Fig. 3.22 are Vbb = 9W,Rb = 120 ktt, i?c = 3 kQ,
and Vcc = 13.5 V. The transistor may be modeled by Vq = % V, Rbb
= /ceo = 4 ^A, H,at = 50 12, and j^dc = 50. (a) Find Ic and Vce
1 kfl, •

(b)Determine Ic and Vce if ^cc is reduced to 9 V.

17. Data for the RCA 40319, a silicon pnp power transistor, are given as:
IcBo = -0.25 AiA, /3de(n.in) = 35, i8dc(max) = 200, and Vbe= - 1 V.
The maximum collector dissipation (VceIc) is listed as 1 W
at 25° C.
(a) If /fi = - 4 mA, find Ic and Ie for both i3dc(min) and i3dc(max) (b) If
•

Fig. 3.24 See Problems 14 and 15.

>Vcc
112 Transistor dc models

VcE = - 20 V, find the values of Ig that will lead to maximum collec-

tor dissipation for both i3dc(min) and /3dc(max) •

18. Voltage-source values for Fig. 3.22 are V^b = 9 V and Vqc = 6 V; the
Vq = 0.65 V, Iceo =
transistor has 1 ^A, iSjc = 90, and Rsat = 40 Q.
Assume that R^g may be neglected, (a) Select values for Rg and Rq so
that the transistor operates with /c = 1 mA, Vce = 2 V. (b) Find the
power dissipated in each of the five circuit elements of Fig. 3.22. (c)
What would the operating point be if jSjc decreased to 50? (d) What
would the operating point be if /3dc increased to 200?
19. The transistor in Fig. 3.25a may be modeled by using jSdc = 100> ^o
= 0.7 V, Rbb = 2.5 kn, Rsat = 50 Q, and Iceo = 0. (a) Find Ic and
^C£ (t>) Specify a new value for the 3 1 5- kQ resistor so that Vqb = 0.5
•

V. (c) A 500-kl2 resistor is connected between the base terminal and

ground. Find Iq .

20. Calculate new values of Ic and Vce ^ ^^ clc model shown in Fig. 3. 126
= 50 kQ between collector and emitter.
also includes a resistor jRq

21. With reference to Fig. 3.11, let Vcc = 25 V and select circuit values
to establish an operating point at /c = 1 mA, Vqe = 10 V. Use the
parameter values given, and in addition let Rq = 40 kO.
22. Select element values for the circuit of Fig. 3.25fc that will provide an
operating point at /c = - 1 mA, Vqe = - 3 V. Use a dc model with
Vo = - 0.65 V, RsB = 7 kQ, Iceo = - 2 /xA, Rq = 25 kQ, and &^^
= 75.
23. In Fig. 3.26, letRg = 50 kQ, R^ = 2.5 kQ, Rss = 300 12, and V^d
= 22.5 V. The transistor is characterized by lr,ss = 12 mA, less
= - 2 nA, and Vp = - 3 V. Find /d, Vgs. and V^s-

Fig. 3.25 (a) See Problem 19. (b) See Problem 22.

A -15V A

315 kn

12V

0.5 kn

ia) ib)
 .

Problems 113

Fig. 3,26 See Problems 23 and 24.

24. An 850-ki2 resistor is connected between the gate and 22. 5- V supply of
the JFET of Problem 23 and Fig. 3.26. Find Ipy Vcs, and V^s-
25. The transistor shown in Fig. 3.27 is operating with Id = ^ niA. If Iqss
= 0, (a) find V^s If the 0.3-V source is reduced to 0.2 V, Z^) increases
•

to 6 mA. Find (b) Vp, (c) loss-

26. The MOSFET shown in Fig. 3.28 is characterized by loss = - 15

mA, Vp = 2.5 V, and Iqss = 0. Select values for Rq, Vq, and V^d so
that Id = - 12 mA, V^s = 0.5Vdd^ and the transistor dissipates a
total power of 150 mW.
27. Let loss = 9 mA, Vp = -2 V, and /ess = for the JFET of Fig. 3.29.
If i?i = 500 kl2, R2 = 400 kfi, and R^ = 1 kfi, (a) find I^ and V^s (b) •

What is the smallest value that R2 may have without causing cutoff?
(c) What is the largest value that R2 may have without causing opera-

tion in the ohmic region?

Fig. 3.27 See Problem 25

12V
114 Transistor dc models

750 kJ2

Fig. 3.28 See Problems 26 and 31.

28. (a) If Rd = 2.5 kfl in the circuit shown in Fig. 3.30, find the power
dissipated in the FET. (b) How large may we make R^ before opera-
tion slides into the ohmic region?
29. An n-channel JFET has a set of output characteristics that includes
thetwo operating points /d = 2 mA, Vqs = - 3 V, and /d = 8 mA,
Vgs= - 1 .5 V. (a) Find Vp and Idss (b) Find Vcs if = 10 mA. (c)
•
h
Find Id if Vcs = - 5 V.
30. The transistor in Fig. 3.31 is operating with \Id\ =12 mA and
\Vds\ = 6 V. If I
Vp I
= 3 V and I /oss I
=20 mA, specify values for
Vg, yss,Rss, andRfi.
31. The transistor in the circuit of Fig. 3.28 is changed to an n-channel
enhancement-mode device having Vf = 2.5 V. If /£> = 10 mA when
Vgs = 4 V, specify suitable values for Vq, R^, and V^d to obtain an
operating point at /£> = 6 mA, Vqs = 3 V.
32. The n-channel enhancement-mode MOSFET described in Problem
31 is used in a circuit like that shown in Fig. 3.31. Specify values for

Fig. 3.29 See Problem 27.

I 1

9VV V-4 V
Problems 115

9V -9V

800 m:

^DSS = -10 mA
' n cc = U

lOOkn

Fig. 3.30 See Problem 28.

^G? Rb^ ^ss-) and Rss that will provide an operating point at I^
= 8 mA, Vds = 4 V.
33. Let Hi = SOOkfl, ^2 = 100 kQ,^^ = 1.5kQ, and V^jd = 24 V in the
circuit shown in Fig. 3.32. The transistor has a threshold voltage of
1.6 V, and the drain current is 8 mA when Vqs = 3.6 V. The gate
current is negligible. Find Iq and Vps for Rss equals (a) 0, (b) 200 12.
34. Element values for Fig. 3.32 are JRi = 210 kfi, Rg = 90 kl2, Hd = 2
kfl, Hss = 0.5 kl2, and Vdd = 20 V. The vertex of the parabola repre-
senting the transfer characteristic of the n-channel enhancement-
mode MOSFET lies at Vq = 2.5 V, Id = 0. Another point on the
curve is Vqs = SW, Id = 2 mA. Assume that Iq = 0. (a) Find Id and
^DS (b) What value for R2 will cause Id to equal 6 mA?
•

Fig. 3.31 See Problems 30 and 32.

116 Transistor dc models

Fig. 3.32 See Problems 33, 34, and 36.

35. The transistor shown in Fig. 3.33 provides 12 mA

with Vqs = 6 V and
4 mA with Vqs = 5 V. Find (a) Vj, I^, and V^g, (b) the power ab-
sorbed by the transistor and each resistor and the power suppHed by
each battery, (c) Find the slope (in mA/V) of the transfer characteris-
tic at the operating point.

36. The transistor of Fig. 3.32 is replaced with a p-channel enhancement-

mode unit having the transfer characteristic /^ = -4(Vgs + 2.5)^
(mA). If Ri = 300 kfi, R2 = 200 kQ, Rss = 600 Q, Rd = 1.6 kQ, and
Vdd = - 25 V, find Id and Vds-
37. A transfer characteristic for the trilateral transfister of Fig. 3.34a is

given in Fig. 3.34b. Find /a and ^32-

38. The transistor that is indicated in the circuit of Fig. 3.35 has the char-
acteristics given in Fig. 2.3. If Vcc = 20 V and Rb = 200 kQ, find

Fig. 3.33 See Problem 35.

4 v_zi.

isokn

100 kO'

24 v
Problems 117

Trilateral
transfister

12iuA
300 kn <0.5 kn
2k«: &)" mA
'P i
(a)

h (mA )

J
y
< / >>2V
/
/
--Fo rail ^32

A /
/
/
/^
/
/ 1 2
Vn
4 (V)

Fig. 3.34 See Problem 37.

Fig, 3.35 See Problems 38 and 39.

>ycc

T
118 Transistor dc models

^^-'"
1 Mn.

©
Fig. 3.36 See Problem 40.

12 V

.0.5 kfi

1 M^. ^
1.5 V

Fig. 3.37 See Problem 41.

,10 V

'0.5 kn

Fig. 3.38 See Problem 42.

Problems 119

16V

0.5 k^

1 MS2.

5 V

Fig. 3.39 See Problem 43.

approximate values for Ic, h^ ^ce^ ^^^ ^be if ^c equals (a) 2 kl2, (b)

1 kfi, (c) 4 kl2.

39. The input and output characteristics of Fig. 2.6 apply to the transistor
of Fig. 3.35. Estimate values for Ic, h^ ^ce? ^^^ ^be if ^cc = - 20
V, Rb = 200 kQ, and Re equals (a) 2 kfl, (b) 1 kfi, (c) 4 kl2.
40. Let Vg = 1 V in Fig. 3.36. Use the characteristics given in Fig. 2.15b
to determine approximate values for I^ and V^s if Rd equals (a) 600
Q, (b) 1200 n.
41 . Give approximate values of Ip and V^s for the transistor in the circuit
if its output characteristics are those of Fig. 2.18fo.
of Fig. 3.37
42. The characteristics of Fig. 2.22 apply to the transistor of Fig. 3.38.
Find Id and Vds if Vg equals (a) 4 V, (b) 5 V, (c) 6 V.
43. Use the output and transfer characteristics shown in Fig. 3.16 to de-
termine Id and V^s for the circuit of Fig. 3.39.
 Designing for a stable
operating point

We shall now apply our knowledge of dc-equivalent circuits for the vari-
ous types of transistors to the design of practical circuits. Given transistors
(of the same type number) that may have a wide variation of /3dc and that
may be subject to wide variations in temperature, to nonconstant values of
Vbe and Icbo or perhaps even
? to variable supply voltages, we seek to en-
sure almost identical operating points. We will accomplish this for n-type
and p-type bipolar transistors, for n-channel and p-channel JFETs and
MOSFETs in either the depletion or enhancement mode, and for circuits
in which any of the three terminals is the signal ground at both input and
output.
In doing our considerations are practical. Variations in jS^c are
this,
greater among purchased in large lots at low unit cost. A
transistors
smaller range in beta could be supplied, but at a greater unit price. In
integrated circuits, while all the transistors on one chip might have closely
matched values of (S^c there may be wide variations from wafer to wafer.
^

As for temperature variation, it is usually more economical to design a

circuit that is insensitive to such changes than it is to provide a constant
ambient temperature.
In maintaining a specific active-region operating point, we are able to
guarantee that operation is not subject to saturation or cutoff and also will
stay within the maximum voltage, current, and power ratings for the
transistor.
We shall work with manufacturers' specifications for commercially
available transistors in both integrated and discrete form.

4.1 Operating-point design against

variation in ^^c • common-emitter
All the circuits that are developed to establish a specific operating point
for the bipolar transistor have one thing in —
common they fix the value of
the emitter current. Once this is done, the collector current lies between

120
4.1 Operating-point design against variation in jSjc' common-emitter 121

0.98 and 0.999 times that value, which fixes its value very closely, and this
in turn fixes Vce assuming that any resistors in the collector or emitter
,

circuits maintain constant values.

Figure 4.1a illustrates a very common circuit for discrete transistors
that we will show can satisfy the criteria above. We have drawn the cir-
cuit so as to suggest common-emitter operation, although the emitter ter-
minal does not appear to be common to the base-ground signal input or to
the collector-ground signal output (neither of which are shown). When
we begin to apply a signal in the next chapter, however, we shall place a
large capacitor C^ across Re and this effectively places the emitter termi-
,

nal at signal ground but has no effect on the dc operating point.

We now replace the transistor with its dc-equivalent circuit, as devel-
oped earliet in Fig. 3.3a. The result in The portion of
shown in Fig. 4.1b.
the circuit to the left replaced with its Thevenin
of the base terminal is

equivalent, which yields the simpler circuit of Fig. 4.1c. Since Ig and Ic
are both positive quantities for this npn transistor in the active region, it is
evident that the voltage across Re opposes Vth Thus any tendency for Ic •

(and hence /^l ) to increase reduces the net voltage acting to establish the
|

value of Ib This is negative feedback and it provides the mechanism b y

.

which Ie and Ic are kept almost constan t.

Analysis

Let us analyze the circuit algebraically now to see if we can illustrate these
conclusions. Around the base-emitter loop in Fig. 4.1c we have

Vth = Hth/b + RbbIb + Vo + Re{Ib + Ic) (1)

Note that Rxh and Rbb are in series and they will always appear together as
(i^Th + Rbb) in any equations based on Eq. (1). We shall simplify our
expressions by using Rjy, in place of (Rth + Rbb), but it is always easy to
include the effect of Rbb by simply adding it to i^xh •

The collector current is the sum of the currents supplied by the two cur-
rent sources:

Ic = l^dJB + IcEO

Solving for Ib,

Substituting Eq. (2) into Eq. (1), we find

V-Th = (flxh + Re) {-J^^c - ~ IcEo) + ReIc + ^0

122 Designing for a stable operating point

C^Vr C^Vcc

\^c

^Rl\<Rl

\)lc.o <t> ^dc/.

/«+/.
I^+Ir

(a) (b)

(c)

Fig. 4. 1 (a) A circuit that can provide a stable operating point for an npn bipolar
transistor, (b) The transistor is replaced by its dc-equivalent circuit, (c) The input cir-

cuit is replaced by its Thevenin equivalent.

 .

4.1 Operating-point design against variation in iSdc-' common-emitter 123

When we solve this relationship for Ic , we obtain

- Vq) + (Rjh + Re)Iceo

J ^ PdciVTh .3^

To understand how this expression shows that Ic is relatively indepen-

dent of jSdc, let us consider the simpler case in v^hich I ceo is negligible:

If we select R^ so that (j^dc + 1) H^^ Hxh. we find next that

/r =
/3dc + 1 Re

= «de -^^^^ if (^dc + !)«£ » Hxh (5)

Recall the relationship between a^c ^^^ Pdc' c^dc = !)• Thus, /c i^dc/(i^dc +
is essentially indep endent of ^^^ ^ quantity that ?
vary over a may easily
three- to-one range for some types of transistors, while ajc changes by less
than 1 %
The operating point is uniquely determined by specifying values for any
two of the four quantities, Ic, Vce, h^ or ^be- If ^c is constant, then an
equation around the collector-emitter loop shows that

VcE = Vcc - Rcic + ReIe (6)

Thus VcE is fixed, since \Ie\ = Ic^ and Ic is essentially constant.

As we consider ways of designing circuits to maintain a fixed operating
point, we will base our preliminary design on the simplest equations, Eqs.
(5) and (6), and then check our work using more accurate formulas.

Design

The design process involves selecting values for the four resistors and the
supply voltage in the circuit of Fig. 4. la. We assume that desired values of
Ic and VcE for the operating point have been given to us, although part of
our task in later work will be to select a suitable operating point as well.
The procedure that we shall follow in obtaining a preliminary design
involves th ree assumption s, or rules of thumb, that successful designs seem
to follow: (1) Vcc is three to five times VceI (2) the voltage across Re is
e qual to or slightly less than Vce; and (3) the current through Ri is 10 to
100 times /g Considerable latitude is available for these choices, and the
.

exact values chosen may depend on other criteria. For example, the value
of Vcc n^ay be affected by supply voltages available elsewhere in the cir-
cuit or by commercially available battery voltages; the value of the cur-
124 Designing for a stable operating point

rent in the input voltage divider may depend on the power available from
the supply voltage or the degree to which a prior circuit can be loaded. We
shall consider some attempt a few designs.
of these points as we
Using these three assumptions, we can proceed with the design in a
clockwise direction around the circuit of Fig. 4.1a, beginning in the
upper-right corner. Each element may be found in turn.
Let us try this suggested technique by attempting to design a circuit for
a Sprague 2N5377 transistor that will give an operating point at /c = 1
mA, VcE = 5 V for room-temperature operation (25°C). A portion of the
bulletin giving the details for this transistor is shown in Fig. 4.2. We note
that it is an npn bipolar silicon transistor, and that the value of jSjc for Ic

Fig. 4.2 The first page of the bulletin for the 2N5377 transistor furnished by the
Sprague Electric Company, duplicated with permission. For /c = 1 mA and Vce =
5 V, we see that (3^^ ( = ^fe) "^^y range from 100 to 500.

NPN Silicon Planor

TYPE 2N5376 AND 2N5377 PREMIUM PERFORMANCE

ECONOUNE® TRANSISTORS
For Industrial Small-Signol, Low-Noise, Low-Power
Audio Frequency Applications

HiiJ^h-
ABSOLUTE MAXIMUM RATINGS
at 25 C Free-Air Temperature (9 OM): 11 II t

(unless otherwise noted)

Collector-Base Voltage 60V
Collector-Emitter Voltage (See Note 1 ) 30V
EmiMer-Base Voltage 5V m-
Total Dissipation at 25 C Free-Air Temperature (See Note 2) 360mW
Collector Current
Junction Temperature, Operating
500mA
+150C
m
lead Temperoture '/i6 Inch from Case for 10 Seconds 260 C
Storage Temperature Range — 55 C to + 50 C
1

PACKAGE BR

ELECTRICAL CHARACTERISTICS: at Ta = 25C (un less otherwise mE>ted)

2N5376 2N5377
Porometer Symbol Test Conditions Min. Max. Min. Max. Units

Collector-Base V|M|C80 Ic = IOmAJe = 60 — 60 — V

Breakdown Voltage
Collector-Emitter V|(||)CK5 Ic = 1 0mA, 1, = 30 — 30 — V
Breakdown Voltage (See note 3)
Emitter-Base V(,.,«o Ie = IOOmA, Ic = 5 — 5 — V
Breakdown Voltage
Collector Cut-oflF l«o Vc, = 30V, Ij = — 10 — 10 nA
Current
Static Forward h. Ic = 10a<A, Vce = 5V 1 00 500 40 200 —
Current Transfer Ic = mA, Vce = 5V
1 120 600 100 500 —
Ratio Ic = 10mA, Vc£ = 5V 150 — 120 — —
(See Note 3)
Collector-Emitter VcEISATI Ic = 10mA, 1, = 1mA - 0.20 — 0.20 V
Saturation Voltage
Base-Emitter V,e,S*T, Ic = 10mA, 1, = 1mA 0.65 0.80 0.65 0.80 V
Saturation Voltage

1. This volue oppliei when the bote-emitter diod* ii op*n-

2. Daror* lineorly to 1 50 C free oir temper . o« 2.88 mV/Z-C.
3. Pulte te«l: Pulte width = 300 ,
duty cycle 52%.
4.1 Operating-point design against variation in jSjc- common-emitter 125

= 1 mA is listed as hfE , a term introduced in the next chapter. The value

of hpE given as lying in the range from 100 to 500. We also note that
is

IcBO{max) = 10 nA, and therefore I ceo is 101 to 501 times as large, or in the
range of 1 to 5 fxA. This is negligible compared w^ith either Ie or Ic so that ,

we need not consider it in our preliminary design. Our main problem lies
with the wide range of values for jSdc which we shall try to overcome by
,

designing to hold Ic constant.

Let us first make three selections in accord with the rules of thumb pre-
sented above. We
want Vcc to be three to five times Vce, so we select

Vcc = 5Vc£ = 25 V
The voltage across Re is to be equal to or slightly less than Vce therefore,
;

let's choose

Vre = Vc£ = 5 V
Finally, the current th rough Ri should be 10 t o 1 00 times Ig select a . We
factor of 50. From Eq. (2), we see that Ig is essentially equal to Ic divided
by Pdo ^^^ therefore the worst transistor {^^^ = 100) has the maximum
base current /fi
= lO'^/lOO = 10 ptA, and

Iri = 50(10 X 10-6) = 500 /xA

Having made these three decisions, we may now complete the design for
where jSdc = 100. We begin with Re and work our clockwise way
the case
around the circuit.

Vrc = Vcc - Vc£ - Vr£ = 25 - 5 - 5 = 15 V

and

Vrc 15
Re = -7^ = -^ = 15 kQ
ic ^

while ^^^^ ^^SiuL\Ji. lesle

E, = J:^ = J^ = _^ = 5kQ (7)
~^E ^C 1

We next consider ^2- The current through it is /fli

- Ir = 500 - 10 /xA,
while the voltage across it is Vre + Vre = Vq -^ Rbb^b + Vre The •

2N5377 bulletin gives a range for ^^^(sat) of 0.65 to 0.8 V. This value repre-
sents the base-emitter voltage when large emitter, base, and collector cur-
rents are flowing. Since we are operating at Ir = 10 /xA, a relatively small
value, we select Vbeissh)
= 0.65 V. This voltage is the sum of Vp and
RbbIb' For this design, let us neglect Rrr and use Vq = ^^^(sat) = 0.65 V.
Thus, Vr2 = 0.65 + 5 = 5.65 V, and

„ _
R2
Vre ^ Vq
= -7
hi -
—=
h
-J
5.65
f..Q
0.49
= 11.5 kQ
126 Designing for a stable operating point

Finally,

Iri U.5

We now have values for Vqc and the four resistors appearing in Fig.
but we must check our design for a transistor whose jSjc is 500. We let
4. la,
Vq = 0.65 V and Rbb = again, since no better information is available
on the data sheet, but this time we shall include the effect of Iceo- From
Fig. 4.1c, we have
_ R,R, _ (38.7)(11.5)
^^ - R, + R, - 38.7 + 11.5 ^•^^'^^

and

From Eq. (3), we find

= iSdc(VTh - Vo) + (i^Th + Re)IcEO

Ir

500(5.74 - 0.65) + (8.88 + 5)(501 x lO'^)

8.88 + (501)(5)

2545 + 0.07
= 1.012 mA
2514

This is enough to our design objective.

certainly close
The effect = 5 kQ is quite small; it is shown
of letting Rbb in the answer
to Drill Problem D4.2 at the end of this section.
We also check the collector- emitter voltage:
^CE - ^cc ~ ^c^c ~ ^e{^c + h)
= 25 - 15(1.012) - 5(1.012 + 0.002)
= 25 - 15.18 - 5.07 = 4.75 V
This guarantees operation in the active region.
Without giving all the details, we should point out that a similar careful
analysis for i^dc = 100 produces the results /c = 0.990 mA, Vce = 5.14 V.
Incidentally, this would have come out exactly 1.000 if we had not mA
made the assumption in Eq. (7) that Ie and Ic were equal. The expected
| \

range of jSjc thus leads to operation in the active region very close to the
desired operating point of 1 mA and 5 V.
Our success in achieving the same operating point for transistors differ-
ing so widely in their values of jSjc is directly attributable to the use of
4.1 Operating-point design against variation in /3(jc-
common-emitter 127

negative feedback in fixing the emitter-current value. If we assume that

the current through Ri in Fig. 4.1a is large compared w^ith the maximum
base current, then the voltage divider composed of Hi and ^2 provides a
fixed value of Vr2, independent of 7^. Then any tendency for Ic to in-
crease tends to increase Vre which will reduce the voltage difference be-
->

tween Vi{2 and Vj^E ; this leads to a smaller /g and a smaller P^Jb > and thus
a reduced collector current. That is, the circuit tends to oppose the change

in Ic . Iq tries to decrease, V^e will decrease, Vj{2 ~ ^re will

Similarly, if

increase, /^ will increase, and ^^lJe will increase; Iq again tends to be re-
stored to its original value.
The algebraic result of this negative feedback showsup in Eqs. (4) and
(5), since larger val ues ofR^ (more negative feedback) and smaller valu es
of Jf^Th (larger values of 7^1 an d hence more constant Vr 2) caus e Iq to be less
dependent up on the value of i^dc •

In the next chapter we shall see that while this selection of values for R^
and Hth rnay lead to a more stable operating point, it tends to produce a
smaller signal gain. The optimum design must involve a typical engineer-
ing trade-off between stability and gain.
As a example, consider a case in which Vqc is speci-
slightly different
fied, say at 9 V, and a very small value for Ic is desired, say Iq = 10 /xA at
Vqe = 5 V. We again design for the 2N5377 transistor. From the data
sheet of Fig. 4.2, i3dc(min) = 40 at this lower collector current. Let's assume
that Vbe is 0.6 V this time and begin our design with

, . 10 X 10-6
h = -^ = 0.25 /iA

Ie = - 10.25 ^A '^c ^d^jiM.' th A^'. Lu)bay;quJ/'AJioi

With VcE = 5 V and Vcc = 9 V, we only have 4 V to distribute between

Re and Re We try 2 V across each (although we could have V^c = 3 V
.

and Vre = 1 V). Thus

= ''''
«^ = ^"^
10.25 X 10-e

and

^- = io-^no^=2ookQ
Since /^ is very small, let us use Iri = 200/^ = 50 /xA. Thus 7^2 = 49.75
tiA; if we use Vo = 0.6 V, we may complete the design:
12S Designing for a stable operating point

Vr2 = VflE + Vo = 2.6 V

Vfli = 9 - 2.6 = 6.4 V

^- 50x1o-6
='''^^

To check the design, we calculate Vth = 2.61 V and Rth = 37.1 kfi, and
then analyze the circuit at |(3dc(min) = 40 and at i3dc(max) = 200:

/5dc(min) = 40 ^d,(^^) = 200

IcEO = (40 + 1) 10 X 10-9 = 410 nA Iceo = 2.01 fiA

Ic = 10.02 piA Ic = 10.25 /xA

^B = (/c - IcEo)ll36c = 0.240 /xA Ib = 0.0412 M

/£ = - 10.26 /iA /£ = - 10.29 M
VcE = 4.99 V Vc£ = 4.94 V
The operating point stays in the active region for both cases.

D4. 1 Suppose that the circuit designed for the 2N5377 transistor with Ic
= 1 mA is actually used with a 2N5376 transistor. Use Vbe = 0.65 V and
find (a) /c(max), (b) /c(min), (C) VcE(max), (d) Vc£(n,in) •

Answers. 1.013 mA; 0.995 mA; 5.06 V; 4.76 V

D4.2 For the 2N5377 example with /c = 1 mA discussed in this section,
let Rbb = 5 kfi while Vq = 0.6 V, and calculate (a) /c(max), (b) /^(max),
(c) VBEimax), (d) VcEimin)-

Answers. 1.020 mA; 9.91 /xA; 0.650 V; 4.58 V

4.2 Operating-point design against

variation in temperature: common-emitter

In addition to the variability of jSjc among supposedly identical transis-

tors, the designer must guard the operating point against the effects of
temperature change. Many circuits must operate over a temperature
range from - 55 to 125° C, and such a variation has several effects on
transistors and diodes. The value of Vbe decreases by 1.8 to 2.5 mV for
every 1°C increase in temperature. A typical value is 2.3 mV/°C. The
4.2 Operating-point design against variation in temperature: common-emitter 129

value of I CEO is also very sensitive to temperature. ^ Finally, 0^c increases

nonlinearly with temperature. There is no simple rule of thumb to esti-
mate the change; it is either measured or lumped into the larger variation
expected among different units of the same type.
The greatest effects of temperature on circuits using silicon transistors
usually result from changes in V^e and jSdc The reverse-saturation current
•

is usually so small compared even a hundredfold increase in its

to Ic that
value is negligible. This is not true with some integrated circuit devices,
however, and the variation of I ceo can pose a severe problem, since the
value of I CEO at 25° C may itself be a noticeable fraction of Ic
To stabilize the operating point against these effects, our primary goal
once again is to maintain a constant emitter curren t. The use of an emitter
resistor to provide negative feedback is helpful against changes in both jS^c
and Vbe- Stability with respect to Vbe is also improved by providing a
larger value of Vth ii^ ^he circuit considered previously in Fig. 4. la and its

equivalent in Fig. 4.1c. Repeating Eq. (4) from Section 4.1,

r .

^' - Hth + ^''"' - ^^ ^^^

(0dc + 1) Re

Here, Vq is the voltage we have selected to model V^e • It is apparent that

the change in Ic is proportional to the change in the difference Vj^ ~ ^o •

We can thus minimize the effect of a change inVfif and Vq by providing a

larger value of Vxh •

The effect of a change in Iceo can be seen from Eq. (3):

^ /^dc(^Th ~ ^o) (RtH + Re)IcEO /ov

J ^
^ Hth + (/3dc + I) Re ^Th + (^dc + 1)^£ ^

We note that the ratio of the change in Ic to the change in Iceo is given by
the fraction

A/c die + Re)

(Hxh
(g)
^IcEO dIcEo ^Th + (^dc + 1) Re

We can minimize this ratio by making P^cRe considerably larger than Ht^
+ Re Remember, however, that Rbb appears
. as a part of Rth if it is made
part of the transistor model.
We should design the circuit by assuming "worst-case" conditions.
Thus
Eq. shows that the minimum collector current in a silicon transistor
(4)
will occur when Vq is at a maximum (minimum temperature) and /^^c is at

^icEO = KT^e'^G'^'^i^^^ + 1), where the width of the energy gap Eg = 1 • 12 eV (1 electron volt
= 1.6022 X 10" ^^ J) for silicon and K is a constant.
 :

130 Designing for a stable operating poi it

a minimum (also at minimum temperature). We also must consider the

unit having the smallest (3^^ • Therefore,

^ /^dc(min) (^Th ~ ^O(max)) /,qv

J
^Th + (/5dc(min) + 1)^£
Correspondingly, /c(max) occurs at the maximum expected temperature,
where Vq is at a minimum and jS^c is at a maximum. We again assume the

worst possible case and select the unit having the highest jSdc

T = ffdc(max) (^Th ~ ^O(min)) /-.^v

'^'"->
Rxh + (^dc(.ax) + 1)Re ^ '

To see how such a design is let us reconsider the problem

accomplished,
we solved in Section 4.1. We
have a 2N5377 transistor and must try to
provide an operating point of Vce = 5 V, /c = 1 mA, both within
± 10% for a temperature range from - 55 to 125°C. We shall assume
,

that jSdc varies from 0.8 of its 25° C value at - 55° C to 1.4 times the 25 °C
value at 125° C. Thus, since we are faced with a variation from 100 to 500
at room temperature, we have a worst-cast minimum,

|8dc(™n) = 0.8(100) = 80

and a worst-case maximum,

i8dc(max) = 1-4(500) = 700

The minimum and maximum values of Vq are calculated by increasing the

value at 25°C, 0.65 V, by 2.3 mV for each 1°C decrease in temperature:

Vo = Vo(25oc) - 2.3 X 10-3(roc - 25) (12)

Thus the range of Vq extends from a minimum value at 125°C,

Vo(min) = 0.65 - 2.3 X 10-3(125 - 25) = 0.42 V

to a maximum at the lower temperature, - 55°C,

Vo(max) = 0.65 - 2.3 X 10-3(-55 - 25) = 0.834 V

We may now carry out the design using the same procedures described
in Section 4.1. The supply voltage is chosen to be three to five times Vce,
and we again select25 V. The voltage across Re is selected as equal to or
slightly lessthan Vce; we again choose 5 V. Finally, the current through
Ri is 10 to 100 times Ig. Since the center values of Ic and jS^c are un-
changed, we may again let I^i be 50/^, obtaining identical values for the
four resistances: Hi = 38.7kfl,H2 = 11.53 kfi,^^ = 5kQ,andHc = 15
kfi. We again have Rxh = 8.88 kfi, and Vyh = 5.74 V. Thus the design is
the same, and we must now check it for the two worst cases.
 :

4.3 The thermal environment and maximum junction temperature Lol

The minimum value of Ic is calculated by using Eq. (10)

80(5.74 - 0.834) . -^- ,

'"^
''^C"'") = 8.88 + (81)5 = ^-^^^
The maximum value is

700(5.74 - 0.420)
^^("-' = = 1-060 mA
8.88 + (701)5

These values both lie within the ±10% limits and we have a successful
design. As a matter of fact, if we wish, we can increase the value of Rth (or
Ri and ^2) by choosing to send a smaller current through the input voltage
divider. Higher resistances would lead to an increased signal gain, as we
indicated earlier, but this is not one of our immediate concerns and we
shall let it lie until the following chapter.
Had we not met the ±10% tolerance on Ic, we might have modified
our design by increasing I^ which reduces Rth by increasing Re or by
, ; ;

doing both.

D4.3 Decrease Vq to 0.6 V at 25°C for the 2N5377 transistor described

above, but keep all Vcc = 24 V, Re
other characteristics the same. Let
= 15 kQ, Re = 4 Ri = 120 kQ, and R2 = 30 kQ in the external
kfi,
circuit, and determine /c(min) and /c(max) under the same temperature and
tolerance worst-case conditions.

Answers. 0.923; 1.097 mA

4.3 The thermal environment and

maximum jmiction temperature
The average power that any diode or transistor can dissipate safely is de-
termined by the temperature of the semiconductor junction itself. The
maximum temperature at which the device itself (not its external case)
may operate is referred to as the maximum junction temperature. Its
value depends on the type of semiconductor material and the doping levels
used, the type of encapsulation, the solder or bonding material used, and
the degree of reliability desired. A typical value for the maximum junction
temperature of a germanium transistor or diode is about 100°C, while
values from 135 to 200 °C are more typical for silicon devices. The higher
values are associated with hermetically sealed metal-encapsulated units.
The data sheet for the 2N5377 we considered earlier in this chapter (Fig.
4.2) gives the maximum junction temperature as 150° C in the list headed
"Absolute Maximum Ratings" under the entry "Junction Temperature,
Operating." For the 2N5088 described in Fig. 4.3, the maximum junction
temperature is found to be 135° C.
132 Designing for a stable operating point

NPN SILICON
AMPLIFIER TRANSISTORS

NPN SILICON ANNULAR' TRANSISTORS

JUNE 1967 — DS 5232

. NPN silicon annular transistors designed for low-level, low-

. .

noise amplifier applications.

• High Gain at Low Current —

2N5088 — 300 min at 100 ^Adc
2N5089 — 400 min at 100 ^^Adc
• Low 100 /(Adc Noise Figure —
1.2 dB typ at 100 Hz
l.OdB typat 1.0 kHz
• Excellent Gain Linearity from 20 pAdc to 2.0 mAdc
(See Figure 9)

MAXIMUM RATINGS
Rating Symbol 2N5088 2N5089 Unit

Collector-Emitter Voltage 30 25 Vdc

^CEO
Collector-Base Voltage 35 30 Vdc
^CB
Emitter-Base Voltage 4.5 Vdc
^EB
Collector Current 50 mAdc
'c

Total Device Dissipation (S T = 25° C

^D
310 mW
Derate above 25 C 2.81 mW 'C
Operating and Storage Junction -55 to *135 =
C
Temperature Range

THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit

Thermal Resistance, Junction

^JA
0.357 C mW
to Ambient

"Annular Semiconductors Patented by Motorola Inc.

TO-92
(Case 29)

Fig. 4.3 The first of four pages of data furnished by Motorola Semiconductors for

their 2N5088 bipolar transistor, reprinted by permission.

There are several factors that determine the junction temperature when
the transistor is in thermal equilibrium at some specified operating point.
These are the ambient temperature T^ of the medium surrounding the
circuit, the average powder dissipated at the collector junction IcycB^ and
the thermal characteristics of the materials and path from the junction to
the ambient environment. -xThese thermal characteristics are described
quantitatively in terms of sC thermal resistance. The name is appropriate
because of an analogy that can be drawn between a linear resistive circuit
and a thermal system in equilibrium. If we think of a thermally conduct-
ing object as having two isothermal (of uniform temperature) surfaces
with an average thermal dissipation power P^ entering the hotter surface,
4.3 The thermal environment and maximum junction temperature 133

then the temperature difference AT between the two faces is given by the
product of the power and the thermal resistance 6, which has the units of
degree Celsius per watt:

AT = dPo (13)

This corresponds to Ohm*s law:

V ^ RI

where V is
a potential difference. Low values of 6 signify more effective
heat radiation, in that the junction temperature is closer to the tempera-
ture of the environment.
In case the thermal circuit consists of several elements through which
the thermal power flows in series, such as from the junction at Tj to the
case at Tc to the heat sink at Th and finally to the ambience at T^ we may ,

model the circuit as shown in Fig. 4.4 and write

Tj - Ta = (djc + OcH + ^ha)Pd (14)

Similar relationships relate the temperature difference across other com-

binations of elements. If no heat sink is used.

Tj - T/^ = (djc + Oca)Pj) (15)

As an example of the use of such a thermal equivalent circuit, let us use

the data supplied for the 2N5088 transistor to find the maximum power
that may be dissipated safely at the collector junction for an ambient tem-
perature of 75° C.
From Fig. 4.3 we obtain three needed nuggets of information. First, the
total device dissipation at T^ = 25°C is given as 310 mW; second, the
thermal resistance Bja is specified as 0.357°C/mW (or 357°C/W); and
third, the maximum operating junction temperature is listed as 135° C.

Fig. 4.4 A thermal circuit in equilibrium is analogous to a linear resistive circuit:

Po ^ ITj - Tc^Vj - Vc, and Bch - ^CH. or Tj - Tc = BjcPd-

Junction Heat sink

N

Case

0) ^HA

Ambient

± Ta
1»>4 Designing for a stable operating point I

Our thermal equivalent circuit therefore has a temperature difference

of

Tj - Ta = 135 '- 75 = 60°C

Therefore from Eq. (13) we find

AT 60
OjA 0.357
= 168 mW
Note that as the ambient temperature increases, the maximum power that
can be dissipated decreases.
— ^ As another exampl e, suppose we have a 2N5088 transistor operating
with /c = 2 mA and Vce = 20 V at an ambient temperature of 25°C.
What the junction temperature?
is

To find the power being dissipated at the collector-base junction, we

need the collector-base voltage

VcB = Vce - V^e = 20 - 0.7 = 19.3 V

(where we have used an average value of V^e for a silicon transistor).
Therefore

Pd = IcVcB = 2(19.3) = 38.6 mW

One could also use Pd = Ic^ce^ since this includes the power dissipa-
tion at the emitter-base junction; however, this adds only a few milli-
watts.
From the thermal equivalent circuit, we have
AT = OjaPd = 0.357(38.6) = 13.8°C
8
Since T^ = 25 °C, we find that °C, well within the 135° C limit.
T; = 38.
One other way is by using a derating
of specifying thermal information
factor. Figure 4.5 shows a typical derating curve that may be drawn fro m
a knowledge- of only three numbers: the maximum power dissipa tion
Poimax) the r eference temperature below which it applies, and the max i-
•>

@ mum junction temperature .

The derating curve for the 2N5088 transistor may be constructed from
the information we have already gleaned from the data sheet. We set!
^D(max) = 310 mW, locate the breakpoint at T^o = 25°C, and set T;(max)
= 135°C. Then, for25 < Ta< 135°C, we use the properties of a straight
line to write

135 - T^ = Po = 0.355F^
^ll^'J'l

Here we see that Bj/^ = 0.355°C/mW, which checks rather closely with the
value of 0.357°C/mW given on the data sheet. This little exercise also in-
 ,

4.3 The thermal environment and maximum junction temperature 135

Z)(max)

/(max)

Fig. 4.5 The derating curve for a semiconductor device exhibits a linear decrease
from a maxifnum allowable average power dissipation valid at or below a specified
ambient or case temperature to the maximum allowable junction temperature.

dicates that Oj^^ is the reciprocal of the magnitude of the slope of the lin-
early decreasing portion of the derating curve; that is, the derating facto r
is l/OjA .

If the data were given as PD(max) at or below some case temperature Tco
then the reciprocal of the magnitude of the slope would be Ojc Such infor- .

mation is often related to case temperature for diodes or transistors that

are intended to be provided with heat sinks. These are metallic structures
with a relatively large heat-radiating surface to which the semiconductor
is attached. The derating curve of Fig, 4.6 applies to an RCA 2N2015 sili-

con npn power transistor. A correct specification such as this has led to
unfortunate (but deserved) embarrassment for too many young engineers
who incorrectly interpreted Tc as T^ This curve indicates that the tran-
.

sistor will dissipate 150 W

if Tc < 25° C, a condition that might be

Fig. 4.6 The derating curve for a 2N2015 power transistor is given in terms of the
case temperature Tc- We note that 0;c = 175/150 = 1.17°C/W.

PdC^)

Tc (°C)

7(inax)
±ob Designing for a stable operating point

achieved if the transistor case were welded to a 500-pound anvil and

placed 15 feet deep in the middle of Lake Michigan in January.
If the ambient temperature is 25°C and the thermal resistance between
case and ambience has the relatively good value of 0.5°C/W, then for P^
= 150 W, we find that

Tc - Ta = 0.5(150) = 75°C
Thus,

Tc = 100°C
Since the derating curve shows that djc = "^/e^C/W, we have
Tj - Tc = (7/6) (150) = 175°C
It follows that Tj = 275°C. Since Tj^^^^ = 200°C, ZAP!

D4.4 Data from a transistor specification sheet show that the maximum
junction temperature
is 175° C and the
maximum allowable dissipation at
any temperature 20 W. The transistor should be derated above 25 °C
is

ambient. Assume a heat sink is used for which Och = 1°C/W and Ohj^
= 1.5°C/W. Let Po = 10 W
in a 40°C ambient, and find (a) Tj, (b) Tc,
(c) Th.
Answers. 115°C; 65°C; 55°C

4.4 Common-collector and

common-base biasing
Whatever the type which the bipolar junction tran-
of external circuit in
sistor is can be achieved by keeping th e
installed, a stable operating point
emitter current constant The circuit we have been considering for the
.

common-emitter arrangement does this very effectively, and the same

basic circuit is employed in the less-used common-collector and common-
base configurations.
For a common collector, the collector terminal is the reference for the
input and output ports. It is connected to the supply voltage rather than to
ground, but the ideal voltage source ensures that there can be no signal
voltage between collector and ground. This circuit is shown in Fig. 4.7.
Note that the circuit external to the transistor is i dentical to that for th e
common-emitter shown in Fig. 4. la if Re = The design and analysis
.

procedures are unchanged.

In the common-base circuit shown in Fig. 4.8a, two voltage sources and
two resistors provide a stable operating point. Writing an equation
around the left mesh, we have

Vbe + Re{Ic + h) + V££ =

4 4 Common-collector
. and common-base biasing 137

Fig. 4.7 A biasing circuit for an npn junction transistor in the common-collector con-
figuration is 'identical to that used with the common emitter for Rq = 0.

Since /c + h = -h^
Vee + Vbe
h =
Hi

Thus the emitter current is fixed if Vee is stable and several times
greater than V^e (typically 0.65 V). Providing two supplies of opposite
polarity with respect to ground, however, is usually uneconomical. One
supply is preferable, and the circuit of Fig. 4.8^ shows how a voltage di-
vider may be used with the collector supply to keep the base positive with
respect to the emitter. The circuit is of course identical to that used with
the common-emitter earlier, and its design is accomplished by an identical
procedure. The base is made common to the input and output signals by
placing a large capacitor in parallel with R2 This is often called a by-pass
.

capacitor. For the common-emitter circuit, the by-pass capacitor appears

across Re . We shall consider the selection of these capacitors in Chapter 7.

Fig. 4.8 Two common-base biasing circuits, (a) A simple (but probably uneconomi-
cal) circuit using two voltage supplies, (b) A more practical single-supply circuit that is
identical to the common-emitter circuit of Fig. 4.1a. For operation with a signal, a
large capacitor is placed in parallel with R2 thereby making the base a signal ground.
,

(a) ib)
138 Designing for a stable operating point

D4.5 For a silicon npn transistor with negligible I ceo let Vqe = 0.65 V ^

and iSdc = 110. If Vcc = 24 V and Re = 4 kfi, find Ic and Vce in the
circuit of (a) Fig. 4.7 if Hi = 36 IcQ and i?2 = 12 kQ; (b) Fig. 4.8a if Re
= 5kfiandy££ = -6V; (c) Fig. 4.8^7 if Rj = 30kQ,H2 = 10kQ,and
Re = 10 kfi.
Answers. 1.299 mA, 18.76 V; 1.325 mA, 18.02 V; 1.303 mA, 5.70 V

4.5 Integra ted-circuit operating-point design

When a bipolar transistor is incorporated into an integrated circuit de-
sign, we often use techniques that are very different from those appearing
in the discrete circuits of Section 4.1. The primary reason for this is that
diodes and transistors require much less surface area on a chip than resis-
tors, and large areas are very expensive to provide. This leads to our first

rule of thumb for integrated circuit design: use diodes and transistors in
place of resistors wherever possible, and if a resistor must be used, keep its
resistance small.
One great advantage of an integrated circuit is that similar components
made at the same time. Since they lie within several mils (1
of a circuit are
mil = 0.001 inch) of each other, they experience the same environmental
stresses.This results in highly matched parameter values, so that Rs, jSjc,
Vbe and Iceo differ by only a few percent from unit to unit and behave
5

similarly as the temperature changes. It is therefore possible to rely on

matched components throughout a given circuit. Variability, however,
should be expected between units made in different wafers at different
times. We thus are led to a second rule of thumb: design circuits so that the
performance is dependent on ratios of resistor values rather than on abso-
lute values.
The general idea of stabilizing the emitter current and thereby stabiliz-
ing the operating point holds true for I-C designs as it does in discrete de-
signs. However, the method by which we achieve a constant emitter cur-
rent is somewhat different. Before discussing the details, let's consider an
I-C diode.
An I- C diode is typically by shortin g
formed from a bipolar transistor
Vbc =
the col lector to the base, as illustrated in Fig. 4.9a. Since the ,

transistor is operating at the boundary between the saturation and active

regions, and we can use the active- region model of Fig. 4.9b. Note that
the diode current I^ is given by

Id = 0dolB + /b = h{06c + 1) (16)

This is equal to the magnitude of the emitter current, Iq = I ^eI • Also,

Vd = IbRbb + Vo
4.5 Integrated-circuit operating-point design 139

/d=|/£|

(b) (c)

Fig. 4.9 (a) An integrated-circuit diode is constructed from a bipolar transistor by

shorting the collector to the base on the chip, (b) A piecewise-linear equivalent circuit
for Vqe = Vp > 0. (c) A simpler equivalent circuit for Vg^ = ^d — 0.

and therefore
R BB
Vo = Id + Vc
(^dc + 1)

Thus, the equivalent circuit of Fig. 4.9c is applicable with

R BB
fio = (17)
(^dc + 1)

We conclude that shorting the base to the collector of a transistor yields a

d iode whose current is equal to the magnitude of the emitter current of the
transistor.
To examine one of the many possible designs of an integrated circuit in
which the operating point is established by using an integrated diode, let
us consider the circuit shown in Fig. 4.10a. Two identical transistors are
operating with their bases tied together and their emitters grounded; one
is connected as an integrated diode, while the other is to have its operating

point safely in the active region. We

replace the integrated diode by
^Bfi/d^dc + with Vq, as shown in Fig. 4.10Z7, and we also use
1) in series
the active-region equivalent circuit for the right-hand transistor. Equat-
ing the currents at the left node:

^1 = -^D + Ib2

We may use Eq. (16) to eliminate Iq:

h = hi (/3dc + 1) + h2
With the emitters and bases of the two transistors common, Vbe is the
same, and thus the base currents are also equal; Ibi = Ib2 Therefore •

In = h
/3dc + 2
 .

140 Designing for a stable operating point

'/?i Rc> Kc

(>^-<)

(a) ib)

Fig. 4.10 (a) The left transistor is connected as an integrated diode to establish Ic for
the right transistor, (b) The left transistor is replaced by a diode equivalent circuit,
while the right unit is represented by its active-region equivalent circuit.

The collector current we wish to stabilize is I3^Jb2 = ^aJs Thus,

•

In = h
/3dc + 2
Since iSjc » 1, we see that

Therefore, the collector current and the operating point for the right-
hand transistor will be stabilized if /j is held constant; moreover, the col-
lector current will be very nearly equal to /i
Let us see what affects the value of /^ . From Fig. 4.10^, we may write
Vcc = Rih + Vo
or
- Vi
/i = Vcc

The voltage across the integrated diode V^ is approximately 0.65 V and is

not apt to vary more than 0. 1 V from this value. Also, Vqc is much larger
than 0.65 V, and thus V^c - ^d will be constant if the supply voltage Vcc
is constant. This is accomplished through voltage regulation in the power

supply. Finally, the resistance Ri can be held fairly constant; in any case,
it is often made equal to jRc A decrease in Ri thus results in an increase in
•

/j and /c, but little change in Rc^c or Vc£2-

4.6 JFE T and depletion-mode IGFE T operating-point design 141

Thus we may hold Ic constant by keeping /j constant, a relatively easy

task. Finally, the fact that Ic = h leads to the name of current mirror for
the circuit of Fig. 4.10a; that is, the current Ic mirrors /i .

Two additional comments may be made about the current mirror.

First, the integrated diode may stabilize the cur rent of several transist ors
if connected together and their emitters are grounded All
their base s are .

collector currents are approximately equal to /i Thus, several collector

.

currents are stabilized while using only one resistor. Second, the collector
supply to the right-hand transistor is essentially acting as a constant cur-
rent supply with value /^ = /i Thus, if we need a constant current supply
.

for some device, it is only necessary to connect it in series with the collector
of the right-hand transistor. The curren t mirror is a current source that is
a basic building block for linear integrated circuit designs.

D4.6 Both transistors in Fig. 4.10a are operating with j^dc = 100, Vq
= 0.65 V, Vcc = 6 V, and Rbb = 0. Let Hi = 2.67 kfi. Re = 2 kQ, and
Vcc = 6 V, and find (a) /c2, (b) Vce2, (c) /ci-
Answers. 1.964 mA; 2.07 V; 1.964 mA

JFET and depletion-mode IGFET

operating-point design
This section considers the design of circuits that can provide an operating
point for FETs that is fixed against variations between units and in tem-
perature. A typical specification might be to maintain /^ within 10% of
the nominal value under all possible conditions.
We have already analyzed several dc circuits containing JFETs or
depletion-mode MOSFETs. For example, the n-channel JFET in Fig.
3.14 was furnished with both drain and gate voltage supplies, as well as
gate and drain resistors, and the source was grounded. We used a nonlin-
ear model to determine the operating point Vqs Id ^^^ ^ds The design
? ? •

of a similar p-channel circuit was considered in Fig. 3. 15a, again using the
nonlinear model. Either of these examples could apply equally well to
depletion-mode MOSFETs.
In designing the circuit external to the transistor, we assumed that the
parameters of the FET {I^ss and Vp) were well known and stable. As we
have seen with the bipolar transistor, however, variations among units of
the same commercial type, temperature effects, and a combination of
these two variables can cause extreme variations in the transistor parame-
ters. With JFETs, the majo r variation occurs with the drain-to-source sa t-
uration current Ipss and the pinch-off voltage Vp But these are precisely
.

the two values needed to specify the nonlinear transfer characteristic in

the region beyond pinch-off.
142 Designing for a stable operating point

Temperature affects Vp only

slightly, while I^ss decreases as tempera-
ture increases, perhaps a 25%
decrease for a 100°C increase in tempera-
ture. A much greater variation in Vp and I^ss occurs because of slight dif-
ferences in the manufacturing process. Both these quantities are a
function of the channel width; I^^ss is proportional to the first power of the
channel width, and Vp is proportional to its square. The first page of the
| |

data sheet for the Texas Instruments 2N3823 n-channel silicon JFET is
shown as Fig. 4.11. From it we can see that I^ss ^lay range from 4 to 20
mA, an inconvenient five-to-one range, whereas the value of Vqs required
to reduce /^ to 0.4 mA may be anywhere between - 1 and - 7.5 V. This is
not quite the same as pinch-off voltage, which would be slightly more neg-
ative, but it is not difficult to calculate the pinch-off voltage from the data
given. The nonlinear characteristic of a unit for which I^ss - 20 mA and
Id - 0.4 mA when Vqs = - 7.5 V is described by

10 = -^
yo (Vcs -
V'O:. Vpy
^tj = ^yo -^ (Vas - Vp)2

and therefore
20
0A = -y^(-7.5-Vp)^

Solving for Vp, we find that it is - 8.74 V. Using data for the lower-cur-

rent unit, we find its pinch-off voltage to be - 1.46 V. Thus Vp may be

anywhere within the range from - 1.46 to - 8.74 V. Note that
six- to-one
we have associated the rnqre negative pinch-off voltage with the larger
drain-to-source saturation current, while the less negative value of Vp goes
with the smaller I^ss There is no guarantee by the manufacturer that this
•

is the case, but it does tend to happen in practice. Thus the two limiting

transfer characteristics at 25 °C can be taken to be those shown in Fig.

4.12.
We may now consider the design of a biasing circuit that will provide a
fixed operating point for transistors having such diverse characteristics.
Suppose we begin with the fixed-bias arrangement shown in Fig. 4.13a.
T wo separate dc sources are required for this n-channel JFET: posi tive
with respect to ground for the drain, and negative with respect t o ground
for the gate This is probably more expensive than a circuit that has only
.

one supply; moreover, it leads to quite different operating points for the
two characteristics shown and repeated in Fig. 4.13b. Since
in Fig. 4.12
the bias supply is negative, Iq = 0, and therefore Vqs = - 2 V. This leads
to two operating points, as shown in Fig. 4.13b. The unit with I^ss = 20
mA and Vp = - 8.74 V has I^ = 11.9 mA. Then, when we use the nonlin-
ear model Id = ilDss/yp^){^Gs - ^p)^^ we find that the unit with Idss
= 4 mA and Vp = - 1.46 V is cut off and Id = 0, since Vqs = - 2 V. If
the fixed bias were changed to - 1 V, both transistors would be operating
4.6 JFE T and depletion-mode IGFE T operating-point design 143

TYPE 2N3823
N-CHANNEL EPITAXIAL PLANAR SILICON FIELD-EFFECT TRANSISTOR

SYMMETRICAL NCHANNEL FIELD-EFFECT TRANSISTOR

FOR VHF AMPLIFIER AND MIXER APPLICATIONS
Low Noise Figure: < 2.5 db at 100 Mc
Low C„s: ^ 2 pf

High yfs/Cj„ Ratio (High-Frequency Figure-of-Merit)

Cross Modulation Minimized by Square-Law Transfer Characteristic

^mechanical data

THE ACTIVE ELEMENTS ARE

ELECTmCALlY INSULATED FROM
THE CASE

ALL JEOEC T0-72t

DIMENSIONS AND NOTES
ARE ArrLICAILE

tTO-72 •ullint is lomt at TO-18 (icipt for oddltisn «f a iourth Itfld.

^
absolute maximum ratings at 25°C free-air temperature (unless otherwise noted)
Drain-Gate Voltage 30 v
Drain-Source Voltage 30 v
Reverse Gate-Source Voltage —30 v
Gate Current 10 mo
Continuous Device Dissipation at (or below) 25°C Free-Air Temperature (See Note 1) ... 300 mvy
Storage Temperature Range -65°C to + 200"C
Lead Temperature Xi Inch from Case for 10 Seconds 300'C
'electrical characteristics at 25°C free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS* MIN MAX UNIT
V(»|GSS Gate-Source Breakdown Voltage Ig = -1 fio. Vds = -30 V

Vgs = -20v, Vds = -0.5 na

Igss Gate Cutoff Current
Vgs = -20v, Vds-0, Ta = 150»C -0.5 fia

loss Zero-Gate-Voltage Drain Current Vos=15v, Vgs = 0, See Note 2 4 20 ma

Vgs Gate-Source Voltage Vds = 1Sv, Id = 400 /xa -1 -7.5 V

VGSIoff) Gate-Source Cutoff Voltage Vos = 15v, Id = 0.5 no -8 V

SmollSignal Common-Source Vd5 = 15v, Vgs = 0, = 1l<c, f

\Yu\ 3500 6500 ^mho
Forward Transfer Admittance See Note 2

Small-Signal Common-Source Vds=1Sv, Vgs = 0, f = 1 kc,

i/cl 35 /imho
Output Admittance See Note 2

Common-Source Short-Crcuit Vds=1Sv,

Ci.. 6 pf
Input Capacitance
Vgs = 0,
Common-Source Short-Circuit
Cr,. 2 pf
Reverse Tronsfer Capacitance f = lMc

l/fl Vos = 15v, 3200 /Lunho

Fonword Transfer Admittance

Small-Signal Common-Source
MXi.) Vgs-0. 800 Mmho
Input Conductance ^
Small-Signal Common-Source
R«(yo.) f = 200 Mc 200 Acmho
Output Conductance

NOTES: I. Dtratt linearly to 17S C frti-oir Itmporoturt at thi loti of 2 mw/C .

2. ThoM porometort muit bo tnoasurod uting pulit toclinii|uo<. TW = 100 i , Duly Cycle < 10%.

*lndi(glo< JEDEC rigiittrod dato.

*Tho fovrth lood (com) Ii connicltd lo tho jouret for all inioiurtminti.

Fig. 4.11 The first of four pages of data furnished by Texas Instruments for the
2N3823 transistor, reproduced with permission.
 H

144 Designing for a stable operating point

h (mA)

- ^20
"%

Vos>Vgs--Vp
/
/ -
-15

/ 1
-10

r5

H —i»-r^———^— \ \ h
yv.(V)

Fig. 4.12 Data given for the 2N3823 transistor in Fig. 4.11 predict these transfer
characteristics for transistors having the maximum and minimum values of Ij^ss •

beyond pinch-off; however, it is obvious that the two operating points

would be completely different (Iq = 15.7 mA and 0.4 mA).
Some improvement is obtained by using self-bias, as supplied by the
source re sistor Rss in Fig. 4.14q If we again assume a negligible gate cur-
.

rent and sum voltages around the gate mesh.

This linear equation may be plotted as a straight line (Chapter 3, Eq. (16),
with Vq = 0) on the Id-Vqs axes of Fig. 4.14^?; the load line is shown for

Fig. 4.13 (a) An n-channel JFET is operated with fixed bias, Vq^ = - 2 V. (b) The
transfer characteristics for widely different 2N3823s show that one of the transistors is

cut off (Id = 0) , while the other is at a satisfactory operating point in the saturation
region.

lo (mA)'
J^tX iict

\)L0J^

^ /"P^ Ipss = -0 mA, 4 mA

\~\-J Vp= -8.74 V, -1.46 V

ia) ib)
 —

4 6
. JFE T and depletion-mode IGFE T operating-point design 145

Rss = 0.5 kQ. Its equation is

Vgs = -0.5/d

Since

/,
20
(-8.74)2
[Vcs - (-8.74)]2 V PauAt A

we can solve the two equations simultaneously for Vqs, obtaining

Vcs = -3.54 V
and therefore
-r PQKMA B
Id = 7.08 mA
For a unit with = 4 mA and Vp = - 1.46 V, we find that Vqs
Iqss
= - 0.637 V and Id 1.27 mA. These two values for Id, 7.08 and 1.27
=
mA, are not nearly as diverse as they were with fixed bias. Smaller values
of Rss would produce steeper lines and even more disparate values of Id at
the operating points. Larger resistances lead to more equal currents, but
they would be quite small, thus leading to reduced signal gain, as we have
suggested before.
If we
did not have to design for such a wide range of transistor charac-
arrangement could certainly be used to lead to a
teristics, this self -bias
satisfactory range of values for Id, and it has the virtue of simplicity.
However, if no selection of Rss permits a good solution to the bias prob-
lem,we have to try a different approach.

Fig. 4.14 (a) Self-bias is provided by a source resistor Rss • (b) For Rss = 0.5 kfi, both
operating points are beyond pinch-off, but they are quite different.

Id (mA)
^DD
" -
Smaller Rgs
\ ^ ^20

Rd
S^Z^^g^ \ 7
\ /-
\ /
'o\ Rss = 0.5 kfi \ / - -15

In =0 A
--
20 mA, 4 mA
-8.74 V,-i. 46 V
Larger /?_55^v / \ _ -10
/ \
\ ^

-5
^55

—1——
• "T "l^
-8
1

-6
1
1
1
1 -\
1

4
1
1 —-2 1

1
.
•! v^ 'Vgs (V)"
r^

(a) ib) b
146 Designing for a stable operating point

Id (mA)

10 -8-6-4-2 2 4 6

(a) (.b)

(r)

Fig. 4.1 S (a) A biasing circuit employing a combination of fixed and self-bias, (b)
The bias load line leads to more equal drain currents for the two transistors, (c) Only
one dc supply is required in practice.

We would like a bias line that is horizontal and as high up the Ip axis as
we can manage. Since the maximum current obtainable from the lower-
current unit is 4 mA, the best we can hope for from these two very differ-
ent transistors are drain currents of about 4 mA
maximum. This condition
is approached by using both self-bias and a positive fixed-bias supply in

the gate circuit, as illustrated in Fig. 3.21a or 4.15a. Here,

GS = Vn —
Vtq Red
SS^D

This linear equation in V^s and Ip leads to a straight line on the transfer
curves of Fig. 4.15Z?.
Since the operating-point value for Ip must be at the intersection of this
line and the transfer characteristic, let us try for an almost horizontal line
through the point /d = 4 mA, Vqs = 0, the point of maximum current for
the lower-current unit. The Vcg-axis intercept is at Vqs = Vc,so we move
4.6 JFE T and depletion-mode IGFE T operating-point design 147

this point well out to the right by selecting Vq = 10 V. At the /£)-axis

intercept,

= 10 - Rssii)
and Rss = 2.5 kfl. This bias load line is the one shown in Fig. 4.15b. It
provides an operating point for the largej-current unit at Vqs = - 4. 10 V,
Id = 5.64 mA, as compared with the smaller unit at Vqs = 0, I^ = 4 mA.
This is about as well as we can do with these two very different FETs,
unless we make Vq even larger, as well as increasing the value oi Rgs-
If there no appreciable gate current, then it is easier to supply the
is

positive voltage Vq by a voltage divider from V^d than it is to provide an

extra dc source. This is illustrated in Fig. 4.15c, and we see that

^'
Vq = Vdo
Ri + R2
To establish the voltage 10 V from a drain supply voltage Vdd
Vq =
= 25 V, we would setRi = 1.5^2- Any convenient values of resistance
can be used as long as they are high enough not to load the signal input to
the transistor. We should also place a by-pass capacitor across Rgs in order
to place the source at signal ground; hence the name common source.
In the depletion-mode n-channel IGFET, the insulated gate region pre-
vents gate current. The transfer characteristic is parabolic for Vqs < 0,
always assuming that Vps is sufficiently large to provide operation in th e
region beyond pinch-off (Vps ^ Vqs - Vp).The practical implementa-
tion of the biasing circuit is shown in Fig. 4.16fl. Since there is no gate
current,

Vgs = VoD-B —~r~D ^ssh

The voltage divider provides the voltage Vq , the first term on the right
side of the equation above, as identified on the abscissa in Fig. 4.16^?. If
operation extends into the positive Vqs region, as shown in Fig. 4.16c, the
depletion-mode IGFET or MOSFET may show a smooth transition into
enhancement-mode operation. The parabolic transfer characteristic con-
tinues to the right of the Id axis.

D4.7 Let Ri = 700 kQ, R^ = 500 kfi, Vdd = 24 V, and Rd = 2kQ in

the circuit of Fig. 4. 15c. Transistor A has yp(A) = - 5 V, /£>ss(A) = 12 mA,
while Transistor B has Vp(B) = - 1.5 V and /dss(B) = 4 mA. (a) Specify the
minimum value of Rss so that Vqs < for either transistor, (b) Let Rss
= 3 kfi and determine Idia) Id{B) VosiA) and V^^scb)
, , , •

Answers. 2.5 kQ; 4.03 mA, 3.37 mA, 3.83 V, 7.13 V

148 Designing for a stable operating point

(a) (b)

Depletion Enhancement

(c)

Fig. 4.16 (a) A practical biasing arrangement for an n-channel depletion-mode

MOSFET. (b) With sufficiently large values of Vq and Rss, similar values of I^ may
be obtained for dissimilar units, (a) The transfer characteristic of a depletion-enhance-
ment-mode MOSFET.

4.7 Enhancement-mode IGFET

operating-point design
The design of biasing circuitry for an IGFET or MOSFET operating in
the enhancement mode closely follows the form and principles discussed
in Section 4.6. We
recall that the transfer characteristic for the region be-
yond pinch-off is described by the constant K and the threshold voltage
Vj. For the n-channel or p-channel device.

=
K
Id (Vgs - Vr)^

The effect of an increased operating temperature shows up as a very s light

decrease in Vt and a decrease in the value of K, similar to the decrease of
Ipss ^ith temperature for the JFET . Neither of these changes is apt to be
as great as the unit-to-unit or wafer- to- wafer variation.
4. 7 Enhancement-mode IGFET operating-point design 149

^G- ^DD Ji^ +R^

ia) ib)

Fig. 4.17 (a) Similar operating points are obtained for two different n-channel
enhancement-mode MOSFETs by using a combination of fixed and self-bias, as

shown in (b).

Two transfer characteristics with different values of Vt and K are

shown Note that fixed bias alone would lead to a vertical
in Fig. 4.17a.
biasing line and grossly unequal values of Iq However, if we use the com-
.

bination of fixed bias and self-bias shown in Fig. 4.17b, the load-line
equation is

GS = Vn — Raal
Vn^ SS^D

where

R'
Vn = VDD
Rl + ^2

This is plotted on the characteristics of Fig. 4.17a. It is evident that the

determination of suitable values for Ri, R2, and Rss follows the same pro-
cedures used for the JFETs and depletion-mode IGFETs. Using these
procedures enables us to secure operating points at which the drain-
current values are reasonably equal. It is also necessary that Vqs > Vj
for n-channel enhancement-mode devices.
Let's consider the design of a circuit operating with a low drain current
that has the form of Fig. 4.17b. We want I^ to be 300 /xA, plus or minus
20% . Thus, 240I^ < <
360 fiA. The drain supply voltage is specified as
10 V, and the device parameters range from V^ = 0.5 V and Xj = 200
/iA/V2 to Vt2 = ly with K2 = 100 /xA/V^. Hence the limiting transfer
characteristics are

200
In^ = (Vgsi - 0.5)^
 —
150 Designing for a stable operating point

and
100
Id2 - (V,G52 - 1)^
n2

These two transfer characteristics are shown in Fig. 4.18, with the Hmit-
ing operating points defined by the maximum and minimum values of I^
indicated. By setting Idi = 360 fiA, we find Vqsi = 2.40 V; when Id2
= 240 ^A, Vqs2 = 3.19 V. These two operating points determine the load
line corresponding to the smallest possible value of Rss, and we find that
this is

The intercept of the load line and the Vqs axis is at Vqs = Vq; we find

Vc = 3.19 + (240 X 10-6)6.61 x 10^ = 4.78 V

Values of Ri and R2 may now be selected to obtain the desired value
ofVc:
H.
Vn = 10 = 4.78
Rl + ^2
Arbitrarily choosing i? 2 = 100 kfi, we find that i?i = 109.3 kO.

Itremains to choose a value for R^ The following chapters will show

.

that larger resistance values lead to larger signal-gain magnitudes. How-

ever, larger values may also move the operating point into the ohmic re-
gion. Since Vj)s ^ Vgs ~ Vj^we find the limiting values are V^si > 2.40

Fig. 4,18Given the two limiting cases of the transfer characteristic for an enhance-
ment-mode MOSFET, a drain current in the range 240 < I^ < 360 ^A is obtained for
any operating point on the section of the load line extending from Qi to ^2-

Id (mA)

800- -
1 /

600-
-\ 1 /
/
1
400- - 360 mA
Nc'
200-
-

240 nA /\ Vq^.

y
H \ 1 ^^-^^
Vn^
4.8 Common-drain and common-gate biasing 151

- 0.5 = 1.90 V, and Vds2 > 3.19 - 1 = 2.19 V. In turn, show that
these
the maximum possible voltages across the combination of Rss and Rq are
Vi = 10 - 1.90 = 8.10 V, and Vg = 10 - 2.19 = 7.81 V. Since Vi
= 8. 10 V occurs when Iqi = 360 ^A, we find that the maximum permissi-
ble value of Rss + Rd is 8.10/0.360 = 22.5 kQ for this transistor, and
7.81/0.240 = 32.5 kfi for the other. Since either case is possible, we are
restricted to /?ss + ^d = 6.61 + Rd ^ 22.5 kfi. For safety's sake, we let
Rd = 15 kl2.

D4.8 Two enhancement-mode MOSFETS have V^p^ = 2 V and Vt2

= 3 V; when Vcs = 4 V, Ipi = 20 mA and Id2 = 10 mA. Let R2 = 200
kfi, Rd = 5 kl2, and Vdd = 20 V. If /^ = 2 mA ± 25% and Rss is the
,

minimum possible value, find (a) Rss, (h) Ri-

Answers. 0.680; 708 kfi

4.8 Common-drain and common-gate biasing

After discussing bias circuits for the common-emitter configuration, it was

same circuit to the case of the com-

a relatively simple matter to extend the
mon collector and common base. In actuality, all that had to be changed
was the location of the by-pass capacitor, and we have not even shown
that element in our circuit diagrams as yet.
A similar situation exists for the common-drain and common-gate FET
circuits. Aftera quick referral to our most general biasing circuit for the
common-source case. Figs. 4.15c, 4.16a, and 4.17Z7, it is a simple matter
to determine that the common-drain circuit of Fig. 4. 19fl for an n-channe l
JFET differs only from the common-source circuit in having Rp = .

The common-gate JFET circuit is shown in Fig. 4. 196. A signal ground

will be achieved at the gate by placing a large capacitor across ^2- If the
temperature change is no problem and there is no great variability among
the transistors to be used in the circuit, or if it is hand-tailored for a spe-
cific unit, the desired operating point may often be obtained without us-
ing i^i and ^2 (^1 = 00, H2 = 0). Doing so, however, may cause Rss to be
such a small value that much of the signal is shunted to ground. The use of
Ri and R2 makes the gate positive with respect to ground and permits the
use of a larger value of Rss •

The circuits of Fig. 4.19 are also applicable to IGFETs and MOSFETs,
either depletion- or enhancement-mode. One must of course be careful to
provide the proper bias polarities and to maintain operation in the region
beyond pinch-off.

D4.9 An n-channel enhancement-mode MOSFET is to be operated in a

common-gate circuit. Fig. 4.19b. With fij = 3^2, Vdd = 24 V, /C
 1

152 Designing for a stable operating point

'DD dv.

€ <^ss
VVr,

(a) ib)

Fig. 4.19 (a) A general dc bias circuit for an n-channel JFET that is operated com-
mon drain, (b) The general bias circuit is shown for the common-gate arrangement. A
large by-pass capacitor is used across ^2 under signal conditions,

= 8 mA/V2, and V^ = 3 V, (a) select Rss so that /d = 5 mA. (b) Select Rd

so that the voltage across it is five times V^s. (c) If K doubles and Rss is
unchanged, by what factor does Iq increase?

Answers. 376 Q; 3.69 kQ; 1.145

Problems
1. Modify the design example in Section 4.1 (which uses a 2N5377 tran-
sistor) touse a smaller amount of negative feedback by selecting the
voltage across Re to be only one-quarter of Vce- Maintain Vcc = 25
V and Iri = 50 b to facilitate comparison of results, (a) Use the most
accurate analysis to find Ic, Ib^ and Vce for the extreme cases iSdc(min)
= 100 and /3dc(niax) = 500. (b) Repeat Part (a) if Ibi = 10/^.
2. A transistor with 35 < jSjc ^ 70 is used in the circuit designed in Sec-

tion4.1 (Vcc = 25 V, fie = 15 kfi, fi^ = 5 kfi, fio = 11.5 kfi, and fii
= 38.7 kfi). Determine Ic and Vce for the minimum value of ^^c- Let
Vbe = 0.65 V.
3. For the circuit shown in Fig. 4.20, let Re = R2 = ^ k^, and «£ = 2
kfi.Calculate Ic and Vce for (a) 13^, = 50, (b) p^, = 500. (c) Select
other values for fie. ^£» and fio so that 1.9 < /c :^ 2.1 and 3.5 < mA
Vce ^ 5.5 V for 50 < 0^, < 500.
4. Let I CEO = - 1 mA and Vbe = - 0.65 V for a pnp transistor operating

Sit Ic = - 2.5 mA, Vce = - 8 V. Design a circuit that will give Ic

= - 2.5 mA within ± 0.1 mA for 50 < (3^^ < 150.
5. Let Vbe = 0.65 V for a 2N5376 transistor (on the 2N5377 data sheet)
operating at /c = 1 mA, Vce = 5 V at 25°C. Specify values for Ri,
R2, Re, Re, and Vcc in a bias circuit if Ibi = 20/^.
Problems 153

> 24 V

36 kn

Fig. 4.20 See Problem 3.

6. Let Ri = 50 kfi, R2 = 20 kfi, «£ = 4 kfi, /?c = 8 kQ, and Vcc

= 28 V in the circuit of Fig. 4. la. If Iqeo = 8 A, find /c and Vce i^
/>t

(a) iSdc = 30 and Vq = 0.6 V, (b) /3dc = 300 and Vq = 0.6 V, (c) p^c
= 30 and Vq = 0.7 V. (d) Select other values for Hi, flc, and Re so
that/c = (1.5 ± 0.1)mAand Vc£ = (9 ± 1) Vif30 < 13^^ < 300 and
Vo = 0.6 V. (e) Select other values for Hi, He, and H^ so that Ic
= (1.5 ± 0.1) mA and Vce = (9 ± 1) V if 30 < 0^^ < 300 and 0.5
< Vq < 0.7 V. Assume that any combinations of values for /^^c and Vq
may occur.
7. In the basic circuit of Fig. 4.1a, let Hi = 40 kQ, H2 = 10 kl2, Re
= 5 kQ, Re = 18 kfi, Vcc == 24 V, i^dc = 250, Vq = 0.65 V, and Rbb
= 10 kl]. Assume that /c£o is negligible, (a) Find Iq and Vce- (t>)
Increase or decrease each resistor independently by 10 % to maximize
Ic; calculate the percentage change in Ic for each case, (c) Increase or
decrease each resistor independently by 10% to minimize Vce; calcu-
late Vce for each case.
8. Let Hi = 40 kQ, H2 = 10 kfi, H^ = 5 kfi. Re = 15 kQ, Vcc = 25 V,
i3dc = 100, Vo = 0.7 V, Hbb = 8kQ, and /ceo = for a circuit of the
form shown in Fig. 4.1a. (a) Find /^ (b) Determine worst-case values
.

for Ic if Vq, HfiB, and i^dc are each subject to a ± 10% error. Assume
^cc ? and the circuit resistance values remain constant.
I CEO ?

9. Figure 4.21 shows a circuit similar to that found in many audio am-
plifiers. The signal components are not shown. Let /^ = 1 mA, Vce
= 5 V, iSdc = 50, and Vbe = 0.6 V for Tl, while /c = 2 mA, Vce
= 10 V, iSdc = 100, and Vbe = 0.65 V for T2. If Vre = Vce for Tl,
determine values for Rei, Hci, Re2^ ^02, and Rp, in that sequence.
10. Let Vcc = 24 V, Hi = 60kQ,H2 = 20 kl2. He = 5kQ, and Re = 3kl2
in Fig. 4.1a. At 25°C, /^dc ranges from 100 to 400, while Vq lies be-
154 Designing for a stable operating point

^ Vrr = 25 V

Fig. 4.21 See Problem 9.

tween 0.65 and 0.75 V. In the temperature range from -45 to

115°C, let 0dc equal the value at 25°C times [1 + 0.003 (T - 25)],
where T is in degrees Celsius, and also let Vq = Vo(25°c)[l ~ 0.002 (T
- 25)]. Neglect I ceo ^^^ ^^^^ the maximum and minimum values of
Ic and VcE for -45 < T < 115°C.
11. Select new values for R^ and Ri in the circuit of Problem 10 so that
^c(max) = 1-8 mA and Ic{min) — 1-65 i^A. Do not make any other
changes in the circuit.

12. In Fig. 4. la let l?i = 80kfi, i^2 = 40kfi, «£ = 3kfi,flc = 4 kfi, and

Vcc = 15 V. The variation of /^dc with temperature for the transistor

is given by /3dc = ^dc(25°c)[l + (T - 25)/450], where 150 < 0dc(25°c)

< 350. Also, 0.6 < Vo(25°c) ^ 0.7, and Vq = Vo(25°c)[l - (T - 25)/
300], where T is in degrees Celsius. Assume I ceo ^^^ I^bb may be ne-
glected. Determine /c(niin) /c(max) VcEimin) and Vc£(max) if the unit is
, , ,

to operate from - 50 to 150°C.

13. Specify different values for JR2 and Problem 12 so
/^£ in the circuit of
that 1.2 < Ic ^ 1.4 mA under all conditions. Other values in the
circuit are unchanged.
14. A certain transistor is installed in a standard bias circuit with Re
= Re = 4 kfi, Ri = 50 kfi, ^2 = 30 kQ, and Vcc = 16 V. Assume
that IcEo is negligible and that j^dc and Vq may be represented by (3^^
= 200(T/298)0^ and Vq = 0.65(7/298) "^ 2 y in the temperature
range of interest. Values for T are in kelvins. (a) Find Ic and Vce at
25°C. (b) Find /c(min), ^C(max), VcEimm), and Vc£(max), and the temper-
ature at which each occurs if 213 < T < 423 K.
15. Using data furnished in Appendix A for the FD600 diode, determine
(a) Poimax), Tao, and Tj^^^^y, (b) the thermal resistance Oj^. (c) What
Problems 155

would the junction temperature be when /^ = 200 mA for a "typical"

diode operating in an ambient temperature of 50 °C?
16. Refer to the data on the FD600 diode and answer the following ques-
tions: (a) How much power can the device dissipate safely in boiling
water? (b) How much power can it dissipate safely at -25°C? (c)
What would the junction temperatul-e be for a "maximum" unit oper-
ating at 25°C with Id = 200 mA?
17. A maximum allowable junction
transistor data sheet states that the
temperature 160° C, the maximum allowable dissipation is 200
is

mW, and the transistor should be derated above Tc = 25° C. If Bch

= 0.2°C/mW and Oha = 0.4°C/mW, find the ambient temperature
and the temperature of the heat sink when (a) 200 mW
is being dissi-

pated and Tc = 25°C, (b) 200 mW

is being dissipated and Tc

= 0°C, (c) as much power as possible is being dissipated and Tc

= 100°C.
18. Typical thermal data for an operational amplifier might be as fol-
lows: "Total device dissipation at T^ = 25°C is 750 mW; derate
above 25°C, 5 mW/°C." What power may be dissipated safely at an
ambient temperature of (a) 75°C? (b) 0°C? (c) If Ojc is 0.15°C/mW,
what is Oca ?
19. A power-derating curve for a power transistor is shown in Fig. 4.22.
If e^^ = 3°C/W, find (a) Sj^, (b) Ojc. (c) What is the maximum safe
value of Pd if T"^ = 125°C? (d) How much power may be dissipated
safely if Tc = 125°C?
20. A thermal equivalent circuit has Oha = 0.3°C/mW, Bch = 0.1 °C/
mW, and djc = l°C/mW for a certain transistor, (a) If the unit dissi-
pates 0.1 W
into an ambient temperature of 35°C, find Tj, Tc, and
Th. (b) If Tj = 170°C with T^ = 50°C, find Tc and P^-
21. (a) Design a stable biasing circuit for a 2N5089 transistor if /^ = 2

± 0.1 mA and Vce = 5 ± 1 V for - 55 < T < 125°C. Use Vcc

Fig. 4.22 See Problem 19.

104

25°C 150°C
 5

156 Designing for a stable operating point

= 18 V and assume that Vbe = 0.7 V at 25° C and decreases linearly

by 2.3 mV/°C. (b) Find the junction temperature at T^ = -55°C
and 125°C.
22. Design a common-collector circuit that will provide a stable operat-
ing point at /c = 3 mA, Vce = 4 V, for a transistor having the pa-
rameters 80 < i3dc < 300, 2 < IcEo ^ 10 fiA, 0.6 < Vq < 0.7 V. Let
V,cc 12 V.
23. Select values for Ri,R2,Re, and Vcc to provide an operating point at
Ic = 0.2 ± 0.02 mA, Vce = 2.5 ± 0.5 V for a common-collector
circuit using a transistor for which 100 < /5dc ^ 400, 1 < I ceo ^ ^
fiA, and 0.63 < Vq < 0.73 V. Use Vcc = 6 V.
24. Let Vq = - 0.7 V, Iceo = - 60 nA, and j^dc = 60 for a pnp transistor
that is to be operated with Ic = - 20 mA and Vce = - 5 V. (a) De-
sign a common-collector bias circuit using Vcc = - 12 V and I^i
= 15/b. (b) Design a common-base circuit with Vcc = - 15 V, I^i
= 15/b, and Vre = Vce-
25. Let Vo = 0.7 V, Rbb = 10 kfi, /ceo = 0.1 ^tA, and jSjc = 50 for an
npn transistor that is to be operated at /f = - 1 mA and Vcb = 4 V in
a common-base configuration, (a) Let Vcc = 2. Vce, V^e
= 0.8Vc£,andi?2 = 20 kO. Specify values for Vcc, Hi, Hf, and JRc-
(b) Calculate /g if /3dc = 500.

26. The two transistors used in a current mirror are characterized by jSdc
= 40, Vo = 0.7 V, and i^ SB = lOkQ. Iffii = 2.5kfi,i?c = 2kfi, and
Vcc = 7.5 V, find Vce ^^d Ie for both transistors.
27. (a) At 25°C let both transistors in the circuit of Fig. 4.23 have Vq
= 0.6 V, Rbb = 10 kQ, and i^dc = 100. Specify Ri and Re if Vcc

Fig. 4.23 See Problem 27

Vcc A

"O t> Tl
Problems 157

7T

T\

(>-r<) T2

^a\ ^^1 ^c| \h

T cc

Fig. 4.24 See Problem 28.

= 9 V and the operating point for T2 is at Ic2 5 V. = 1 mA, Vce2 =

(b) Assume that dVo/dT = - 2 mV/°C
for the transistors, while jSjc
and Rbb are temperature-independent. Also let both resistors have a
TCR of + 1500 ppm/°C. Find Ic2 at 75°G.
28. Two pnp transistors appear in the I-C shown in Fig. 4.24. (a) Assume
that Rbb is negligibly small and derive a relationship between Ip and
Ia . (b) If If = 1.5 mA, Vcc = - 6 V, /3dc = 25, and Vq = - 0.65 V,
findi^i.
29. Let Vo = 0.65 V, Rbb = 10 kfi, and jSdc = 100 for the npn transistor
in Fig. 4.25, while Vq = - 0.6 V, Rbb = 8 kQ, and jSdc = 25 for the

Fig. 4.25 See Problem 29.

l6V

i
<3kI2

6V
158 Designing for a stable operating point

Fig. 4.26 See Problem 30.

pnp unit, (a) Determine /. (b) If d\ Vo\/dT = - 2 mV/°C for each

transistor, while the TCR
1500 ppm/°C for the
is resistor, calculate
dl/dT in microamperes per degree Celsius.
30. (a)Neglecting the effects of Rqb for the three identical transistors in
Fig. 4.26,show that Ic/h = I3^j[0do + 2/(/3dc + 1)]. Calculate Ic
and VcE2 if ^i = 5 kfi. Re = 1 kfi, Vq = 0.65 V, Vcc = 9 V, and
^dc = (b) 50, (c) 500.
31 Element values for a JFET in a standard four-resistor bias network
(Fig. 4.15c) are Ri = 150 kfi, ^2 = 50 kO, Rss = 3 kQ, and Rd
= 2.5 kQ. Let V^d = 16 V. If /^^ = 5(1 + 0.25 Vgs)^ mA for the
transistor, (a) find Iq and V^s (b) Find I^ if all four resistors decrease
-

20% in value.
32. The JFET in a standard bias circuit (Fig. 4.15c) is guaranteed to
have a transfer characteristic bounded by the parabolas I^
= 5(1 + 0.25 Vgs)^ and /^ = 2(1+ 0. 5 Vgs) ^ mA. Specify values for
Ri,R2, Rss, and Rd so that 2 < /^ < 2.5 mA for Vdd = 16 V.
33. Let i?2 = 40 kfl, Rss = 4 kfl, and V^d = 20 V in the circuit shown in
Fig. 4.27. (a) IUd = 1.28(^05 + 2.5)2 mA, find Id and Vds- (b) By
what percentage does Id increase if Vdd increases 10%?
34. Let Vdd = 24 V in Fig. 4.27, and let the JFET have a transfer charac-
teristic lying between /^ = 1.28 (Vgs + 2.5)2 and /d = 0.75 (Vgs
+ 4)2 mA. Select values for ^2 and Rss so that l.S < Id ^ 2 mA.
35. In Fig. 4.28, let jRj = oo and the JFET transfer characteristic be Id
= 2(yGs - Vp)2 mA, where - 3 < Vp < - 2 V for different transis-
tors in a given lot. (a) If Vdd = 12 V and Rss = 400 Q, find the maxi-
mum and minimum values of Id and Vds (b) Select values for Vdd
-

and Rss so that 2.5 < /^ < 5 mA and operation is beyond pinch-off.
36. Let Vdd = 15 V in Fig. 4.28 and use a JFET for which Id = 2(Vgs
- Vp)2 mA, where - 3 < Vp < - 2 V for different transistors of the
Problems 159

120kn

Fig. 4,27 See Problems 33 and 34.

same type. Select Rss and Ri so that 4 < Z^) < 5 mA and operation is
beyond pinch-off.
37. For the transistor in Fig. 4.29, = 10(0.5^05 - 1)^ mA. The
let 7^
total resistance of the potentiometer is Ri + H2 = 100 kO, and the
ratio of R2^o R\ may be continuously adjusted, (a) What is Id when
Ri = i?2? (b) At what position of the potentiometer is the transistor at
the boundary between pinch-off and the ohmic region? (c) At what
position does the power dissipated by the transistor reach a maxi-
mum?
38. An n-channel enhancement-mode MOSFET has a transfer character-
istic given by I^ = 2.^h{VQs - 2h)^ mk, where h may range from 1

to 1.5 for different units of the same type. Using Vj)d = 20 V and R^
= 1.2 kfi, design a bias circuit for the common-source configuration
so that 9 < /£) < 10 mA for any unit and operation is beyond pinch-

off.

39. The transfer characteristic of an n-channel enhancement-mode

MOSFET is bounded by curves for which K^ = 200 /xA/V2, Vji

Fig. 4.28 See Problems 35 and 36.

1.5 kfi

200 kn
160 Designing for a stable operating point

24 V

4kJ7

100 kn

4kn

Fig. 4.29 See Problem 37.

= 0.5 V, and K2 = 100 /xA/V2, y^^ = i y. (a) Using Vdd = 15 V,

design a bias circuit so that I^ = 100 /xA ± 20%. (b) What is the
maximum possible value of Rq in your circuit that will permit satu-
rated operation?
40. Let K = 100 fiA/V^ and V^ = 1.3 V for the transistor in Fig. 4.30.
Find Vout if Vi„ equals (a) 5 V, (b) 0.5 V, (c) 2.5 V.
41. In Fig. 4.31, let Xj = 200 fiA/V^ and Vn = 1.5 V for Tl, while K2
= 200 /xA/V2 and Vp2 = - 4 V for T2. Calculate Vout for V^^ = (a)
5V, (b)0.5V.
42. In a common-drain circuit (Fig. 4.19a), /£> = 6 mA, Ri R2 = I -\-

MQ, Vdd = 15 V, and the FET dissipates a total power of 54 mW.

Select values for Ri, R2, and Rss if the device is (a) an n-channel

Fig. 4.30 See Problem 40.

.5 V

50 ka
Problems 161

A5 V

Fig. 4.31 See Problem 41

enhancement-mode MOSFET for which /o = 1.28(^05 - 2.5)2 mA;

(b) an n-channel JFET having /o = 1.28(Vgs + 2.5)2 mA.

43. Using the common-drain circuit of Fig. 4. 19a, let V^d = 20 V and Hj
= 1 Ml]. The transistor is an n-channel enhancement-mode
MOSFET for which /o = 2.^h{Vcs - 2^?) 2 m A in the region beyond
pinch-off, where 1 < Z? < 1.5 for different units of the same type.
Select values for R2 and jR ss so that the slope of the transfer character-
istic is greater than 12 mA/V at the operating point for any possible
transfer characteristic.
44. Let Ri = 150 kfi, fig = 200 kQ, and R^ = 16 kfi in a common-gate
bias network of the form shown in Fig. 4.19i>. If the transfer charac-
teristic of the p-channel JFET is given by /^ = -2 AVqs - 2Vgs^
-I-

mA, specify values for V^d and Rss so that Rj^ dissipates 4 mW and
the FET dissipates 2 mW.
45. The transfer characteristic of an n-channel depletion-mode MOSFET
is IJ) = (Vgs 2.5) 2 mA. If the unit is used in a bias circuit similar to
-I-

Fig. 4.19Z?, with Vj)r, = 21 V, R^ = 6 kfi, Rss = 5 kfi, R^ = 250 kfi,

and R2 = 100 kQ, find (a) //), Vqs, Vds, and the total power dissi-
pated in the complete circuit. To reduce Ijy to exactly 1 mA, what
single change of value in the given circuit should be made for the resis-
tor (b) Hi, (c) H2, (d) Rss'^
46. An n-channel has Ij:)ss = 5
JFET mA
and Vp = - 1 V. It is used in a
circuit in which the drain is connected directly to the V^q voltage
supply, the gate is connected directly to the source terminal, and the
source is connected to ground through Rss = 1 kQ. Find the voltage
across Rss if Vdd = (a) 18 V, (b) 12 V, (c) 6 V. (d) Which of the
following is a logical name for this circuit: source follower, gate fol-
lower, constant-current source, voltage regulator, Bruce?
 Small-signal circuit models

We have spent enough time on do models for the various types of transis-
tors to enable us to find any operating point by analysis or provide any
operating point by design. We must now turn our attention to the central
problem of providing the desired signal response.
In this chapter we restrict the class of signals to those having such small
amplitudes that the transistor characteristics may be approximated as lin-
ear in the active region. With this assumption of linearity, it is then possi-
ble to use superposition to break the complete problem into two separate
parts: the already completed dc or bias problem, and the ac or small-sig-
nal problem, which we now consider. Devices operating on small signals
are found in almost every electronic system, such as preamplifiers and op-
erational amplifiers, for example, and they are therefore of major impor-
tance.
There are two quite similar models that are widely used for the bipolar
transistor atlow frequencies. We shall spend the major portion of our time
on one known as the hybrid-ir model, but we will also study the h-parame-
ter model and investigate the relationships between the two. The ^-pa-
rameter model is used primarily f or bipolar transistors at low frequenc ies.
As frequency increases beyond perhaps 10 kHz, the hybrid- tt model proves
to be much more convenient, both for the bipolar transistor and the FETs.
The hyb rid- TT model is useful at both low and high frequencies. Some use
is made of the y-parameter model for the FET, particularly in measured

data provided by the manufacturers. We shall relate these data to the hy-
brid- tt parameters.
The values of both the passive- and active-circuit elements appearing in
any of the small-signal models are functions of more different variables
than we would prefer. Just as the dynamic resistance of the semiconductor
diode varies with the operating point, so do the dc voltages and currents
have a major effect on transistor equivalent circuits.
We have already seen that temperature can effect large changes in the
transistor dc characteristics; even if we are successful in maintaining a
fixed operating point, the small-signal circuit parameters are still func-
tions of temperature. The effect of frequency is also extremely important;
it employ more sophisticated
will force us to circuit analysis techniques
than we have needed up to this time.

162
5.1 Bipolar transistor hybrid-ir models: small-signal low-frequency 163

All thesemodels apply only to the active region of the bipolar transisto r
or to the saturation region for the FET Of course, these are also the only
.

regions in which large signal gains can be achieved.

5.1 Bipolar transistor hybrid-7r models:

small-signal low-frequency

Throughout this chapter we our attention to small-signal

shall limit
models. By this we mean that the transistor never operates very far from
its dc operating point. It is difficult to give a general quantitative defini-

tion of small, but the signal currents and voltages are often kept less than
one- tenth the dc operating-point values.
In this section we consider small-signal low-frequency transistor
models. For our purposes, a frequency is sufficiently low when all capaci-
tive reactances associated with the transistor model are so large in com-
parison with other impedances that they may be considered to be open
circuits. Inductive reactance is usually not a part of a transistor model.
We find that capacitances in the transistor model can usually be neglected
in amplifiers used in audio or instrumentation systems but must usually be
included when frequency components above several hundred kilohertz
are present.
A number of small-signal low-frequency bipolar transistor models have
been developed and used. We shall emphasize the hybrid- tt model show n
in Fig. 5. 1, but we shall meet the /i-parameter model for the bipolar tran-
sistor in Section 5.6, and the t/-parameter model will appear when we dis-
cuss high-frequency models for FETs. The model shown in Fig. 5.1 is ac-
tually only a tt network (with the horizontal branch missing), and the
complete hybrid- tt model differs from it in having an additional series re-
sistance in the base, as well as the missing branch from base to collector.
This will become clearer when we consider the high-frequency case in the
next section; all elements then appear. The model is shown in the com-
mon-emitter arrangement and is identical for npn and pnp transistors.

Fig. 5. 1 The small-signal low-frequency hybrid- tt model for both npn and pnp bipo-
lar transistors. The resistor r^ is sometimes omitted since it is usually much larger than
the external impedance levels.

Bo- -oc

^ ^y^d^

Eo- -OE
164 Small-signal circuit models

We shall investigate the range of values for these elements in the low-
frequency equivalent circuit and the effect of temperature, frequency,
and the choice of operating point on them later, but it might be helpful
now to know that a typical set of values could be r^ = 4 kfl, g^ = 50 mU,
and Td = 100 kQ. Note that these are signal parameters and therefore
carry lower-case subscripts.
The model in Fig. 5. 1 is a linear model; we are able to use such a model
in spite of the greatly nonlinear nature of the transistor characteristics be-
cause only small- amplitude signals are present. In a sufficiently small
neighborhood of the dc operating point, the characteristics are well ap-
proximated by straight lines. The dynamic resistance appearing in the ac-
equivalent circuit of the diode is a similar example.
As an illustration of the use of the hybrid- tt model, let us find the signal
gain

Av = MI
Vsit)

for the basic common-emitter amplifier shown in Fig. 5.2a. Our first step
is the construction of the ac-equivalent circuit. If Vs{t) = 0.001 cos 500^

Fig. 5.2 (a) A simple common-emitter small-signal amplifier, (b) The low-frequency
small-signal equivalent circuit.

vAO
vM)

(a)

u,(o(?) R, Rc-Rl ^o(n

Sm^

E
5.1 Bipolar transistor hybrid-Tr models: small-signal low-frequency 165

volts, we may use the small-signal low-frequency model for the transistor,
because Vbe is typically 0.7 V and 500 rad/s is small enough to allow the
transistor capacitances to be neglected. Since the total solution is arrived
at by superposition, we have to replace all the dc sources by their internal
impedances in order to obtain the ac equivalent of the external circuit.
Thus, the transistor model is placed in an external circuit in which all the
dc voltage sources are replaced by short circuits, as illustrated in Fig.
5 2b. The resistor jR^ now goes from the base to signal ground (here also
the emitter), while the load resistor Re is connected between collector and
signal ground. Capacitor Cj is present to avoid having the signal source
affect the dc operating point by providing a low-resistance path to
ground. In ^ similar fashion, C2 prevents a following amplifier stage or
load from affecting Vce These c apacitors are often called dc-hlockin^ c a-
•

pacitors or coupling capacitors At 500 rad/s, each should be large enough

.

that its reactance is much less than adjacent resistance values. It may then
be represented by a short circuit in the ac-equivalent circuit. assume We
that fj is large enough to be neglected.
The calculation of the voltage gain is now a straightforward circuit-
analysis problem. If we indicate the parallel combination of Rb and r^ as
Hj5 II
r^ , then voltage division gives us

^r = Vs{t)
Rb\K + R.

The output signal voltage is

or

/ V ^ Rr » r^

Thus

Typically, we try to design the circuit so that jR^ » r^, thus avoiding any
loss of signal in R^ The load
. resistor Rc{= ^l) is made as large as possi-
ble for the same reason.

D5.1 Calculate the voltage gain Ay for the amplifier of Fig. 5.2a if g^
= 50 mO, r^ = 2 IcQ, R, = 100 Q,Rl = 5 kQ, and (a) H^ » r^, r^ » H^^;
(b) Rb = 10 kl2, rd »
Rl; (c) Rb = 10 kQ, r^ = 50 kfi.

Answers. -238; -236; -214

 .

166 Small-signal circuit models

5.2 Bipolar transistor hybrid-7r models:

small-signal high-frecjuency

As the frequency increases, the voltage gain that we calculated at the

lower frequencies begins to decrease as a result of the presence of internal
capacitance and resistance in the bipolar transistor. A new model is
needed that includes these effects; we will adopt the hybrid-7r mo del
shown in Fig. 5.3 One resistor, r^, and two capacitors, C^ and C^, have
.

been added to the low-frequency model.

The capacitor C^ represents fairly well the collector-to-base capaci-
tance of that reverse-biased junction; it is similar to the junction or deple-
tion capacitance Cj of the reverse-biased diode. On the other hand, C^ is
similar to the diffusion capacitance C^ present across a forward-biased
diode, here represented by the emitter-base junction. We shall find that
C^ is usually much larger than C^ a relationship that is also true for the
,

diode capacitances. Typical values are C^ = 2 pF and C^ = 200 pF.

The resistance r^ is sometimes called the base spreading resistance and ,

it represents the resistive path between the external ohmic contact to the

base (at B) and the active base region (at 5 ) An alternate symbol for r^ i s
'
.

rijh' A typical range of values for r^ is 20 to 200 0.

Other capacitors and resistors may be added to the model to provide
greater accuracy, but their values are not usually given on most data
sheets and they are difficult to determine experimentally.

D5.2 Let = 40 fi, r^ = 2 kfi, C^ = 100 pF, C^ = 2 pF, and g^ = 40

f^

mU for the model of Fig. 5.3. Assume that r^ is very large. Short-circuit
the collector and emitter terminals and find the input admittance when o)
equals (a) 0, (b) 20 Mrad/s. (c) If Yjn = Gjn /coCin, what is Qn when o^ =
-i-

20 Mrad/s?

Answers. 490 /xU; 646 + /1948 fiU; 97 A pF

Fig. 5.3 The small-signal high-frequency model for the bipolar transistor contains
three more elements than the low -frequency model: r^, C^, and C^.
'x or ^&e B'
oC

Eo
5.3 Low-frequency bipolar-model parameter values 167

Low-frequency bipolar-model
parameter values
The were introduced in Section 5.2 con-
small-signal circuit models that
tain three resistors, r^, r^, two capacitors, C^ and C^, and one
and r^,
dependent-source parameter, g^^. The values of these six quantities de-
pend on the particular operating point used for the transistor and on the
temperature. In this section, we will try to discover the basic dependence
of r^ and g^ on the dc operating point. We
will also obtain a numerical
value for r^ so that we can make an informed decision about whether or
not to include it in our model. We
assume room-temperature (25 °C) oper-
ation at audio frequencies (oj < 10^ rad/s).
One quantity provided on transistor data sheets enters strongly into the
relationships among the element values of the equivalent circuits. It is the
small-signal short-circuit current gain,^ jS or /ly^:

(2)
Upg = or vq^ = constant

where % and i^ are directed inward at the transistor terminals and the
lower-case subscripts again identify the (small) signal components. The
fact that x)ce = or Vqe is constant simply indicates that the output termi-
nals of the small-signal equivalent circuit are short-circuited. A large ca-
pacitor from collector to emitter in the amplifier circuit can provide this
short circuit for the signal.
We shall indicate the ow-frequency value of jg as jS q From the charac-
l .

teristics given for the 2N5088 transistor (in Appendix A), we see that hj^
( = /3o) may vary between 350 and 1400 at the operating point
/c = 1 mA,
''
VcE = 5 V. These values are given under Dvnamic Characteristics " and
should not be confused with those for h^^ ( = ffdc) given under *'On Cha r-
acteristics."
From the model in Fig. 5.1, we can see that

r^ = (3)
tb

For our model, it is not necessary to add the restriction Vce = 0, but a more
complex model might contain a dependent source in series with r^ where ,

the source controlled by Vce- From this same circuit of Fig. 5.1 we may
is

also define g^ quite easily if we again s hort-circuit the output terminals ;

&m (4)

The subscript-naming system for the /i-parameters will be described in Section 5.6.
168 Small-signal circuit models

By comparing Eqs. (2), (3), and (4), we discover a simple, important rela-
tionship between r^ , g^^, and jSq :

gmT^ = /3o (5)

We now need to find a value for either g^ or r^ and then a value for ^q ,

will allow us to evaluate the remaining parameter. Consider Eq. (4) once
again. This is simply the dynamic conductance (slope) of the ic-ys.-VsE
characteristic for the pertinent value of Vce a similar conductance was ;

found for the diode in Chapter 1 Up to this time we have not seen any plot
.

of ic vs. Vbe, but one can be obtained easily, since ic is simply jSdc^B ii^ the
active region if I ceo is negligible. Curves of ic vs. Vbe are thus identical in
form to the input characteristics is vs. Vbe, differing from them only in a
change in the scale of the ordinate. Recall that these input characteristics
are essentially identical once Vce is greater than about 1 V. One of these
|
I

characteristics is given quite accurately by the diode equation [Eq. (1)] of

Section 1.1, modified by selecting appropriate subscripts for an npn tran-
sistor:

The slope is

die
&m {vcE constant)
dv BE OP Vbe n^T
Since Ic is positive for an npn device and negative for the pnp unit, while
g^ itself is always positive,^ we usually write

For n = 1, T = 25°C, we find that

g^ = 38.92 /c 1

When \Ic\ is 1 mA, g^ is about 40 mU. If l3o = 200 when \Ic\ = 1 mA,
then r^ = 5 kO.
The functional dependence of g^ on the operating point is shown
clearly by Eq. (6); it is directly proportional to the magnitude of the col-
lector current throughout the active region.
Now let us consider jSq . we might say that ISq is
As a first-order result,
constant; certainly it by a factor of five as g^ would if Ic
will not increase
changed by that amount. However, it may change by a significant
amount, as indicated by the two curves shown in Fig. 5.4. The upper
graph shows a typical variation of ISq with collector current, while the

2g^ = ic^He = ^ic'^^BE and an ' increase in v^e (either less negative for pnp or more positive for
npn) always leads to an increase in t^ (less negative for pnp or more positive for npn).
5.3 Low -frequency bipolar-model parameter values 169

^0

300

200

100

oWA 1 2 5 10 20 l/^KmA) (log)

(a)

/3o

240 -

220 =- -

Y^ m A
200 , l/( 1

180 -
^
10 12 WceI (V)
(^)

Fig. 5.4 The variation of (3q with /c

(a) |
I
is shown for Vce |
I
= 1 V. (fe) A curve of jSq
vs. I
Vce for /c = 1 mA.
I I I

lower one illustrates the effect of changing Vqe Both curves indicate that •

jSo = 200 at /c =1 mA, Vce I

= 1 V; they also show that Pq increases
I
|
I

from 200 to 250 as \Ic\ increases from 1 to 2 mA with Vce = 1 V, and |

I

that /3o increases from 200 to 208 as Vce increases from 1 to 4 V when |
I

\Ic\ =1 mA. Combining these results, we calculate jSq at |

/c |
=2 mA,
I
Vc£ I
= 4 V as 250(208/200) = 260.
We next consider r^ To determine its value, we note from Fig. 5. 1 that
.

it is the resistance viewed from the output (C-E) terminals with no input
signal present (i?^ =
In our model this occurs when the input (base) is
0) .

either short-circuited or open-circuited.The information commonly pro-

vided by the manufacturers is listed as the open-circuit common-emitter
output admittance hoe-

h = -^
ib =
 ^

170 Small-signal circuit models

Therefore,

rd = (7)
1^ = "oe

For a 2N5088 transistor, the from 14 to 40 /xO (at /c = 1

range of h^e is

mA, VcE = 10 V). Thus, rj lies between 25 kQ and 71 kQ.

If we use graphic techniques to find a value for r^, we see from Eq. (7)
that the reciprocal of the slope of the output characteristic (Ic vs. Vce)
it is

at the operating point. This is illustrated in Fig. 5.5. Since the tangent line

is almost horizontal, it intersects the ordinate at approximately the value

Ic has at the operating point. If the straight linecontinued to the left, it is

intersects the abscissa at Vce = ~ ^a where V^ is a positive quantity

.

known as the Ea rly voltage This intercept is approximately the same for
.

any of the output characteristics, and therefore r^ is given by the ratio of

the two intercepts:

Typical values of the Early voltage for integrated circuit devices and dis-
crete transistors liebetween 25 and 300 V.
The dc model developed in Chapter 3 (Fig. 3.4) includes a resistance Rq
that is also the reciprocal of the slope of an Ic vs. Vce curve, and thus r^
= Rq when the transistor is operating in the active region .

To illustrate the determination of the element values for the low-

frequency equivalent circuit and its use in finding the gain of an amplifier,
consider the circuit and data provided in Fig. 5.6. We are asked to find the
amplification obtainable from this common-emitter circuit. The input
signal is only 1 fiY in amplitude at a frequency of 1000 rad/s, and our
problem therefore involves calculations with the small-signal low-
frequency equivalent circuit. However, to find appropriate values for r^
and gm we need to determine the dc operating point. Without drawing the
dc-equivalent circuit, we may follow the procedures used in Section 4.1.

Fig. 5.5 In the active region, tangents to the output characteristics all intersect the

Vce axis near Vce = - ^a- Then, r^ = V^l\lc\ q.p. •

(Slopes are exaggerated)

Slope =^ _^- r^^^H— 0*?"

,,,,,'3:'- i
— 1--^-.^ — =1
) Vce
5.3 Low-frequency bipolar-model parameter values 171

15 kfi
1.935 Mn

Large
^^
Large

300 n \^^<) ^dc

"dc
= 100

Fop. = 0.65 V

©•• cos lO^r juV

Fig. S.6 An amplifier whose low-frequency gain is to be calculated.

The base current is

20 - 0.65
^^= =^^^^
1.935

This leads to

Ic = /5dc/B = 100(10-5) = 1mA

Finally, we pin down the operating point by calculating

VcE = 20 - 15(1) = 5 V J
Now that we know Ic and Vce our next move is to the^atajsheets for the
>

particular transistor used. Let us assume that we find jSq = 110. Using the
value of the collector current, we find gj^ :

gm = 38.92 X 10-3 = 38.9 mU -^ lf^'^*^^ Zc^kio^ 6

for r = 25°C. Then
110
^0
g; 38.92
X 103 = 2.83 M
We may now find the signal voltage gain:

2.83
= -38.9 X 10-3 X 15 X 103 528
2.83 + 0.3

This short example illustrates the typical three-step procedure used in

calculating the gain of an amplifier :

1. Determine the operating point so that values for the small-signal pa-
I
' rameters may be calculated.
172 Small-signal circuit models

18 V

4kn
"1.5 Mn
^^
©
Large Large

= 160
600 n Vo /3dc

r=25°C

Fig. 5.7 See Problem D5.4.

2. With an appropriate model replacing the transistor, construct the ac or

signal-equivalent circuit.
3. Find the gain by standard circuit analysis techniques. It can often be
w^rittenby inspection from the equivalent circuit.

D5.3 If Va = 80 V and the data of Fig. 5.4 apply to a certain npn tran-
sistor, determine values for r^ and r^ if (7^, Vce) equals (a) (5 mA, 1 V),
(b) (1 mA, 5 V), (c) (2 mA, 10 V).
Answers. 1.5, 16; 5.4, 80; 3.5, 40 kQ.

D5.4 Find the signal gain Vo/Vs for the amplifier shown in Fig. 5.7 if jSq
= 180 and (a) n = 1, (b) n = 1.5, (c) n = 1.5 and V^ = 75 V.
Answers. -232; -165.5; -150.7

5.4 High-frequency bipolar-model

parameter values
The high-frequency model for the bipolar transistor (Fig.
small-sign al
5.3) contains three resistors, two capacitors, and one dependent sou rce.
The values of these six elements must be known before any high-frequency
calculations can be made from the model. The determination of suitable
values for these parameters at a specified operating point is the subject of
this section.
Half our problem is solved very simply, because the elements that ap-
pear in the low-frequency model maintain their same values in the high-
frequency model; these are r^, r^, and gjj, This is one of the reasons that
.

the hybrid- TT model is so convenient.

 .

5.4 High-frequency bipolar-model parameter values 173

The remaining three elements C^,C^, and the base spreading resis-
are
tance fj . We first consider the capacitance C^ This capacitor between the
.

collector and the internal base region is essentially the same as the deple-
tion capacitance of the reverse-biased collector-base junction. This deple-
tion capacitance customarily designated by Cct the collector-base ca-
is ,

pacitance, o r Cq^ the common-base output capacitanc e. It is measured

,

between the collector and base terminals with the emitter open-circuited.
We may use results that we developed earlier for the reverse-biased diode
Chapter
in 1:
^^_^ ^^ ^^^iia9.

C
'
^
- Voivt^r
(1

With nomenclature more suitable for the collector and base terminals of
an npn transistor, we have

C, = C„i = C,6 = ^^^

(1 + VcllVtd''
We recall that N ranges from V2 to V3, depending on the type of junction,
while I
Vjji I
is typically 0.8 V for silicon transistors. The value of C^ obvi-
ously depends on Vqb (and Vqe), and C^q is simply the limit approached
by C^ as Vcb approaches zero. Data may be given for C^ Cph or Qb at , ,

one particular value of Vcr'-, we then use Eg. (9) to calculate C^,n and then
the value of C^, at any desired operating poi nt.

For a pnp transistor, Vbi is still taken as a positive quantity, and it is

therefore necessary to use Vcb in place of Vcb in Eq. (9)
|
I

As an example of the calculation of C^ let us find the maximum value ,

to be expected for C^ with a 2N5377 transistor at /c = 2 mA, Vce = 5 V.

Referring to the data sheet in Appendix A, we find that C^b the collector- ,

base capacitance, at Vcb = 10 V,/ = 1 MHz, and /^ = has a maximum

value of 8 pF. Using Eq. (9), we find C^q first:

8 =
(1
^
+ 10/V,0^
We assume that V^i is 0.8 V and N is V2, obtainiRg

C^o = 8Vl + 12.5 = 29.4 pF

At Vce = 5 V, we have
Vcb = Vce - Vbe = 5 - 0.65 = 4.35 V
and therefore
OQ 4
C, = ^ = 11.6 pF
'^
VI + 4.35/0.8
174 Small-signal circuit models

when VcE = 5 V. If we had assumed that N = Vs, the result would have
been 10.2 pF, not an important difference.
One of the most difficult parameters to determine for the high-
frequency hybrid- TT model is r^ or r^i', the base spreading resistanc e. It is
not easy to make a direct experimental measurement of r^; its indirect de-
termination has been the subject of numerous investigations. The value
typically ranges betwen 20 and 200 Q, and it decreases somewhat as the
base current I^ increases. It is less for transistors intended for high-
frequency operation, as they are carefully designed to have a small value
offx.
Occasionally, we find r^ or on the data sheet for a
r^^' listed directly
For low-
transistor designed specifically for high-frequency applications.
frequency devices, however, more often than not no specific data are
available, and the value of r^ must be estimated.
The last element in the high-frequency hybrid- tt model that we have to
evaluate is C^^, the diffusion capacitance associated with the forward-
biased emitter-base junction. It is similar to the diffusion capacitance of
the forward-biased diode, and therefore increases as the emitter current
increases. The value of C^ is found indirectly by measuring the variation
of /3 with frequency.

In doing this, we shall begin working in the frequency domain with

sinusoidal signals that are functions either of jco or of the complex fre-
quency s. The voltages and currents are phasors, which we represent by
capitalletters with lower-case subscripts. Thus /g = 20 + ;T0 /x A signifies
the time-domain emitter current ig = 22.4 cos {o)t + 26.6°) fxA, a signal
component. If the dc component is 4 mA, then we would write

/£ = 4 mA (dc)

i^ = 4 + 0.0224 cos(a;f + 26.6°) mA (total)

ie = 22.4 cos(a;f + 26.6°) fiA ] . .

^^^^
/, = 20 + ;10 = 22.4/26^° ^A J

Figure 5.8 illustrates the procedure we shall use to obtain |

/5 |
vs. co.

The o utput terminals are short-circuited , since defined as the ratio of i^

fi is

to ib with Vce = (or I^ to 4 with V^e = 0); this places C^, C^, and r^ in
parallel and enables us to calculate V^ easily:

/;
V. =

or

rJi
V. =
1 + /c.(c. + c,;
 : .

5.4 High-frequency bipolar-model parameter values 175

Fig. 5.8 With the output short-circuited, the frequency variation of |8 = 1^1 lb may
be determined.

Now, the collector current is the sum of the dependent-source current and
the current through C^

The current through C^ is so much smaller than that through the depen-

dent source that it can be neglected at any frequency of interest. Therefore

gmr^h
1 + MC, + C^)r,

or, since /3 IJhandfio = gm^TT,

=
/3
1 + MC + C^)r,
(10)

Thus, jS is a complex quantity whose magnitude is

1^1 = ^ (11)

As CO - 0, we see that |
(3 \
and jS - jSq, as they should. When a? becomes
very large, however, |
/3 |
decreases almost inversely with frequency.
There are two important frequencies that we define in terms of the per-
formance of /3 with frequency. The first is the frequency at which jS
I
1
| |

i^ 0. 707 or 1/V2 times its low-frequen cy value jSq. We call this frequency

cjg and it o ccurs when the denominator of Eq. (10) is 1 + ;'l We have
, .

a;^(C, + C,)r, = 1

so that

1
0)0 = = 27r/^ (12)
(C. + C,)r,

This frequency, expressed in either radians per second or hertz, is called

the beta cutoff frequency A typical value for/^ is 1 MHz.
 : :

176 Small-signal circuit models

The value of C^ may be given in terms of co^

Thus
^^ =
^ - ^^ '
"

if we know the beta cutoff frequency, or can determine it from the

(1^)

data given, we can find a value for C^, .

Another special frequency is more apt to be available, however that —

at which the value of g drops to unity. It is designated cjj and is called
|
|

the ^ain-bandwidth product for a reason that we shall discover in suc-

,

ceeding chapters. A bipolar transistor designed for use at high frequencies

probably has a value of 500 MHz or greater for/j. From Eq. (11), we see
that as CO increases beyond co^ \^\ will be equal to unity when
,

or

Solving Eq. (14) for C^,, we have a relationship that we shall often use to
obtain a value for C^

C^ = -^- C^ (15)

We also note from a comparison of Eq. (14) with Eq. (12),

Figure 5.9 illustrates one form in which manufacturers provide data on

fr at various operating points. At constant Ic, note that an increase in Vce
yields a larger value for /^ and hence a smaller value of C^ At a constant .

value of Vce, say 2 V, fj is largest at about 2 mA, decreasing for both

larger and smaller values of Ic •

Some data sheets do not give the value of either co^ or co^ Instead, jS is .
|
|

given at some frequency sufficiently greater than w^ that we may assume

that jS is inversely proportional to frequency. On logarithmic scales,
I I

this inverse relationshipshows up as a straight line, as is illustrated in Fig.

5.10. One of the problems
at the end of the chapter suggests that Eq. (11)
may be used to show that this proportionality between ^ and llo) is in | \

error by less than 5.5 % when o) > 3co^ At such frequencies, Eq. (11) then
.

leads to

(">3a)^)
^1 = tr 7rw
5.4 High-frequency bipolar-model parameter values 177

VcF (V)

Ic (mA)

Fig. 5.9 Loci of constant values for fj are shown as functions of Ic and Vce ^ot a
typical npn transistor.

Comparing this with Eq. (13), we have

CO 101 = COy (oj > Sw^) (17)

Thus, a knowledge of the value of /3 at some frequency co that is at least |

1

three times greater than o?^ automatically provides us with a value for cop

as their product.
As an example illustrating the use of the gain-bandwidth product to
find C^, let us estimate the maximum value of C^ that might be expected
for a 2N5377 transistor operating at /c = 0.5 mA, Vce = 5 V. From the
data sheet, we note that jS ( = /ly^ ) lies between 3 and 15 at Ic = 0.5
| |
|
|

Fig. 5.10 A plot of log I

/3 1 vs. log a> shows that |
jS 1
= j8o for CO <K 0)^, and |
jS |
= 1 at
0) = Oij.

"m (log)

WjN w (log)
178 Small-signal circuit models

mA, VcE = 5 V, and/ = 10 MHz. Thus, from Eq. (17),fr will lie be-
tween 30 and 150 MHz at this operating point. Since we are asked for the
maximum value of C^-and Eq: (15) shows that C^ increases as osj de-
we use the minimum gain-bandwidth product,
creases,

COT = 27r/7 = 27r(30 x 10^) = GttIO^ rad/s

We also need a value for g^ . Using Eq. (6) and assuming that n = 1 and T
= 25°C, we have

gm = 38.9/c = 19.45 mU
The sum of C^ and C^ is therefore

(i)T dttIO^

The value of Vcb = 10 V; an earlier

C^ given on the data sheet is 8 pF at
example in this section showed that a reasonable value at Vce = 5 V is
about 11 pF. Hence

C^ = 103 - 11 = 92 pF
It is also possible to calculate the jS-cutoff frequency from Eq. (16) if we
select theminimum value of /3o, which is consistent with our earlier as-
sumptions. From the specifications, we have /lye(niin) = 100> and

"^ = -^ = -[00- = ^'^^^^ '^^''

orf^ = 0.3 MHz. This frequency is useful in two ways. First, when/ > 3/^
or/ > 0.9 MHz, co jS = coj with good accuracy. Calculating co^ from the
|
|

data provided at 10 MHz is thus valid. Second, high-frequency effects are

quite noticeable at and therefore the high-frequency equivalent cir-
co^ ,

cuit should be used whenever co > co^/3, or for frequencies greater than
about 100 kHz for the 2N5377.
Before concluding this section, let us continue with this example by
completing the high-frequency hybrid-7r equivalent circuit. We have g^,
C^ and C^ and we still need values for the three resistances, r^ r^ and
, , , ,

fj Knowing jSq and g^ we find r^

. , :

- ^0 '''
^
=5.14kQ
g, 0.01945

The output resistance r^ probably large enough to neglect, particularly

is

in high-frequency circuits where the impedance level of the external ele-

ments is apt to be low. However, let us check this assumption. We have
seen that r^ is the reciprocal of h^e , a commonly given bit of data, so we
5.4 High-frequenqj bipolar-model parameter values 179

inspect the 2N5377 data sheet, finding that /lofo(max) = 0.2 ^0 at /c 1mA
but no value is given for hoe • These /i-parameters are related by

Ke = (hfe + l)h„b

Therefore

h„e = (100 + 1)0.2 == 20 ^0 ,

and

rj = -^ = 50 kQ (/c = 1 mA)

Using Eq. (8), we see that V^ = 50 V, and therefore r^ = 100 kQ at Ic

= 0.5 mA.,
Finally, we find no data for r^ Since this is not a high-frequency tran-
.

sistor, we should not select too small a value for r^^; we arbitrarily pick r^^

= 50 Q. The resultant small-signal high-frequency hybrid- tt equivalent

circuit for a 2N5377 transistor operating with Ic = 0.5 mA, Vce = 5 V is
shown in Fig. 5.11. The element values have been rounded off, an indica-
tion that we have used an approximation here and there, as well as an
occasional guess.
The operating point for which this model applies happens to be the only
point at which the data sheet provides a high-frequency value for jS. We
might well ask, how does the equiv alent circuit differ for another operat -
i ng point, say
/c = 2 mA, Vce = 8 V ?
The transconductance g^ is proportional to /c so a new value is eas- |
|
,

ily calculated, g^ = 38.9 X 2 X 10-3 = 77.8 mU.

The resistance r^ is found from g^^ and jSq, and jSq is obtained at the new-
operating point from curves provided on the data sheet, if any, or by as-
suming that /3o is constant in lieu of other information. No curves are given
for the 2N5377, so we maintain /3o = 100, and therefore r^ = 100/0.0778
= 1.285 kQ.

Fig. 5.11 A suitable high-frequency hybrid-7r model for a 2N5377 transistor operat-
ing at Ic = 0.5 mA, Vce = 5 V.

50 f2
BO WA/ f
180 Small-signal circuit models

At /c = 2 mA, the resistance r^ decreases to 25 kQ, since it is inversely

proportional to the collector current, and the current has doubled.
No data were given for r^ and the only noticeable effect of a change in
,

operating point is a sligKt decrease for large \Ic\ Since 2 is not very - mA
large, we keep r^ = 50 Q.
The two capacitances remain. The collector- to-base capacitance C^
Vce and we have already determined C^q Therefore
varies with , .

29 4
C„ = ,
= 8.53 pF
'^
VI + (8 - 0.65)/0.8

This represents a slight decrease, in this particular case hardly worth

changing in our rounded-off equivalent circuit.
Finally, we turn to C^. Using Eq. (15), we see that it depends on g^,
(jOt, and C^, so we need to find co^ at the new operating point. Curves are

provided on some data sheets, showing /r vs. \Ic\ for several values of
Vce, such as those given in Fig. 5.9. For small currents, fj is proportional
to /c
I I
for larger currents, the rate of increase is less than the first power,
;

and eventually decreases. The gain-bandwidth product also increases

slightly with Vce Since Ic is increasing from 0.5 to 2
• while Vce ^oes mA
from 5 to 8 V, we might well let o)t increase from GttIO^ to 187rl0'^ rad/s, a
factor of three. Then

"f/
C. J^ - C.
'?-'
- 8.5 X 10-
= 137.3 - 8.5 = 128.8 pF
Thus we might wish to make several changes in the high-frequency
equivalent circuit of Fig. 5.11 as the operating point moves from 0.5 mA,
5 V, to 2 mA, 8 V: decreasing r^ from 5 to 1 .25 kQ, increasing C^ from 100
to 125 pF, and increasing g^ from 0.02 to 0.08 0.

D5.5 Calculate values of C^ for a typical 2N5088 with Vce equal to (a) 8
V; (b) 5 V; (c) 2.5 V. To check answers given below, let = 0.5, V^, N
= 0.8 V, and Vbe = 0.65 V. (d) Find the three corresponding values from
the curves given on the data sheet in Appendix A and compare them with
the values calculated above.

'Answers. 1.52; 1.91; 2.66; 1.7, 2.0, 2.65 pF

D5.6 If i3o = 100 and/^ = 0.1 MHz, calculate |

iS |
at (a) 10 MHz, (b) 1

MHz, (c) 0.2 MHz, (d) 0.01 MHz.

Answers. 1.000; 10 (9.95); 44.7; 100 (99.5)
5 5 The effect of temperature on bipolar-model parameters
.
181

D5.7 Use and 12 of the data sheets in Appendix A to find a typi-

Figs. 1 1
cal value for C^ at 25°C for a 2N5088 transistor at the operating point (a)
Ic = 0.4 mA, VcE = 5 V, (b) 5 mA, 5 V, (c) 0.4 mA, 15 V, (d) 5 mA, 15 V.

Answers. 15.1; 52.3; 14.3; 45.7 pF

5.5 The effect of temperature on bipolar-model parameters

In designing bias circuits to provide a specified operating point, the tw^o
problems that caused us the most trouble v^ere the variation present
among transistors of the same type and the effect of changing tempera-
ture. These same two problems exist for the signal models and may be
treated in a similar manner by proper modeling and careful circuit design.
In this section we shall discuss the variation with temperature of the six
parameters appearing in the high-frequency hybrid- tt model. The effect
of unit-to-unit variability is considered as a worst-case design problem in
the next chapter.
We can use Eq. (6) to calculate the transconductance, g^ , of a bipolar
transistor with good accuracy:

It thus varies inversely with temperature for a fixed collector current, and
we may write

Fo r bipolar transistors, gn increases with temperature. The form of the

variation is approximately as T'^, where T is the absolute temperature and
a may be as large as 2.5 for a silicon npn transistor. A value for (Sq is most
often specified at 25°C,and additional data at other temperatures cannot
always be found. In lieu of other information, a square-law relationship
between ^q and T is a reasonable assumption. Thus

00 « T^ (for Si)

Some data sheets list 0o

at 25°C and at 125° C. If it is assumed that jSq oc
enough information to calculate (Sq at any tempera-
T^, then this provides
ture. For example, if (Sq = 200 at 25°C and 340 at 125°C, then we can
obtain an equality by taking the ratio of two proportionalities:

^o(ri) KiTiY /TiV ^^g^

0oiT2) KiT^Y
 t

182 Small-signal circuit models

For our example,

200 / 273.16 + 25 \^

340 273.16 + 125

Thus, 0.588 = 0.749", and we may take natural logarithms to find

In 0.588 = a(ln 0.749) or a = 1.835

Thus we have determined the proportionality for this particular transistor

to be iSo oc Ti 835. since jSq = 200 at 25°C, /5o(r) = 200(7/298.16)1-835.
Thus at 80°C, this transistor has a predicted jSq of 200(353.16/298.16) ^ 8^5
= 273.
The effect of temperature on r^ is discovered by expressing it in terms of

nkT^
g, q\Ic\

Assuming that Ic is held constant, we therefore see the direct effect of T as

a linear factor in the numerator and an indirect relationship through 0q If .

we make the simplest assumption that jSq « T^ for silicon transistors, then
r^ oc T3 (for /3o
oc T^ for Si)

Under the more general assumption that jSq oc T^, we would obtain other
powers of T. For the particular example used above in which /Sq oc Ji 835^
we see that r^ a t^ 835 + i^ qj.
^^ « T2 835.

The collector-to-base output capacitance C^ is almost independent of

temperatur e. Any change that arises comes from a decrease in V^, as T
increases; this effect is usually negligible.
The diffusion-related capacitance C, is given approximately by the ra-
tio oi g^to o)t- The t ransconductance varies inversely with temperatur e,
and the gain-bandwidth product decreases with temperatur e, although

Fig. 5.12 See Problem D5. 8.

eon
Bo WAr— oC
5.6 Bipolar transistor h-parameter model loo

not in the same way for silicon and germanium units. The net result is that
C^ increases as about the square root of temperature for silicon transistors:

C, oc ri/2 (for Si)

We find that the base spreading resistance increases as temperature in -

creases and the output resistance r^ decreases as the temperature rises.

"Thelnformation that we have accumulated on the effect of the operat-
ing point and temperature on the hybrid- tt element values is collected in
Table 5.1.

D5.8 The hybrid- tt model of an npn silicon transistor is shown in Fig.

5.12 for a temperature of 25°C. If it is known that Po = 120 at 125°C,
determine suitable element values at a temperature of - 35°C.

Answers. 50 12; 1.4 kl2; 90 pF; 4 pF; 25 m^; 60 kfl

5.6 Bipolar transistor /i-parameter model

The hybrid- TT model is applicable to both bipolar transistors and FETs at
any frequency from near dc to the UHF region. Some data sheets, how-
ever,list values of the h-parameters for bipolar transistors at low frequen-

The h stands for "hybrid, " but because of possible confusion between
cies.
hybrid parameters and hybrid- tt parameters, we will use only the single
saying "aitch" quietly to ourselves.'^
letter,
The reasonfor using /i-parameters is the convenience with which they
may be measured at audio frequencies, typically 1 kHz. They provide an
accurate model if the frequency is low enough that the interelectrode ca-
pacitances may be neglected.
Figure 5.13 shows a general linear two-port network with the signal
currents Ii and I2 entering the input and output ports respectively, and the
signal voltages Vi and V2 with positive references at the terminals where
the currents enter. Two equations may be written expressing any two of
these variables in terms of the remaining two, so there are thus six differ-
ent ways of naming dependent and independent variables. One method
leads to the (/-parameters, which we shall study in Section 5.8, and an-
other to the h-parameters, defined by these equations:

Vi = huh + ^12^2 (19a)

h = h2ili + /122V2 {I9b)

^ It looks better if the lips do not move.

 . .

184 Small-signal circuit models

OS
^
C3
a
o
o o O
o
lO
o
I

o
I I
I

o u
'—\
<D
c« W)
u
s a
o o o o o o <D G
C A A V A V A V

u —U
_W3
^U -^
^
o
^ —
-H^ o
l«^

— B
•-H
o
c^
a;
W) 3 "cS ^ A ^
So
s 73 (-1

in ^i C/5 rt c c«
^ ^ u a
O O O ^H pH o >^

A V •II V V o V
>

CT)

CT)
CO
+ +
o
I

o
A

o
5/3

> CO.

c
o
>?
—
OQ
—3
QO
3
CO :.^
s U
PQ :^
W fe
II

+ 3 o
o
yo. cyol 3

o
oa. O
5.6 Bipolar transistor h-parameter model 185

A, J2_

Two-port network *i
"'1

Fig. 5.13 A general linear two-port network is shown with the traditional reference
polarities for the input and output currents and voltages.

From an inspection of these equations, each ^-parameter may be ex-

pressed as a ratio of two open circuit at the input
quantities with either an
(I I = output (^2 = 0)-
0) or a short circuit at the
Equations (19a) and {I9b) may be used term by term to form an equiva-
lent circuit, as shown in Fig. 5. 14a. When it is applied to a bipolar transis-
tor, the terminology is modified to indicate which of the three terminals is
common to both the input and output. For the common-emitter configu-
ration, Eqs. (19a) and (19^) become
h
'''re
V^ ce (20a)

^
-\- h V
"'oe ^ ce (20fo)

Fig. 5.14 {a) An equivalent circuit for the /i-parameters as defined for a general two-
port network, (h) The low-frequency /i-parameter model for a bipolar transistor con-
nected in the common-emitter configuration.

^12^ hi^

^ce "feh

ib)
 ' : 1 — — H - ? .

186 Small-signal circuit models

The su bscripts are descriptive in that they refer to input, reverse, forwar d,
and output as well as identifying which terminal is common.
,

These equations lead to the ^-parameter model for the bipolar transis-
tor, Fig. 5.14b. Compare Eqs. (20a) and {20b) to a corresponding set
written for the low-frequency hybrid- tt model:

Vbe = rJb = Kh + hfeV,, (21a)

Fig. 5.15 The data sheets for the 2N5088 Motorola transistor include curves for fi,g,
Key ^yg, and hog vs. Ic (Figs. 3, 4, 5, and 6 respectively) and one curve showing the
variation with Vce- Note in Fig. 5 that hjg for Unit 4 is less than the specified mini-
mum (350 at 1 mA, 5 V), and, we trust, would never leave the factory.
h PARAMETERS
Vce = 10 Vdc. f = 1 .0 kHz, T* = 25°C
(For Figures 3. 4. 5. 6, 8)

This group of graphs Illustrates the relationship of the "h" parameters for this series of transistors. To obtain these curves, 4
units were selected and identified by numtser — the same units were used to develop curves on each graph

FIGURE 3 -INPUT IMPEDANCE HGURE 4 - VOLTAGE FEEDBACK RATIO

^ Si
^^ = E e\[^
^,
''>
Uh IT# 1
2 30 ""
.^ ^>^
<> ' ^ t' s
I'" s
^4,. >>
i
- 10
^'^ 'N v; 's^
--:::
s= s^
*
zr ^^s c !S
17.0
J 50 >_^ ^ "^
sP S

3.0 ^ s /p ,
'

> V
2.0
J ^

^
^

10
2 3 05 7 10 20 30 2 3 05 07 10 2 3.0 5.0 7.(

Ic. COUECTOR CURRENT (mAl Ic, COLLECTOR CURRENT 1mA)

FIGURE 5 -CURRENT GAIN HGURE 6- OUTPUT ADMIHANC I

2000 ^ 1 > / ' L

1
yy / T
UNIT «1
::
—
J

__ — — _- ^^^: d
u
—
;
1000 -
J 100

—^ ^ — K • —— H S —
—
:^ ^
70 :::
z: * "~>
|700 ^ -^\ __ _| XX /"

S 500
^
,

K=
H"
3
'-
_j
n -|

-\
5
s 30
(i^
'''
.
yy
/
°
~ —
-^'•^
3
— 4
-- ,
1
"~
•-n
^ ^',
^.300
^^
'

200
^ ^ 1
^
10 ^ ^ ^ ^ gt; -''
^ --_-—
^ ^ ^X 7^ L
70
50
;z'4 =
E —':=:
ion
2
J
3 05 7 10 2 3 5
. tn
2 03 5 7 10 2 3 50 70 10

Ic. COLLECTOR CURRENT (mAl Ic. COLLECTOR CURRENT (mA)

; 7- EFFECT OF VOLTAGE FIGURE 8 -DETERMINANT

20 Ill
I
^— _
I

-175 ^ V;L. :::

_J
^s : i2=
^^ ^^ =

I^
i

S 15
rH
-
-
I
gl25 :^^^ ^
3

4
-=;

d5 —- — 5
-^ — —— — ==i
_-

^ 08
h.. h.
1

3 5 7 10 12 3 05 07 10 20 3 50 70 10

Vet. COLLECTOR EMITTER VOLTAGE (VOLTS) \r. COLLECTOR CURRENT (mA)

5.7 FET models: small-signal low-frequency 187

{2lb)

easy to see that hf^ = g^r^ = gp, ^^g = r^, hp^ = 1/r^, and h^e =
It is -

Typical values of the /i-parameters fof a silicon transistor operating at Iq

= 1 mA, Vc£ = 5 V are K
= 2.5 kO, /i,, = 4 X 10 -5, h^^ = 100, and /i^^
= 20 jitO These values change with operating point and temperature, just
.

as the values do One page of the data sheets for the

in the hybrid- tt model.
2N5088 reproduced as Fig. 5.15; note that it gives curves
transistor is

(their Figs. 3, 4, 5, and 6) showing the variation of all four parameters

with dc collector current, and one figure (their Fig. 7) illustrating the
changes in the four parameters with Vqe- The data apply to an audio fre-
quency of 1 kHz. The effect of temperature can be determined from the
relationships between h- and hybrid- tt parameters.

D5.9 (a) Let /i^^ = 2 kfi, Ke = 0, hy, = 80, and Ke = 50 />tO in Fig.
5. 14Z7. Find the ratio V^e/^^ if a source for which V, = 1 mV and R, = 600
12 is connected to the input and a 4-kf2 load is connected to the output, (b)

Find the ratio if /i^.^ = 5 X 10 ~^, all other values remaining the same.

Answers. -102.6; -108.1

5.7 FET models: small-signal low-frequency

The field-effect transistor is also modeled well by a hybrid- tt equivalent
circuit. When interelectrode capacitances can be neglected, we may use
the s mall-signal low-frequency mode l, which is particularly simple, as
shown Only a single value, g^^, need be specified.
in Fig. 5.16.
We may define g^ by inspecting Fig. 5.16. It is obvious that i^ = g^^Tr ?
but we usually specify that the output (drain-source) terminals are short-
circuited since the high-frequency model may contain other elements in
parallel with the dependent source. Thus

R =^
"" u^ = or U£)5 = constonf

The drain current i^ and gate-to-source voltage v^^ Qr V-^, are signal quanti-
ties, and once more given by the slope of the dc transfer char-
their ratio is

acteristic at the specified operating point in the region beyond pinch-off.

This type of analysis began with the ac-equivalent circuit of the diode in
Chapter 1. Thus

^ din
fern (22)
dv GS OP
188 Small-signal circuit models

Go- -oD

SO- -OS

Fig. 5.16 The small-signal low-frequency hybrid- tt model for an n-channel or p-

channel JFET, IGFET, or MOSFET has a very simple form.

For the n-channel JFET, we use Eq. (10) from Chapter 3, with I^ and Vqs
replaced by Iq and Vqs:

This equation is independent of Vm^ p rovided that the transistor is opera t-

i ng in the region beyond pinch-off Then .

diD 21DSS
&m (vgs - Vp)
dvcs OP yp2
GS

so that

21DSS
&m (Vgs - Vp) (23)
Vp^

The value of g^ will vary with the operating point, since Eq. (23) shows
that a linear function of Vqs. The maximum value in
it is the range Vp
< Vqs <
is gmo, which occurs when Vqs = 0. The minimum value is

zero, occurring when Vqs = Vp. In terms of signal performance, we can

see that any JFET will produce the greatest gain when Vqs is near zero
and the drain current is large; the gain approaches zero as Vqs ~» Vp a nd

The valuesof g^ and g^o for a p-channel JFET are also positive quanti-
For example, I^ss ^^ Eq. (23) is negative, while Vp is positive with
ties.

Vqs < Vp. Depletion-mode IGFETs, either n-channel or p-channel, also

have positive values of g,„ and g^o that we determine by identical formu-
las.

Enhancement-mode devices have slightly different forms of the nonlin-

ear transfer characteristic. For an n-channel enhancement-mode IGFET,

^D = -^ {"Ogs - VtY for Vds ^ Vgs " ^r and Vqs > Vt

dio
Sm = K(vqs - Vt)
dv as OP OP
5.7 FET models: small-signal low-frequency 189

>+30 V

2.5kir2

+ hss = 20 mA
1 ka \H-^ 1 MO
COS lO^r mV
© 1 V

Fig. 5.17 An amplifier for which the voltage gain [Vo{t)]l[Vs{t)] is to be calculated.

Thus,

gm = K(Vcs - Vt) (24)

We note that gm = when Vqs = Vj and that g^

increases linearly as Vqs
increases. Lar ger signal gains therefore occur as Vqs ^^^ ^n increas e.
A p-channel enhancement-mode IGFET also has a positive g^ because
K and Vj are negative and Vqs < Vt-
As an illustration of the use of the low-frequency model, suppose we
calculate the voltage gain VolVg for the amplifier shown in Fig. 5.17. We
note that 1 mV
is small-signal and 10^ rad/s is low-frequency, so we shall

use the model of Fig. 5.16. To find g^, we need to determine the dc oper-
ating point. This is a simple single-stage amplifier and the nonlinear
model is easily applicable. Since Vqs = - 1 V,

DSS 20
In =
yp2
(Vgs - Vp)2 = ^-- (- 1 + 3)2 = 8.89 mA
As a precaution, we calculate V^s-

Vds = 30 - 8.89(2.5) = 7.78 V

Since V^s is greater than Vqs - Vp = 2 V, we are operating safely beyond
pinch-off. Thus

2/ DSS
&m
Vp2
(Vqs - Vp) = 4r- (- 1 + 3) = 8.89 mO

We therefore have a signal model for the JFET with g^ = 8.89 mU.
The complete signal circuit is shown in Fig. 5.18. It is obtained by replac-
190 Small-signal circuit models

V, = COS 1 03/ mwCt)

Fig. 5.18 The a.c-equivalent circuit of the amplifier in Fig. 5.17; g^ = 8.89 mU.

ing the dc voltage sources and large capacitors with short circuits. We
then use voltage division to obtain

1000
t^x = ""'
1001

while

1000
Vo = -gmV,2500 = -8.89 (2.5t;,)
1001

and

Ay = -^ = -22.2

Note that an increase in g^ or Rp causes \Av\ to increase .

D5.10 Determine g^ for (a) a p-channel JFET with I^ss = - 8 mA, Vp

= 1.6 V, and Vqs = 0.2 V; (b) an n-channel depletion-mode MOSFET
with Idss = 5 mA, Vp = - 2 V, and /^ = 4 mA; (c) an n-channel
enhancement-mode MOSFET having V^ = 1.5 V, X = 4 mA/V^, and
Vcs = 4 V.
Answers. 8.75; 4.47; 10 mU
D5.11 In Fig. 5.17, replace the 1-V battery with a short circuit and the
2.5-ki2 resistor with a 1.2-kQ resistor. Find the signal power dissipated in
R, =
(a) 1 kQ, (b) fig = 1 Mfl, (c) Rd = 1.2 kQ, (d) the transistor, (e) V^d
= 30 V.
Answers. 0.499 fW; 0.499 pW; 106 nW; - 106 nW;

5.8 FET models: small-signal high-frequency

In the frequency range where the reactances of the interelectrode capaci-
tances are comparable to the resistance levels in the external circuit, the
 .

5.8 FET models: small-signal high-frequency 191

small-signal FET model must be chan ged to the high-frequency hybrid- ir

model shown in Fig. 5.19. Note that there is no series resistance at the
input, so the model is actually only a tt network. The resistor r^ and capac-
itor Cfis are sometimes omitted, since their impedances should be consider-
ably larger than that of the external load resistor. The major high-fre-
quency effects are caused by the two capacitances Cg^ and Cg^. This model
is simple and accurate up to about 500 MHz. At higher frequencies, the

element values in Fig. 5.19 become frequency- dependent. This high-fre-

quency hybrid-TT model is a particularly important model because the
FET is widely used at UHF and VHF.
The high-frequency parameters for FETs are often measured and listed
in data sheets as short-circuit (/-parameters for a two-port network. These
admittance. parameters are defined for the general two-port of Fig. 5. 13 as
follows:

^1 = yiiVi + 1/12^2

h = ?/21^1 + !/22^2

Note that the parameters may be found for a general two-port by applying
a 1-V signal to one port, short-circuiting the other port, and measuring a
phasor current.
The notation used for the short-circuit admittance parameters when
they are applied to an FET is shown in Fig. 5.20 for the common-source
connection. The subscript system is similar to that used with the /i-param-
eters; thus t/y^ is the forward short-circuit transfer admittance for an FET
having the source (signal) terminal common to both input and output. It
would be measured with the drain short-circuited to the source (at signal
frequencies by a large capacitor)
For the model of Fig. 5.19, including r^ and C^, we may relate the
element values and the (/-parameters by first short-circuiting the right
port:

yis = /ojC^ = /co(Cg, + C.d) (25fl)

Fig. 5.19 The small-signal high-frequency model for an FET typically includes C,
and Cg^, while C^ and r^ are sometimes omitted.

GO- OD
192 Small-signal circuit models

oD
+

^g^yts^gs-^yn'^ds
Ld == yfs^gs+yos^ds

SO- -OS

Fig. 5.20 The short-circuit admittance parameters for an FET in common-sowrce

configuration carry a second subscript s and a first subscript signifying input, reverse,
forward, or output.

where we have defined an equivalent capacitance,

^is ~ ^gs "* ^c

'gd (25^)

Also,

Vfs = gp + % = gm - i^Cgd = gfs

- i^Cp (26a)

Cfs = Cgd {26b)

gjs = Re(t/y,) = g^ (26c)

With the gate and source short-circuited,

t/„ = -J0)Crs = -jOiCgd (27a)

^rs = Cgd (27b)

and

!/0S= g05 + i^Cos = ^ + /W(<^gd + Cd,) (28a)

Cos = C^gd + C^d5 (28^.)

gos = Re(t/o,) = (28c)

The four capacitances, C„, and C^s, are sometimes designated

Cf,, Cy,,

C«5, Cps, C„„ and C^^ on data sheets. The second 5 is a reminder that there
is a (signal) short circuit at one of the ports.

Several facts are evident from the relationships above. For example, at
low frequencies, t/^ approaches gm, the low-frequency transconductance.
Also, Cgd is found from the imaginary part of either y^ or t/„; knowing its

value, we find that Eqs. (25^?) and (28b) give C^, and C^,.
5.8 FET models: small-signal high-frequency 1"»3

To illustrate the use of this collection of formulas in finding the hybrid-

TTelement values from t/-parameters given on specification sheets, let us
determine the high-frequency model for a typical 2N3823 transistor at
Vqs = and Vj)s = 15 V for a frequency of 10 MHz. A portion of one
page of the data sheets for this transistor is shown in Fig. 5.21, wherein we
see that curves are given for Re(t/), Im^t/), and C for most of the parame-
ters as functions of frequency and Vcs- Their Figs. 6 through 9 all apply to
Vcs = 0, Vds = 15 V, and T = 25°C.
Beginning with their Fig. 6, we see that the real part of t/^^ is negligible,
while Cis = 4.8 pF. The remaining curve, \m{yi^, is simply coCf^ plotted
for a logarithmic frequency scale.
In their Fig. 7, we note that Re(t/ys) is independent of frequency, so we
set

g^ = Re(t/y,) = 4.7 mU
At a frequency of 10 MHz, the imaginary part has a magnitude of about
0.1 m^, which is negligible.
From their Fig. 8, it is evident that Re(t/„) is negligible, while the imag-
inary part provides a capacitance C„ =1.4 pF.
Finally, t/^^ from mostly imaginary, so we use C^s = 1-8
their Fig. 9 is

pF over the frequency range up to 300 MHz. The small value of Re(t/os)
looks as if it were less than 0.1 mU, and thus r^ > 10 kQ.
The elements in the model are therefore
Cgs = Ci, - Crs = 4.8 - 1.4 = 3.4 pF

Cgd = Crs = 1.4 pF

g^ = 4.7 mU
Cds = C,, -Crs = 1.8 - 1.4 = 0.4 pF

rd > 10 kQ

How constant may we expect these values to remain as the operating

point is changed? Let us agree first that operation will always be beyond
pinch-off. We already know that g^ is a linear function of Vqs, and we

may neglect any change in r^. The three capacitances vary in a different
manner for JFETs and MOSFETs. For a MOSFET, the values of C^, and
Cgd are relatively constant with changing Vcs or ^ds The capacitances
are mainly determined by the thickness and type ot the insulating oxide
layer, as well as the area and placement of the metallic gate electrode.
Changes in the depletion or enhancement of the channel therefore have
only a minor effect.
The JFET, however, operates by virtue of the creation of a depletion
region and a reverse-biased junction between gate and channel. Thus any
increase in the reverse bias voltage between gate and channel should cause
194 Small-signal circuit models

SMALL-SIGNAL COMMON-SOURCE
INPUT ADMITTANCE

FREQUENCY
'"
_Vgs = .
i

Ta = 25°C /

I 6 ^
.
=1 —
c,„
T- 4^
/ '-(yj
S.

lm(y„
I 2

fk'
]

.^ Re(yJ ^ _...]
40 100 400 1000
f — Frequency - •Mc
FIGURE 6
SMALL-SIGNAL SOURCE COMMON SMALL-SIGNAL COMMON-SOURCE REVERSE
FORWARD TRANSFER ADMITTANCE
TRANSFER ADMITTANCE

6 FREQUENCY
1 1 1
II
11 1

1' Vt>s=15y
5

Vds=15v I
Vgs=0 s-s.
- Vgs =
S 4 — Ta = 25''C

T 1 5
V )

Cr„ = -lm(y,,) '=1

2 ""vyf,/^
i
2 y
r- 2l'
J
,/ S
C
[^.y. ~~
?l^
1 u
--
^' 1 .. ,

40 100 400 ^-ttl T -^^^^''>iiiiiiii

f — Frequency - >: 10 100 400 1000 40

FIGURE 7
— Frequency — Mc
f

FIGURE S
SMALL-SIGNAL COMMON-SOURCE
OUTPUT ADMITTANCE COMMON-SOURCE SHORT-CIRCUIT INPUT AND
REVERSE-TRANSFER CAPACITANCES
FREQUENCY
GATE-SOURCE VOLTAGE
? .Vds='5 V 5
f = 1 Mc r --'-(yJ
Vgs=0 1

"'" _y A - If L-
1
* - Ta 4 S
^ ^
1
CD
/ J
c.,-''"^'']
•

i^Y^ all •
1
^^ (Vds=5v)
3 =5;
/
1, r i
1 c„ (Vr^.
='
15 v) —
i
<5,
1
^,
'
/c
J
:o« =

J
—
Im(v^) ,

h^_
1

(1 1
" "~
Cr„(Vos=5v)_
Cr„ (Vds= 15 v)-
—
^ Re(y
=d
1 1 1 1

Co«*C,„ *0.4pf
40 100 400 n 1
1

10 1000
f — Frequency — Mc -4 -8
— Gafe-Source Voltoge —
-12 -16
i

FIGURE 9
FIGURE 10
^h« iMrth l*od (cos*) it <ofln«<led lo the sourtt for oil meosurtmtnts.

Fig. 5.21 Curves supplied by Texas Instruments for its 2N3823 n-channel JFET. The
values apply to the high-frequency small-signal (/-parameter model.
5.9 The effect of temperature on FE T -model parameters 195

a decrease in capacitance, as it would in the reverse-biased diode. Since

the depletion region is larger between gate and drain than it is between
gate and source, Cg^ is less than Cg^. Moreover, any reduction in the di-
mensions of the channel (by increasing Vqs or Vd^ for an n-channel | \

JFET) has less effect at the drain end than at the source end. Thus, Cg^ is
relatively insensitive to Vqs and Vj^s^ while Cg^ exhibits a variation with
Vqs that is very similar to the junction capacitance of the reverse-biased
semiconductor diode. Referring again to the 2N3823 data in Fig. 5.21,
their Fig. 10 shows that C^ss ( = Cg^) is small and fairly constant; it does
decrease slightly as Vqs or Vj^s increases. On the other hand, C^^^ ( == Cg^
+ Cgd) decreases much more markedly with Vqs, but only a small amount
with Vds- •

D5.12 Given a Type 2N3823 transistor operating at 1 MHz, determine

typical values for (a) Cg, at Vqs = 0, V^s = 10 V, (b) Cg, at Vqs
= -4 V, Vns = 10 V, (c) C^ at Vqs = 0, Vj,s = 10 V, (d) Cg^ at Vqs
= 0, Vj,s = 10 V.
Answers. 3.4; 2.2; 0.4; 1.4 pF

D5.13 According to curves published by Motorola for its 2N4223 n-

channel silicon JFET, a possible set of t/-parameter values at 100 MHz is
(in ml5) t/i, = 0.2 + ;2.5, t/,, = -0.01 - /0.65, t/y, = 3.1 - /0.65, y,,
= 0.05 + ;0.8. Determine suitable values for (a) Cg^, (b) gm, (c) Cg.^, (d)

ra, (e) C^.

Answers. 1.0 pF; 3.1 mU; 3.0 pF; 20 kl2; 0.3 pF

5.9 The effect of temperature on

FET-model parameters
The only important effect that caused by a change in operating temper-
is

ature on either of the small-signal FET models is in the value of g^- We

may recall from Section 4.6 that an increase in temperature for a JFET or
depletion-mode MQSFET results in a very slight decrease in the pinch -off
voltage Vp and a more significant decrease in the drain saturation cur-
I I

rent lj)ss
I
perhaps a 25 % decrease for a 100° C increase in temperature.
I ,

The effect of temperature on an enhancement-mode device was men-

tioned in Section 4.7. It is similar to the behavior of the JFET, for Vj
decreases slightly and K decreases significantly as T increases.
The net result in either case is that g^, which is proportional to the quo-
tient of Iifss and Vp
I
varies as T^, where a is roughly -1.5 and T is the
I
|
|
,

absolute temperature. An example of this variation is shown in Fig. 5.22,

which shows curves supplied for the 2N3823 JFET. For a typical unit with
 >

196 Small-signal circuit models

small-signal common-source forward transfer admittance

gat'e-source voltage

i
8000

7000
V \\
\
Vds=15v
f = 1

See Note 2
1

kc

^^ Ta = -55»C ^-N^

N
\
AdmiMon

Transfer

.,1.U JS^C-^V
\
\
=
Forv^ard

Common-Source

\Vt "^\
^^ \ v\ ^
Smoll-Signol
x. \ \
" ^- ^s \ \

^
—
T 100°'" '

1
l/j Ta = isccl Ta = 150»C-*V,

1000
^^w
Device having Device havir>g^^
Y^
\VVlDSS-4mo loss* 16 mo ^

\\\ 1

-3
ot Ta =
1

-4
25'C
w
iW
-2
Vqs — Gate-Source Voltage —

Fig. 5.22 The effect of temperature and Vqs on g^ or [t/yj is shown for a Texas
Instruments 2N3823 FET.

loss = 16 mA at 25°C, we can see that g^ or t/y^ at Vqs = 0, V^s = 15 V, | |

decreases from 7.9 to 3.5 my

ambient temperature increases fromas the
- 55 to 150°C. This corresponds to the value a = - 1.23. For the lower-
current devices, the magnitude of a is found to be a little less. We can also
see that g^ is almost a linear function of Vqs.
Table 5.2 summarizes the information we have on the effect of operat-
ing point and temperature on the parameter values in the low- or high-
frequency small-signal models for the several varieties of FET.

D5.14 Use Fig. 5.22 to specify g^^ for a 2N3823 transistor having
Idss = 4 mA when T = 25°C if it is operating with Vds - 15 V and (a)
Vgs = 0, T = 25°C, (b) Vgs = -0.5 V, T = -55°C, (c) Vcs = "0.5
V, T = 150°C.

Answers. 4.5; 4.3; 2.3 ml}

5.9 The effect of temperature on FET-model parameters 197

ca a) fe
e s
o a Oh
o
>. 2
o 1 I
O ^ I
o I

H 1

(N
CO
o cq o
I

a" O O
en CO •II 'W

C/5

00
>" CI ^ ^
;^ i:^
^
on on CO

OS O O
>

^* o o
o I

•II

hi

I
i^
en
on on

>
-M 2"

s
S
ID
'TO

(D
T3
s
X O c
s <u

CM c S
^ o 0)
H *•> H p ts
y d)
bc ^ tie £j «J
o" O^ i4 9^ £4 JS o" u"
(2 o (S
c
 .

198 Small-signal circuit models

Problems
1 Include r^ in the model of Fig. 5.2^? and then derive a new version of
Eq. (1).
2. Values applying to the small-signal equivalent circuit of Fig. 5.2b are
Rb = 40 kfi, r^ = 3 kfi, g^ = 50 mO, r^ = 80 kfi, and Re = 5 kQ. A
source 0. Iw(^) mV
in series with 500 Q is connected to the input, and a
resistor R^ is placed across the output. The values of Ci and C2 are
large. Find Vo{t) if Rl equals (a) 2 kl2, (b) 20 kQ.

3. In Fig. 5.2a, let R, = 100 fi, fi^ = 400 kQ, Kc = 5 kQ, and Vcc = 15
V. Both capacitors are large. The npn transistor has a negligible Iceo^
0dc = 50, and Vo = 0.6 V. (a) Find/c- If g^ = 36/c, r, = 1.4//c (kQ,
/c in mA), r^ = 40 kfi, and i;,(f) = 2 cos 500^ mV, find (b) Vo{t), (c)

4. In Fig. 5.23, let v,{t) = 2 cos lO^f mV, 13^, = 200, Vq = - 0.7 V, and
IcEo = 0. (a) Find /c- (b) Find Vce- (c) If g^n = 32 /c and r, = 2.5
1 |

kl2, find VcEit)-

5. The small-signal hybrid-7r equivalent circuit for the transistor in Fig.
5.24 contains r^ = 5 kQ and g^ = 32 ml}. Some of the dc biasing
circuitry is unimportant at the operating frequency and is not shown.
Find = 10 cos lOH mV.
Vo{t) if v^it)

6. A bipolar transistor is modeled at high frequencies by r^ = 4 kfi, C^

= 50 pF, r, = 100 fi, g^ = 25 mU, C^ = 5 pF, and r^ = 00. (a) If the
model is short-circuited at the C-E terminals, calculate \Iclh\ ^s a
function of o) and sketch the results on log-log paper for 10^ < co < 10^
rad/s. (b) At what value of co is this ratio 1/V2 times its low-frequency
value?
7. The high-frequency equivalent circuit of a pnp transistor amplifier is
shown in Fig. 5.25. Find the input impedance seen at B '-E if the out-
put is left open-circuited.
8. Elements appearing in the high-frequency equivalent circuit of a
junction transistor are r^ = 100 fi, r^ = 2 kQ, C^ = 100 pF, C^ = 5

Fig. 5.23 See Problem 4.

1.5 Mn> <5k^

1
1 kn 20 mF

Vv\ 1(—

V 18 V
 .

Problems 199

50012

Fig. 5.24 See Problem 5.

pF, and g^n = 100 mU. At 10"^ determine the impedance viewed
rad/s,
at the C-E terminals if a 1.9-kl2 resistor is connected between the B-E
terminals.
9. The transistor of Fig. 5.2a and Z? has n = IwithjSo = 100 at /c = 0.1
mA, and jSq = 200 at /c = 1 mA. Calculate the voltage gain if R^
= 40 kl2, R, = 1 kfi, jRz. = 8 kQ, and Ic equals (a) 0.1 mA, (b) 1 mA.
10. The transistor of Fig. 5.2 has n = 1 and a 0q given by Fig. 5.4. If R^
= 1 kfi, Rb = 50 kU, and R^ = 10 kfi, calculate Ay at the operating
point (a) Ic = 1 mA, Vce = 1 V, (b) Ic = 10 mA, Vce = 10 V.
11 Let the transistor used in the amplifier of Fig. 5.2 have /Sq = 100 at Ic
= 1 mA and /3o = 150 at 5 mA. Given n = 1, an Early voltage V^
= 50 V, and fi, = 2 kQ, Rb = 25 kQ, and Hl = 4 kfi, calculate the
magnitude of the voltage gain at Ic equals (a) 1 mA, (b) 5 mA.
^tt, and Ay for the amplifier shown in Fig. 5.6
12. Calculate g^, if (a) Vce

is reduced to 15 V and /3o = 105; (b) Vce is increased to 30 V and jSq

= 110.
13. For the small-signal low-frequency amplifier shown in Fig. 5.6,
change Hfi to 1.8 Mfi and n to 1.3, and let ^0 = 00. (a) Find /c, gm. ^tt.
and Ay. (b) A voltage gain of exactly - 400 is now desired, and this
can be achieved by changing the value of only one external circuit
element. What is this new value for R^? (c) for Rb?

Fig. 5.25 See Problem 7.

BO OC

EO O E
201) Small-signal circuit models

0>i5 V

Fig. 5.26 See Problem 15.

14. A 2N5088 transistor, similar to Unit 2 on the data sheets in Appendix

A, used in a stabilized bias circuit with Ri = 60 kQ, R2 = 30 kQ, Re
is

= 2 kfi, He = 3 kfi, and Vcc = 12 V. Assuming operation at 25°C,

let Vbe = 0.75 V and determine values for (3^^, Vq, Ic, Vce, i^o, r^, gm,
n, and r^.

15. The transistor in Fig. 5.26 has jSjc = 200, Vq = 0.75V,iSo = 225, and
n = 1.25. What value of Ri will cause (a) g^ = 100 m^? (b) r^ = 3
kl2? (c) VcE = 0.4 V?

16. (a) If Vhi = 0.8 V and C^o = 12 pF for a certain pnp transistor and N
= 0.42, determine C^ when Vcb = "6 V. (b) What is Vcb when C^
= 10 pF?
17. Assume that the gain-bandwidth curves shown in Fig. 5.9 apply to an
npn transistor having n = 1.1, iV = 0.5, Vbe = 0.65 V, V^^ = 0.8 V,
and C^ = 2 pF when Vce = 1 V. Calculate C^ at the following values
for Ic and Vce'- (a) 0.5 mA, 2 V; (b) 1 mA, 20 V; (c) 2 mA, 20 V.
18. Knowing that i3 = 3 at 100 MHz and /3o = 100, (a) calculate w^ and
I
1

ojr; (b) find 1/3 1 at 10 MHz.

19. Consider the 2N5088 listed in the "Dynamic Characteristics" on the
data sheets in Appendix A as having /3o = 350 at /c = 1 mA, Vce = 5
V. Assuming that C^b = 1 pF at Vce = 15 V, use Figs. 11 and 12 of
the data sheets to calculate C^ at the following values for Ic and Vce-
(a) 1 mA, 15 V; (b) 7 mA, 5 V; (c) 7 mA, 15 V.

20 Let N = 1/3, Vbe = 0.65 V, and V^, = 0.75 V for a silicon transistor.
If C,h = 6 pF at Vce = 5 V, and Po = 200, (a) find C„ g^, and r,
when Ic = 1.5 mA, Vce = 10 V. (b) If the gain-bandwidth product
for this transistor is 6 x lO^rad/sat/c = 1.5 mA, Vce = 10 V, deter-
mine C^ and 13 at 20 MHz.
1
1

21. Find the output impedance of the equivalent circuit shown in Fig.
5.27. Let fj = 100 Q and place a short circuit across the input termi-
nals.
Problems 201

OE

Fig. 5.27 See Problem 21.

22. The high-frequency equivalent circuit for a certain transistor at a

specified operating point is shown in Fig. 5.28. Find (a) /5o, (b)/^, (c)
fr, (d)'|iS| at 20 MHz, (e) |i3| at 2 kHz, (f) /3 at 2 MHz.
23. At /c = 1 mA, VcE = 10 V, a certain transistor data sheet shows that
C^ = 3 pF, jSo = 200, and co^ = 500 Mrad/s. (a) Assume n = 1, V^^
= 0.8 V, and Vbe = 0-65 V, and findg^, r^, C^, and co^. (b) Estimate
values for C^, /^o? <j^t? ^tt? ^^id oj^ if the operating point is changed to 2
mA, 5 V.
24. The resistors in the amplifier of Fig. 5.6 may be assumed to have tem-
perature coefficients of 1200 ppm/°C at 25° C, while the transistor
has a /3dc that is proportional to T^^. (a) Estimate V^e and jSdc at 50°C.
(b)Find the operating point at 50°C. (c) Determine a new low-fre-
quency small-signal equivalent circuit and predict the voltage gain at
50°C. Assume 0o = 110 at 25°C.
25. assumed that ^q = jSjc for the pnp transistor of Fig. 5.29, deter-
If it is
mine values for the low-frequency hybrid- tt equivalent circuit of a
typical transistor for which V^ = 25 V, n = 1.2, and Ic equals (a) - 1
/iA, (b) - 100 ^iA.

26. For the transistor of Fig. 5.29, make the assumption that jS^c « T^^
and determine values of i3dc(max) and /3dc(min) at /c = - 100 />tA for T
equals (a) -50°C, (b) 125°C.

Fig. 5.28 See Problems 22 and 58.

t oC

oE
202 Small-signal circuit models

100

10^ (log)

Fig. 5.29 The variation of jS^c with Ic is shown for a pnp transistor used in an inte-
grated circuit; Vce = - 10 V and T = 25°C. See Problems 25 and 26.

27. An npn silicon bipolar transistor has a jSq of 200 at Ic = 1.8 mA, Vce
= 6 V, and r = 25°C. If l3o ex T^^ /c^ ^ Vce^-\ plot a locus of those
operating points on Ic-Vce axes for which (a) ^q = 200 at 25°C, (b) jSq
= 200 at 100°C.
28. The high-frequency parameter values for the transistor of Fig. 5.28
vary as T°, where the values for a are given below. Assuming that the
is valid at 25°C, (a) construct an equivalent circuit use-
given circuit
125°C; (b) calculate new values for ^o^f^, and/j, and compare
ful at
them with the values for 25° C.

IT'.
Sm r^ c. c. rx

a: -1 3 -1/3 1.4

29. The small-signal high-frequency equivalent circuit of a silicon npn

transistor contains r^ = 50 Q, r^ = 2 kQ, C^ = 50 pF, C^ = 5 pF, g^
= 30 mO, and r^ = 20 kfi when Ic = 1 mA, Vce = 4 V, and T
= 25° C. For the sake of this problem, modify Table 5.1 by changing
every = to = > to 0.25, < Oto -0.25, < 1 to 0.75, and large |/c|
,

to I /cl > 1 mA. (a) Find accurate values for the six parameters above
at /c = 2 mA, Vce = 10 V, T = 125°C. (b) The high-frequency
performance of a bipolar transistor amplifier begins to deteriorate at
a frequency given very roughly by (H^C^ + gm^L^*^^)"^ rad/s,
where R^ and R^ are the source and load resistance respectively. As-
sume that Rs = Re = ^ kO, and calculate this frequency at 25°C. (c)
Problems 203

In what direction should T, Ic, and Vce be changed to increase this

frequency?
30. If hie = 2 kfi, hre = 10-4, hj, = 120, h^e = 40 /xU, draw an
and
equivalent circuit similar to the hybrid-7r, but include an additional
element to account for hj-e- Give all element values.
31. The transistor in Fig. 5.2a has h parameters hi^ = 2.5 kQ, hre = 0, hj^
= 60, and /i^^ = 2 X 10-^0. If H/= 1 kfl, i^^ = 16 kfi, and He = 4
kfi, find (a) vMlv.it), (b) t;,(0/t;fc.W.

32. Lethie = 2.5 kO, hre = 4 x 10"^ /i/e = 100, and/i^, = 20 /zU for the
transistor of Fig. 5.30 at its established operating point. Find (a) Vo,
(b) /i„.

33. (a) Determine the hybrid-7r parameters and the value of n for a
2N5088 transistor similar to Unit 3 on the data sheets in Appendix A at
/c = 2 mA, Vce = 10 V. (b) Find hfe at Ic = 0.2 mA, Vce = 4 V.
34. Calculate hie, Ke^ ^/e? and h^e for a common-emitter amplifier having
(a) r^ = 2 kl2, g^ = 40 mO, and r^ = 100 kfi; (b) /c = 0.8 mA,

n = 1.25, l3o = 70, and V^ = 60 V.

35. Determine values for the four common-base h parameters hnj, hrb,
hfh, and hob for a transistor having r^ = I kU, r^ = 10 kl2, and g^
= 10 mO.
36. Using data from Appendix A, specify a typical value of g^ for the
2N3823 transistor if loss = 16 mA, Vqs = - 2 V, and T equals
(a) -55°C, (b) 25°C, (c) 100°C. (d) Repeat parts (a), (fo), and (c) if

Vgs= - 1 V.
37. An n-channel enhancement-mode MOSFET with V^ = 2 V and K
= 5 mA/V^ is operating in saturation with a gate-source voltage Vqs
= 3.6 + 0.02 cos 1200^ V. Find i^,.

Fig. 5.30 See Problem 32.

Of'c

Large

^^'"^^
200 a

1 ^0° mV/+N
Large
1000rad/s<^
204 Small-signal circuit models

20 V

Fig. 5.31 See Problem 38.

38. Let Vp = - 2.5 V and loss = 10 mA for the JFET in Fig. 5.31. If v,
= 0.01 sin 2000^ V, assume that the capacitors are open circuits to dc
and short circuits to ac, and calculate Vqs-
39. In Fig. 5.32, assume that all three capacitors are very large and that
the operating frequency is low. If I^ = 10(0. 4 V^s +1)^ in satu- mA
ration, determine Rss so that VJVs = - 8.
40. The transistor in the amplifier circuit of Fig. 5.33 has I^ss = - 8 mA
and Vp = 3 V. (a) Find I^, V^s, and g^. (b) Assume V^ represents a
small low^- frequency signal with an amplitude of 1 mV, and find the
amplitude of the signal voltage across Rd-
41. Let Vs in Fig. 5.34 represent a small-amplitude low-frequency signal
such that Vo is 20 times V^ in amplitude. Find the necessary value for
Rss if Id = 15 mA when V^s = 4 V and Vj = 2 V.
42. Calculate the four ^/-parameters at 250 MHz if Cg^ = 3.6 pF, C^d
= 0.9 pF, Cds = 0.2 pF, Td = 12 kfi, and g^ = 8 mO.
43. Use the information in Fig. 5.21 to develop a high-frequency equiva-
lent circuit for a 2N3823 transistor at 50 MHz if V^s = 15 V and Vgs
equals (a) 0, (b) - 2 V with Vp = - 4 V.

Fig. 5.32 See Problem 39.

t> 18V
Problems 205

2.5 k«

Fig. 5.33 See Problem 40.

44. Data for the Motorola 2N4223 n-channel silicon JFET show that typi-
cal values for the ^/-parameters at 300 MHz are t/^ = 1.6 + /8.3 mU,
!/„ = -jl.6mU,yfs = 3.1 - jl.6mU, and y^s = 0.1 + /3mU. Deter-
mine suitable values for (a) Cg^, (b) g^^, (c) Cg^, (d) r^, (e) C^. (f)
What element do their data suggest should also be included in the
equivalent circuit?
45. Figure 5.35 shows curves of t/-parameter values vs. / for the RCA
40673 n-channel depletion-mode IGFET. Let/ = 200 MHz and de-
termine values for Cg^, Cg^, C^, r^, g^, and r^ (gate to source). Note
that gjn is provided with a phase angle for increased accuracy in the
high-frequency model.
46. Test data for an RCA 3N152 n-channel depletion-mode MOSFET at
200 MHz show that = 0.44 + ;7, t/„ = -/0.19,
t/i, = 6.8 - /2, t/y,

and yos = 0.32 + ;1.9, all in mO. Calculate Cg^, Cg^, C^, g^, and fg
Use y^s to determine Cg^, and use
(gate to source). this value and t/y^ to
calculate a magnitude and angle for g^.

Fig. 5.34 See Problem 41.

t> 25 V

30 kn

1.5 kSl Large

^A\ 1^

10 k«
206 Small-signal circuit models

Typical y Parametvrs vs. Frequency

DO 200 300
FREQUENCY (f)- MHi

Fig. 20. y,-, vs. frequency Fig. 21. Yoa ^** freqw'ncy

COMMON SOURCE CIRCUIT

AMBIENT TEMPERATURE (Ta)* 25*C
ORAIN-TO- SOURCE VOLTS (Vo^'IS
COMMON SOURCE CIRCUIT
AMBIENT TEMPERATURE ( V
2S*C
DRAIN -TO- SOURCE VOLTS (Vbs)*'5
DRAIN MILLIAMPERES (Io)*IO DRAIN MILLIAMPERES dn} • 10
GATE NO. 2 -TO -SOURCE VOLTS (VgZs)**^ SATE NQ2-T0- SOURCE VOLTS (Vs2sK»'
oO
zc

=-:=h:

;<;

^^i;:

OO 200 100 200

FREQUENCY {f)-MHx FREQUENCY (f)-MHx

Fig. 22. Yfs ^*' ''eflwency Fig. 23. ffqu^ncy

Yfg vs.

Fig. 5.35 A portion of the data provided by RCA for the 40673 n-channel depletion-
mode MOSFET. See Problem 45.

47. (a) Use data from the - 55° C and 150° C curves of the lower-current
transistor in Fig. 5.22 to establish values for a and in the equation K
g^ = KT°, with Vqs = 0. (b) Use your results to calculate values for
25°C and 100°C, and compare them with data from the curves.
48. For a certain JFET operating at T = 25°C, Vcs = -0.5 V, V^s
= 10 V, and Vp = -2.5 V, the high-frequency equivalent circuit
contains' Cg, = 7 pF, C^d = 1 pF, and gm = ^ mO. Estimate new
values for these three quantities at (a) T = 125°C, Vqs == -0.5 V,
Vos = 10 V, (b) T = 125°C, Vcs = "0.5 V, V^s = 5 V.
49. An n-channel {Vp = - 2 V, loss = 15 mA, V^^ = 0.8 V, N
JFET
= 0.5, and Vqs = - 1 V), an n-channel depletion-mode MOSFET

(Vp = - 2 V, loss = 15 mA, Vqs = - 1 V), and an n-channel en-

hancement-mode MOSFET (Vt = 2 V, K = 7.5mA/V2, y^^ = 3 v)
Problems 207

are operating at 25°C, V^s = 10 V with Cg, = 10 pF and C^d

all
= 2.5 pF. (a) Find I^ and g^ for each device, (b) In Table 5.2, re-
place = by = and <0 by - 0.25, and find g^, Cg^, and Cg^ for each
device if T = 125° C, V^s = 5 V, and Vqs becomes 1 V more positive
for each transistor.

50. A p-channel enhancement-mode MOSFET is operating at 25°C w^ith

gm = 3.5 mO. Assuming that g^ decreases to 2.4 mU w^hen the tem-
perature increases to 100°C and the operating point remains con-
stant, estimate g^ at - 40°C.
 Single-stage amplifiers at
mid-frequencies

Let us pause for a moment to reflect on our progress. After studying do

models in Chapter 3, we used them in Chapter 4 to estabhsh operating
points that were safely located in the active region for bipolar transistors
and in the region beyond pinch-off for the FETs. With this accomplished,
we were able to consider small-signal models in Chapter 5 and discuss the
relationship of the parameter values to the dc operating point and to tem-
perature. We even calculated the voltage gain for the simple common-
emitter and common-source amplifiers.
In this chapter we will consider the mid-frequency analysis and design
of single-stage amplifiers, those containing only one transistor. The exten-
work to higher and lower frequencies is discussed in Chapter 7,
sion of this
and the problems associated with multistage amplifiers are addressed in
Chapter 8.
Amplifier analysis is considered first, after which we will illustrate sev-
eral designs. In a nalyzing an amplifier^ we seek v-alues for the volt age,
current, and power gain, and for the^input and Output impedanc e. It
turns out that once we determine the voltage gain, it is easy to find values
of the current and power gain.
Amplifiers in the common-emitter and common-source configuration
yield the largest power gain and are therefore widely used. The common-
collector amplifier is often employed when its large input impedance or

small output impedance is advantageous. The common-drain FET ampli-

fiers have similar characteristics. Common-base and common-gate ampli-
fiers have a low value of input impedance and a large output impedance.
All of these amplifiers are considered at mid-frequencies in this chapter.

6.1 The common-emitter amplifier: analysis

The general single-stage common-emitter amplifier is shown in Fig. 6.1a.

Its dc bias circuit isobtained in Fig. 6.1Z? by replacing all capacitors with
open circui ts. A suitable dc-equivalent circuit from Section 3.1 could be

208
6. 1 The common-emitter amplifier: analysis 209

i^-i^'-

r^^' R,< V.

ia)

ib)

ic)

Fig. 6.1 (a) The general single-stage common-emitter amplifier circuit, (b) The dc
biasing circuit, (c) The complete small-signal equivalent circuit.
 :

210 Single-stage amplifiers at mid-frequencies

used in place of the transistor, if a dc analysis is desired. The complete

small-signal equivalent circuit appears in Fig. 6.1c, and it is obviously not
simple. Its accomplished by simplifying the circuit in a manner
analysis is

appropriate to a specified range of operating frequencies. We define the

mid-frequencies to be those frequencies for which the lar^e capacitors
(Ci, C2, and Ce in this circuit) have capacitive reactances that are mu ch
smaller than the associated resistances, while the s mall capacitors (here C^
and C^) have reactances much larger than the resistances with which they
are associated. Thus we replace Cj, C2, and Ce by short circuits and C^
and C^ by open circuits. The resultant mid-frequency equivalent circuit is
shown in Fig. 6.2a. Note that all analytical results obtained from it will be
frequency-independent, since it contains no capacitors. This procedure is
appropriate for almost all broadband amplifiers. In the following chapter
we will discover how to determine what range of frequencies the mid-
frequencies extend over.
As the frequency of the applied signal decreases well below the mid-
frequency range, it is necessary to add Ci, C2, and Ce to the low-
frequency equivalent circuit, as shown in Fig. 6.2b. The high-frequency
equivalent includes C^ and C^ and appears in Fig. 6.2c. These latter two
circuits will be considered in Chapter 7. Note that the base spreading re-
sistance fj. would appear in series with r^ in the mid- and low-frequency
equivalents, but since it is usually much less than r^ it is often neglected in
,

those frequency ranges.

We now analyze the mid-frequency equivalent of Fig. 6.2a. The volt-
age gain that we can measure most easily is the ratio of the amplifier signal
output voltage V^ to the signal voltage V, that is present at the output ter-
minals of the signal generator (including its source resistance) We call it .

A vi the voltage gain with respect to the amplifier inpu t

,

Avi = -^ (1)

By inspection of the mid-frequency equivalent, we see that V^ = V, , and

thus

Vo = -gmVARcWRL) = -gmVi{Rc\\RL)
SO that

Avi = -gm{Rc\\RL) (2)

If not very much larger than Re and R^ then the factor in parenthe-
frf is ,

sesbecomes r^ Re Rl Another important gain is VoIVs, easily obtained

|| \\
•

from Eq. (2) and the equivalent circuit. We let

Rb = ^Th = Ri\\R2
 —
6. 1 The common-emitter amplifier: analysis 211

—vw—•
I \C-
I + ie
' c)
\> ^^^^'
Sm •'^Trl
I

'.© K. R,

(b)

+
If
I

'© VikRi

-•-*
(c)

Fig. 6.2 The small-signal equivalent circuit for the common-emitter amplifier
shown in Fig. 6.1c is simplified for use at (a) mid-frequencies, (b) low frequencies,
and (c) high frequencies.

and then

(rJR>
V^
t
= V^s
R. + (tARb)

Therefore

^^ V< (tARb)
A Vs - Vi
= A Vi
R. + {tARb]

(rARB)
-gmiRcWRi) (3)
Rs + (tARb)
 :

212 Single-stage amplifiers at mid-frequencies

This gain is a measure of the ampHfication of the open-circuit source volt-

age (the Thevenin-equivalent voltage of the signal source), for example

the voltage appearing at the unloaded terminals of the pickup cartridge in
a hi-fi system. The two voltage gains tend to be equal as R^W r^ becomes
much greater than R^ .

Current gain, power gain, input impedance, and output impedance are
also important parameters in describing amplifier performance. Any or
all them may be specified as criteria for a design. We define the inpu t
of
i mpedance as the impedance offered to the signal sou rce

V
Z>-^ (4)

By direct inspection of Fig. 6.2a, we see that it is given at mid-frequencies

by

Zi = r^Rs (5)

Having the input impedance, it is now quite easy to find the Qurren t
gain in terms of the voltage gain:

The power gain is commonly defined as the ratio of the power delivered
to the load Rt to the power supplied to the input terminals of the ampli-
fier. Assuming our signals are expressed as rms quantities, we have
VI Z
yiU Rl
Therefore, the voltage gain Ayi is seen to be of central importance.
Just as Zj may be considered to be the Thevenin impedance viewed at
the input terminals, the output impedance Z^ is the Thevenin impeda nce
at the output of the amplifier with all the independent signal source s set to
zero and Rj^ removed In Fig. 6.2a
. we set V^ = 0; thus V^ must be zero,
and the dependent current generator g,„ V^ is also zero. Therefore

Zo = Re (or Re Ikd, if necessary) (8)

Let us solidify our gains by obtaining values for all these quantities in
shown in Fig. 6.3. We require values for the volt-
the case of the amplifier
age, current, and power gain, the input and output impedance, and the
actual rms output voltage. Since 0.1 mV is small and 2 kHz is neither too
high nor too low,^ we assume that the mid-frequency small-signal equiva-
lent circuit of Fig. 6.2a is applicable. To calculate the required quantities,
we need to determine values of g,„, r^, and r^; this in turn requires that

^The definition of "too" appears in Chapter 7.

6. 1 The common-emitter amplifier: analysis 213

0.1 mV rms
2kHzV-

Fig. 6.3 A common-emitter amplifier for which the voltage gain, current gain, power
gain, input impedance, output impedance, and output voltage are to be determined.

the dc operating point be identified. The problem thus divides itself into
three parts: (1) finding the dc operating point; (2) determining hybrid-7r
parameter values for the small-signal equivalent circuit; and (3) calculat-
ing the required gains and impedances directly from the equivalent cir-
cuit. We shall go through the analysis using the extreme values of jSjc and

jSo for the 2N5088, obtained from the data sheets in Appendix A.

Let us work with the lower-gain unit first. To find /5dc from the data
sheets, we need to know Ic However, to calculate /c, we need to know
—
i^dc a vicious circle indeed. But the presence of K^ suggests that the col-
lector current should be rather insensitive to /Sjc so we probably do not
,

need to know jSdc with great accuracy. We begin by noting that 15 V dis-
tributed across R^, Re, and the transistor leads to a collector current of
(15 - Vc£)/(5 + 5), which is certainly less than 1.5 mA. If /c = 1 mA and
VcE = 5 V, the data sheets give iSdc(min) = 350. Following the procedure of
Section 4.1, we calculate Rxh = Rb = 16.67 kfi, Vth = 5 V. Ifwelet Vb£
= 0.65 V,

350(5 - 0.65)
Ir = = 0.859 mA
16.67 + 351(5)

VcE = 15 - 5(0.859) - 5(0.862) = 6.40 V

These values may be used in conjunction with the transistor specifications
to give an improved value of i3dc(min) From Fig. 9 on the data sheet we
•

estimate a multiplying factor of about 1 .2 for this operating point, and we

apply it to the reference value of 300 at /c = 0.1 mA, Vce = 5 V. This
leads to I3^c{min) = 360, just about the same as the value used earlier. Thus
we conclude that the operating point is at Ic = 0.86 mA, Vce = 6.4 V.
Moving into the second part of the analysis, we assume n = 1 and have

gm = 38.92 1
/c I
= 38.92(0.86) = 33.5 m«
214 Single-stage amplifiers at mid-frequencies

To find r^ we need a value for jSq which usually cannot be found pre-
, ,

cisely. From the data sheet, we find that hj^ = jSq = 350 at /c = 1 mA,
VcE = 5 V. Since our ©perating point is in that vicinity, let's assume jSq

= 350, and therefore

^° ^^«= 10.45 kfi

'
g™ 33.5

Note also that r^ is about 100 kfl, and quite negligible when in parallel
with 5 kfi and 2 kfi.
The last step involves the gain and impedance calculations. We have, in
order,

Avi = -gn,(Rc\\RL) = -33.5(5||2) = -47.9

Z,. = tJRb = 10.4511 16.67 = 6.42 IcQ

(rJRB) .,./6.42

A, = A...A=-47.9(^)=-154
Z^ = 5 kfl

Ap = AviAj = (-47.9)(-154) = 7380

V^ = AvsV, = -41.4(0.1) = -4.14 = 4.14/180° mV rms
In order to see the effect of a higher-gain unit on these performance
parameters, we now use i3dc(max) = 1050, and find

1050(5 - 0.65) ^ _^ "^ .

'- = 16.67 ^ 1051(5) = '-'''

VcE = 15 - 5(0.866) - 5(0.867) = 6.34 V

gm = 38.92(0.866) = 33.7 mU
From the data sheet, I3q
= 1400 at 1 mA and 5 V, and we let

l3o
= 1400 (/c = 0.866 mA, Vce = 6.34 V)

=
1400
= 41.5
.. __kl2
^TT -;;^r-^
33.7

Avi = -33.7(5 II
2) = -48.1

Zi = 41.511 16.67 = 11.9 kO

11.9
Av. = -48.11-^2:9-1 = -44.4
6.2 The common-emitter amplifier: design 215

Aj = -48.1(-^4^) = -286

Ap = (-48.1)(-286) = 13,800
Z^ = 5 kfi

V^ = -44.4(0.1) = -4.44mV
We note that both volt age gains, the voltage output, and the outp ut
impedance have stayed quite constant particularly for this large change
,

in iSdc and jSq. The output current Vo/Rl is also relatively unchanged.
However, jS is a measure of current gain, and it is therefore not surprising
to find that the current gain and power gain have increased. The increase
is by virtue of a decrease in /^ (Z^ increases), since /^ is almost unchanged.

D6.1 In Fig. 6.2fl, let V, = 2/i0° mV rms, jR, = 300 fi, Rb = 25 kfi, /3o
= 400, g^ = 80 mO, Re = 4 kQ, and Rl = 6 kfl. Find (a) r^, (b) Ay,, (c)
A/, (d) the average signal power delivered to the load.

Answers. 5 kfi; -179.1; - 133.3; 21.4 /xW

6.2 The common-emitter amplifier: design

Let us now consider the problem of designing a small-signal common-

emitter amplifier to meet a set of mid-frequency performance specifica-
tions, typically input impedance, output impedance, and voltage gain, al-
though current, power gain, or dc-supply voltage might be given as
alternate requirements to be met. Suppose the problem is stated as follows:

Design a common-emitter amplifier using a 2N5089 transistor to provide a

voltage gain Vg/Vg > 200, between a small-signal voltage source having a
| \

resistance of 500 fi and a load Ri = 5 kfi. It is also specified that Z^ > 5 kfi.

The first step in the design process is the selection of a suitable circuit
topology. Figure 6.4a is a stable-operating point version of the common-
emitter circuit, and we show Rg = 500 Q and jR^^ = 5 kfi, as specified. In
thinking through the design procedure, we should see that the perfor-
mance criteria must be satisfied by an appropriate small-signal equivalent
circuit but that the parameter values in that circuit are either determined
by the dc-equivalent circuit (Fig. 6Ab) or actually appear as part of it.
Only Re and the three capacitors will not appear in the small-signal cir-
cuit. Let us think first in terms of some reasonable small-signal parameter
values and then see whether or not a dc-equivalent circuit can be designed
to provide them. If not, we must modify our original small-signal values
and try again.
 :

216 Single-stage amplifiers at mid-frequencies

The gain requirement is

Vo
= gm{Rc\\RL) ^200
V ^s ^'^
UZi > 5kfi, andfl, = 0.5 kl2,

We try 0.9,
which will require the largest value for g^ (or Re)- Next we
moderate value for Re so that Vcc will not be too large, say Rq
select a
= R^ = 5 kfi. Thus

and therefore
88.9 ^ ^^^
'-> 18:9-
= 2.285 mA ,

The voltage drop across He is seen to be 11.42 V; if we use a 27- V supply,

then there are about 15.6 V to divide between Vre and Vce
So let's round -

these numbers off a little on the safe side and try to set the operating point
at Ic = 2.4 mA, Vce = 7.5 V, and therefore V^f = 7.5 V.
We complete the design of the bias circuit by the procedure given in
Section 4.1, finding

Re^ = 4^
2.4
= 3.125 kfl

2.4
himax) = ^3Q- = 5 /XA

since the data sheets indicate that iSdc(min) = 480 at /c = 2.4 mA. We next
select a current through jRj

/^j = 50/b = 250 fiA

Then

^1^ = — —
27 - 8.15
TTi^^
0.250
^^
= 75.4, ,^
kfi

75.4(33.3)
^^^-_ 108.7
_ 20 1 ko
-23.1kfl
6.2 The common-emitter amplifier: design 217

5 kJ2 ^ K,

(a)

2N5089

(b)

30 V
8 kn ^ Large

215krZ 1
Large
1^
soon
2N5089
If
•Skfi
76.5 kJ2

3.5 kn. Large

(c)

Ftg. 6.4 (a) The circuit selected to provide | Vo/Vj > 200, Z,- > 5 kfi, at mid-
frequencies between the given source and load, (b) The dc-equivalent circuit, (c) The
final design gives VJV, = - 219, Z,- = 5.24 kfi.
218 Single-stage amplifiers at mid-frequencies

Finally, we assume that

Cj C2, and C^ are very large and produce small
,

reactances in the frequency range of interest. We will assign specific val-

ues to these capacitors iir Chapter 7.
This completes the preliminary design. We must now carry out an anal-
ysis for the lowest-gain unit to see whether or not we have met all the
specifications. We check to see that no errors have been made in the dc
circuit; of course they haven't, and Ic = 2.4 mA, Vce = 7.5 V. It follows
thatg^ = 38.92(2.4) = 93.4 mU. The tabulated value of i(3o(n,in) is 450 for
/c = 1 mA, and the data sheet indicates that jSq changes only slightly with
Ic in this range; 450 is therefore a good choice. Thus, r^, = 450/93.4
= 4.82 kO. Then

Zi = t^WRb = 4.82 23.1 = 3.99 II

kfi

which is than 5 kQ, and we see that we have already missed the specifi-
less
cations; Zj is too low. We need to increase r^ and perhaps Rb sls well.
To increase r^, we must decrease g^, which will drop the gain below
permissible levels unless {Rc\\Rl) can be increased a little. Let us try Ic
= 2 mA, g^ = 77.8 my, and fie = 8 kfi. We increase Vcc to 30 V because
of the greater voltage drop across Re, and then let Vce = 7 V, V^e = 7 V.
The new bias design leads to Re = 3.5 kQ, lB{max) = 2/480 = 4.17 /xA.
With /fii = 250 fxA, we find that R2 = 7.65/0.2458 = 31.1 kQ, R^
= 22.35/0.250 = 89.4 kfl, and fiyh = 23.1 kfi. Therefore

^^•^
5.78 kfi
77.8

and

Zi = 4.63 kO

This is still too low, but at least we have raised r^ above 5 kfi. It now seems
likely that slightly higher values for Ri and ^2 will lead to victory.
Let us try Ibi = 25lB(rmoi) = 104 ^A, and then

R^^ = Rb = 56.4 kfi

Zi = 5.24 kfi

Ay,= -77.8(8115)^;;^= -219

6.3 Common-base and common-collector amplifiers 219

These results are satisfactory, and the final values are indicated on Fig.
6.4c; we could even raise Iri slightly if we wished and
achieve a little bet-
ter sensitivity against a change in /3dc or in temperature. The design should
be checked for the higher-/? transistors, but this is left as a problem for the
eager learner. We
expect a larger voltage gain and input impedance.
It is hoped that at least one important point has been made in the course
of this example: there are few, any, design problems that have a unique
if

answer, and it is often easier to design and redesign than it is to solve the
problem all at once. The use of a sequence of simple formulas, plus a little
experience, enables us to gauge the effect of each variable on the amplifier
performance and to change parameter values intelligently.

D6.2 Determine the percentage increase in |

Vo/Vj for the amplifier of
Fig. 6.4c if there is a 10% increase in the value of (a) R^, (b) R2, (c) ^q.

Answers. 5.9%; 7.0%; 0.7%

6.3 Common-base and common-collector amplifiers

The bipolar transistor is used most often as an amplifier when it is in the

common-emitter configuration It turns out that this form produces the
.

la rgest power and current gain, good voltage gain, and intermediate va l-
ues for the input and output impedanc e. Certain applications, however,
require a very high or very low input or output impedance. Such specifi-
cations often lead to the use of the common-collector or common-base
amplifier.
We first investigate the common-base amplifier at mid-frequencies and
show that it has low input impedance with good voltage gain.
A typical circuit for the common-base amplifier is shown in Fig. 6.5a. It
should be noted that the dc-equivalent circuit has the identical form of
that for the common-emitter amplifier; this dc circuit was considered in
Chapter 4. The mid-frequency ac-equivalent circuit appears in Fig. 6.5b;
we shall study the various performance parameters under the assumption
that Td is very large and may be considered infinite.
We first see that Vt, = -Vjy and we therefore have the voltage gain
directly from the equivalent circuit. Since

Vo = -gmVARcWRL)
we have

Vi = g™(flcl|RL) (9)
V> -V^ - V,
Note the lack of a 180° phase reversal in A y^ as compared to the common-
emitter circuit.
220 Single-stage amplifiers at mid-frequencies

R
—WA/^^
I

V,(7) V, >R

1
V\A^ •-
^^^
V,(^ V^ ^R r.<V. R,< V„

ib)

Sm ^TT y\

r^ Vn <Rc\\R

(c)

Fig. 6.5 (a) A single-stage common-base amplifier circuit, (b) The mid- frequency
equivalent circuit, (c) Zj is the parallel combination of fig, r^, and Z^.

The input impedance is Z, = V, //, This is obtained most easily by find-

.

ing the parallel combination of jR£, r^, and the im pedance seen to the
r ight indicated as Z^ in Fig. 6.5c. The voltage at these terminals is
of r^ ,

- V^ and the current flowing

, to the right in the upper conductor is the
dependent-source current -g^^jV^. From Ohm's law,

1
z. =
fom ^ TT &j
6.3 Common-base and common-collector amplifiers 221

Making the parallel combination, we have

1
Zi = Bfillr, (10)
g.

Since g^ usually lies between 10 and 100 mU, Z^ is certainly quite small for
the common-base amplifier, usually less than 100 U. It is interesting to
note the result of combining r^, and llgm in parallel,

1 r^/gm r^

g; r. + 1/g, ^0 + 1

This is the input impedance seen at the emitter-base terminals of Fig.

6.5b. Its value is the parallel resistance r^ reduced by the factor (3q -\- I.

This factor will appear in a number of the results for the common-base
and common-collector circuits. The reason it appears is that the dependent-
source current, g;n^7r or (i3o/r7r)^7r? is exactly /3o times as large as the cur-
rent in r^, Vt^/t^. Their sum is the current marked I^ in Fig. 6.5b, and

V V
L= - (/5o + 1)

Knowing the input impedance, we may now find the voltage gain with
respect to the signal source:

Zi
Vs Vi
" R, + (11)
V, Z,

This gain can be much less than Ay, whenever Z,- <S H,
The current gain is also found easily:

A, = Vi (12)
Vi/Z, fir

Let us substitute the pertinent expressions from Eqs. (9) and (10) into Eq.
(12):

fi
gm^i
gm(ficllfiL) ReWt.
K Rr + R g,

Since the term in parentheses must be less than l/g„j A/ must be less than,

Re /{Re + Rl), which is less than unity. The current gain for the com-
mon-base amplifier is therefore actually equivalent to a slight attenua-

tion. We note that the output and input currents are in phase, as is the
voltage gai n.
222 Single-stage amplifiers at mid-frequencies

The power gain from the amplifier input to the load is

Ap = (13)

This result has the same form as that for the common-emitter, but the
numerical value is likely to be much lower because the input impedance is
usually much smaller than the load resistance.
The only remaining parameter to be found is the Thevenin-equivalent
output impedance which we find by returning to Fig. 6.5^?, removing
,

Rl, and looking into Re across the collector-base terminals with V^ set to
zero, a short circuit. The open-circuit voltage there is - g^^ V^r ^ c> while
the s hort-circuit current is -gmV^Tr- The control voltage V^ is unchanged
for an open-circuit or short-circuit termination. The ratio gives the output
impedance

7 — V^^
= B, (14)

This unchanged from the common-emitter result. The value is as large

is

as we wish, and it is independent of the transistor parameters.

Comparing these results with those for the common-emitter, we find
that the common-base amplifier has comparable voltage gain and output
i mpedance, much lower input impedance, current gain less than unity,

and modest power gain Most of its applications take advantage of the
.

lower value of Z^ and the lack of 180° phase shift in the voltage and cur-
rent gain.
The common-base amplifier circuit shown in Fig. 6.6 leads to an ac-
equivalent that has almost the same element values ^s the common-emit-
ter circuit of Fig. 6.3 analyzed in Section 6.1. Only the source resistance
has been decreased to a more appropriate low value. The dc operating
point is the same as it was, and g^ and r^ are also the same, 33.5 m^J and
10.45 kfi respectively. Using these results and the other element values, we

Fig. 6.6 A common-base amplifier containing element values similar to those ap-
pearing in the common-emitter circuit of Fig. 6.3.

71 ixF 2N5088 4mF

0.1 mV rms 2 kn
2 kHz
6.3 Common-base and common-collector amplifiers 223

may calculate and compare the performance parameters of this common-

base unit with the common-emitter results obtained earlier and given in
parentheses:

Ayi = 47.9 (-47.9)

Zi = 29.6 (6.42 kl2)

Vs 17.8 (-41.4)

A I = 0.709 (-154)

Ap = 33.9 (7380)

Z^ = 5 kfl (5 IcQ)

The relative magnitudes bear out the general comparison made above.
The common-collector amplifier, often called an emitter-follower, is il-
lustrated in Fig. 6.7a; its mid-frequency equivalent circuit is shown in
Fig. 6.7b. If r^must be included in the analysis, it appears in parallel with
fl£ in the equivalent circuit. Note also that there is no by-pass capacitor in
parallel with R^, because the signal voltage is present at that point.
We again require expressions for the six performance criteria. The
results are simplified somewhat if we agree to let jR£ represent Re and Ri
in parallel as an effective load resistance:

RL = ReWRl
Let us begin by determining the input impedance. Looking at Fig. 6.7Z?,
we can see that it is R^ in parallel with the series combination of r^ and the
impedance Zj. looking to the right at the emitter-collector terminals,
shown in Fig. 6.7c. We first find Zj. by squirting a current /^ into the base
terminals. Thus V^ = r^4, while g^V^ = gmT-^h = ^oh- Therefore the
currents 4 and |3o4 combine in the effective load resistance Ri:

and

Z, = -^ = (00 + 1)Rl

We see that the resistance connected to the emitter appears in the base
by a factor of jSq + 1. This is a general result worth
circuit multiplied
remembering. Note that the higher resistance appears on the base side
where the current is smaller.
We now have

Zi = -^ = RbIIK + (/3o + l)fl£] (15)

 t .

224 Single-stage amplifiers at mid-frequencies

Vrc A

jf 2 /

^e^^
R,Z V^

(fl)

—WA^—X
Rs !l E '-
I
• f •-AAA^— f-

^.© ^^ ^^i
.4>
/?/^ K,

-•
c
R'L=Rt\\f^i

ib)

o——

-.<^'^m *^^1T

(C) id)

Fig. 6.7 (a) A common-collector amplifier circuit, often called an emitter-follower.

(b) The mid-frequency equivalent circuit, (c) The definitions of Z^. and (d) of Z/
6.3 Common-base and common-collector amplifiers 225

Both Rb and (jSq + 1)H£ can be quite large; our first discovery is that the
common-collector configuration can have a large input impedance and is
often used for that reason. In practice, the magnitude of Z^ is often limited
hy Rb.
Knowing Z^ we can , use voltage division to help us obtain the voltage
gain A v^:

z.
V = V-
+ z.

or

""
V, r. + Z, r. + (1 + MRL ^ '

This is certainly less than unity, although it is often as large as 0.9. Note,
however, that there is no p hase reversal for the voltage gain.
More voltage-divider manipulations give us Ay^:

V V V V- Z

If the right-hand expression written out in terms of the element values, it

is

is so long that it is One does better to calculate A y^ and Z^ first.

frightening.
The two voltage gains turn out to be almost equal in magnitude, since Z^ is
usually much larger than Rg. In general, we have A y^ < Ayi < 1.
As for the current gain, it is once again easy to find in terms of the volt-
age gain:

(^^)
^^-7:-lvzr"^^^KZ
Since the input impedance is apt to be much larger than the load impe-
dance, the current gain has a satisfactorily large value.
We again take the power gain as

Ap = ^ = Ay,A, = Ay,2|L (19)

The last parameter to be determined is the output impedance, which is

the impedance seen looking to the left from H^ with Ri^ removed and V^
= 0. This in turn is Hf in parallel with the impedance seen looking to the
left of Hf This
. latter impedance is given by the ratio of V^ to 7^, and we
call it Z/, Fig. 6.7c?. As we have already seen, the dependent-source cur-
rent is i^o/fo; therefore
226 Single-stage amplifiers at mid-frequencies

But Ih flows through the series combination of r^ and (HbUR^), and we

have

y„ = -4[r, +'(fiBl|fl.)]

Therefore

+ (Rs\\R,)
= y„
r,
Z,
le |3o + 1

Note that the impedance seen at the emitter is the impedance connected to
the base, including r,, divided by (/3o + 1). Impedance levels increase by
(00 + 1) times going from emitter to base, and they decrease by a factor of
(/3o+ 1) from base to emitter.
Combining Z; and Re in parallel, we have

Z„ = R, (20)
l3o + 1

The factor of/Sq + 1 causes the bracketed resistance to be of the order of

l/gm', combining this in parallel with R^ does not lower the value appre-
ciably. Thus we find that the output impedance of the common-collector
is similar in value to the input impedance of the common-base; each is apt

to lie in the range from 10 to 500 Q.

Figure 6.8 shows an emitter-follower that may be compared with the
common-emitter and common-base amplifiers of Figs. 6.3 and 6.6 respec-
tively. The dc-equivalent circuit differs in lacking any collector resistance,
but this does not affect the value of Ic and it merely increases Vc£ from
,

6.4 to 10.7 V. This has no appreciable effect on gm, ^o, or r^ so we can use ,

the values we found earlier: g^ = 33.5 mU and r^ = 10.45 kO. We obtain

the gains and impedance values given below; the corresponding results are
given for the other two connections to provide easy comparison.

C-E C-B C-C

Zi = 6.42 kfi 29.6 Q 16.4 kfi

Avi = -47.9 47.9 0.980
Avs = -41.4 17.8 0.922
A/ = -154 0.709 7.91
Ap = 7380 33.9 7.74
Zn = 5kfi 5kfi 32.3 fi

The common-collector or emitter-follower amplifie r may be character-

ized as having high input impedance, low output impedance, and mod er-
a te values of current and power gai n.
6.4 The common-source amplifier: mid-frequency analysis 227

15 V A

50 m
3mF
1 kn
2N5088

0.1 mVrmsf + 25 kn.

2 kHz 4aiF 2kn

Fig. 6.S A common-collector amplifier circuit having element values similar to those
of the common-emitter of Fig. 6.3 and the common-base of Fig. 6.6.

D6.3 The common-base amplifier shown in Fig. 6.5a contains these ele-
ments: Rs = 40 12, R£ = 4 kfi, Re = Rl = 6 ki], Ri = 50 kQ, ^2 = 30 kQ,
and three large capacitors. If /3o = 100 and g^^ = 50 mU, find (a) Z,, (b)
Z^, and (c) Ay,.

Answers. 19.7 fi; 6 kfi; 49.5

D6.4 Element values for the common-collector circuit of Fig. 6.7a are
R, = 3kfi,fli = 50kQ,fi2 = 30kfi,i?£ = 4kU, Rl = 6 kfi, and tv^o large
capacitors. If 00 = 100 and g^ = 50 mU, find (a) Z,, (b) Z^, (c) Ays-

Answers. 17.4 kQ; 44.9 Q; 0.846

6.4 The common-source amplifier: mid-frequency analysis

We now leave the mid-frequency version of the bipolar-transistor single-

and begin considering the performance of the field-effect
stage amplifier
under similar conditions. The most widely used form is the
transistors
common-source configuration. Figure 6.9a illustrates a typical arrange-
ment for a JFET. The resistor Rss at the source terminal (the JFET source,
not the voltage source) and the divider composed of Ri and R2 provide
operating-point stability over a wide range of temperature and transfer
characteristics. The three large capacitors, Ci, C2, and Css, are assumed
to have reactances at the operating frequencies that are small compared
with Rq, Ri, and Rss respectively, where fig is the parallel combination of
Ri an d R2, sls usual The mid-frequency equivalent circuit then becomes
.

fliat shown in Fig. 6.9b. Note that the interelectrode capacitances C^^, C^^,

and Cds may be replaced by open circuits in this frequency range,

since their reactances are much larger than all the resistance values.
 o

228 Single-stage amplifiers at mid-frequencies

Kt. < K

ia)

—^AA/— ^
I
Rs
—f——G
•
D

• 4

(6)

Ftg. 6.9 (a) A typical common-source single-stage amplifier, {h) The equivalent cir-

cuit in the mid-frequency range; Rg = i^i ||fi2-

The two voltage gains are obtained by inspection of Fig. 6.9b'.

Vo = -gmVARoWRL) = -gn,V,(Ro\\RL)

SO that

Av, = -^ = -g,n(RD\\RL) (21)

and

V. R R
Avs - " -
Avi - hr-{gJ{RD\\RL) (22)
V, R, + Rb Rs + Rb

Since Rb can be made arbitrarily large, Ay, = Ay^ for FET amplifiers.
The input impedance is simply flg;

i = R (23)
6.4 The common-source amplifier: mid-frequency analysis 229

and is not a function of any transistor parameters. The current gain de

pends on Z^ hence ;

lo VoIRl Zi Rb
A/ = (24)
/, V,/Z,

This not a particularly important performance parameter for FET am-

is

plifiers. We
can make the current gain almost as large as we choose by
increasing the value oiRg, since Ri and ^2 serve only as a potential divider
for the gate {Iq = 0). The powder gain is also wholly under our control by
varying the size oi Rb:

V I Rb_
AviAi = Avi^ (25)
yj. Rr
Finally, the output impedance presented to the load R[^ is simply

Zo = Rd (26)

As an example of a typical set of values for a common-source FET am-

plifier, let us analyze the circuit shown in Fig. 6.10. For the sake of sim-
plicity, let us assume that the transistor is a unit with Vp = - 3 V and Ij)ss
= 9 mA. From the transfer characteristic,

JD = j^[Vcs-(-3)f (27)

and the gate-to-source-loop equation,

0.3
Vcs = 20 - (1)/d (28)
1.7 + 0.3
we can solve for the operating point by substituting Eq. Eq. (28),
(27) into
or vice versa, finding that /^ = 4 mA and Vcs = - 1 V. Therefore V^s
= 20 - 4(3 + 1) = 4 V, and the device is operating in the region beyond

Fig. 6.10 A typical common-source amplifier circuit for which the mid-frequency
performance parameters are to be determined.

20 V

3 kn 5 ^F
1.7 Mfi

7—If
1^^
0.02 /iF
1 kn

5 kn
\L0° mVrmsf + 0.3 Mfi
1000 Hz
• k^S 25 /iP;
230 Single-stage amplifiers at mid-jrequencies

pinch-off, V^s > - 1 - ( - 3) . The transconductance at this operating

point is

2(9)
g" = 73^(-l
(-3)
+ 3) =4mO
The several gains and impedances are
Ay, = -4(3 II
5) = -7.5

Zi = Rb = 1.7||3 = 255 kQ

^ r 255
Vs

^ ^OO ^^^
A

Ai = -7.5—-
mm
= -382
o

Ap = (-7.5) (-382) = 2870

Z, = 3 kQ

The source is supplying only 3.9 nA rms, or an average power of 3.9 pW.

As a different type of example, consider the circuit shown in Fig. 6.11.

This network is known as a phase splitter for it develops equal but oppo- ,

site output voltages, V^i = - Vo2 from a single input V^ It may be used
, .

in place of a transformer having a single primary winding and two identi-

cal secondary windings (or a single center-tapped secondary) This partic- .

ular circuit uses an n-channel enhancement-mode MOSFET, but any type

of transistor can be used with the appropriate bias circuitry.
From Fig. 6. life, we see that V,i = - g^V^Rp and V,2 = gmV.Rss It -

is apparent that Vpi = - Vo2 whenever Rss = R p- To find the voltage

gains, we note that the voltage between gate and ground is

V ——— = y + 2 y ficQ

Solving for V^ yields

1 + g^Rss Rb + Rs
Since V^i = - gmV^Ro and ¥^2 = gmyirRss, the two gains are

^ol gmR-D Rb
Vs 1 + gmRss Rb + R.

and

ol gmRss Rb
= +
Vs 1 + grnRsS Rb + R.
6.5 The common-source amplifier: design 231

(a)

ib)

Fig. 6.11 (a) A phase-splitter circuit using an n-channel enhancement-mode MOS-

FET. (b) The mid-frequency equivalent circuit; V^l = ~ ^o2 when R^ = Rss-

Usually Rb^ Rs, while g^ R^ and g^ Rgs range from 1 to 100. Thus each
of thetwo output voltages is slightly less than the open-circuit source vol-
tage. The phase-splitting is therefore accomplished without any voltage
amplification, but current and power gains greater than unity are pos-
sible.

D6.5 Element values for a C-S amplifier are R, = 800 fi, Hj = 750 kfi,
R2 = 150 M, Hd = 4 kl2, Hl = 6 kfi, Rss = 2.5 kQ, V^d = 24 V, loss
= 8 mA, and g^^o = 8 niO. Assuming operation at mid-frequencies where
Ci, C2, and Css can be neglected, find (a) Ayi, (b) Ay^, (c) A/, (d) Ap,
(e)Z„(f)Z,.
An5ii;er5. - 9.60; - 9.54; - 200; 1920; 125 kfi; 4 k«

6.5 The common-source amplifier: design

The design problem we shall use to illustrate a suitable procedure may be

stated as on the following page.
 2

23 Single-stage amplifiers at mid-frequencies

Design a common-source amplifier to provide an input impedance greater

than 1 Mfi and a voltage gain |*A yj > 20 betweeen a 10-kfi load and a source
|

developing 1 mV ?it 2 kHz with R^ = 1 kQ.

To these conditions let us also add the constraint that we must

utilize an
available n-channel depletion-mode MOSFET
having a range of pinch-
off voltages -2 <: Vp < -0.5V, a corresponding range of drain-to-
source saturation currents 10 > I^ss — 4 mA, and a range of g^o from 10
to 16 mO. A circuit of the form shown in Fig. 6.12a is selected, and the
two limiting dc transfer characteristics are sketched as solid curves in Fig.
6.12b. We see that we can achieve a maximum value for g^^, g^o
= 2(10)/2, or 10 mU, for the unit with the higher /pss while g^o ?

= 2(4)/0.5 = 16 mO for the smaller Ipss variety. Note that since there is a
range of values for Vp, other values of g^o ^n^Y be found associated with a
specific value of I^ss Two such curves that will be investigated later as
•

possible worst cases are shown as broken lines in Fig. 6.12Z?.

As we did with the common-emitter design, it is helpful to obtain some
insight into the required value of g^ by making a rough estimate from the
gain equation:

\Avi\ = g^(Ho||10)>20
If we let Rd = 10 kft, then g^ > 4 mO, a value that should be easy to
obtain. Suppose that we identify the two operating points at which g^
= 4 mU on the limiting transfer characteristics. For the upper curve,

4 = 5{Vgs + 2)

Vgs = -1.2 V
and
Id = 2.5(-1.2 + 2)2 = 1.6 mA
The lower unit requires

4 = 32(yGs + 0.5)

Vgs = -0.375 V
and

Id = 16(- 0.375 + 0.5)2 = 0.25 mA

These two operating points are identified in Fig. 6.12b. Any operating
point at a higher value of drain current is satisfactory, since g,^ would be
larger, and therefore any bias line passing through or above both points
will lead to a sufficiently high value of g,„ To simplify the circuit, we let
.

Ri be infinite, so that the bias load-line equation is

6.5 The common-source amplifier: design 233

1 kn

lOkJ2^ v^

1 mV (T) v^ R.
2 kHz

ia)

Id (mA)

Upper curve:

Lower curve: / /

ib)

Fig. 6.12 (a) The topology selected for a common-source amplifier design that must
give \Avi\ ^20 for a range of MOSFETs. The two extremes of the transfer charac-
(b)

teristics are shown, along with the final choice of load line. The broken lines are trans-

fer characteristics that are investigated later.

To pass through the point - 1.2 V, 1.6 mA, we must have Rss = 1.2/1.6
or 750 A few
Q. more calculations show that the intersection with the
lower curve is at - 0.333 V, 0.444 mA. This is above the lower limit of the
possible operating points on that curve and is therefore quite satisfactory.
Two other possible worst cases should also be investigated. One is the
transfer characteristic that is obtained for I^ss = 10 mA and gjno
= 16 mU; therefore Vp = - 2Ioss/gmO = - 1.25 V. This is shown as a
 ,

234 Single-stage amplifiers at mid-frequencies

broken line in Fig. 6.12b. The other occurs when Ij:,ss = 4 mA and
g^o
= 10 mU, so that Vp = - 0.8 V; this is also indicated in Fig. 6.12b. The
points at which g^ = ^4 m^ are identified and are seen to lie safely on or
below the 750-0 bias line.
The maximum possible value of Z^, is 1 .6 mA, so our selection of Rd as 10
kfi leads to Vflo = 16 V. Since V^ss = 0.75(1.6) = 1.2 V, a supply voltage

VoD = 20 V will leave V^s = 2.8 V and ensure operation ' beyo nd pinch-
off,
We complete the design by selecting R2 = Rb = IMQ, thus having the
values Rd =10 kfi, Rss = 750 1], flj = 00, i?2 = 1 MQ, and Vdd = 20 V.
Checking our design through analysis, we obtain the following values for
the two different units:

hss = 10 mA 4 mA
Vp = - 2 V -0.5 V
Id = 1.6 mA 4/9 mA
Vcs = -1.2 V -VsV
Vds = 2.8 V 15.22 V
Ay, = -20 -26.7
Z, = 1 Mfi IMfi
Both devices meet specifications, and we assume that transistors with
intermediate characteristics will provide values of gain whose magnitudes
are greater than 20.

D6.6 A common-source amplifier is operating with R^ = I kQ, Hi

= 600 kfi, R2 = 150 kfi, Rd = 4.5 kfi, Rl = 9 kfi, Rss = 2 kfi, Vdd
= 20 V, and Id = 2.5 (Vgs + 2) 2 mA. If it is desired to reduce Vds to 3 V,
what new value should be selected for (a) Rd, (b) H2, (c) jRi?
Answers. 4.80: 162.1: 555 kfi

6.6 Common-gate and common-drain amplifiers

The common-gate amplifier is shown in Fig. 6.13a. As we found in Sec-

tion 4.7, the analysis or design problems associated with the dc operating
point are identical to those of the common-source circuit. Capacitors Ci
C2, and C are large, and they approximate short circuits for the signal at
the mid-frequencies. Again remembering the discussion in Chapter 4, we
may be able to achieve a suitable design without using Ri and ^2
(Ri = 00, ^2 = 0), depending on the range of temperature expected, the
variability of the FET parameters, and the desired input impedance.
6. 6 Common-gate and common-drain amplifiers 235

—^AA'
I
R
Me re S D
^f

— — ^AA^
;© K «.
<7yL

(a)

(^)

Fig. 6.73 The general circuit diagram of a common-gate amplifier is shown in (a)
and its mid-frequency equivalent in (b).

The performance characteristics of the common-gate amplifier are sim-

ilar to those of the common-base circuit: lo w input impedance, high ou t-
put impedance, and good voltage gain As a matter of fact, the similarity
.

is so great, as shown by a comparison of the mid-frequency equivalents in

Fig. 6.13b and 6.5b, that we may use all the common-base results by let-
ting Re -^ Rss^ Re ^ ^D, and r^ ^ oo. We have

Avi = gmiRDWRl] (29)

1
^i = Rss (30)

z.
(31)
Rs + Zj
common-gate
A, = A Vi (32)
Rl
7.
Zip - /\vi -^— (33)

^o = Rd (34)
236 Single-stage amplifiers at mid-firequencies

Before considering a numerical example, let us complete the FET-

amplifier picture by presenting the common-drain circuit of Fig. 6. 14a and
its mid-frequency equivalent in Fig. 6.14Z?. By analogy with the common-
collector (emitter-follower) circuit, we may conclude that the common-
drain amplifier or source-follow er will be blessed with a low output impe-
dance, the price being a voltage gain slightly less than unity. The voltage
and current gains will not show a phase reversal.
The gains and impedances for the source-follower could be found from
those pertaining to the emitter-follower by comparing the equivalent cir-
cuits of Figs. 6.14Z? and 6.7i>, replacing R^ by R^s and /3o by r^lg^^ and
then letting r^ become infinite. However, the educational benefit would
be minimal, and it is easy to derive the formulas anew from Fig. 6.14Z7.
We let
Rl - ^Ssl ^L
and then

Vo = gmV.RL -- gm(V, - Vo)RL

since V^ = Vi - V,. Therefore

Vo gn^RL
Ayi (35)
Vi 1 + gm«£
and

so that
z, =

f- (36)

Rb gmRL Rb
^Vs =^=- " Rb + Rs
- =
1 + gmRL Rl + ! Rs
(37)

Moreover

VoIRl ^«
A; A (38)
v,/z,

and

Ap _ 4 2 ^B (39)
" ^"' Rl

Both the current and power gains can be made as large as we wish by
increasing the magnitude of fig Only the output impedance remains to be
.

found, and Fig. 6.14b shows this to be Rss in parallel with the impedance
seen looking to the left into the source-drain terminals. The current into
the source is - gmV^ and the source-to-drain voltage is V„. But V^
 —
6. 6 Common-gate and common-drain amplifiers 237

Vnn A

^e ^( \.
Vi /?2< ^<
R,Z Vn

(a)

ib)

Fig. 6.14 (a) A representative common-drain amplifier, or source- follower, (b) The
mid-frequency equivalent circuit;Rg = Ri||R2-

= -Vo, since V^ and Vj are both zero. Therefore Rss is in parallel with a
resistanceof yo/[-gm(-K)] = 1 /gm, and

Zo = R ss (40)
gn

Since g;„ is of the order of 10 mU, it is apparent that the output impedance
is of the order of 100 ft or less.

To gain some quantitative feeling for the relative values of these param-
eters, we can analyze C-G and C-D amplifiers that are similar to the C-S
circuit of Fig. 6.10 discussed earlier.The two comparable circuits are
shown The only change in the dc operating point is an in-
in Fig. 6.15.
creased value of Vds for the common-drain circuit, which does not affect
the earlier A-mU value of g^ The analytical results for the three amplifiers
.

are tabulated on the following page. They may also be compared with the
performance of typical bipolar amplifiers, as tabulated at the end of Section
238 Single-stage amplifiers at mid-frequencies

C-S C-G CD
z,= 255 kfi 20012 255 kfi

Ayi = -7.5 7.5 0.769

^Vs = -7.47 6 0.766
Aj = -382 0.3 39.2
Ap = 2870 2.25 30.2
Zn = 3kfi 3kfi 200 fi

6.3. Comparing these three types of FET amphfiers, we note that the C-S
circuit characterized by moderate voltage gain with phase revers al and a
is

high input impedance, the C-G configuration by moderate voltage gain

without phase reversal and a low input impedance, and the C-D arran ge-
ment by a high input impedance, a low output impedance, and a volta ge
gain less than unity without phase reversal .

Fig. 6.15 (a) A common-gate amplifier and (b) a common-drain amplifier that have
element values comparable to the common-source amplifier of Fig. 6.10.

5mF
50 fi S D

\L0° mWTms(±) ka
1000 Hz Vy 5

(fl)

1Z.0 mV rmsf +
1000 Hz 5 kn
6. 7 Amplifier analysis in terms of h-parameters 239

Compared with bipolar-transistor amplifiers, the FET circuits gener-

ally provide gain but much greater input impedance. As we shall see
less

in the next chapter, FETs maintain their gain and high input impedance
at high frequencies, a fact which accounts for their widespread use in that
frequency range.

D6.7 Element values for the common-gate amplifier of Fig. 6. 13a are R^
= 40 12, Rss = 2.5 kO, Rd = ^ kfi, Rl = ^ kft, R^ = 750 kQ, R2
= 150 kfi, Vdd = 24 V, and three large capacitors. Let I^ss = 8 mA and
g^o = 8 mU. Find (a) Ay,, (b) Ay„ (c) A,, (d) Ap, (e) Z,, (f) Z,.
Answers. 9.6; 8.16; 0.364; 3.49; 227 Q; 4 kQ

D6.8 Element values for the common-drain amplifier of Fig. 6.14a are
R, = 800 Q, Rss = 2.5 kfl, R^ = 1 kQ, R^ = 750 kQ, R2 = 150 kfl, V^d
= 24 V, and two large capacitors. Let loss = 8 mA and g^^o = 8 mU. Find
(a) Av„ (b) Ay,, (c) A;, (d) Ap, (e) Z,, (f) Z,.

An5w;^r5. 0.741; 0.736; 92.6; 68.6; 125 kU; 227 Q

6.7 Amplifier analysis in terms of /i-parameters

The /i-parameters were introduced in Section 5.6. They are only used at
low- or mid-frequencies for bipolar transistors. Figure 6.16a shows the
signal variables we used previously for a common-emitter amplifier. We
have again

\e = hiJh + i^re ^ ce

h = hfeh + KeVce
Figure 6.16b shows the source and load connected to the transistor and
uses the input and output variables we have applied to amplifiers. Let us
replace V^g by V, and V^e by V^ and write ,

Vi = hiJh + KeVo (41)

/, = hfjj, + K,V, (42)

At the output,

V„ = -4(/JcI|Bl) = -icRL = -^Y{

(43)

where
1 1
Yl =
^c Rl
240 Single-stage amplifiers at mid-frequencies

\ B c Jc_
+ ^ fF +

V.e ^
s} Vce

-
E

(a)

(b)

Fig. 6.16 (a) The signal variables used with a bipolar transistor in common-emitter
configuration are shown, (b) Source and load are added to the basic transistor circuit.

We would like to determine again the input and output impedances and
the various gains for the C-E amplifier. We begin with the input impe-
dance. By eliminating V^ and /^ from these equations, it is not too difficult
to find the input impedance at the base-emitter terminals:

Vv hrehje
^be = = h^
'"' (44)
h Ke + ^L
Having this input impedance, we may now move closer to the source and
give the input impedance presented to it:

y.
(45)

Next we tackle the current gain, I^ Hi . The voltage V^ is eliminated from

Eqs. (42) and (43), yielding

Current division is then used at the input,

h ^ ^B
h ^B + '^be
 1

6. 7 Amplifier analysis in terms of h-parameters 24

and at the output,

Ic Re -^ Rl
Multiplying these last three expressions together, we have the current gain

A = A = Ikkk = ( ^B hfJi \/V Re \

'
k U h Ic \Rb + zJ\Ke + Y£/V Re + Rj
(46)

With these results, it is now easy to write an expression for the voltage
gains:

V ^ R. R.
A. = = hRh 4 Rl
;;;

and
V_ 7
^*
A. = ^; = \
'^'' (48)
Rs + z,

power gain,

A - ^^^^ -=
AviAi (49)

For completeness, we may also obtain the output impedance. We set V^

= and relate the two input variables,
V, = -h{Rs\\RB)
We then use this result with Eqs. (41) and (42) to eliminate both of these
input variables. The net result is

L = lino
K-m ,

+ (RsWRb)
Looking into the collector-emitter terminals, we therefore see the admit-
tance,

y _ ^c — U _ '^re'^fe
'-^
y„ "- K + (RsWRb)
The output admittance or output impedance is obtained by including jR^
in parallel:

''
Z, Re ^
""-
K + {RsWRb)
^^^^
242 Single-stage amplifiers at mid-frequencies

These formulas are more complicated and their derivation is more diffi-
cultthan those we have been using for the hybrid-7r parameters, but the
present treatment is ajso more general. The transistor open-circuit output

admittance, hoe = l/^d? is included, as is the reverse voltage feedback ra-

tio hre- In the hybrid-7r model, r^ was usually neglected (hoe = 0) and h^e
was assumed to be zero throughout our entire discussion. This last as-
sumption is usually quite appropriate.

D6.9 A common-emitter amplifier using a 2N5088 transistor at low cur-

rent levels might have these h parameters: hie = ^0 kfl, /i^^ = 5 x 10 ~'^,
hje = 400, hoe = 5 fiU. U Rs = 10 kfi, Rb = 500 kfi, and Re = Rl
= 20 kfi, find (a) Z,, (b) A,, (c) A^,, (d) A^,, (e) Ap, (f) Z,.

Answers. 43.9 kO; - 173.8; - 79.2; - 64.5; 13,760; 19.36 kQ

D6.10 Repeat Problem D6.9, except let Ke = 0.

Answers. 45.5 kQ; -173.2; -76.2; -62.5; 13,190; 18.18 kQ

Problems
1. For the amplifier of Fig. 6.1a, let E, = 1 kQ, flj = 40 kQ,
R2 = 30 kfi. Re = Ri^ = 6 kfi, i?£ = 4 kfi, and Vcc = 12 V. Assume
the transistor is a 2N5377 operating at mid-frequencies with V^e
= 0.65 V and n = 1. (a) For the minimum-gain unit, find Ay,, Ayg,
Aj, Ap, Zi, and Z^. (b) Repeat for the maximum-gain unit.
2. assumed that the transistor in the amplifier of Fig. 6.3 may be
If it is
represented by an ac-equivalent circuit comprised of r^ = 10 kfi and
gjn = 40 mU, find the signal power dissipated in each of the six exter-
nal resistors.
3. Change i^ 2 from 25 to 30 kfi in Fig. 6.3 and find Ay,, Ay^, A/, Ap, Z,,
and Zo for the lower- gain unit. Use V^e = 0.65 V.
4. Parameter values for the mid-frequency equivalent circuit of a C-E
amplifier are V, = 5/0° mV, R, = 0.5 kfi, Rb = 10 kfi, r^ = 4 kfi, g^
= 50mU,Rc = 4 kfi, and i^^ = 6 kfi. Find the signal power supplied
by each of the two sources and the signal power dissipated in each of
the five resistors.
5. A C-E amplifier has the following parameter values: R^ = 600 fi, Rg
= 24 kfi, i?c = 10 kfi, g^ = 52mO, andiSo = 130. The value of R^ is
selected so that it will receive a maximum signal power. Calculate A vs
and Ap.
6. InFig. 6.1a, let fi, = 500fi, fii = 50 kfi, fig = 30 kfi, fie = 4kfi,fi£
= 3 kfi, Re = 6 kfi, and Vcc = 25 V. The transistor is an npn unit
with Vo = % V, Rbb = 6.25 kfi, Iceo = 0, i^dc = 200, n - 1.25, and
Problems 243

pQ = 215. If Vs(t) = 2 cos 03t mV and the capacitors are very large,
iind Vo(t).
7. Design a common-emitter amplifier, using 2N5088 Unit 3, to provide
a mid-frequency voltage gain Vq/^sI — 100? between a small-signal
|

voltage source having a resistance of 500 fl and a load R^ = 5 kfi. It is

also required that \Zi\ > 10 kQ and Vcc ^ 18 V.
8. Design a common-emitter amplifier to provide a gain |AyJ > 200
between a source having R^ = 0.3 kQ and a load R^ = 6 kQ. The
input impedance is to be greater than 1 kfl and Vcc ^ 20 V. Facts
about the transistor are: 150 < (3^^ ^ 400, jSq = 0dc? ^ = 1, 0.6
< Vbe ^ 0.7 V, IcEo = 0, Rbb = 5 kl2, r^ = oo, and V^ = 150 V.
9. In the small-signal equivalent circuit of Fig. 6.2a, let Rs = 1 kfi and
Ri = *5 kfi. Now select values ioi Rb, Re and g^ so that ^ AyJ > 50,
|

\Zi\ > 2.5 kO, Zo = 4 kl2, and fig < 25 kQ, Assume that 90 < /3o
< 300.
10. (a) Design a common-emitter amplifier using a 2N5376 transistor that
will provide a mid-frequency voltage gain \Avs\ of at least 100 be-
tween a source having an internal resistance of 150 Q and a capaci-
tively coupled load resistance of 3 kfl.Use Vcc = 24 V. (b) What is
the maximum voltage gain that may be expected from this amplifier?
11. A common-emitter amplifier has a voltage source with R^ = 100 Q, a
load Re = 8 kQ, and a 12-V collector supply voltage. Select values for
Ri, R2, Re, and Rf so that g;„ > 50 mO and |Ay,| > 100 if the tran-
sistor parameters are 120 < ^^c ^ 360, jSq = O.OjSdc, 0.6 < Vq
< 0.7 V, and n = 1, and I ceo Is negligible.
12. Figure 6.17 illustrates an integrated-circuit form of a common-emitter
amplifier using two identical transistors, (a) Show that the voltage
gain Vo/Vi = -gm^E- (b) Show that the input impedance at the V^
terminals is (r,/2) i?i (1/g^).
II II

13. In the circuit of Fig. 6.17, let Vcc = 15 V, R^ = 12 kl2, and Re

= 8 kl], while i^dc = 100, /3o = 110, Vbe = 0.65 V, and Iceo = for

Fig. 6.17 See Problems 12 and 13.

244 Single-stage amplifiers at mid-frequencies

both transistors, (a) Calculate V^/Vj, using information from Prob-

lem 12 if needed, (b) If a source V^ in series with R^ = 1 kQ and a large
capacitor is connected to the Vi terminals, find the voltage gain
Vo'IV
^ ' s •

14. If r^ ( = 1/gd) is included in the ac-equivalent of the common-base

amplifier, (a) show that the appropriate expression for Ay, is
ligd + gm){Rc\\RL)V[l + gd{Rc\\RL)l (b) Show that Z, is

Rc\\[rd + (1 + rdgm){RE\\Rs\\r.)l

15. Element values in the common-base amplifier circuit of Fig. 6.5a are
R, = 50 Q, Re = 4 kfi, R2 = 23.1 kfi, R^ = 66.7 kO, and Re = Rl
= 6 kft. The capacitors are large and Vcc = 20 V. Let (3^^ = 1^0
= 100, Vo = 0.65 V, and n = 1, and find Ay^, Ay,, A^, Ap, Z^, and

16. A C-B amplifier (Fig. 6.5fl) contains R, = 80 0, «£ = 3 kfi, H2

= 30 = 70 kfi. He = 5 kfi, Rl = 7 kfi, Vcc = 18 V, and three
kfi, fli
large capacitors. Transistor parameters are Vq = 0.7 V, n = 1.2, jS^c
= 120, andiSo = 125. Calculate Ay, and Z^.

17. Design a common-base amplifier circuit to work between a source

having R, = SOQ and a load R^ = 10 kl2 that will provide Z, < 25 Q,
Zo > 5 kl], and Ay, > 30. Use Vcc = 18 V and an npn transistor for
which /3dc = 100, Vbe = 0.65 V, and /3o = 90.
18. Design a common-base amplifier that will produce Ay, > 100 with fi,
= 25 12 and R^ = 10 kfi. Use Vcc = 24 V and a 2N5088 transistor.
19. The transistor in the common-collector circuit of Fig. 6.7a has jS^c
= 100, Vo = 0.65 V, Rbb = 5 kfi, n = 1, and Po = 120. Circuit
values include H, = 1 kQ, Ri = 90 kQ, R2 = 30 kfi, H^ = 4 kfi, jR^
= 6 kfi, and Vcc = 20 V. Find Ay,, Ay,, A/, Ap, Z^, and Z^.
20. In Fig. 6.7a, let the transistor be a 2N5377 having the "minimum"
characteristics, and let R, = 800 12, R^ = 70 kfl, H2 = 30 kfi, Re
= 3kQ, Re = 7 kfi, and Vcc = 18 V. Calculate expected values of
Avi,Aj, Zj, andZ^.
21. Design an emitter follower using a 2N5376 transistor and a 15-V
power supply so that Z, > 50 kQ for fi, = 4.7 kfi and jR^ = 1.2 kfi.
Assume Vqe = 0.65 V, n = 1, and Rbb = 0.
22. Design a common-collector amplifier using a 2N5377 transistor and a
12-V power supply so that Z^ < 10 12 for H, = 750 12 and H^ = 1.5 kl2.
Assume Vbe = 0.65 V, n = 1, H^b = 0, and l3o oc (I^) -^K
23. The mid-frequency equivalent common-source
circuit of a certain
amplifier contains the elements R, = 2.5 kl2, Ri = 750 kl2, R2
= 250kl2,g^ = SmU^Ro = 4kl2, andH^. = 8 kl2. (a) Calculate Ay,,
(b) If Vs{t) = 50 cos (jot mV, find the signal current amplitude in each
of the five resistors listed above.
Problems 245

24. The transfer characteristic of the transistor in Fig. 6.18 is I^

= - 0.5 (Vgs + 2) 2 mA. What ampHtude is required for 4 in order to
produce a signal voltage amplitude of 1 V at the output?

25. Circuit element values in the common-source amplifier of Fig. 6.9a

are Rs = 0.5 kQ, Ri = 200 kfi, R^ = 50 kfi, i^^ = 6 kl], Ri^ = 12 kfi,
and Vqd = 30 V. The capacitors are large. The transistor is an n-
channel JFET with loss = 4.5 mA and Vp = - 1.5 V. (a) Let Rss
= 2 kQ and find A y^. (b) For what value of Rgs is the transistor oper-
ating at the border between the ohmic and saturation regions? (c)
Find Ays for this condition.
26. Exchange the transistor in Problem 25 for an n-channel enhance-
ment-mode MOSFET for which K = 4.5 mA/V^ and Vj = 2V, Re-
work* Parts a, b, and c.
27. A common-source amplifier utilizes a p-channel depletion-mode
MOSFET having loss = - 10 mA and Vp = 2.5 V. Circuit values
include R, = 1 kQ, Ri = 500 kfi, Hd = 5 kfi, Rss = 2 kfi, Ri^
= 15 kl2, Vdd = - 25 V, and three large capacitors, (a) Find Ay^ if
R2 = 125 kfi. (b) Find the maximum value of H2 that allows opera-
tion in the region beyond pinch-off, (c) Find A y^ for this value of H2 •

28. Modify the design of the C-S amplifier of Section 6.5 so that |Avj|
> 25. Maintain i^^ = 10 kl2, Rj = 00, R^ = 1 Mfi, R^ = 1 kfl, and R^
= 10 kfi. The same transistor with its range of possible values for
Idss^ Vp, and g^ should be used.
29. LetVp = -2.5V and /oss = 8mAfor the JFET of Fig. 6.9a. Also, H,
= 1 kfi, jRz. = 4 kfi, Ri = 00, and V^d = 20 V. Select values for R^,
Rd, and Rss so that |Ay,| > 7.5, Z, > 1 Mfi, Vds ^ 5 V, and Id
< 6 mA.
30. Let the transfer characteristic of the n-channel JFET in Fig. 6.9a be
represented by /£) = 12.5(1 + 0.3 Vgs) ^ m A. Element values are R^

Fig. 6.18 See Problem 24.

1
4.5 k^
200 kn.

Large /^ 1 1—^ Large

9 kl2 ^ I'out

25 k« >200kn
^ 3 k^^ 1.

^—^ Large

T
20 V
246 Single-stage amplifiers at mid-frequencies

= 2 kfi, Hi = 00, ^2 = 98 kQ, and Rt = 6 kO. (a) Choose values for

Vdd, Rd, and Rss so that V^d ^ 21.5 V, |Av,| > 9.8, and V^s
= ^{^Gs - ^p), a^ constraint that maintains operation safely in the
region beyond pinch-off. (b) Let V^q = 19 V and select Rss and Ro so
that Ay, > 10. (The restriction that Vds = 3(Vgs - Vp) no longer
I I

applies.)
31. Element values in Fig. 6.9a are fi, = 1 kl], Hi = oo, H^ = 4 kfi, and
Vdd = 20 V. The transistors have I^ss = 10 mA and a pinch-off volt-
age that may range from - 3 to - 2 V. Select values for ^2^ ^d» and
Rss so that \Ayi\ > 8 and 7 < /^ < 8 mA.
32. A certain type of n-channel JFET has a transfer characteristic defined
by Id = {S/b){Vcs + i')^ mA, where 1 < b < 2. Design a C-S ampli-
fierusing transistors of this type that will provide a gain \Avs\ ^ 10 if
R, = 500 Q and Hl = 5 kfi. Keep V^d ^ 10 V.
33. The transistor in Fig. 6.15a is replaced by a unit for which Vp
= -2.5 V, Idss = 8 mA. Determine Zj, Ay^, Ay^, A;, Ap, and Z^.
34. In Fig. 6.13a, let R, = 100 Q, fiss = 15 kfi, R2 = 500 kfi, Hi
= 1 Mfi, Rd = 3.5 kO, Hl = 7 kfl, and V^^d = 40 V. The n-channel
JFET is replaced by an n-channel enhancement-mode MOSFET hav-
ing the transfer characteristic I^ = 2.5 (Vgs - 2)^ mA. Find Zj and
Ays at mid-frequencies.
35. Design a common-gate amplifier to provide a mid-frequency voltage
gain VJVs\ > 10. Let H, = 50 fi, H^. = 5 kO, loss = 6 mA, and Vp
I

= -0.8 V.
36. Specify values for Rss and g^ in a C-G amplifier having R^ = 30 fi, R^
= 4 kO, and H^ = 6 kQ if V^/ V, = 20 and Z, = 20 fi at mid-frequen-
cies.

37. The transistor of Fig. 6.15Z? is replaced by a unit for which Vp

= -2.5y and loss = 8 mA. Determine Z,, Ay,, A y^. A/, Ap, and Z^.
38. The common-drain amplifier of Fig. 6.15Z? uses a 2N3823 transistor
for which Iqss - 9 mA and Vp = -3 V. The performance of the
circuit is tabulated near the end of Section 6.6. Repeat the analysis,
except let r^ be 50 kfi instead of infinite.
39. Design a common-drain amplifier circuit using an n-channel
enhancement-mode transistor having Iq = 8 (Vgs ~ 2.5) ^ mA, V^d
= 18 V, and H2 = 00 so that Z, = 100 kfi and Z^ = 100 0. The value
oi Rl is not specified.
40. InFig. 6.14a, let H, = lkfi,Hi = 100kfl,Hss = Rl = 2kfi, andV^D
= 20 V. H2 so that /z) = SmAif/^ = 2.5(Vgs + 2)2 mA.
(a) Select
(b) Calculate Zj, Z^, and Ayg for this value of H2.

41. A common-emitter amplifier has the parameter values hi^ = 2 kfi, hjg
= 80, h^e = 50 /xO, Rb = 100 kfi, H, = 1 kfi. He = 3 kfi, and Ri^
 .

Problems 247

= 6kfi. (a) FindZf, Z^, and Ay, if /i,^ = 0. (b) Repeat for /i,^ = 5 x
10-4.
42. The transistor in a C-E amplifier is a 2N5088 with the parameters of
Unit 3 on the data sheets in Appendix A. Let the operating point be at
Ic = 1.5 mA, VcE = 4 V, with R, = 100 Q, Rb = 20 kfi, Re = ^ kQ,
and Ri = 10 kQ, Calculate Zj, Z^, Ay^, and Ay^.
43. Parameters of a common-emitter amplifier are R^ = 200 fl, fig
= 16 kfi, Re = ^ kfi, Rz. = 10 kfi, /i^, = 3 kfi, h^, = 150, and /i^,

= 80 At^. Plot Z, vs. hre (log scalc), 10 -5 < /i,, < 10-2.
44. The common-emitter h parameters of the transistor used in the com-
mon-base circuit of Fig. 6.5a are hi^ = 2.5 kfi, h^^ = 10 -^, hj^ = 60,
dindhoe = 0. Ifi?, = lkfi,l?£ = 2kl2, and^c = ^l = 5 kO, find Ay,
and Z,
 7

Single-stage amplifiers at low

and high frequencies

Now that we have become adept at analyzing and designing single-stage

transistor amplifiers in the mid-frequency range where the coupling and
by-pass capacitors are effectively short circuits, while the interelectrode
capacitances behave as open circuits, we need to consider similar analysis
and design problems at lower and higher frequencies, where such simpli-
fying assumptions are inappropriate. Suitable equivalent circuits for the
transistors themselves were studied in Chapter 5, and these were installed
in typical external circuitry at the beginning of Chapter 6.
In this chapter, we shall install an appropriate hybrid- tt equivalent cir-
cuit for the transistor into an external circuit containing a source, a load,
and a stable bias network. The high-frequency case is considered first,
since it is the more important problem in practice. We will look at the
FET in its three configurations, following this with the bipolar transistor
in its three configurations, again at high frequencies.
Amplification at the lower frequencies for the FET and bipolar transis-
tors is the next exciting topic, and we will find that both the analysis and
design problems are easier. The chapter concludes with the analysis and
design of a common-emitter amplifier at low, mid-, and high frequencies.

7.1 Frequency response

The circuits that we shall be analyzing and designing in this chapter all
contain one or more reactive elements. Inductors appear infrequently in
most circuits because of their size and weight and the difficulty of building
them in integrated-circuit form. Capacitive impedances, l/jooC, thus ap-
pear regularly in our circuit equations, leading to expressions for voltage
and current gain that are complex-valued; that is, they have a magnitude
and a phase angle. A curve showing the magnitude of the voltage gain of
an amplifier as a function of frequency enables us to judge how well the
various frequency components in the signal are amplified. For a good
stereo system, we may want uniform amplification over a frequency range

248
7.1 Frequency response 249

from 20 to 20,000 Hz, whereas the telephone company finds that 300 to
3000 Hz isadequate. However, the video amplifier in a television receiver
needs a bandwidth from 30 to 4,000,000 Hz to be able to reproduce a
good-quality picture. Phase information is less important for audio appli-
cations, since the ear is not sensitive to phase difference, at least until the
difference is large enough to be sensed as a time delay, say a few tenths of a
second. Phase distortion is important in video applications such as ampli-
fiers in cathode-ray oscilloscopes and TV receivers. We shall devote the
major portion of our efforts to magnitude response.
Information about the frequency performance of an amplifier can be
obtained in many forms. One method is experimental, but we shall as-
sume that we still have a paper amplifier that must be analyzed before it is
built. An' accurate plot of gain magnitude vs. frequency is probably the
most useful form for presenting frequency response. The frequency re-
sponse of a typical amplifier designed to work well over a broad frequency
range is illustrated by Fig. 7.1. The magnitude of the gain A is plotted to
| |

a logarithmic scale as a function of frequency in hertz or in radians per

second, also on a logarithmic scale. The use of logarithmic scales enables
us to show a range of several decades for both variables.
We see from the curve that the gain magnitude is essentially constant
over a mid-frequency range, a term which we shall define shortly. The
gain falls off at lower frequencies where the reactances of the large cou-
pling and bypass capacitors are too great, and at higher frequencies where
the reactances of the interelectrode capacitances of the transistor are too
small.
The high-frequency case will be considered first. Here, the fundamen-
tal analysis problem is the determination of the upper half-power fre -
quency fn (or CO //), defined as the higher of the two frequencies in Fig. 7.1,
at which a specified voltage or current gain magnitude has decreased t o
I/V2 times its mid-frequency value. The basic design problem involves
selecting an appropriate value for this frequency and then specifying a
suitable external circuit and transistor to meet the design requirements.
Both bipolar and field-effect transistors are considered.
At low frequencies, we define //^(or oj/^), the lower half-power fr e-
quency, as the lower frequency at which the gain magnitude is l/%/2^ti mes
the mid-frequency value The design problem is concerned with the speci-
.

fication of suitable values for the capacitors so that the desired low-
frequency performance is obtained.
We may now define the mid-frequency ran^e as all those frequencies
that are greater than ten times co^ and less than O.lco//, or lOco/^ < o)
< O.lco// If (j^H < lOOco/^, there is no mid-frequency range.
'

Finally, we define the bandwidth of an amplifier as the frequency dif-

ference between the upper and lower half-power frequencies, w// - co/^ or
250 Single-stage amplifiers at low and high frequencies

Ml (log)

MImid-
\ALJV2-

0.1Mlnud + \Al

-^mid-

0.01 UUid
oj (log)
lOo;^ lOOoj^ O.Olcj;/ O.lcj;/ oj^,

Fig.7. 1 The frequency response of a typical broadband amplifier is shown with log-
arithmic frequency and amplitude scales. At the lower and upper half-power frequen-
cies w^^ and w^ , |
A =
| \A\jni^/yf2'.

The frequency response problem can be simplified by using two analysis

techniques that we have not yet emphasized. The first technique involves
looking carefully at the behavior of two simple RC circuits as frequency
varies. For each case we shall identify a frequency we call the half-power,
corner, or break frequency, and we shall also find out how to express the
gain magnitude in decibels. The second technique invokes the use of the
digital computer and programs that are widely
special circuit analysis
available. With these we can obtain the amplifier performance at a num-
ber of frequencies. The programs are usually referred to as computer-
aided-design (CAD) programs, although they perform an analysis, not a
design. The engineer must accomplish the design and merely use CAD to
check his work; if changes are needed, the designer, not the computer, has
to decide what to change and how much.
Several CAD circuit simulator programs are available, such as ECAP
(Electronic Circuit Analysis Program), ECAP II, CORNAP (Cornell Net-
work Analysis Program), SNAP (Symbolic Network Analysis Program),
SPICE (Simulation Program with Integrated Circuit Emphasis), SPICE2,
and others too numerous to mention.

7.2 Decibels and break frequencies

In plotting response curves for a broadband amplifier, we often find that
we wish to show a thousand-to-one (three-decade) range of some gain
I
A and a range of six or seven decades in frequency. Thus, both magni-
I
,

tude and frequency should be plotted on logarithmic scales. Since the

phase angle changes over a smaller range, it is plotted with a linear angle
scale and a logarithmic frequency scale.
1.2 Decibels and break frequencies 251

The magnitude scale is commonly given in decibels. We define the deci-

bel (dB) as a dimensionless unit equal to 20 times the common logarithm
(base ten) of the magnitude of the gain,

|A|dB = 201og|A| (decibels) (1)

Since the gain is a function of jo) , this -may be written as

|A|dB = 201og|A(M| (2)

The definition of gain in dB, as given by Eqs. (1) or (2), is only ap plicable
to a voltage gain or to a current gain, and not to power gain.
Several consequences of the use of logarithms to the base ten are worth
recalling:

1. Unity gain corresponds to zero dB.

2. Negative gain in dB indicates attenuation.
3. Doubling the gain results in an increase of 6 dB (6.0206 dB).
4. Ten times the gain corresponds to an increase of 20 dB.

We first consider a circuit that illustrates the loss of gain that occurs at
high frequencies. Figure 7.2a contains a series resistor Rs, sl parallel resis-
tor Rp, and a parallel capacitor Cp. We let Ay = Vq/V^ and obtain it by
first replacing everything to the left of Cp with its Thevenin equivalent,

Fig. 7.2b. By voltage division, we have

V. jo)Ci 1

Hi 1 + jo^Cp{Rs\\Rp)
K Rp + R.
(RsWRp) +
/coCj

Thus
K)
Av = X (3)
Rp + H< 1 + ic^Cp{Rs\\Rp)

Fig. 7.2 (a) A circuit used to illustrate high-frequency performance when one break
frequency is present, (b) The Thevenin equivalent appears with Cp.

^»
<^)(S
252 Single-stage amplifiers at low and high frequencies

Before we investigate a plot of |Av|dB vs. o) for this expression, let us

rewrite it as

R, 1
Ay = (4)
Rp + Rs 0)
1 + /
0)H

where
1
CO//
(5)
(^s II
Rp) Cp

We call o)h the break frequenctf or corner frequency . Equation (4) shows
that when o) = co//, |1 + /(a;/co//)| = V2, and the magnitude of Ay is

reduced to 1/V2^ times the value it has when cj is very small.

Now let us try a plot of Ay I^b vs. o; for Eq. | (4) and the network of Fig.
7.2a or b. When o) is much less than co//, Av| |
approaches the asymptotic
value Rp/{Rp + Rs). Thus

jAyJdB = 20 log (03 <^ CO//; (6)

Rp + R<

This constant value is indicated on Fig. 7.3. Note that it is negative.

When CO is much greater than co//, 1
1 + /(co/co//) |
approaches |/(co/co//) |

oroo/co//, and |Ay| approaches

1
X
Rp + R, co/co//

Thus

VidB 20 log
Rp +
fli

R> (jiliOpi
(co » CO//)

Fig. 7.3 The voltage gain Ay |

\
^ for the network of Fig. 7.2a is plotted vs. cj. At low
frequencies, the gain approaches 20 log[fi/>/(fip + Rs)]; at high frequencies, it de-
creases with a slope of - 20 dB/ decade.

1-4 K Id

OdB

:oiog
Rp +/?5

dB/d
7.2 Decibels and break frequencies 25 J

or

I
AvIdB = 20 log ^f+ - 20 log ^^ (c » o^h) (7)
lip its CO//

The first term of Eq. (7) is the constant asymptotic value that |Av|dB
approaches at low frequencies. The second term is zero when co = w//,
- 20 dB for 0) = lOco//, - 40 dB for co = lOOco//, and so forth. That is, it
has a slope of - 20 dB/ decade This straight line is also an asymptote that
.

the true curve approaches more closely as o) becomes much greater than
CO// At w = CO//
. Eq. (7) shows that the asymptote has a value of 20 log [Rp/
,

(Rp + Rs)], the same as the constant value of the low-frequency asymp-
tote. However, we used Eq^4) earlier to show that the true value is 20 log
[Rpl{Rs + Rp)] - 201ogV2 = 20 log [Hp/(Hp + Hs)] - 3dB. The exact
value, therefore, lies 3 dB below the intersection of the low- and high-
frequency asymptotes. This is also apparent from Fig. 7.3.
In summary, we see that the l ow- and high-frequency asymptotes int er-
s ect at CO = CO//, the corner or break frequenc v, indicating the basis for

these names. The true curve lies 3 dB below the intersection. Also, the
corner frequency is given by

1 1
^
^g)
{Rs\\Rp)Cp RjhCp
where Rjyi is the Thevenin-equivalent resistance of the two-terminal net-
work to which Cp is connected. We will use this technique extensively in
the analysis of amplifiers at high frequencies.
We next consider the low-frequency performance of an amplifier by in-
vestigating the simple circuit of Fig. 7.4. It is not necessary to derive the
Thevenin equivalent seen by Cs, since the circuit is already in that form.
The clockwise current is VJ{Rp + Rs -^ ^H^^s) Multiplying this by Rp •

gives the output voltage:

K = V. R
Rp + R. -^
;coC<

Thus

Vo Rp
Av =
jRp + Re +
/(oQ

or

'-
'^ = -r;tiu-. <"
1 +
joiCsiRp + fis)
254 Single-stage amplifiers at low and high frequencies

Fig. 7.4 This circuit has one break frequency, easily located at u)i = l/(Rp + Rs)^S
by using the Thevenin equivalent resistance seen by Cs .

We simplify this expression by identifying the corner frequency:

1
_
(10)
{Rp + Rs)Cs

so that we may write

Rp 1
Ay (11)
Rp + R< . ^L
1
U)

This is quite similar to Eq. (4) for the high-frequency response, but the
frequency ratio containing the break frequency is inverte d. Here we have
coj^/cj; in the high-frequency case we had oil (jjh .

It follows that |Av|dB approaches the constant asymptotic value of 20

log \Rpl {Rp + i?s) at high frequencies where a?
I
w^. This creates the ^
right-hand portion of the curve shown in Fig. 7.5.
When w «: coi^, 1 - ; (w^/w) is approximated by oijoi, and thus when
1 |

io decreases by a factor of ten, Ayl dB decreases by 20 dB. We thus estab-

|

Fig. 7.5 The voltage gain Ay jb for the network of Fig. 7.4 is plotted against w. At
|
|

high frequencies, the gain approaches 20\og[Rp/{Rp + Hs)]; at low frequencies, it

has a slope of + 20 dB/dec.

\Ay\,

OdB ^L
cj (log)

___J.._ —/-^ ~z
3dBbT :0 1og
Rp^Rs

Slope is

+20dB/decade
7. 2 Decibels and break frequencies 255

lisha low-frequency asymptote with a slope of 20 dB/dec. This asymptote

also appears in Fig. 7.5.
The two straight lines intersect at the corner frequency, and the true
curve once again lies 3 dB directly below the intersection. Also, the corner

frequency is found by l/(Rji^C ), where C is the appropriate capacitance

and /?Th is the Thevenin-equivalent resistance it sees:

1 1
(^L
=
Rjh^s (Rp + Rs)Cs

Later in this chapter, we shall begin to apply these concepts to the

common-emitter amplifier. The signal-equivalent circuit for this ampli-
fier, given in Fig. 6.1c, is repeated as Fig. 7.6. note that it contains We
five capacitors and therefore suspect that any gain expression might have
five factors in its denominator, each of the form [1 - j(oiJ<^) ] or [1 + ;(co/
ojh) ] Our suspicions are all too true, and the exact determination of the
•

five corner frequencies requires finding the roots of a fifth-degree polyno-

mial, not a pleasant task. This will not be the method we follow.
Single factors of this form are also found in the numerator for some
types of amplifier circuits, but the corner frequencies are usually so far be-
low o)[^ much above co// that they have little effect on the analysis.
or so
To ease our plight, we assume that the t hree low-frequency corners a re
c aused by Cj C2 and Ce and that C^ and C^ may be considered open
, , ,

circuits at these frequencies. Similarly, the two high-frequency corners

a re produced by C^ and C^,, while Ci, C2, and C^ are effectively short
high frequencies. For broadband amplifiers, these are ex-
circuits at these
cellent assumptions. We are thus led to the low- and high-frequency
equivalent circuits of Figs. 6.2b and c. One has three capacitors and pro-
vides a cubic equation to tax our patience, while the other gives a simple
quadratic.

Fig. 7.6 The complete small-signal equivalent circuit of a C-E amplifier, a repeat of
Fig. 6.1c.

if \^

;(i) Vi ^i| ^2

Rg -/?jh - ^1 11^2
256 Single-stage amplifiers at low and high frequencies

Even
these procedures represent too much work, however, especially
when multistage amplifiers are considered. shall analyze the common- We
source amplifier by introducing an approximate method in the following
section in which each capacitor is treated by itself. This technique will be
extended to multistage amplifiers in Chapter 8.

D7.1 Find I
A I dB if A equals (a) 26, (b) - 260, (c) - 20 + ;8. Find |
A |
if

I A IdB equals (d) 26 dB, (e) 36.3 dB, (f) - 8 dB.

Answers. 28.3; 48.3; 26.7; 19.95; 65.3; 0.398

D7.2 Element values in Fig. 7.2a are Rs = 2 kQ, Rp = 6 kQ, and Cp

= 80 pF. (a) Find co^. Find Ay I^b at cj equals (b) 10^ rad/s, (c) 5 x 10^
|

rad/s, (d) 10^ rad/s, (e) 10^ rad/s, (f) lO^ rad/s.

Answers. 8.33 Mrad/s; -2.50 dB; -3.83 dB; -6.37 dB; -24.1 dB;
-44.1 dB

D7.3 The circuit of Fig. 7.4 contains Rs = 300 Q, has a corner at cj^
= 100 and shows a constant value of Ay ^b = - 2 dB
rad/s, |
|
at high fre-
quencies. Find (a) Rp, (b) Cs, (c) Ay |dB at 40 rad/s. |

Answers. 1159 fi; 6.86 ^F; - 10.60 dB

7.3 High-frequency FET response: common-source

The field-effect transistor is often used instead of a bipolar transistor in the
range from 100 MHz to 10 GHz because it introduces less noise into the
signal and gives excellent high-frequency performance at small signal lev-
els. However, it does not provide as large a mid-frequency voltage gain as
FET amplifiers are often used when large in-
the bipolar transistor. Also,
put impedances are required.
The high-frequency model for the common-source amplifier of Fig.
7.7a is shown in Fig. 7.7b. Again we let fig represent fli||fi2? while fl £
= RdWRl -

In analyzing amplifier circuits in the mid-frequency range, we found

that the large coupling and by-pass capacitors had relatively small reac-
tances and could be replaced by short circuits, while the small interelec-
trode capacitances had extremely large reactances and were treated as
open circuits. However, when higher-frequency signals are applied, this
latter assumption becomes less valid, because the reactance values pro-
duced by the small capacitors are of the same order of magnitude as the
impedances of the other circuit components. Once again, we have a gain
function that is f req uency- dependen t and , we are interested in calculating
CO//, the upper 3-dB frequency .
7.3 High-frequency FET response: common-source 257

Rii-V„

';f<^

^e

R,^iV^
6w "^
TT

R^ =R^\\R'

Fig. 7. 7 (a) A typical FET common-source amplifier, (b) The high-frequency equiv-
alent circuit.

Before we establish a value for o)h, it will be helpful to consider the

general approach for any high-frequency equivalent circuit. Each one
will contain two small capacitances, Cg^ and Cg^, or C^ and C^, and each
gain function will contain a quadratic in its denominator that may be fac-
tored to display two corner frequencies. Thus, at any frequency co cOj^, ^
a range that includes the mid- and high-frequencies, we will obtain a gain
expression of the form

1
Av = A V(mid) (12)
(1 + ;co/coa)(1 + jo)Io)b]

Since co^ and cog are high-frequency corners, they both are above the mid-
frequency region, and very much greater than any low-frequency corner.
Note that the gain approaches Av^^id) when co <^ co^ and oo <^ oob-
Although both the FET and bipolar high-frequency equivalent circuits
can be analyzed exactly to determine expressions for o?^ and cog the results ,

seem to be functions of every element in the circuit and they are too com-
plicated to be very useful. Instead, we settle for less accuracy but much
more information concerning the factors that limit high-frequency perfor-
mance.
258 Single-stage amplifiers at low and high frequencies

Our approximation involves two related assumptions. The first is that

co^ and co^ differ by at least a factor- of five; that either o^a^^b ^ 5, or
is,

cofi/cj^ > 5. We now make use of this approximation to find the upper
half-power frequency for Eq. (12).
Atco = o)H, \Av\ = |Av(^id)|/V2, and

V2 (13)

Let us assume that ooq »

co^ so that the second factor in the expression
,

above may be approximated by unity, while the first factor must be

1 + /I. Therefore, co// = o)^. Similarly, if a;^ is larger, then oj^ = o)g.
Problem 7 at the end of the chapter shows that if w^ = 1 and wg = 5
Mrad/s, then an accurate value for co// is 0.964 Mrad/s.
We thus conclude that if the two corner frequencies differ by at least a
factor of five, the upper half-power frequency may be set equal to the
smaller of the two corner frequencies with good accuracy.
The true value of w^ is always less than the approximate value because
the magnitude of the factor we neglected in Eq. (13) must be greater than
unity. A lower bound for cj// may be determined by expanding the left side
ofEq. (13):

V2

and neglecting the product term. It follows that the imaginary term is

unity and

Since this is a lower bound for the upper half-power frequency co// it is a ,

conservative estimate of that value. That is, if we calculate such a lower

bound as our estimate for a;//, we can be assured that the exact value will
be larger.
The second assumption we make enables us to express co^ and ojb in
terms of the two capacitances in the high-frequency equivalent circuit and
the Thevenin-equivalent resistances the capacitances face. We are partic-
ularly interested in the smaller of the two frequencies oj^ and cog At this .

lower frequency, we assume one of the two capacitors controls the re-
sponse, while the other may be approximated by an open circuit. We thus
leto^A = l/i?A(Th)CA and cob = l/i?B(Th)<^B-
For an FET, we have
1
COa =
HgsCgs
 .

7.3 High-frequency FET response: common-source 259

and

03b
=
RgdCgd
where R^s and R^d are Thevenin-resistance values that still must be deter-
mined from the high-frequency equivalent circuit.
Using these values for co^ and o)b in Eq. (14), we have

0)H (15)
Ra^Cac + RariCr

In practice, the RC products are called open-circuit time constants, since

one of thje capacitors is replaced by an open circuit. Thus, we let Tg^
= RgsCgs and Tgd = Rgd^gd, so that

0)H =
1
= —1
Tgs + Tgd T

or

This completes our procedural discussion, and we may summarize it

briefly before applying it to the common-source circuit. The steps to be

taken to find o)h for an FET are:

1 Determine the Thevenin resistance faced by each capacitor alone, vv^ith

the other replaced by an open circuit.
2. Calculate the two time constants Tg^ = Hg^Cg^ and Tg^ = RgdCg^-
3. Add the two time constants to obtain r = Tg^ + Tg^.
4. Let cj// = 1/r.

Although this procedure results in an approximate value for co//, we can

guarantee that the true value is greater than l/{Tgs + Tg^).
One final important point should be made about this approach of deter-
mining Tg5 and Tgd independently. The larger time constant is the most im-
portant in determining o^h and thus we can see where a design might be
,

changed to affect co// the most.

We now try out the open-circuit time-constant method on the high-
frequency small-signal equivalent circuit of the common-source ampli-
fier. Fig. 7.7b. Letting Cg^ be an open circuit, we see that R^s = -R^Hi^ B
= Rg. Therefore

Tgs = H/Cg, = {Rs\\Rb)C,s (17)

Next, Cgs is replaced by an open circuit and we determine R^d as the

Thevenin resistance viewed from the terminals of Cgd (gate and drain) To .
 ^ .

260 Single-stage amplifiers at low and high frequencies

find jRgrf, let us squirt 1 A into the gate terminal, as shown in Fig. 7.8.
Therefore V^ = fi/, gmV-K = gm^sy and Kirchhoffs current law shows
that the upward currentln H£ must be 1 + gm^-w = 1 + gm^/- The gate-
to-drain voltage Vgd is therefore Vg^ = H/ -h (1 + gmRs)I^L = ^i
+ (1 + gm^D^s' Dividing this by the 1-A input current gives Vg^/l
= R^d = H£ -h (1 -H gmRD^s, and thus

7,d = R,dC,d = [^L + (1 + gmm^s]C,d (18)

Adding Eqs. (17) and (18), we have

r = Tg, -H Tgrf = 1/coh

In Eq. (18), note that the term gmRL is exactly equal to Avj(mid) for a |
I

common-source amplifier, as we found in Chapter 6. Thus, 1 + gm^i

= 1 + I
Avj(jj,id) I?
a value that often is as great as 20. Hence Tg^ is usually
greater than r^^ ^or a common-source amplifier, even though Cg^ may be
several times larger than Cgj .The high-frequency response of the C-S am-
plifier is therefore usually determined by the gm^L^s^gd product, and it is
necessary to decrease one or more of these factors to achieve a significant
decrease in r and a consequent increase in co^/
As a numerical example, let us calculate some of these values for a typi-
common-source amplifier having R^ = 300 Q (the impedance of most
cal
FM and TV antennas), Rgs = 1 kfi, Rb = 100 kfi, R^ = R^ = 5 kO, g^
= 10 mO, Ciss = 7 pF, and C,,, = 2 pF. We have C^d = C,,, = 2 pF, Cg,
= Ciss - Crss = 5 pF, and therefore
Tg, = {Rs\\Rb)C^s = (30011 105)5 X 10-12 = 1.496 ns

Also,

V= [^L + (1 + gmRDRnc^d
= [2500 + (1 + 0.01 X 2500) (300 II
10^)] 2 x 10 -12
= 20.6 ns

Therefore

To. + Tgd = 22.1 ns

and
0,^ = i/r = 45.3 Mrad/s or 7.22 MHz
This, of course, only an approximate result, but
is we can state definitely
thatojH > 45.3 Mrad/s.
Higher values of w// and greater amplifier bandwidths are achieved by
decreasing the overall time constant r. For our example, r = 22.1 ns, of

^
An exact solution gives co// = 48.40 Mrad/s.
7.4 Miller-effect capacitance 261

hd
1 A
G ' D
-o o-
gd

<>

Fig. 7.8 A simplified circuit used to demonstrate that Rg^ = y.w/1

ygd = h; +
(1 + gmRsil^L

which the larger component is Tgd = 20.6 ns. In turn, Eq. (18) shows that
Tgd is composed of three terms: RiCgd = 5 ns, H/Cg^ = 0.6 ns, and
gmRL^sCgd = \Avi{mid)\RsCgd = 15.0 ns. Thus, the only effective way to
increase a;// is to reduce the product gm^LRs^gd Since R/ = Rs Rb and Rg
•
\\

is much larger than R^ a reduction of R/ must be effected by a reduction

,

in Rg. This is usually not possible, since Rg is often a specified value. The

capacitance Cgd can only be changed appreciably by changing transistor

types. Thus, increasing bandwidth is usually achieved by reducing gmRL^
the mid-frequency gain. The product of gain and bandwidth tends to be
fairly constant, and we may therefore exchange gain for bandwidth. This
is a technique commonly used in very wideband amplifiers, such as opera-

tional amplifiers.
One last comment about the open-circuit time-constant method of de-
termining o)h deserves to be made. It is readily extended to multistage am-
plifiers where more than two capacitances appear in the high-frequency
equivalent circuit. We shall do so in the following chapter.

D7.4 The high-frequency equivalent circuit of a C-S amplifier includes

R, = 500 fi, Ri = 600 kfi, H2 = 200 kQ, Hd = 4 kfl, Rl = 6 ktt, Cg,
= 5.2 pF, Cgd = 1.2 pF, andg^ = 12 mO. Calculate (a) Tg,, (b) Tgd, (c) r,
(d) an approximate value for w//, (e) lower and upper bounds for co//.

Answers, 2.59 ns; 20.7 ns; 23.3 ns; 42.9 Mrad/s; 42.9 and 48.3 Mrad/s

7.4 Miller-effect capacitance

In the previous section we saw that Cgd had a much greater effect in estab-
lishing a value for o)h than did Cg^, in spite of the fact that Cg^ was larger.
The mathematical reason for this is evident in Eqs. (17) and (18), which
262 Single-stage amplifiers at low and high firequencies

show that Cgs is associated with a relatively small resistance, H/ = R^,

while Cgd joined with a Thevenin resistance that is approximately

is

I
Ayi(inid) I
^/- Thus, the ratio of the Thevenin resistances is of the order of
l^vt(niid) I
?the magnitude of the voltage gain. Hence t^^ is several times as
large as Tg,.

Now let us try to achieve a better physical understanding of the reason

that Cgd has such a controlling importance in any high-gain amplifier hav-
ing a 180° phase reversal, such as the common-source or common-emitter
amplifier.
Figure 1 .Ih shows the small-signal high-frequency equivalent circuit of
a C-S amplifier, and Fig. 7.9 repeats that part of the circuit to the right of
Cgs The voltage across Cg^ is V^ - V^, and therefore
.

/g = jo^CgdiV. - V,)
We next let V^ = Ay, V^ and approximate Ay, by its mid-frequency value,

^o = ~ I^Vt(mid)I^T
Therefore

/g = J0)Cgd{V, + \Aviimid)\y.)

The input admittance at the left-hand terminals in Fig. 7.9 is

Yin = -rf = 1(^Cgd{l + |Ayi(mid)|) = ;<^CMmer

TT

where CMiuer is known as the Miller-effect capacitance and is defined by:

CMiller = Cgdil + \Aviimi6)\) = Cgd{l + gmRL) (19)

The C^j multiplied by a factor slightly larger th an

Miller capacitance is

t he magnitude of the voltage gain Thus, if Cgd = 2 pF and Ay,(niid) .

= - 20, CMiller = 42 pF. The effect of Cgd is thus greatly magnified.

Fig. 7.9 A portion of the high-frequency small-signal equivalent circuit of a com-

mon-source amplifier is used to show that Chiller = (1 + Sm^D^gd-

I,
Q.
Go-
^f

^Miller
" 'if <>> R)iv,

so
7.5 High-frequency FE T response: common-gate and common-drain 263

The total input capacitance seen at the gate-source terminals must also
include Cg^:

^in ~ ^gs + ^Miller

A physical explanation for the effective increase in the size of Cg^ is pos-
sible with the aid of Fig. 7.9. As the voltage V^ increases, /g increases as it
begins to charge Cg^ to the higher potential. However, the gain of the am-
plifier is causing V^ ^^ decrease, and to a much greater extent than V^ is
increasing. Hence the potential difference across Cg^ is much greater than
y^, and a much greater charging current /g must flow. That is, Cg^ re-
quires a much larger charging current than its size suggests. In some ways,
trying to charge Cg^ is like trying to fill a barrel when there's a large hole
in the bottom. You have to pour a lot faster than you think you should.
We may safely draw a general conclusion from this special result for a
C-S amplifier.If a capacitor is connected between the input and output of
a high-gain amplifier with 180° phase reversal, then the capacitance is
effectively augmented by a factor equal to the magnitude of the voltage
gain. Thus, the C-E amplifier will also show a large Miller effect, but the
C-G and C-D amplifiers will not, since they have no phase reversal.

D7.5 A common-source amplifier has R^ = 250 fl, Rp = 120 kQ, R^

= 3 kfi, Hi^ = 6 kfi, gn^ = 11 mU, Cg, = 4 pF, and Cg^ = 1 pF. Find (a)
C^Miller, (b) Cin, (c) CO//-

Answers. 23 pF; 27 pF; 114.5 < co^ < 129.2 Mrad/s

7.5 High-frequency FET response:

common-gate and common-drain
We now consider FET
used in the common- gate configuration. The
the
common- gate used extensively in high-frequency applications
amplifier is

because of its low input capacitance and high upper half-power fre-
quency. It is used in the radio-frequency amplifiers of most good-quality
television, FM, and communication receivers, since its low input imped-
ance can be made to match the antenna or lead-in cable.
The high-frequency equivalent circuit for the common-gate amplifier is
shown in Fig. 7.10. There are two capacitors, Cg^ appearing across the
input and Cg^ across the output. We shall find the high-frequency re-
sponse by calculating the open-circuit time constants.
The resistance faced by Cg^ consists of R^ in parallel with the input resis-
tance of the C-G amplifier, Z^ = Rss 1/gm Eq. (30) of Chapter 6. There-
\\ ,

fore

Rgs = H, Hss 1/gm

II II
264 Single-stage amplifiers at low and high fir equencies

I VNA* f-

s(t) Rssi C^s^^K C^,

Fig. 7.10 The high-frequency model for the common-gate amplifier circuit.

and

7g, = R.,C., = {R,\\Rss\\l/gm)C,gs (20)

At the output, Cgd faces R^ in parallel with Rd:

Tgd = RLCgd (21)

Then, we again let

7 = '^gs
• '^gd

and

0)h = 1/^

Once again, this estimate gives us a lower bound on co// . The upper bound
is either l/igs or 1/rgj, whichever is smaller. Here, we see that R^^ is of the
order of 1/g^, a small resistance. Thus r^^ is normally much smaller than
Tgd, and it follows that l/r < oj^ < 1/^gd-
As a numerical example, let us find oo^ for a typical common-gate am-
plifier having H, = 300Q,Rss = lkQ,fio = Rl = 5kQ,g^ = lOmO, C^,,
= 7 pF, and C,,, = 2 pF. We have C^d = C,,, = 2 pF, Cg, = C^,, - C,,,
= 5 pF, and

7g, = (0.3 111 II

0.1) 5 = 0.349 ns

Tgd = (5||5)2 = 5 ns

7 = 5.35 ns

w// = 187 Mrad/s

There no Miller-effect capacitance present in the common-gate cir-
is

cuit, since the voltage gain shows no phase reversal. Thus, co// is larger
than it would be for the same device operating common source. This ac-
 .

7.5 High-jrequency FET response: common-gate and common-drain 265

counts for the use of the common- gate amplifier at high frequencies where
a larger input capacitance is most troublesome.
The final FET circuit we need to inspect at high frequencies is the
common-drain amplifier or source-followe r, whose high-frequency model
appears in Fig. 7.11a. This amplifier has a very high input impedance,
since the input capacitance is quite small; a very low output impedance, a
characteristic that enables the source-follower to drive a low-impedance
transmission line efficiently at high frequencies; and a voltage gain less
than unity with no phase reversal.
Now let by calculating the open-circuit time constants.
us estimate 0)^
From Fig. 7.11a, we have

R^ ^s = ^JI^B
and
Tgd = ^gd^gd = (^sll^B)^gd (22)

To determine Rgs , we remove Cgd and find the Thevenin resistance faced
by Cg5, as indicated in Fig. 7.11b. Let us squirt 1 A into the gate terminal
so that fig, = V^ll. Then,

V. = fi;+ RUi - gmV.)

Fig. 7.11 (a) The high-frequency model of the source-follower or common-drain am-

plifier, (b) With 1 A injected into the gate terminal and Cg^ open-circuited, Rgg = V^

de
".© '4 '"^ f>
. ^n
Sm

ia)

RMb=R's
266 Single-stage amplifiers at low and high frequencies

and

. - ^^ ,b; + Ri
^gs - -
I 1 + gmRi

Thus

'gs - ^gs^gs (23)

1 + gmRL
There is also a zero of the response at co^ = gml^as This frequency is usually
•

very much greater than oi^ and has little effect on our approximations.
If we let R, = 2 kfi, Rb = 100 kfl, R^s = 1 kfi, K^. = 250 fi,
g^
= 10 mU, Ci,, = 7 pF, and C„, = 2 pF, then C^, = 5 pF, Cg^ = 2 pF, and

Rgd = H; = Rs\\Rb = 2 100 = 1.961 kQ II

Tgd = ^gdCgrf = 1.961(2) = 3.92 ns

^ fi;^fi£ ^ (211100) Ml II
0.250)
_Q^^Q^^^
^-^^^^^^
^^
1 + g,H£ 1 + 10(1||0.250)

Tg, = Hg.Cg, = 3.60 ns

^
~ + = '^•52 ns
"^gs ^gcf

c^^ = 1/r = 132.9 Mrad/s

^z = gm/Cg, = 10-2/5 X 10-12 = 2000 Mrad/s

and 132.9 < cj// < 255 Mrad/s. An exact analysis of this circuit shows
that (jOh == 136.70 Mrad/s; the approximation w// = l/(rgs + Tgd) is again
excellent.

D7.6 An n-channel depletion-mode MOSFET with /c, = 4(Vgs + 2)2

mA operated as a C-G amplifier with Vdd = 35 V and V^g = 7 V. If i^i
is

= 200 kfi, H2 = 50 kfi, Rss = 2 kfi, R, = 0.5 kO, R^. = 20 kQ, Cg,
= 4 pF, and Cg^ =1.6 pF, find (a) Tg^, (b) Tgd- (c) Estimate w//.

An5u;^r5. 0.381 ns; 6.40 ns; 147.5 Mrad/s

D7.7 Element values for the model of Fig. 7.11a are R^ = 2 kQ, Hg
= 98 kQ, Rss = 800 Q, R^ = 200 Q, g^ = 8 mU, Cg, = 2 pF, and C^d
= 0.8 pF. Find (a) Tg^, (b) T^d- (c) Estimate co//.
Answers. 1.860 ns; 1.568 ns; 292 Mrad/s
7.6 High-frequency bipolar response: common-emitter 267

7.6 High-frequency bipolar response:

common-emitter
We now leave the field-effect transistor temporarily while we consider the
high-frequency performance of the common-emitter amplifier. At these
higher frequencies, capacitors Ci, C2, and C^ in Fig. 7.6 have extremely
small reactances, and they therefore appear as short circuits in the high-
frequency equivalent circuit of Fig. 7.12a. Note that there are two resis-
tors present, r^ and r^ that have no counterparts in the common-source
,

high-frequency equivalent.
We shall again use the open-circuit time-constant method to determine
a value for oi^ We begin by finding r^r = jR/C^ where fl/ is the Thevenin -
. ,

equivalent resistance faced by C^ with C^ replaced by an ope n circuij, as

shown in Fig. 7.12^. We combine resistances in series and parallel and
obtain

(24)

Therefore

r. = K||[r, + (fiBl|K.)]}C, (25)

Fig. 7.12 (a) The high-frequency equivalent circuit of the common-emitter ampli-

By removing C^ and letting Vg = 0, the Thevenin resistance seen by C^ is

fier, (b)

found to be fi; = rj[r, + {Rb\\Rs)1

^f

.(t) .. Rr>V^
<;^

(a)
R'l

^m ''^
n

(b)
 .

268 Single-stage amplifiers at low and high frequencies

Fig. 7.13 Letting C^ = and V^ = 0, the value of R^ is obtained by squirting in 1 A

and calculating fl^ = Vi^/l.

To calculate the time constant r^, we remove (open-circuit) C^ , set V^

= 0, and seek the Thevenin resistance facing C^ , as indicated in Fig. 7. 13.
Injecting 1 A into the equivalent circuit, we see that V^ = fl/ x 1. There-
fore, the upward current in H£ is 1 + gm^ir = 1 + gm^/? ^^^ the input
voltage is

Vin = V, + R[{1 + gmRs') = fl; + ^£(1 + gmRn

= R£ + R:{1 + g^R[)

It follows that the Thevenin resistance is R^ = Vin/l, or

R^ = fi£ + h;(1 + gmRL) (26)

and
r, = R,C^ = [Ri + R;(1 + g;„fi£)]C, (27)

Then, r = r^ + r^, and

. 1 1
0)H
= (28)
Tr + ^M

Since gmRL = l^vi(mid) K generally quite a large value, we see that the
l argest contribution to r^ gmRLRsCg and that this term will control co//
is ,

As an example, let us calculate w^ for a C-E amplifier having

g^ = 33.5 ml3 r^ = 20 fi

r^ = 8.78 kfi C^ = 17.25 pF

/3o = 294 C, = 1.8 pF

fl, = 1 kfi Re = 5 kQ

Hb = 16.67 kfi Ri^ = 2kQ

7.6 High-frequency bipolar response: common-emitter 269

We find
H;= 8.78 II
[0.02 + (111 16.67)] = 0.868 kfi

R£ = 5||2 = 1.429 kQ

R^ = 1.429 + 0.868(1 + 33.5 x 1.429) = 43.8 kQ

j^ = R^C, = 0.868(17.25) = 14.98 ns

r^ = R^C^ = 43.8(1.8) = 78.9 ns

7 = 14.98 + 78.9 = 93.9 ns

wh = 1/93.9 X 10-9 = 10.65 Mrad/s

JH = 1.695 MHz
|Av,(^id)l = 40.8, or 32.2 dB (40.7, or 32.2 dB, including rj

Since r^ r^,andl/7^ = 109/78.9 = 12.67 Mrad/s. we may state de fi-

>
nitely that 10.65 < (j)H < 12.67 Mrad/s The use of a CAD program lo- .

cates CO// at 10.7 Mrad/s and provides data for the solid curve of Fig. 7. 14.
The broken-line response curve is an approximation based on a single

Fig. 7.14 The results of the CAD analysis of the amplifier described in Section 7 6 are .

shown C^ = 17.25 pF, C^ = 1.8 pF, and r^ = 20 Q. The single-

in the solid line for
break-frequency asymptotic diagram is shown as a broken line.

I^Ks'dB

40

30
..___ ^^

20

10
\
\o:h= 10.7 Mrad/s ^\^ CO (rad/s)
106 107 108 ^ JQ9

10

106
\ 1 1 1 1 1 1 1

107
1
!
— 1 1 1 1 1

8
1

108
1
1 1 Mill
109
270 Single-stage amplifiers at low and high firequencies

break frequency located at 10.65 Mrad/s, using the open-circuit time-con-

stant method. The agreement is excellent.
The commanding effect that C^ has on w// may also be attributed to the
Miller effect. By direct analogy to the C-S amplifier and Eq. (19), we have

CMiller = C,(l + gmRi) (29)

and

Cin = C, + C,(l + g^RL) (30)

For this amplifier,

CMiller = 1.8(1 + 33.5 X 1.429) = 87.9 pF

Cin = 17.25 + 87.9 = 105.2 pF

Using thiscapacitance in association with the equivalent input resistance
jR/, we obtain a time constant

^in
= ^/Cin = 0.868(105.2) = 91.3 ns

We also obtain an approximate upper half-power frequency of 10^/91.3

= 10.95 Mrad/s. This also shows excellent agreement with the exact value
of 10.7 Mrad/s.
An increase in oj^ for an amplifier such as this
is usually obtain ed by

r educing gmRj ^^'^ ^^

mid-frequency ga in. As we found for the FET
common-source circuit, the product of gain and bandwidth tends to be
fairly constant, and thus a decrease in gain can lead to an increase in
bandwidth.
In order to increase the bandwidth without an accompanying de crease
i n gain, we must increase the gain-bandwidth product As a very rough .

approximation, |Av(^id)| = gmRi and cjh = l/gm^L^/C^- Thus, the

product 1/jR/C^ may be increased by decreasing fi/, largely governed by
Rs, which is often not under our control; or decreasing C^ by increasing
I
Vqb or selecting a different transistor with a smaller C^ and a larger co^.
I
;

D7.8 In an effort to increase the bandwidth of the amplifier used as an

example above, i^c is changed from 5 to 2 kfi. As a result, Vqe changes and
leads to the new values, C^ = 16 pF, C^ = 1.5 pF. Neglecting r^ at mid-
frequencies, calculate (a) |Av,(n,id)|, (b) r^, (c) r^, (d) co//.

Answers, 28.5; 13.9 ns; 46.4 ns; 16.6 Mrad/s

D7.9 A C-E amplifier has R, = 1 kfi, jRc = 3 kfi, g^ = 40 mO, r^

= 5 kfi, Rb = 15 kfi, r, = 50 1], C^ = 25 pF, and C^ = 2.5 pF. Let oj^
= l/(r^ r^) and calculate the gain-bandwidth product it Ri^ equals (a)
-I-

10 kfl, (b) 3 kfi, (c) 1 kfi.

Answers. 330; 313; 272 Mrad/s

7. 7 High-frequency bipolar response: common-base and common-collector 271

7.7 High-frequency bipolar response:

common-base and common-collector

Common-base
In some applications where the large input capacitance caused by the
Miller effect must be avoided, and a low value of input resistance is de-
sired, a common-base configuration is desirable. Examples may be found
in the two-stage cascode amplifier described in the next chapter, or an
input amplifier driven by a 50- or 75-fi transmission line.
The high-frequency equivalent circuit of the common-base amplifier is
shown in Fig. 7.15. Let us first assume that r^ is so small that we may set it
equal to .zero. With this assumption, it can be seen that the dependent
current source isolates the network in two parts, thus avoiding any inter-
action between the two capacitors C^ and C^ Then, the equivalent resis-
.

tance seen by C^ with C^ open-circuited is Ri = Rc\\Rl, and

RiC. r. = 0) (31)

The on the product of C^ and the

open-circuit time constant t^ depends
by the parallel combination of R^ and the input resistance
resistance given
of the common-base amplifier, Eq. (10) in Section 6.3, repeated here as

Z, = Ri (32)

Thus

r, = B,||fl£||r, (r. = 0) (33)

gr

Having t^, and r , we may easily obtain

'T = r^ -^ r^

Fig. 7.15 The high-frequency equivalent of the common-base amplifier circuit.

..(±) .
272 Single-stage amplifiers at low and high frequencies

and

CO// = {r. = 0) (34)

RlC, + Rs\\Re\K
g1

Since II gm is usually quite small, r^ tends to be much less than t^ and w// is ,

approximately equal to 1/r^.

In Eq. (31), note that C^ is not multiplied by the voltage gain. The ab-
sence of any Miller effect capacitance is due to two reasons First, there is .

no phase reversa l in the common-base amplifier, and second, no capaci-

t ance is present between input and outpu t in the model used.

We therefore conclude that C-B amplifiers tend to have larger band-

w^idths than C-E amplifiers do.
If r^ is not negligibly smal l, then it is necessary to include it in the equiv-
alent circuit when the Thevenin resistances faced by C^ and C^ are deter-
mined. These two derivations are not impossibly difficult, but an over-
whelming student demand for the opportunity to do them as homework
problems 2 forces us to include only the results:

r: +
R. = r. (35)
1 + gmRs
where

He. = iic H
and

rA^oRL - r.
R.. = n + R! + (36)
r. + r,+ (/3o + l)fl;

Both resistances are larger than they would be if r^ were zero; it follows
that T^, r„, and r will also be larger. Hence a;// and the bandwidth de-

As a numerical example, let a C-B amplifier have the following param-

eter values:

R, = 0.1 kQ gm = 38 m«
fif = 1 kfi r^ =6 kfi

Re = 10 kQ C. =20pF
Rl = 10 kfi C, =2pF
2 See Problems 24 and 25.
 .

7. 7 High-frequency bipolar response. common-base and common -collector 273

Table 7.1 The Effect of r^ on High- Frequency Common-Base PerformanceJ

Calculated CAD:

r„12 T^, ns T^, ns T, ns W|/, Mrad/s Mrad/s

0.407 10.00 10.41 96.8 99.8

50 0.629 14.34 14.97 66.8 68.5
100 0.851 18.67 19.52 51.2 52.2
600 3.02 61.1 64.1 15.60 15.68

We first lefr^ = 0, obtaining

r^ = (10 II
10)2 = 10 ns

r^ = (0.1 111 II
6|| 1/38)20 = 0.407 ns

r = 10.41 ns

coh = 109/10.41 = 96.1 Mrad/s

JH = 15.29 MHz
Note that the value obtained for co// depends almost entirely on r^
To see the effect that r^. has on o)// we use Eqs. (35) and (36) to calculate
,

H^ and R^ for a few values of r^ Having these, we determine the open-

.

circuit time constants and the upper half-power frequencies. The results
are shown in Table 7.1, along with "exact" data obtained with a CAD
program. Note the serious reduction in co^/ that occurs when r^ assumes its
maximum value of 600 12.
In general, the computer agrees quite closely with our calculations,
which speaks well for the computer, although it insists that a more exact
value for co// when r^ = is 99.8 Mrad/s.

Common-collector
Before leaving high-frequency bipolar transistor performance, we should
look briefly at the emitter-follower or common-collector circuit. The
high-frequency equivalent appears in Fig. 7.16. The feedback-capaci-
tance role is now filled by C^, while C^ appears across the input. The volt-
age gain is less than unity, and there is no 180° phase shif t. Thus, the
Miller effect is unimportant. An analysis of the equivalent circuit, a task
that can easily be accomplished in three or four hours, shows that Cjn is
only slightly larger than C^, the smaller of the two transistor capaci-
tances. The input capacitance is thus quite small. Also, the input resis-
tance is very large, as we discovered in Section 6.3. When the impedance
274 Single-Stage amplifiers at low and high frequencies

-WAr >
f-

+ F,
y.(t) Rsi c^Tp: R,<V^
Sm d>
*^-n
'•

Fig. 7.16 The high-frequency equivalent of the common-collector amplifier.

of the source is high, and that of the load is low, the emitter- follower often
provides high-frequency performance superior to that obtainable from a
comparable common-emitter circuit.
Let us estimate 03 ^ by making use of the open-circuit time-constant
method and Fig. 7. 16. To obtain R^ we open-circuit C^ set V^ = 0, and
, ,

view the network from the terminals of C^ Looking to the left, we see K/ .

= fj. + (i^fillRJ. The equivalent resistance looking to the right is r^, +

(jSo + 1)^L? where we have applied results obtained for the common-

collector amplifier in Section 6.3. Thus,

(37)

and Ik

''/x = RfiCf, (38)

where

r: = r. + (RbWRs) (39)

and

RL = RlWRe (40)

To find R^, we remove C^ , set Vg equal to zero once again, and look at
the network from the terminals of C^,, as shown in Fig. 7.17. For simplic-
ity, we again make and R[, Eqs. (39) and (40) above. The cur-
use of i?/
rent in r^ is V^/r^, that in R/is /j^ - (V^lr^), and I^^ - (V^/r^) - g^V^

flows upward in Ri Equating voltages, we have

.

V.
V. = r: I + Ri /in - - g;
7. 7 High-frequency bipolar response: common-base and common-collector 275

tfin-;^-s^>'.)

Fig. 7.17 To calculate fl, in Fig. 7. 16, we open-circuit C^ and set Vj = 0; then fl,
VJhn-

Therefore

SO that

i_ ^ 1 + gmR£
V. R, r; + Rl
or

r; + RL
R. = r, (41)
1 + gmR£
We now have
(42)

and

uh =
.
— 1

where
T = T^ -^ r^

Note that r^^ enters only into fi/; as r^ increases, fi/ will increase thus ,

c ausing both t^ and t^ to increase and co// to decrease .

As an example, let us select Rb = 40 kQ, r^ = 100 12, and Re = 0, of

course, and all other values identical with those of the C-B amplifier used
earlier in this section:
276 Single-stage amplifiers at low and high frequencies

Rs = 0.1 kfi r^ = 6kQ

fl£ = 1 kfi C^ = 20 pF

J?L = 10 kQ C^ = 2 pF

gm = 38 mU
We find that
R;= 0.1 + (0.1 II
40) = 0.1998 kl2

fl£ = 1 II
10 = 0.909 kQ

l3o = 228

R^ = 0.199811 (6 + 229 x 0.909) = 199.612

T^ = 0.399 ns

0.1998 + 0.909
R^ = 6 = 6110.0312 = 31.0 Q
1 + 38(0.909)

r^ = 0.621 ns

r = 1.020 ns

coh = 981 Mrad/s

A computer simulation of this C-C ampHfier leads to o)h = 2001 Mrad/s,

and we are therefore off by approximately a factor of two. Since co// is
really much higher than we estimate, we err on the conservative side. Al-
though a better estimation would be welcome, we would probably be
wasting our time making additional calculations. Let us calculate the
gain-bandwidth product co^ for this transistor at this operating point:

Thus, we will have a bandwidth that is comparable to the gain-band-

width product; the transistor is operating close to its limiting frequency.
We might also note that the gain-bandwidth product and the bandwidth
are comparable because the gain of the C-C amplifier is approximately
unity.
A more problem with high-frequency analysis in many cases is
serious
model does not represent the transistor accurately above
that the hybrid- tt
a few hundred megahertz. In such cases a much more sophisticated model
has to be considered, and this is a topic we leave for more advanced treat-
ments.
7.8 Low-frequency FET response 277

D7.10 A common-base amplifier has jR^ = 50Q, Hg = Ri^ = Re = 2kQ,

g^ = 20 mO, 00 = 40, C^ = 2 pF, and C^ = 30 pF. Find a)H if r^ equals (a)
0, (b) 50 12.

Answers. 366; 220 Mrad/s

D7.11 A common-collector amplifier has R^ = fi^ = H^^ = 2 kQ, Rg

= 20 kfi, g^ = 20 mU, 0o = 40, C^ = 2 pF, and C^ = 30 pF. (a) Find co^.
Find 1/(7^ + 7^) if r^ equals (b) 0, (c) 50 Q.

Answers. 625; 137.7; 134.8 Mrad/s

7.8 Low-frequency FET response

We now turn our attention to the low-frequency end of the amplifier re-
sponse curve. A typical n-channel enhancement-mode MOSFET ampli-
fier connected in the common-source configuration is shown in Fig. 7. 18a.
We recall that the term common-source is used because at mid-frequen-
cies, the source capacitor Css acts as a short circuit to the signal and the
source is common to one terminal of both the output and the input. The
low-frequency equivalent circuit shown in Fig. 7.18Z7 indicates that we
have three capacitors, the two coupling capacitors Ci and C2 and the
source by-pass capacitor Css The presence of these capacitors causes a
•

reduction in current and voltage gain with frequency in the low-fre-

quency range. Our goal is to determine the variation of the magnitude

Fig. 7.18 (a) A typical common-source FET amplifier, (b) The low-frequency equiv-
alent circuit.

AAAr|(-|-oF^o
Sm
'^
'^^n

\<:

^L^Vo ^^W ^ ^d| R,>V^

(a) (b-)
 . ,

278 Single-stage amplifiers at low and high frequencies

and phase of Ay^(/(jo) with frequency below the mid-frequency range. To

a large extent, this is accomplished by finding the lower half-power fre-

quency cjl .

There are three methods of determining oij. that we might use. The first
is a b rute-force analysis of the circuit to yield an expression for Ay^( /aj).

With three capacitors in the circuit, the result is a fraction in which the
denominator is a cubic polynomial in ;w. When oj is much greater than co^
Avsijo)) = Av5(j„id) We are seeking a value of w^ such that AvsHo^l)
.
= |
I

(l/v2) Avs(mid)
I
This may be found by calculation and careful plotting,
I
•

by the use of a "SOLVE" routine on a good hand-held calculator, or by

trial-and-error methods. The complete circuit analysis is usually not a
simple process, however, and we shall try to avoid it.
A s econd method involves the use of a digital compute r to analyze the
specific circuit at a sequence of frequency values. Either plotting the
results or inspecting the tabulated data will reveal the details of the re-
sponse curve or the value of co^ Any CAD program may be used for this
.

purpose. However, this method is better suited to analysis than it is to de-

sign, for the only means of improving the results is by an educated guess,
or simple trial and error to modify the circuit, followed by a repetition of
the computer analysis.
The third method is approximate but it is often very effective, particu-
,

larly in design situations. It is based on the assumption that o)^ is deter-

mined primarily by only one of the three capacitors, and that the rem ain-
i ng two may be treated as effective short circuits at o^ i^ Thus three simple .

analyses must be made, each leading to a response curve characterized by

a single corner frequency. If we find that one of these three break frequen-
cies is clearly much larger than each of the other two, say by a factor of
five to ten, then the two lower break frequencies have a relatively small
effect on the response curve in the neighborhood of o^i, and co^ is only
slightly greater than the frequency of the highest corner frequency. The
error is usually less than 10 % If one of the break frequencies is not consid-
.

erably larger than both of the other two, then we either must fall back on
one of the two methods described earlier or accept a greater error in our
estimate of o)^

Let us apply this third method to the C-S amplifier of Fig. 7.18Z? and
determine expressions for the break frequencies that result when each ca-
pacitor acts alone assuming the other two are both short-circuite d. As we
,

found in Section 7.2, the break frequency is given by 1/(Rjy^C), where Hxh
is the Thevenin resistance the capacitor faces.
We first consider Ci with Css and C2 replaced by short circuits. With Vg
= 0, the resistance faced by Ci is R^ + Rbj and we have
7.8 Low-frequency FET response 279

Next, Ci and Cgs become short circuits, and we have C2 acting with the
series combination Rq Ri, since the current source goes to zero when V^
-\-

is set equal to zero. Thus,

WC2 (44)
{Ro + Rl)C2

Finally, Ci and C2 are short-circuited with V^ = 0, and we look at the

network from the terminals of Css as indicated in Fig. 7. 19. Since there is
,

no voltage across fij or jRg then Vjn = -V^. Therefore, /jn = (^m/^ss) ~
,

gmV^ = Vin(l/Rss + gm), and it follows that

1 1
= R ss
^'Rss + g, g1

Thus

1
<^css (45)
[Rss\\illgm)]CsS

Let us obtain some numerical values for these three corner frequencies
in the case of a common-source amplifier having R^ = 300 12, Rb = 100
kl2, Rj) = Rl = 5 kfi, Rss = 2 kQ, g^ = 10 mU, = 0.2 /xF, C2 = 1 ^F, Q
and Css = 10 /xF. We find
1000
0)Cl
= = 49.9 rad/s
{R, + Rb)Ci 100.3(0.2)

1 1000
^C2 - = 100 rad/s
(Ro + i?L)C2 10(1)

1
^css - = 1050 rad/s
[Hss II
(1/g.)] Css (2||0.1)10

Fig. 7.19 The resistance faced by Css with V^ = and Ci and C2 short-circuited is

Vin//in = flssll(l/gm).

-t—o v„ o—
^
 ,

280 Single-stage amplifiers at low and high frequencies

Since o)css is much greater than both o^ci and o)c2^ we estimate that w^ =
(jjcss
= 1050 rad/s, or 167 Hz. Thetrue value, obtained by an exact analy-
sis of the circuit, is 1059.4 rad/s.
The design of a common-source circuit for a desired low-frequency per-
formance is easily accomplished by selecting either o)ci wc2 or <^css as co^ , •>

or slightly less than co^ to be safe, and then placing the remaining two
corners at frequencies less than one- tenth of that value. The controlling
frequency is because the resistance 1/g^ is such a small value.
usually cocss
The c ommon-gate its low-frequency model, are shown
amplifie r, and
in Fig. 7.20a, b. Considering Ci by itself, and remembering that the input
resistance of the C-G amplifier was found to be Rss\\ 1/gm iri Section 6.6,
we find

1
COci = (46)
[R, + (HsS II 1/gm)] Ci

The resistance seen by C2 is R^ + Rl-) ^^^ therefore

1
^C2 (47)
(Ro + Rl)C2

Fig. 7.20 (o) A typical common-gate amplifier circuit for an n-channel enhance-
ment-mode MOSFET. (b) The low-frequency equivalent circuit.

(a)

<^^ ^e

R,>Vn
^'O
RrZ Ce

(b)
7.8 Low-frequency FET response 281

Finally, the resistance faced by Css is Rb = ^i ^2. and

II

1
<^css (48)
RrC
B^SS
Since Rb is usually very large, either Ci or C2 will control cj^, with the
other corner frequency less than one- tenth that value. Since l/gm is small,
Ci is a good choice for the controlling capacitor in the common- gate cir-
cuit.
The remaining common-drain configuration is shown in Fig. 7.21a,
with its low-frequency model in Fig. 7.2lb. The two capacitors provide
the break frequencies,

1
^ci (49)
(Rs + Rb)C,
and, since the output impedance of the C-D amplifier was found to be
Hss l/gm in Section 6.6,
II

1
^C2 - (50)
[Rl + (Kss||l/g„)]C2
It usually happens that co^ is determined by C2 because the output impe-
dance of the common-drain, Rss\\ Hgm, is so small.

Fig. 7.21 (a) A MOSFET common-drain amplifier, and (b) its low-frequency equiv-
alent circuit.

C^Vr

> 1

Me i'"-^
\^

.(^ ^ ' ss

ib)
 .

282 Single-stage amplifiers at low and high fi-equencies

D7.12 The common-source amplifier used as a numerical example in

= 300 fi, Rb = lOQ kfi, i^^ = i?^ = 5 kQ, Rgs = 2 kQ, g^
this section {R,
= 10 mU) is now operated as a C-G amplifier with Ci = 5 piF, C2 = 2 /aF,
and Css = 0.2 /xF. Find (a) o)ci, (b) wc2, (c) o^css- (d) Estimate o?/^.

An5t/;^r5. 506; 50; 50; 506

D7.13 A common-drain amplifier has the circuit parameters ^5 = R^ =

300 Q, Rb = 100 kfi, i^ss = 2 kQ, g^ = 10 m^, Cj = 0.5 ^F, and C2 = 10
/xF. Find (a) wci, (b) coc2- (c) Estimate w^.

Arwioers. 19.9; 253; 253 rad/s

7.9 Low-frequency bipolar response

Common emitter
The and design of bipolar circuits at low frequencies is quite simi-
analysis
lar to theprocedures used for FET amplifiers. There will be one addi-
tional element in every equivalent circuit, however —
the resistance r^ —
and this may require a few more equations each time a The-
venin-equivalent resistance is found.
A standard common-emitter amplifier is shown in Fig. 7.22a, and its
low-frequency equivalent circuit appears as Fig. 7.22b. Note that C^ and
C^ have been replaced by open circuits, and r^ is neglected since it is now
in series with r^ and may be considered to be a part of r^, if desired.
We shall again find three corner frequencies by considering each capac-
itor as acting alone with the other two replaced by short circuits.
In Fig. 7.23a, C2 and Ce are considered to be short circuits, and we seek
the Thevenin resistance presented to Cj. It is obviously Rg + (i^filk^)^
where Rb = -R1IIK2, as usual. Thus

We next consider only C2, with Cj and Ce short-circuited, as repre-

sented by the equivalent circuit of Fig. 7.23b. The Thevenin resistance is
Re + Rl, so that

Finally, with both Ci and C2 replaced by short circuits, and V^ set equal
to zero, the equivalent circuit of Fig. 7.24 results. The resistance offered to
Ce will be obtained as the ratio of Vjn to /jn

The downward current in Re is V^^^/Re, the current to the left in r^ is

- V^/r^, and the current to the right in the dependent current source is
7.9 Low -frequency bipolar response 283

-gm^TT- Hence
V
= _i2
VIJL - p v„
I y (^0 + 1)
Ri

We also see that

Vi„ = - K + (fi»l|fiB)]

so that

V.

Eliminating Y^ in the first equation, we have

1 ^0 + 1
'in *^
m
Be r, + {RA\^B.

Fig. 7.22 (a) A typical common-emitter amplifier circuit, (b) The low-frequency
equivalent circuit.

(a)

if

^(A) ^fll^:

4 *

(^)
284 Single-Stage amplifiers at low and high frequencies

(a)

^f

6W '^
IT

ib)

Fig. 7.23 The common-emitter low-frequency equivalent circuit of Fig. 7.22 is sim-
plified by assuming that the controlling capacitance is (a) Cj and (b) C<i .

If we designate this Thevenin-equivalent resistance as i?eq > then

1 /, 1 /3o + 1

K eq R^ r. + (fi.ll/^B)

or

r. + (i^.lli^B)
^eq = ^£ (53)
^0 + 1

We therefore obtain the third break frequency as

1
WC£ - (54)
^eq^£
An alternate approach to finding fieq uses the results obtained for the
common-base and common-collector amplifiers in Section 6.3. We found
then that resistance values increased by a factor of /3o + 1 when we viewed
emitter loads from the base, whereas they decreased by the same factor as
our viewpoint moved from the base to the emitter. In Fig. 7.24, our view-
 .

7.9 Low-frequency bipolar response 285

point is the emitter, and we see Re in parallel with

T + Wslli^.

/3o + 1

Thus Eq. (53) follows.

A detailed analysis of the low-frequency C-E equivalent circuit also
shows that the gain expressions have a factor 1 - /(coz/co) in the numera-

tor, where

CJ. = (55)
Re^e

When cj » coz, this corner has little effect, since 1 - j(oiz^^) = 1- This is

usually the case.

If we examine Eq. (53) more closely, we may recall that i^eq is the out-
put impedance of the common-collector amplifier, Eq. (20) in Chapter 6.
Note that its value does not depend on the value of Re since that resis- >

tance is in series with a current source and is therefore a superfluous ele-

ment with respect to the emitter circuit. Equation (53) also indicates that
if Rs is small compared with r^ and if R^ is no smaller than about 1 kQ,

then Heq = l^gm- This is often a useful rule of thumb in making a quick
estimate of jReq
Collecting these results, we are now prepared to calculate values for
^ci ^C2? ^C£? and ojz and then make an estimate of the lower half-power
>

frequency cox.. If one of the three corners cjci, (^C2^ or ^ce is at least ten
times greater than both of the other two (and also oo^), then we may select
o)L as being equal to that greatest corner frequency.
As an example of the determination of the low-frequency performance
of a common-emitter amplifier, let us analyze the circuit whose mid-fre-

Fig. 7.24 The equivalent circuit of Fig. 7.22^7 with Cj C2 and V^ replaced by short
, ,

circuits. The Thevenin resistance faced by C^ is i^gq = ^in/An-

Sm '^n
+ V.
286 Single-stage amplifiers at low and high fi-equencies

quency performance we determined in Section 6.1. The parameters are:

gm = 33.5 mU ^ Rb = 16.67 kfi

r^ = 10.45 kQ /?c = 5 kQ

Po = 350 Rl = 2kQ
Ci = 3 /iF «£ - 5 kQ

C2 = 8 mF /^, = 1 kii

Ce = 50 /xF

We first assume that C2 and Ce are short circuits and use Eq. (51) to deter-
mine COci •

10^
"^^ = ^"^/^
[1^ (16.6711 10.45)]3 = ^^-^

Short-circuiting Ci and Ce Eq. , (52) leads to

103
'^^^'
^^^ =
(5 + 2)8 = ^^-^^

The third situation arises with Ci and C2 replaced by short circuits. From
Eq. (53),

10.45 + (11116.67) ^^^^

^eq = 5 ^

1 + 350
" — = 32.512

while the approximation R^q = 1/gm gives 29.9 Q. We now employ Eq.
(54) to obtain

10^
'"^^'
^^^ = 32.5 X 50 = ^^^

The break frequency of the zero is located from Eq. (55):

103
0)^ = = 4 rad/s
5 X 50

We note that o)ce is the break frequency that controls the low-frequency
response since it ismore than ten times greater than any of the other cor-
ner frequencies. Thus, co^ = ojce = 616 rad/s.
As a check on these conclusions, the computer may be used to calculate
the low-frequency response data. The results are shown as the solid curve
in Fig. 7.25. The mid-frequency gain was found previously, with the
value Av,(jnid) = - 41.4, which is equivalent to 32.3 dB. The lower 3-dB
frequency therefore occurs where the gain is 29.3 dB, which turns out to
 1

7.9 Lovo-jrequency bipolar response 287

l^l^-.ldB

30
•^ 1^ Ks(mid) IdB
^^
\
_ ,
——
.^

^t's(mid) 20dB7dicadi^>^^^^^H^
v/I dB
20

10
^ 1

/^ 1

1
CO (rad/s)

7
t*^!
100 1000 10^

10

\
— 1 1 1 1 1 1

8 102
1 1
— 1 Mill
8 103
1 1
—
1
1 II II
8
1

10^

Tig. 7.25 The data from the computer analysis of the C-E example are plotted as a
solid curve. From this, oi^ = 645 rad/s, as compared with the approximate result, 0)^
= (joce = 616 rad/s. A portion of the asymptotic diagram is shown as a broken curve.

be at approximately 645 rad/s. The approximate value of 616 rad/s ob-

tained above is thus quite close, showing approximately 5% error.
In determining cu// by the open-circuit time-constant method, we added
the time constants corresponding to each capacitance acting alone; the re-
ci procal of thissum represented a conservative estimate for wh That is, -

our estimate was less than the true value In an analogous way, we may .

establish a co nservative estimate for co^ by adding th e three corner fre-

quencies t hat appear in the denominator of the gain expression. Thus, the
sum o)ci + coc2 + <J^CE is a more conservative estimate for co/^; that is, this
estimate is greater than the true value For this example, .

^ci + o)C2 + o)cE = 44.9 + 17.9 + 616 = 679 rad/s

which indeed greater than the true value of 645 rad/s.

is

The broken line on Fig. 7.25 is part of the asymptotic diagram, and it
shows the corner at o)ce = 616 rad/s.
As an example of the low-frequency design of a common-emitter ampli-
fier, let us continue with the mid-frequency design of the last chapter that
is shown in Fig. 6.4c. The circuit is repeated in Fig. 7.26 for convenience,

and some of the pertinent data are also listed near the circuit diagram. We
shall design for a lower 3-dB frequency, oii = 1000 rad/s. Our design pro-
288 Single-stage amplifiers at low and high frequencies

5kn

^'O(min) 450 ^O(max) = 1800

Vs(mid)
-219
Z,- =5.24kJ2 Z. = 16.4 kn
=
Kj, 5.78 kn
Rb = 56.4 kn Rs = 56.4 kn

Fig. 7.26 The design of a common-emitter amplifier at mid-frequencies, taken from

Fig. 6.4c.

cedure is a simple one. We let one of the three capacitors control the value
of 0)1 while both of the other two produce half-power frequencies less than
one- tenth that value.
Suppose we select coci as 0;^^. Then

1 10-3
^Cl
[Rs + {RB\\r.)]Ci [0.5 + (56.4 II
5.78)] Ci

= col = 1000

and Ci = 0.174 piF. Next, let us place o)c2 at 00^/20:

_
1 10-3 _ 1000
_
"^^^ ~ + Rc)C2 " + 5)C2 " 20
(Rl (8

so that C2 = 1.54 ^F. Finally, we let o)ce = <^L/iO, and

1 /3o + 1 1
^CE -
Re Ce
1 451 10-3
= 100
3.5 5.78 + (0.5 56.4) II

and Ce = 722 jliF. This then places the zero break frequency at

1 103
0.396 rad/s
RfC]
E^E 3.5(722)

From these results, it is obvious that Cj was not the best choice for the
7.9 Low -frequency bipolar response 289

l'^ KjIdB

50
"^^^ Kj(mid)ldB
1
^CE

V2 dB
^^1^
40
20dB/dec ade ^^y^ '

30
y 1

20

10

1 cj (rad/s)

1 10 100 JlOOO 104

/
10

—— \ 1 1

4
1 1

6
III
8 101
'

\ 1 1

4
II
6
1 II
8 102
\
— 1 1 1 n
6
11*1

8 103
\

2
— 1 1 1 1

6
1 II

8 104

Tig. 7.27 The results of the computer simulation of the amplifier in Fig. 7.26 are
shown in the solid line for Cj = C2 = 2 /liF, C^ = 80 /xF.

low-frequency control; C^ is inconveniently and uneconomically large.

To reduce the size required for C^, we should select it to control coj^, a
condition that was certainly suggested by the analysis example above,
where Heq was quite small. Letting CO c£ = 1000, coci = 100, and co (72 = 50
rad/s, we find that Ci = 1.74 /xF, C2 = 1.54 ^cF, C^ = 72.2 ^F, and co^
= 3.96 rad/s. If we increase each of the capacitor values to a commer-
cially available size, say Cj = C2 = 2 /xF, and C^ = 80 jitF, then the
response curve generated by computer simulation is that shown in Fig.
7.27. From the graph and the data, we find that lAy^^n^jd)! = 218.7 (or
46.8 dB), that 218. 7/ V2 = 154.6 (or 43.8 dB), and that co^. = 982 rad/s, a
little bit better (lower) than the design value of 1000 rad/s.

Common-base
The common-base amplifier with its low-frequency equivalent circuit,
shown in Fig. 7.28(2, h, also contains three capacitors. We again avoid the
difficult problem of deriving the gain expression; instead, we find the
three corner frequencies that result from each capacitor controlling the
response alone while the other two are replaced by short circuits. Using
thismethod, we may approximate the lower 3-dB frequency co^ quite
closely by the highest corner frequency if that frequency is at least ten
times as great as each of the lower two break frequencies.
290 Single-stage amplifiers at low and high frequencies

'.© '.

(a)

+
^ ^f

.© «- /^L< K
R^< R-

(b)

Fig. 7.28 (a) A common-base amplifier circuit, and (b) its low-frequency equivalent
circuit.

We first replace C and C2 by short circuits. Next we borrow the expres-

sion for the input impedance of a common-base amplifier, Eq. (10) in Sec-
tion 6.3:

Z,- = Hrllr,

We identify the Thevenin resistance seen by Ci as R^ + Z, ,

yielding

_ 1
(56)
''^^ " [R, + RE\\rJ{llgJ]C,
The output capacitor C2 by itself provides a corner at coc2 •

1
_ (57)
""^^ "
{Re + i?JC2
The final case is not quite as simple. The impedance facing C in Fig. 1.28b
with Ci C2, and V^ replaced by short circuits may be found by
, recalling
our earlier discovery in Section 6.3 that any resistance connected to the
emitter is increased by a factor of i3o + 1 when it is viewed from the base.
7.9 Low-frequency bipolar response 291

Here, fij| Re is multiplied by (jSq + 1), and then combined in series with
r^. Including Rg = jR; JR2, we have ||

«eq = «Bl|[r. + (^0+ l)(fl»l|fl£)] (58)

and

^c =
^eqC^

It is informative to compare the values of the three resistances seen by

Ci C2 and C. That presented to Ci is apt to be low, since the input impe-

, ,

dance of the common-base amplifier is quite low and operates best with a
low-impedance source. Thus Ci is probably associated with a few hun-
dred ohms. The output capacitor C^ sees Rq and R^^^ series, or several
thousand ohms. The base capacitor C faces Rg, generally quite large, in
parallel with another resistance that is very large by virtue of the jSq + 1
factor. Thus C looks at several tens of thousands of ohms. To provide iden-
tical corner frequencies, it would be necessary to make Ci considerably
larger than C2, and C2 much larger than C. T he logical choice for cj/^ is
therefore 03 c\, which is usually the case in practice.

Common-collector

The common-collector amplifier in Fig. 7.29a, with its low-frequency

equivalent circuit in Fig. 7.29^?, contains only two capacitors. The corner
frequency produced by Cy with C2 replaced by a short circuit, is given in
,

terms of the input impedance to the common-collector circuit, Eq. (15) in

Section 6.3, or by making another application of the /Sq + 1 factor:

Z, = R, = Rs\\[t^ + {l3o + 1)(Re\\Rl)] (59)

SO that

'^- = (^^^
(B. +V.)C,
Since Ri apt to be quite large, Ci may be a relatively small value and yet
is

permit good low-frequency performance.

The output coupling capacitor C2 works in conjunction with jR^ and the
output impedance of the common-collector amplifier, Eq. (20) in Section
6.3:

r. + {RbWRs) .gjv
Zn = Rn = R
(^0 + 1)

We may also remember that, as seen by the emitter, any resistance con
292 Single-stage amplifiers at low and high firequencies

nected to the base is divided by (jSq + 1). The corner is

1
^C2 (62)
(fiz. + Ro)C2
Both Kg and Ri^ may be relatively low values of resistance, so it is therefore
preferable to select a design in which o^i = a;c2 ^ lOcoci to avoid ex- ,

tremely large capacitor values.

However, we should also remember that the analysis of a common-base
or a common-collector amplifier may be accomplished quite easily with a
CAD program. This is particularly useful if one of the individual break
frequencies is not considerably greater than the other two break frequen-
cies. By all means, let us avoid calculating the exact expression for A ( /a;),
a task that only an eager graduate student would enjoy.

D7.14 The parameters of a common-emitter amplifier are R^ = 300 Q,

Rb = 15 kQ, r^ = 8 kQ, Re = S kQ, g^ = 75 mO, Re = ^ kO, R^ = 3 kQ,

Fig. 7.29 (a) The common-collector or emitter-follower circuit, (b) Its low-fre-
quency equivalent circuit, showing the points at which the input and output impe-
dances are defined.

(fl)

Rs

^f if

'^© e Vr
R, < V,

z,

ib)
 .

7.10 A common-emitter example: analysis and design 293

Cj = 4 /xF, C2 = 2 ^F, and C^ = 80 /xF. Determine (a) coci, (b) a;c2, (c)

coc£ ?
(d) ^z (6) Estimate co^
•

An5t(;m. 45.3; 55.6; 910; 4.2; 910 < co^ < 1011 rad/s

D7. 15 A common-emitter amplifier is to be designed for R^ = 500 12 and

Rl = ^ kfi. If Rb = 20 kfl, Rf = 2 kQ, Re = 4 kl2, g^ = 50 m«, and jSq
= 250, let cj^ = 400 rad/s and select values for (a) Ci, (b) C2, (c) Cf.
An5n;^r5. 5; 3; 125 /xF

D7.16 A common-base amplifier operates between a 75-Q source and a

2.5-kQ load. If iSo = 125, g^ = 25 mO, Re = 1 kl2, Rc = 5 kl2, fig
= 20 kQ, Ci = 25 AtF, C2 = 5 /xF, and C = 4 /xF, find (a) o^ci (b) ajc2, (c) ,

coc (d) Estimate o)i^

. .

An5w;^r5. 353; 26.7; 30.6; 353 < w^ < 411 rad/s

D7.17 A common-collector amplifier operates between a 2.5-kl2 source

and a 75-fi load. If ^q = 125, g^ = 25 mU, i?£ = 1 kfi, H^ = 20 kO, C^
= 4 /xF, and C^ = 25 jnF, find (a) coci, (b) 0^02- (c) Estimate oj^,.
Arwt^^rs. 23.4; 310; 310 < co^ < 333 rad/s

7.10 A common-emitter example:

analysis and design

Analysis

For an amplifier circuit such as the common-emitter stage shown in Fig.

7.30, we usually would like to know the several gains, the input impe-
dance, and the bandwidth. The minimum value of the gain is of most con-
cern, since some specified small input signal must be amplified to an ac-
ceptable level; larger values of gain make the system work even better in
most applications. Therefore, we shall calculate the following six quanti-
ties for this amplifier:

1. Minimum mid-frequency voltage gain VqIVs = ^Vs

2. Input impedance Villi = Zf
3. Current gain /o//i = A/
4. Power gain (V«/J/(V,/0 = Ap
5. Upper half-power frequency oj//
6. Lower half-power frequency co^^
Before making a lot of unnecessary or unproductive calculations, we
should give some consideration to problem identification and the plan of
294 Single-stage amplifiers at low and high frequencies

;5kn 4mF /^

47 kn i
1^

2kneK,

Fig. 7.30 A common-emitter amplifier circuit used as an example.

attack. First, we see that we require a rather complete analysis of this

single-stage common-emitter amplifier. Thus a dc analysis must be per-
formed first to provide parameter values for the hybrid- tt model, which in
turn is used to calculate gains and bandwidth. Next, we need the mini-
mum voltage gain, so we must decide what combination of 2N5088 char-
acteristics will result in this worst case. We certainly need to determine

gm(inin); this occurs for /c(min), which can be calculated by using Pdcimin)'
The gain also decreases with r^, although the effect is less. That is, we
should not reduce r^ by increasing g^ but rather let gj^ be at its minimum
value and then select i3o(niin) •

We let Vbe = 0.65 V, T = 25°C, and then proceed with the dc analysis:

29(47)
^Th = ^B - 29 + 47 = 17.93 kfi

From Fig. 9 of the 2N5088 data sheets in Appendix A,

Pdcimin)
= 300(1.2) = 360 (25°C, Ic = 1 mA, Vce = 5 V)

(360) (5.72 - 0.65)

C(min)
= 1.002 mA
17.93 + 361(5)

VC£(max) 15 - 5(1.00) - 5(1.00) 5V

Since our calculated value of Ic agrees with the value we assumed in deter
mining i3dc(min) we have a consistent set of data and can proceed to calcu
,
 .

7.10 A common-emitter example: analysis and design 295

late values for the hybrid- tt equivalent circuit:

g.(min) = 38.9(1.00) = 38.9 mO

/3o(min)
= 350 (tabulated on data sheet)

^^ = S = ^-«'^^"

In the mid-frequency range, we neglect r^ and all the capacitors; by

-

keeping our thoughts on the equivalent circuit, we can write

H£ = 5||2 = 1.429 kO

Av,(n.in) = -38.9(1.429) = -55.6

'Z, = 9 17.93 = 5.99
II
kfi

Av.(™i„) = - 55-6( ^'599 ) = - 47.6 (33.6 dB in magnitude)

i

e QQ
Ai = -55.6 X -^^ = -166

Ap = 55.6(166) = 9240

To find the upper 3-dB frequency, we need to establish values for C^

and C^ . A typical value for C^ can be obtained from Fig. 12 on the 2N5088
data sheet with V^b = 5 - 0.65 = 4.35 V. find C^ = C^b = 2pF. For We
the assumed operating point, Fig. 11 shows fj = 300 MHz, or coj = 1885
Mrad/s, andC^ = (38.9/1.885) - 2 = 18.6 pF. assume r^ = 50 Q and We
begin calculating:

R, = R: = 9 II
[0.05 + (111 17.93)] = 0.898 kQ

r^ = 0.898(18.6) = 16.7 ns

R^ = 1.429 + 0.898(1 + 38.9 x 1.429) = 52.2 kl2

T^ = 52.2(2) = 104.5 ns

Thus
T = 16.7 + 104.5 = 121.2 ns

and
coh = 8.25 Mrad/s
Note how C^ controls co//

The lower half-power frequency is determined after evaluating coci,

 ,

296 Single-stage amplifiers at low and high frequencies

QiC2, and o)cE

1000
OJci = = 47.7rad/s
(1 + 5:99)3
1000
<^C2 - 35.7 rad/s
(2 + 5)4
351 1000
^CE = 473 rad/s
5 9 + (11117.93) 75
Therefore, we know that cj^ is greater than 473 rad/s,and less than c^ci
+ coc2 + ^CE or 556 rad/s. A reasonable estimate might be co^
= 515 rad/s.
This completes the analysis specified earlier, although we might also
want to investigate the stability of the operating point with temperature
The maximum gains could be found as well,
or for higher-j8 transistors.
but the above results are indicative of the procedures we need to follow.

Design

We now turn to a design problem. A common-emitter amplifier using a

2N5088 transistor is required to meet these specifications:

Rl = 2kQ
\Avs\ ^ 25

fL < 100 Hz
/h ^ 2 MHz
\Zi\ > 2 kl] (at mid-frequencies)

Looking over these requirements and keeping the amplifier we just ana-
lyzed in mind, we should conclude that there will be no problem with w/^
since we can always select larger capacitors; there will be no problem with
the voltage gain, because we had almost twice that value before; the mini-
mum allowable input impedance is a third of the earlier value, and we
should be able to provide it easily. The real problem is with o)^, which is
about 50% larger than the earlier value (12.57 vs. 8.25 Mrad/s).
To increase oj//, we should first consider reducing the Miller-effect ca-
pacitance. This is achieved by lowering R[ and the voltage gain. We begin
by letting the minimum gain be 25. At the same operating point used in
the analysis problem,

91117.93
25 < (38.9) Ri
1 + (9 II
17.93)
7.10 A common-emitter example: analysis and design 297

Therefore

Ri > 0.75 kfi

and it follows that

Re > 1.2 kfi

Since a nonzero value of r^ will reduce the gain slightly, let us try the cir-
cuit of Fig. 7.30 within c decreased to 1.25 kfi (i^£ = 0.769 kl]). The input
impedance is still and we need only check w//. The minimum
about 6 kfi,

value (worst case) of cj// occurs when g^ is a maximum ( Av5(mid) larger) |

I

and r^ is a maximum (jR/ larger). To find g^n(max)5 we have

^dcCmax) = 900(1.2) = 1080

1080(5.7 2 - 0.65) _ ^,, , .

^^^"^^^) " 17.93 + ^'"^^ ""^

1081(5) "

gm(max) = 38.9(1.011) = 39.3 m«

Then we find r^, :

^O(max) = 1400
1400
r^ = = 35.6 kO
39.3

Since VcB has increased to 15 - 1.011(1.25 + 5) = 8.03 V, C^ decreases

slightly to 1 .6 pF, according to the data sheet, Fig. 12. Also, fj increases to
320 MHz, or wr = 2011 Mrad/s. Therefore
QQ Q

R^ = H;= 35.6 II
[0.05 + (1|| 17.93)] = 0.970 kfl

T^ = 0.970(17.95) = 17.41 ns

r^ = [0.769 + 0.970(1 + 39.3 x 0.769)]1.6 - 49.7 ns

109
"^ =" ^^'^ ^'^^''
17.41 ^ 49.7 =

Jh = 2.37 MHz
This is comfortably larger than the minimum required value, and all that
remains of the design is the selection of Ci C2 and Ce This is requested , , .

in Problem D7.18 and the answers appear there.

A computer analysis of the final design, similar to Fig. 7.30 but with Re
changed to 1.25 kfi, may be made for the two conditions considered: g^(min)
298 Single-stage amplifiers at low and high frequencies

\^Vs^dB

4 6 8107 4 6 8108

Fig. 7.31 A plot of the computer data for a common-emitter amplifier designed to
provide a mid-frequency gain of 25 (27.96 dB) with/^ <
Hz and/// > 2 MHz.
100
Curves are shown for transistors with the minimum and maximum expected values
of^Q.

= 38.9, i3o(n,in)
= 350; and g^(^ax) = 39.3, /3o(,ax) = 1400. The values for
Ci C2, and Ce
, are those given in the answers to Problem D7. 18. The mag-
nitude of Avs is shown as a function of frequency in Fig. 7.31 for the two
cases, and the gains and half-power frequencies are tabulated in Table 7.2.
Not only does our design meet the requirements, but the estimated (2.37
MHz) and computed (2.38 MHz) values of/// show excellent agreement.
Suppose we had not met the co// requirement; how should we change
our design to improve it? There are several possibilities. We might in-
crease /c to 1 .5 or 2 mA, thus raising g^ and lowering r^ This should then .

permit use of a smaller value for Re while still permitting us to meet the
voltage-gain requirement. We might also hunt up a better transistor, one
having a smaller C^, a smaller r^, or even a larger cjj.

Table 7.2 CAD Analysis of a C-E Amplifier Design

g^ = 38.9 mO g^ = 39.3 mO
Parameter Specifications /3o
= 350 ^0 = 1400

|Avs(mid)l >25 25.5 27.9

h < 100 Hz 93.7 Hz 97.0 Hz

MHz
Sh >2MHz 2.55 MHz 2.38
Problems 299

D7.18 Select values for Ci C2 and Ce to meet the design specifications

, ,

of the common-emitter amplifier considered in Section 7.10.

Answers. 2.5; 5; 65 jnF

Problems
1. The voltage gain of an amplifier is given as Ay = ;2cj/(1 + ; lO'^co).
Calculate Ay jb if co equals
|
|
(a) 1, 10, (c) 100, (d) 1000.
(b)
(e) Sketch Ay ^b vs. co, 0.1 < cj
|
|
< 10,000 rad/s, using a logarithmic
frequency scale.
2. A resistor Re is placed in parallel with capacitor Cs in the circuit of
Fig. 7. .4. Obtain expressions for (a) cj^, (b) the high-frequency asymp-

totic value |Ay(high) IdB-

3. Determine the two straight-line asymptotes for the current gain
I
^/ ldB» where A/ = /o/ls, for the circuit of Fig. 7.32. Prepare a
sketch similar to Fig. 7.5.
4. A current source 4, a 1-kQ resistor, and the
combination of 250 series
U and 5 nF are in parallel. Let the gain function A be the ratio of the
capacitor voltage to the current I^ in V/A. Plot \A\ for 10^ < oj
< 107 rad/s.

5. Given the gain function A = 10,000/[100 + (jo))^ + / 101 w], find Ajb
when 0) equals (a) 1, (b) 10, (c) 100, (d) 1000 rad/s. (e) Write A in a

form that shows the presence of two break frequencies and determine
the values predicted by the asymptotes at 1, 10, 100, and 1000 rad/s.
6. In Fig. 7.33, let Ay = VJV, and find (a) |
Ay | jb at 0; = 10^ rad/s;
(b) the corner frequency.

7. IfAy = 1/[(1 -H ;10-6co)(l + /0.2 x lO'M], (a) show that Ay = | |

when o) = 0.964 Mrad/s; (b) find the frequency at which

l/>/2^

|Ay|dB = -20 dB.

8. The common-source amplifier shown in Fig. 6. 10 has g^ = 4 mU, Cg,
= 6 pF, and C^d = 2.2 pF. (a) Estimate co//. (b) Determine a new
value for o)^ if R^ is reduced to 3 kfi.

Fig. 7.32 See Problem 3.

 .

300 Single-stage amplifiers at low and high frequencies

ka yviOK
I —^AA^1

N^ lOpF <-

Fig. 7.33 See Problem 6.

9. Values for a C-S amplifier are H, = 500Q,Ri = 900 kQ, fig = 100 kQ,
Rss = 250 Q,Rd = 4 kfi, H^ = 6 kQ, gm = 9 mO, C^^ = 5.7 pF, and
Crss = 1 .3 pF. (a) Find wh (b) Find Avs(mid) (c) How do these values
• •

change if Ri and ^2 are each halved?

10. Element values in a common-source amplifier include Rg = 50 Q, Hi
= 200 kl2, R2 = 50 kQ, fiss = 250 Q, H^ = 2.5 kfi, Hl = 15 kfi, and
Vdd = 17.5 V. The n-channel JFET has Vp = - 1.5 V and loss = 15
mA. Let Cg, = 4 pF and C^d = 1.2 pF and find (a) Ays (mid) (b) 03 h, (c) ,

I
Ay, at CO = 109 rad/s.
I

11 The high-frequency equivalent circuit of a C-S amplifier contains the

elements R, = 300 Q, Rg = 40 kQ, Hd = 5 kl2, R^ = 2.5 kQ, Cg, = 4
pF, and Cg^ = 1 .3 pF. Assuming 03 h is given by l/r, let g^ vary from
to 10 mU and plot a curve of (a) 0;^ vs. g^, (b) | Avs(mid) I
vs. g;„,
(C) 0)H\Avsimid) I
VS. g^.
12. If Ri = 300 kl2, R2 = 75 kfi, Hd = 4 kQ, Hl = 4 kQ, C ^ = 1.5 pF, Cg,
= 5 pF, and gm = S mU in a C-S amplifier, calculate the input admit-
tance presented to the signal source (V^ and HJ if cj equals (a) 10
Mrad/s, (b) 20 Mrad/s.
13. The box itself in Fig. 7.34 has the following characteristics: the input
impedance is infinite, the output impedance is zero, and the ratio of
the output voltage to the input voltage is Ay . Find Yj^ at co = 10^ rad/s

Fig. 7.34 See Problem 13.

1 pF

kfl
Problems 301

Fig. 7.35 See Problem 23.

if Av equals (a) - 10, (b) 10. (c) Repeat Parts (a) and (b) if a 1-kQ
resistor is inserted in series with the upper lead from the box at its
output.
14. The amplifier of Problem D7.4 is reconnected as a common- gate am-

plifier with Rs = 500 U,Rd = 4: kfi, Hl = 6 kQ, Cg, = 5.2 pF, C^d
= 1.2 pF, and g^ = 12 m^, as before. Also, let Rss = 1 kfi. Again,
find (a) Tg,, (b) Xg^, (c) r, (d) aj^.

15. Let Vp = - 3 V, Idss = 9 mA, C^,, = 5 pF, and C„, = 1.4 pF for the
amplifier of Fig. 6.15fl. Find the upper half-power frequency.
16. The amplifier of Problem D7.4 is reconnected as a common-drain cir-
cuit with R, = 500 12, Ri = 600 kfi, H2 = 200 kQ, Rss = 1 kfi, jR^ = 6
kQ, Cg, = 5.2 pF, Cgd = 1.2 pF, and g^ = 12 mU. Find (a) Xg,,
(b) Tgd, (c) r, (d)coH.

17. Let Vp = - 3 V, /dss = 9 mA, C^,, = 5 pF, and C„, = 1.4 pF for the
amplifier of Fig. 6.15fo. Find (a) the mid-frequency gain Ay^^mid);
(b) the upper half -power frequency.

18. Parameter values in the high-frequency equivalent circuit of a com-

mon-emitter amplifier are R^ = 0.5 kl2, R^ = 40 kfi, r^ = 30 Q, r^r = 8
kfi, Re = 2.5 kfi, jRjr^ = 2.5 kO, C^ = 2 pF, and g^ = 50 mO. If o)t
= 2.5 X 109 rad/s, calculate (a) 7^, (b) t^,
(c) t, (d) co^, (e) Qn-

19. If R; = 0.5 kQ, Re = 2 kQ, g^ = 50 mO, C^ = 15 pF, and C^ = 2.5

pF, find the output impedance of the C-E high-frequency equivalent
circuit at 2 X 10"^ rad/s.

20. Elements in the high-frequency equivalent circuit of a C-E amplifier

include R, = 1 kfi, r^ = 30 fl, Rb = 20 kQ, r^ = 5 kfi, C^ = 12.5 pF,
q. = 2.5 pF, He = 4 kfi, Hl = 6 kfi, and g^ = 60 mU. Find (a) co^,
(bjo)H, (c)Q,.
21. A C-E amplifier equivalent circuit includes r^ = 30 Q, Rg = 20 kQ, jSq
= 450, g^ = 30 my, fie = 4 kQ, C^ = 20 pF, and C^ = 2.5 pF. Let
fi^ = 1 kQ and R^ = 6 kfi. (a) Calculate A
y^ (mid) ^h^ ^^^ the product
?

I
^vs(mid) ^H (b) Let Rb, gm^ ai^d He independently increase 10 % in
I
•
302 Single-stage amplifiers at low and high frequencies

^mV,

Fig. 7.36 See Problem 24.

value, and recalculate Avsimid)^ ^h, and | Av^(„,id) ^h each

I
time.
(c) Tabulate your results and identify the optimum changes to in-
crease (independently) Aysimid), ^h, and | Avsimid) I (^h-
22. Using the data developed in Section 6.1 for the C-E amplifier of Fig.
6.3 with = 1050 and /^o = 1400, assume r, = 20 Q, C^ = 17.25
iSdc
pF, and C^ = 1.8 pF and find Qn and oi^.
23. The integrated circuit amplifier of Fig. 7.35 contains a C-E stage
with a current mirror stabilizing the operating point. Assuming two
identical transistors, (a) draw the high-frequency equivalent circuit;
(b) obtain expressions for r^ and r^ for the C-E stage, (c) Let Ri =
10kQ,R, = lld2,Hc = 5\^,Rl = 10kQ,C^ = 1.2 pF,/^ = lOOMPlz,
Vcc = 15 V, Vbe = 0.65 V, i^dc = 100, and /3o = 110, and find
Avs(niid) and CO//.

24. If not neglected in the high-frequency equivalent circuit of the

r-c is

common-base amplifier, then the Thevenin resistance offered to C^

with C^ open-circuited may be found by analyzing the circuit of Fig.
7.36. Do so, showing that jR^ is given by the parallel combination of r^
and(H; + rj/(l + g^H/), where i?/ = fi,||fi£.
25. To find R^ for a C-B amplifier in which r^ is not negligible, it is neces-
sary to find the Thevenin-equivalent resistance offered to C^ with C^
open-circuited, as indicated by Fig. 7.37. Provide the derivation,
showing that

rAPoRL - rj
«M = r. + Rl
(^0 + i)r:

where = flcll^Landfi/ = RsWRr-

fi£

26. LetC^ = 17.25 pF and C^ = 1.8 pF for the common-base amplifier

shown in Fig. 6.6, where Ic = 0.859 mA and jSq = 350. See Problems
24 and 25 for R^ and R^ when r^ is not zero. Find ojh if ^x equals (a) 0,
(b) 20 Q.
27. Elements in the circuit of a common-base amplifier (Fig. 6.5a, for
example) are R, = 500 Q, Hf = 5 kfi, R^ = 80 IcQ, R2 = 40 kfi. Re =
 .

Problems 303

Sm ^n

Fig. 7.37 See Problem 25.

6 kfi, Rl = 3 kQ, and Vcc = 18 V. Parameters of the transistor are jSjc

= /3o'= 200, n = 1, Vo = 0.6Y,Iceo = 0, R^b = 0, co^ = 10^ rad/s,
and C^ = 3 pF. Estimate oo^ if ^x n^^Y be neglected.
28. LetC^ = 17.25 pF and C^ = 1.8pFforthecommon-collector ampli-
fier of Fig. 6.8, where /c = 0.859 mA and jSq = 350. (a) Calculate co^.
Estimate ojh if I'x equals (b) 0, (c) 20 Q.
29. Elements in the circuit of a common-collector amplifier (Fig. 6.7a,
for example) are R, = 500 Q, Ri = 80 kfi, R2 = 40 kO, R^ = 5 kl2, R^
= 3 kQ, and Vcc = 15 V. Parameters of the transistor are jS^c = 1^0 =
200, n = 1, Vo = 0.6 V, Iceo = 0, Rbb = 0, o^^ = 1 Grad/s, and C^
= 3 pF. Estimate co// if r^ equals (a) 0, (b) 50 fi.
30. The transistor in the amplifier of Fig. 7.38 is characterized by /^ =
20(0. 3yGS - 1)^ (mA) in the saturation region, (a) Find Ay^^^id)- (b)
Specify values for Ci , C2, and Css so that o)i = 100 rad/s.
31 Element values in a low- frequency common-source equivalent circuit
are R, = 1 kQ, jRg = 99 kfi, Hss = 0.4 kQ, Rd = 4 kQ, Rl = 3 kl2, g^
= 10 mU, Ci = 0.4 /xF, C2 = 10/3 /^F, and Css = 250 /iF. (a) Find
^ci? <J^C2> <^css? ^i^d 0)^ = l/{RssCss)' (b) Use the exact expression
^Vsf^Vsimid) = [(;w)M/^ + Wz)]/[(/w + COci)(/o; + C0c2)(/^ +
<^css)] to calculate Ay,/A vs(mid) at co = cocss and co = 2cocss.
| |

JFtg. 7.38 See Problems 30 and 33.

>36V
I 1.5 kl2^
430 k«

6 kI2
 .

304 Single-stage amplifiers at low and high frequencies

10 m

Fig. 7.39 See Problem 32.

32. Let Id = 5{Vgs + 2)2 (mA) for the MOSFET in Fig. 7.39. (a) Deter-
mine Avs{mid)^ ^ci? ^C2^ ai^d (j^cssj ^^^ estimate co^. (b) Use a CAD
program on the low-frequency equivalent circuit and obtain the nec-
essary data to prepare a plot of |
Ay^ \
vs. co, 10 < co < 10,000 rad/s,
on a logarithmic frequency scale.
33. Let Cj = 5 /xF, C2 = 2 fiF, and Css = 2 /xF, and reassemble the
elements in Fig. 7.38 as a common-gate amplifier. Use I^ =
20(0.3Vgs - 1)^ (mA) for the MOSFET. (a) Find Ay, (^id) (b) Esti- •

mate 0)1

34. Let Id = 5{Vqs + 2)^ (niA) for the transistor used in the amplifier of
Fig. 7.40. (a) Select standard values for Ci , C2, and Css so that 80 <
co£^ < Check your design by a CAD analysis.
100 rad/s. (b)

35 If the common-drain amplifier of Fig. 6.15b utilizes a transistor for

which Id = (Vgs + 3)^ (mA), estimate the lower half-power fre-
quency.
36 Element values in a common-drain circuit are R5 = 1.5 kfl,/^^ = 125
kQ,Rss = 1.2kfi,Rz. = 0.8kfi, Ci = 0.04/xF, C2 = 40/xF,g^ = 12.5
mU, Ci^s = 4 pF, and Crss = 1 pF- At mid-frequencies, calculate (a)
Avs, (b) Ri, (c) Ro. Estimate (d) o)^, (e) 0)^.

37. Values in the equivalent circuit of a common-emitter amplifier are Rs

= 1 kfi, Rb = 20 kfi, r^ = 10 kfi, g^ = 50 mO, i?£ = 2.5 kfi. Re = 4:

Fig. 7.40 See Problem 34.

^e
3 kn

kl2 lOkn
30 V

• •
 .

Problems 305

kfi, Rl = ^ kQ, Ci = 5 AtF, C2 = 8 />tF, C^ = 80 ^F. (a) Find coci,

^C2? <J^C£5 ^i^d ^z- (t>) Estimate w^.

38. For the transistor in Fig. 7.41, jSdc = i^o = 500, Vq = 0.64 V, andn =
1.945. (a) Calculate the mid-frequency gain Ay^(mid) (b) Select values •

of Ci , C2, and
Ce lower half-power frequency of 15 Hz.
to provide a
(c) Use a CAD program to obtain both low- and mid-frequency data

for your design, and locate the lower half -power frequency accu-
rately.

39. A C-E amplifier with R, = 1 kfi, Ri = 30 kQ, R2 = 20 kfi, fif = 4 kfl,

Re = 6 kl2, fii^ = 10 kQ, Ci = 5 /xF, C2 = 10 /iF, and C^ = 50 /xF is
operating with jSq = 120 and g^ = 40 mU. (a) Determine values for
^ci? ^C2? ^J^d oJc£- (b) Estimate co^.
40. A standard C-E amplifier circuit includes R^ = 600 Q, jRi = 120 kfi,
R2 = 30 = 2 kl2, fie = 8 kfi, fi^ = 6 ki2, and Vcc = 15 V. Let
kfi, fi£

iSdc = ^0 = 250, Vo = ^3 V, andn = 1.251 for the transistor, (a) Find

Avs{mid) (b) Specify values for Ci C2, and C^ so that co/^ < 100 rad/s.
' ,

Avoid using such large values that 03 1 < 50 rad/s. (c) Use a CAD pro-
gram to find Avs{mid) and o)^.
41. A transistor for which jSjc =
i^o
= 200, Vq = %, and n = 1 is used to
design aC-E amplifier circuit with R, = 500 Q, fii = 50 kl2, ^2 = 25
kl2, Re = 3 kQ, fie = 6 kfi, fiL = 9 kl2, Vcc = 12 V, Cj = 6 /iF,

C2 = 10 jLtF, and C^ = 50 fiF. (a) Find o)ci, o)c2, ^ce^ and co^. (b)
Estimate co^

42. Element values in Fig. 7.22fl are fi, = 100Q,fii = 90kl],fi2 = 30 kfi,
Re = 2.5 kfi. Re = 7.5 kfi, and R^ = 10 kfi. Let the transistor oper-
ate with jSo = 300 and r^ = 6 kfi. (a) Select values for Cj C2, and Ce ,

such that 30 < 00^ < 60 rad/s. (b) Use data obtained with a CAD
program to find an accurate value for 0)^ .

Fig. 7.41 See Problem 38.

t>21 V

5 kfi
 .

306 Single-stage amplifiers at low and high frequencies

43. Values for a common-base amplifier circuit are Rj = lOOQ, jRi = 200
kQ, fi2 = 50
kfi, Re = 5 kfi, Re = 20 kfi, /3o = 125, g^ = 50 mU, and

JRi^ = 10 kQ. If /z, = 20 Hz, select suitable values for Ci, C2, and C.

44. The low-frequency equivalent circuit of a common-base amplifier in-

cludes these elements: E, = 100 fi, i^i = 200 kfi, ^2 = 50 kQ, Rf = 5
kQ, r^ = 2.5 kQ, He = 20 kfi, g^ = 50 mO, H^^ = 10 kfi, C^ = 75 />tF,
C2 = 3 /iF, and C = S fiF. Use a computer- analysis program to deter-
mine an accurate value for f^ .

45. Elements appearing in the low-frequency equivalent circuit of a com-

mon-base amplifier are Rg = 50 fi, H^ = 25 kO, Hf = 4 kQ, r^ = 5 kQ,
Re = 12 kfi, g^ = 80 my, R^ = 20 kfi, Ci = 200 jliF, C2 = 4 /xF,
and C = 10 /xF. (a) Calculate values for coci, w^, and coc2- (b) Esti-
mate COjL-
46. Elements in the low-frequency equivalent circuit of an emitter-fol-
lower are H, = 1 kfi, Rb = 20 kQ, Re = 5 kQ, r^ = 7 kQ, H^^ = 100 Q,
and g;„ = 50 mU. (a) Select values for Cj and C2 so that 50 < co^ <
100 rad/s. (b) If Cj = 5 aiF and C2 = 250 /xF, use a CAD program to
determine o;^
47. A common-collector stage has H, = 1 kQ, Hi = 100 kQ, H2 = 25 kfi,

Re = 4 kfi, and R^ = 250 fi. The transistor is operating with r^ = 5

kfi, jSo = 200. (a) Select Cj and C2 so that 75 < co^. < 125 rad/s. (b)

Show that 75 < W£^ < 125 rad/s.

48. A C-E amplifier is to be designed to have | Ay5(n,id) |
^ 225, 03 1 <
1800 rad/s, and w^ ^ = 0.5 kfi and H^ = 5 kfi. Use a
2 Mrad/s for H,
2N5089 transistor, assuming r,. = 50 fi and a typical transistor is used.
(a) Specify suitable values for Re, Vcc, ^e? ^i ^2? C'l C2, and C^. , ,

(b) Check your design with a CAD program and prepare a plot of

I ^Vsii^) I dB vs. cj on a logarithmic frequency scale.

 8

Multistage amplifiers

In the preceding two chapters we considered both bipolar and FET am-
pHfiers having only a single stage. Three possible circuit configurations
were studied in each case. Now we are ready to consider multistage ampli-
fiers in which two or more stages are cascaded. Such an amplifier may be
desirable for a number of reasons. Additional amplification can be re-
quired to provide a signal having some specified level. We may also need
to furnish a high input impedance simultaneously with a large voltage
gain, or perhaps a low output impedance and a large voltage gain. The
first stage can be designed for input impedance, the last for output impe-

dance, and one or more intermediate stages for voltage gain. We may also
wish to meet a large bandwidth specification by supplying a number of
stages, each having low gain and large bandwidth. With any of these con-
ditions, the solution can be obtained by designing a multistage amplifier.
This chapter first considers gain calculations in the mid-frequency
range, followed by approximate techniques of estimating o)h and co^ Be-.

cause of its important high-frequency applications, the cascode amplifier

is the example we shall consider in the greatest detail.

8.1 The multistage amplifier

at mid-frequencies

The analysis of a multistage amplifier in the mid-frequency range begins

much like the familiarprocedure for the single-stage circuit. First the dc
operating point of each transistor is determined so that parameter values
for a hybrid- TT model can be calculated. Then we insert the hybrid- tt
model for the transistor into the external circuitry, and let the coupling
and by-pass capacitors be short circuits while the interelectrode capaci-
tances are open circuits. A two-stage common-emitter amplifier appears
in Fig 8.1fl; its mid-frequency equivalent is shown in Fig. S.lb.
To determine the voltage gain, it is best to avoid using long formulas,
different for each configuration of course, and instead simply write down
the proper expression factor by factor as we look at th6 equivalent circuit.
This is always very easy to do for the hybrid- tt model when there is no
interaction between stages; that is, when the load impedance does not af-

307
308 Multistage amplifiers

A I8V A A 18V
Rc\ > > /?.,
12 > R C2
8 kn 5^F ?123kn kn 7.5 mF
123 kn
if
IOmF
300 n
Tl T2
€); N5088 2N5088

^22 !kn
".© 58kn> /^^
58 kn
Re2
5 kn
250
5kn '1150
/iF mF

(a)

^••v

iRBi'-nl>Vm <jr> ^Cl| <(r> RlZV,

;(£) p Rci p|^52'-n2|^^rr2 'C2^
Sm\ ^771 Sml ^tt2

1 RrX ~ R\\ "-^21 1 Rb2 --^1211^22

(b)

Fig. 8. 1 (a) A two-stage CE-CE amplifier, (b) The mid-frequency model for the CE-
CE amplifier.

feet the input resistanee, which is the present case. For simplicity, let us
take r^i = rx2 = ^ for our first effort. We begin at the load resistor and
work backwards:
Vo = (fiLl|Hc2)(-gm2)V,2
and

K2 = {r.2\\RB2\\Rci)i-gml)V,i
SO that

V„ = iRL\\Rc2){-gm2){r.2\\RB2\\Rci){-gn,l)V,l

With Vi = V^i , then

Ay, = -^= iRL\\Rc2)(-gn,2)ir.2\\RB2\\Rci)i-gn,l)

8.1 The multistage amplifier at mid-frequencies 309

To obtain Ay^, we also need the input impedance faced by the signal
source:

Then

'^ - ^^^
Za + H,
and

Avs = ^=
V,
(/^L||«C2)(-g..2)(r.2||^B2||i^Cl)

(^Bilk.i)
X (-gml)
(RbiIKi) + Rs
This equation may be written directly; the intermediate steps have
last
been included only to show the mental processes involved in approaching
any multistage amplifier calculation.
Note that the effective load resistance of the first stage is the input resis-
tance to the second stage, 7^2 = ^B2lk7r2- The larger we can make the
value of Zi2, the larger the gain of the first stage and hence the overall
gain.
To calculate the value of Avs{mid)^ ^^ should use the mini-
minimum
mum expected values of g^i and g^2 ^s well as the minimum values of r^j
->

and r7r2, which occur for /3oi(min) ^^^ i^02(min) Therefore, we seek the mini-
•

mum values of Iq and jSq for each transistor. Since the two stages have
identical biasing circuitry, we have the single dc analysis:

Rth = 123 58 = 39.4 kfi

58
18 = 5.77 V
58 + 123

The collector current can not be any larger than the value obtained by
assuming that Vqe = 0^ which is 18/(8 + 5), or 1.38 mA; a reasonable
assumption for both jSjc ^^^ i^o(min) is therefore 350. Then

'
'c - ^^«(^-^^- 0-65)= 0.998mA.
"• ln.A
39.4 + 351(5) "

VcE = 18 - (8 + 5)(1) = 5V
VCB = 5 - 0.65 = 4.35 V
6m ~ 38.9 mU

^TT = r„="a
310 Multistage amplifiers

Using these data, we have

(91139.4)
Avsimia) = (2 II
a) (-38.9) (9 II
39.4 II 8) (-38.9)
0.3 + (9 II
39.4)

= 8890
This is a considerably larger value than any single-stage amplifier can pro-
vide. Note also that there is no phase reversal in this two-stage CE-CE
amplifier.
Current and power gain can be calculated as we did in Chapter 6:

Z
^/ = ^vi^ and Ap = AyiAj

If we had included r^i and r^2 ii^ our calculations, then the amplification
would have been slightly less. Making use of voltage division twice, we
have

^Vs(mid) = (^L||^C2)(-gm2)
^x2 + ^7r2

X [{rx2 + ^x2)l|HB2||^Cl](-gml)

r^i {r.i + r,i)\\RBi

X
Txi + r^i Rs + {r.i + r,i)\\RBi

8820

for r^i = r^2 = 50 12.

Note that the model is less than a 1 % reduc-

effect of including r^ in the
tion in gain, hardly worth the added complication. However, should the
collector current be increased, r^ would decrease and the inclusion of r^
could be more significant.
Now let us look at three C-E stages in cascade. Fig. 8.2a, where each
transistor has a different operating point. The small-signal model is shown
in Fig. 8.2b. As element values, we have selected R^i = 30 kO, Rb2
= 20 kQ, Rbz = 10 kfi, Ri^ = K^^g = 5 kQ, Hc2 = 10 kfi, Rci = 20 kfi,
and Rs = 1 kQ. The operating points furnish Iqi = 1 mA, lc2 = 2 mA,
and/c3 = 3 mA, while /3oi = 300, /3o2 = 400, and^03 = 500. This leads to
r^i = 7.71 kfi, r^2 = 5.14 kQ, and r^s = 4.28 kfi. The voltage gain Ay,
= ^o^^s may be written by inspection, letting each r^ be zero:

Avs = (5 II 5) (-38.9) (4.28 10 10) (-77.8) II II

(5. 14 II 20 20)
II

(7.71 30)
X (-116.7) II

1 + (7.71 II
30)

= -5,940,000
 k

8. 1 The multistage amplifier at mid-frequencies 311

AAAr

AAAr-^
2

cr;
AAAr

ie ^ >

< —wv ^ i^^ o

(J
c
0)

AAAr
<3 NA/V f AAA^

-VSAr S
If <o

H
<

u^
— —
^AA^
^
AAAr-
<J—VSA* f

^f

< ^AAr AAAr

^^V^' U

^
c.^
^^
w
< ^A/v
u

^ I

AAAr-

00
AAAr

e
 —

312 Multistage amplifiers

This is greater than 135 dB, so we are now beginning to achieve some very
large values of gain. Note that there is a net 180° phase reversal with three
C-E stages.
We select a multistage amplifier including one FET as a third example,
shown in Fig. 8.3a. Here, a common-source stage drives a common-base
stage. When the first stage is connected C-S or C-E, and the second is C-G
or C-B, the combination is called a cascode amplifier used widely for ,

high-frequency applications such as FM tuners because of its good gain,

large a;//, high Z,, and good isolation between output and input. Here, we
investigate its mid-frequency properties. Remembering that the input re-
sistance to the common-base stage is Re r^ (l/gm2)? we may again write \\ \\

an expression for Av5(niid) by inspection:

= (-33.5) ( + (3 5 8.78
Avsimia) (5 II 2) 4) II II
11^) ||-
= -5.58

Fig. 8. 3 (a) A cascode amplifier composed of a common-source stage followed by a

common-base stage, (b) The mid-frequency equivalent circuit for I^ = I mA, Ic
= 0.859 mA.

A 20 V

3kl2
1.7Mn?/?,
]^
1 kn
Tl Re ^5 kn

5 kn 50 k^ kn
Mn^^2i Riss /?..
<
1 kn :5 kn > ^'^ 15V

g^. = 33.5 mU.r^. = 8.78 kH

(a)

I —^A/V
1 ka
9 o
^ .^v„,
7r2
A
Jf.

''© ^55
kn
^F.
~ gm\ ^\ ^ 3kn. 5 kn| ''n'>^\2 5 kn> 2kn>^;

Smx =4niU = 8.78kn,^_, = 33.5 mU

ib)
 .

8.2 An approximation for a)H *^^*^

Ifnecessary, the gain can be increased by using a bipolar transistor as a

common-emitter first stage; however, the input resistance is considerably
less.

There are many other combinations of bipolar transistors and FETs

possible for multistage amplifiers. Several of these will appear as prob-
lems. In each case it is preferable to stare briefly at the equivalent circuit
and then write the gain equation directly, rather than rely on a sheaf of
special formulas. For example, we might want the current and power
gain for the cascode amplifier above. First, we find Ay^:

A V. = 4^ = (5 II 2)'^( - 33.5)'^(4) (3 1| 5 8.78

1|
" ^
Vi ' "
'V 33.5
'
= -5.61or 15dB

The current gain then follows easily:

/„ _ V„" Z,
_ Z.. _ .. 255
"• = Avi^ = - 5.61 ^=^ 715

The power gain is then

Ap = ^ = AnA, = 4010

D8.1 Increase Vcc to 20 V in the circuit of Fig. 8.1a, assume r^ is negligi-

ble, and calculate the minimum expected value of (a) A y^^mid) (b) ^vsimid) ? -.

(c) A/(mid)

Answers. 11,100; 10,600; 36,960

8.2 An approximation for coh

The high-frequency performance of a multistage amplifier can often be

described satisfactorily by a single value, o^h This quantity is also closely •

equal to the bandwidth <j)h ~ ^l^ whenever o)^ «: co// In Chapter 7 we .

determined an approximate value of co// for a single-stage amplifier by

considering the by-pass and coupling capacitors to be effectively short cir-
cuits when CO = CO// and then finding the open-circuit time constant for
each of the interelectrode capacitances individually. Here we extend that
concept directly to multistage amplifiers.
We consider first the two-stage CE-CE amplifier of Fig. 8.1a, b. Its
high-frequency equivalent circuit is shown in Fig. 8.4. Since this is a two-
stage amplifier, we have four capacitors and we need to find the four time
constants r^j, 7^2 > ^/ii> ^^id 7^2- Again following the procedure developed
 —
314 Multistage amplifiers

AAA^
06

Q^ 00
-c

<^ 00
^
60 o
d
^f o

"a
— S
1=

\AAr
u
CM 't *s3 w
u
W)
CO

7^ i_i

O ^
bO
c«
-'

"O) o

ie
C o
»o
AAAr^ §
- G Z "

^ ^«

-AA/V- «
:a

a
e 06 „
8.2 An approximation for 03h
315

in the previous chapter, we shall sum the four time constants and use the
reciprocal of this value as our estimate for oi^:

0)H =
TttI + ^7r2 + 7-^1 + T^2

Let us begin by finding r^i = i?^i C^i where R^i is the Thevenin-equiv-
,

alent resistance presented to C^i with C^2? ^/xi' ^^^ ^/*2 open-circuited.
From Fig. 8.4,

Ki = r.ilIKi + (H.IIH^i)]

and

r.i = {Milk, + (Rs\\Rbi)]}C,i

Similarly,

fi.2 = r,2||K2 + («Clll«B2)]

In order to find K^i and fi^2. we resurrect a very useful result from
Chapter 7, Eq. (26):

R = R£ + fi;(l + g„B£) (1)

where i?£ is the equivalent load resistance of the C-E stage and H/ is the
equivalent source resistance. We make use of Eq. (1) in this multistage
amplifer by looking at Fig. 8.4 and writing

RLi = Rci\\RB2Ur.2 + r,2)

Rl2 = Rc2\\Rl

r:i = r.iiiKi + (RsWRbi)]

Rk = r,2\\[r.2 + {Rci\\Rb2)]
By combining these expressions with the appropriate value of g^ we may ,

obtain values for fi^i and H^2-

Let us see how this technique works by using the values given in Fig.
8.4. We let r^i = r^2 = 50 Q. Then

RLi = Rci\\RB2Urx2 + r,2) = 8 39.4

II II
(0.05 + 9) = 3.83 kfl

H/i = r.ilIKi + (RsWRbi)] = 9||[0.05 + (0.3 1| 39.4)]

= 0.335 kQ

Therefore H^i = JR/i = 0.335 kfi, and

T^i = R^iC^i = 0.335 X 18.7 = 6.3 ns

316 Multistage amplifiers

Next,

R,i = RLi + Rhil + gmiRLi)

= 3.83 + 0.335(1 -H 38.9 x 3.83)

= 54.1 kfi

T^i = H^iC^i = 54.1 X 2 = 108.2 ns

Continuing,

Rl2 = Rc2\\Rl = 8||2 = 1.6 kfi

^.2 = r,2\\[r.2 + {Rci\\Rb2)] = 9 II

[0.05 + (8||39.4)] = 3.84 k«
Therefore H^s = ^/2 = 3.84 kfi, and
r^2 = i^7r2C^2 = 3.84 X 18.7 = 71.8 ns

Finally,

R,2 = Rl2 + Rki^ + gm2i^L2) = 1-6 + 3.84(1 + 38.9 X 1.6)

= 244 kfi

^m2
= ^m2^m2 = 244 X 2 = 489 ns

Adding the four open-circuit time constants, we have

r = 6.3 + 108.2 + 71.8 + 489 = 675 ns

and

o^H = 1.481 Mrad/s

A computer simulation of this circuit indicates that 0)^ = 1 .504 Mrad/s,
showing that our approximate method is quite accurate. Also, the error is
on the conservative side, which is correct for design. The calculations
above clearly point to t^2 as the chief factor in determining co//, while r^i
comes in second. Both of these include a large Miller effect.
To redesign for a larger w//, the R^2^fi2 product must be made smaller.
From the mid-frequency gain equation, we note that a reduction in either
Rs2 or R[2 yields a smaller gain for the amplifier. Again, we can trade gain
for bandwidth. Of course, a reduction in C^ for both transistors is the most
effective method and causes no loss in gain. However, this probably means
a more expensive transistor.
The method demonstrated above can be used to analyze other multi-
stage amplifiers. In Section 8.5 we will examine a CS-CB cascode ampli-
fier.Other useful multistage configurations include CC-CE, CS-CS-CS,
CS-CG, and so forth. With the aid of the methods^we have already formu-
lated, these should be relatively straightforward problems.
As an example of an FET multistage amplifier, consider the CD-CS
configuration of Fig. 8.5a and its high-frequency equivalent in Fig. 8.5b.
8.2 An approximation for w// 317

>30V
T\ and T2:

lOks^eK,

1 kI2 ^1 Qsil / 2 pF Sj G2Q^2I/1-5PF

l(

2.7kr2> 10k^>F-,
%^ ? lp?r 13.33 fX/ 5>
2.5
p^P- 18.8
F^^^

(b)

Fig. 8.5 (a) A CD-CS FET amplifier circuit, (b) The high-frequency equivalent cir-

cuit.

We might anticipate that Tgd2 = Rgd2Cgd2 will be the largest time con-
stant, since the C-D stage has no phase reversal and no Miller effect, leav-
ing the Miller-effect capacitance of the C-S stage to dominate.
The dc analysis of the amplifier is quite uneventful, since the gate insu-
lator ofT2 isolates the two stages. This direct coupling also avoids one
and one capacitor.
resistor
We find that /di = 5 mA, Vqsi = -0.75 V, and g^i = 13.33 mH. The
second stage has Vgs2 = -0.443V, /£)2 = 9.94 mA, andg^2 = 18.80mO.
Interelectrode capacitance values are assigned as shown in Fig. 8.5^,
Cg,i = 2 pF,
Cgdi =
pF, Cg,2 = 2.5 pF, and Cg^g = 1-5 pF. Beginning
1
with the output stage, we see that Cg52 faces the output impedance of the
C-D stage, Rssi (1/gmi). Therefore Rg,2 = 0.15|| (1/13.33) = 0.05 kfl,
II

and
Tg,2 = Rgs2Cgs2 = 0.05 X 2.5 = 0.125 ns

To find Hgd2) we apply Eq. (1) after finding R12 and fl/2- ^^ have
RU = 2.7||10 = 2.13 kfi

Rk = Rgs2 = 0.05 kfi

^^^ Multistage amplifiers

Thus

Rgd2 = ^L2 + ^52(1 + gml^Ll)

= 2.13 + 0.05(1 + 18.80 X 2.13) = 4.17 kQ
and

V2 = ^gd2Cgd2 = 4.17 X 1.5 = 6.26 ns

Moving backwards to the first stage, we quickly calculate R^di = 1 II

50
= 0.980 kfi, and

Vi = ^gd\Cgd\ = 0.980 X 1 = 0.980 ns

Finally, we require a value for R^^i The high-frequency performance

.

of the common-drain circuit was analyzed in Section 7.5, where we ob-

tained Eq. (23):

<r
^gs
R r = (^/ + ^DCgs
= '^gs^gs
^ n'
^ + gmtih
^ cr

We use that result now by interpreting i?/ as jRg^i = 1||50 = 0.980 kQ, and
Ri as 150 Q. Thus

„ ^ (0.980 -h 0.150)2 ^^^^

Tgsi = RgsiC,,, = = ^-^^^ ^'
1 ^ 13 33 ^ 0.150
Summing these four values, we have
7 = 0.125 + 6.26 + 0.980 + 0.754 = 8.13 ns

and

o)H = 123.2 Mrad/s

This upper half-power frequency is associated with the mid-frequency
gam:

A« = (2-7||10)(-18.8)-pi5f3^^:^ X
f = -26.1

An exact analysis of the high-frequency equivalent circuit by computer

simulation gives ojh = 145.6 Mrad/s, and we see again that our estimate is
conservative.

D8.2 The elements in a CS-CS high-frequency equivalent circuit are

R, = 0.5 kQ, Rbi = 100 kfi, g^i = 8 mO, Cg,i = 2.5 pF, C^di = 1 pF,
Rm = 5 kfi, ^52 = 200 kQ, g^2 = 10 mO, C 2 = 3 pF, €^^2 = 1-2 pF,
Rj)2 = 4 kfi, and R^ = 12 kfi. Determine (a) Tg.i, (b) T^di, (c) rg,2, (d)
Tgd2' (e) Estimate oj//.

An5u;^r5. 1.24 ns; 24.8 ns; 14.6 ns; 185.1 ns; 4.43 Mrad/s
8.3 An approximation for ioj^ 319

8.3 An approximation for col

We now turn to the low-frequency end of multistage- amplifier perfor-

mance and seek a value for cj^ Again, we have to make approximations,
.

but what we lose in accuracy we gain in savings of time and energy.

In the two-stage amplifier of Fig. 8.1a, there are five capacitors present
in the low-frequency equivalent circuit: three coupling and two emitter-
by-pass. A formal rendition of the transfer function A y^ as a function of /o)
must lead to a fifth-degree polynomial in the denominator. Thus the task
of calculating o)^ would be an algebraic exercise suited only for the strong
of will, the mighty of heart,and the misguided of purpose.
In analyzing the circuit, we might simulate it by a CAD routine and
determine co^ by interpolating the numerical output data. Such a use of
the computer has been made several times before to check approximate
analyses or verify designs. In the initial design of a multistage amplifier
circuit,however, it is to our advantage if we have some indication of
which capacitor controls co^ and to what extent. This requires more infor-
mation than the computer normally provides. The CAD program fur-
nishes only answers; it offers no suggestions on what to change in
order to improve the design. This is the mission of the design engi-
neer. Most employers consider random guessing to be a technique
embraced by the soon-to-be-unemployed; we shall therefore try an ap-
proximate procedure for finding o)i as well as providing information for
design and redesign.
In Chapter 7 we designed single-stage amplifiers for a given w^ by se-
lecting one capacitor to control 0)^ while all the others were considered to
be short circuits at that frequency. When the corner frequencies produced
by each of the noncontrolling capacitors had magnitudes less than O.lw/^,
we found that we had good accuracy when we let cojr^ be equal to the larg-
est corner frequency. The present method is an extension of that proce-
dure. We again find a corner frequency o)ci for each capacitor acting
alone, with the others treated as short circuits. The conservative approxi-
mation for o)i is then taken as the sum of all the individual corners:

1 1 1
(2)
'^eql^l ^eq2C2 ^equ^n

where Heqi Is the Thevenin-equivalent resistance seen by C^ with all other

capacitors short-circuited.
The lower 3-dB frequency calculated by this technique tends to be pessi-
mistic; that is, it yields a value for co^ that is greater than the actual value,
so that a CAD analysis will show that we have actually designed a better
amplifier than we thought we did.
 ,

320 Multistage amplifiers

As an illustration of the application and degree of accuracy of this pro-

cedure, let us return to the two-stage amplifier shown in Fig. 8.1a. Begin-
ning with the coupling capacitors, and neglecting r^, we have for Cj,

1 1000
coci =
[R, + {RBi\\r.i)]C, [0.3 + (39.4||9)]10

= 13.11 rad/s

ForC2,
1 1000
WC2 -
[Rci + {Rb2\K2)]C2 [8 + (39.4||9)]5

= 13.05 rad/s

Finally, for C3

- 1 _ 1000
""^^ " + " + 2)7.5
(Hc2 Rl)Cs (8

= 13.33 rad/s

The emitter-by-pass capacitors see resistances that we designated as R^^ in

Section 7.9:

r,i + (RsWRbi) 9 + (0.3 II

39.4)
^eql - ^£1
1 + /5oi 351

= 26.4 Q
r.2 + {Zoi\\Rb2) 9 + (8 39.4)
= R
II

Hpn9
eq2 - -^^£2
1 + /502 351

44.2 fi

Therefore

1 10'
^C£l - = 151.8 rad/s
KeqlCfi 26.4(250)

1 106
^C£2 - = 19.68 rad/s
Heq2C£2 44.2(1150)

Adding these five individual break frequencies, we obtain our estimate for
0)L'

or

coz^ = 13.11 + 13.05 + 13.33 + 151.8 -f 19.68

= 211 rad/s
8.3 An approximation for cj/ 321

40 kP., ^ ,

f-AAArl 1 kP ^ 1^0

ia)

0.0389 F,i 0.0389 K"2

lp.F 50 ^F 1 yiF
500n / 30 12 9 kr2
I —WA/Ht I

If
1 —\\VAAA^ ^e =<->-He
+ V.n\ 9 k« < K

30 ns
1333 kn. kfi> kn. ^ 15kl2^ 10kl2>^^o
(±) 15 9.3

9.3 kn- 50 mF 10/xF; >Okfi

kn

(^)

Ftg. 8.6 (a) A bipolar cascode amplifier used as an example in determining an approxi-
mate value of 0)1 . (b) The low-frequency equivalent circuit of the amplifier.

We expect oi^ actually to be slightly less than this value, and a computer
analysis of this amplifier v/ith r^ = leads to 169 rad/s. Our estimate is

therefore about 25% high. Note, however, that our approximate analysis
shows us that Cei is the major factor in determining co^ If we wished to .

lower o)[^ by increasing some capacitance value, Cei would be the one to
increase. The frequency co^ei = 151.8 rad/s is about eight times the next
highest frequency, o)ce2 = 19.68 rad/s. If they were separated by a factor
of ten, we would be able to estimate co^^ as about 152 rad/s. Actually, the
lower half-power frequency cannot be less than the highest individual
break frequency, and it cannot be greater than the sum of all the individ-
ual break frequencies. We thus always have upper and lower bounds.
As a second example, we select the common-emitter-common-base cas-
code amplifier of Fig. 8.6a. The equivalent resistances seen by each capac-
itor can be found from the low-frequency equivalent circuit of Fig. 8.6fo,
with all but one of the capacitors replaced by short circuits. Letting g^
= 38.9 mO, r^ = 9 kfi, ^^ = 350, and r^ = 0, we have
1000
COci = = 170.3 rad/s
[0.5 + (20 II 40 II
9)] 1
 ,

322 Multistage amplifiers

1000
WC2 - = 1.33rad/s
[15 + (9.3||9||l/38.9)]50

1000^
^C3 - = 40 rad/s
(15 + 10)1
1 ^ 351 1000
"^ = 742.5 rad/s
9.3 9 + (0,5 II 20 40)
II
50

J_ _1_ 1 1000
^CB2 "^ "^ 7.55 rad/s
40 20 9 + 351 (9.3 II
15) 10

Therefore

o)L = 170.3 + 1.3 + 40 + 742.5 + 7.5 = 962 rad/s

Thus the lower half-power frequency must lie between 742.5 and 962
rad/s.The computer divulges a more accurate value of 856 rad/s.
The most influential capacitor is Cei, with Ci ranking second; their
corner frequencies are separated by less than a factor of five.
The problem of low-frequency amplifier design is that of selecting
coupling and by-pass capacitors so that the sum of the individual frequen-
cies is 0)^ ' The allocation of the values is at the discretion of the designer,
but unreasonably large capacitance values should be avoided. If there are
n capacitors and we let each one be equally effective in determining co^
we first determine the resistance offered to each capacitor alone, with all
the others replaced by short circuits, and then calculate the necessary ca-
pacitance value C = n/{Ro)i). This provides information on the relative
effect of the capacitors and the general size range required, as well as be-
ing a reasonable solution of the design problem. Adjustments to these val-
ues may be made to provide a more economical solution or to satisfy other
criteria. Final values should be commercially available sizes. In any
event, as a final check, the design should be simulated on the paper bread-
board, a CAD program.

D8.3 The CS-CB cascode amplifier of Fig. 8.3 has the following capaci-
tor values: Cj = 0.5 /xF, Cg = 5 ^F, C3 = 3 fiF, Css = 50 /iF, and Cb
= 7.5 /iF. Determine values for (a) coci, (b) wc2, (c) cx>c3, (d) o)css, (e) ojcb*
(f ) Estimate oj^ •

Answers. 7.8; 66.0; 47.6; 100; 8.2; 100 < w^ < 230 rad/s

8.4 An example of multistage amplifier design

Now that we have analyzed several amplifiers having two or three stages,
let's consider the design of a typical multistage amplifier to meet a pre-
scribed set of specifications. We
require the mid-frequency voltage gain
8.4 An example of multistage amplifier design 323

Avs(mid) to have a magnitude greater than 10,000 under any conditions.

The source has an internal resistance of 500 12, and the load is 5000 Q. The
lower half-power frequency must be less than 1000 rad/s, while the upper
is greater than 1 Mrad/s. The operating temperature is guaranteed to be

25 °C (somebody else's problem), and two 9-V batteries are available for
the power supply.
As with most design problems, some of the biggest decisions have to be
made before the actual design procedure is begun. In the present case,
these preliminary choices involve deciding between bipolar transistors
and FETs, the circuit configuration to be used, and the number of stages
in the amplifier. These grandiose decisions are made most effectively from
a solid base of experience, but even though we have only a limited back-
ground, wfe do have one that is sufficient for this case. After all, several
different amplifiers have been analyzed in this chapter, and two of the
C-E examples from Section 8.1 showed voltage gains of 8890 for two
stages, and 5,940,000 for three. Since we do not require an extremely
large or small input impedance, and 8890 is fairly close to 10,000 (it misses
by only 1 dB), we presume that an improved two-stage C-E amplifier may
work, while a three-stage C-E could be an overdesign. We tentatively se-
lect a CE-CE
configuration similar to the amplifier of Fig. 8.1a. The pro-
posed circuit is shown in Fig 8.7.

Fig. 8.7 A two-stage amplifier configuration selected to meet the requirements

IAv5(mid) I
- 10,000, co^ < 1000 rad/s, and co// ^ 1 Mrad/s. The final design values
are given.

/?ii =50.2k« Cx = 1/xF Sm\ =Sm2 =38.9mU

^21 = 12.9 kfi Ci = 0.5 mF ^l(min) =/^02(min)= ^50
/?£-! = 3 kn Cs = 0.5pF A)l(max)=^02(max)= 1400
Rci = lOkfi Qi = 100 mF ^xi =r^i =50n
Ri2 =50.2kn Cei = 100 mF C„,= 18.6 pF
/?22= 12.9kn ^Mi = 2 pF
Re2 = 3 kn C,2 = 17.7 pF
Rc2 = 5 ka •C^2 = 1-6 pF
324 Multistage amplifiers

Some estimate of the gain required per stage should now be made sc

that operating points can be selected for each transistor. This exercise wi)
alsoshow us whether or. not a two-stage design is possible. Neglecting r^
and Rb, we have

Avsimi6) = (-gm2)(fic2||5)(-g^i)(r,2||fici) ^^'q

^^^ 5

Let us assume identical stages, although this is not always desirable for
several reasons. One such reason is the signal level, which can be quite
large in the last stage. Another reason may be the input or output impe-
dance levels, or the frequency response, as we shall see shortly. We have,
then,

Avsimid) = gmHRc\\^)iRc\\r.)
^^ "j^^ > 10,000

When Re and r^ are 10 kQ, we find that g^ must be greater than 25. 1 mU.
Allowing for the error introduced by our approximations above, let us try
gm = 38.9 ma. Then /ci = Ic2 = ImAandRci = Rc2 = 10 kQ. If we let
the voltage across R^ be 3 V, then R^i = Re2 = 3 kQ, and Vqei = ^c£2
= 5 V for Vcci = Vcc2 = 18 V. Continuing to use the same 2N5088
transistors that were used in the earlier two-stage amplifier, we must de-
sign with iSdc(min) = 350 at this operating point. With I^i = lOO/g we find ,

18 - -—
3 - 0.65 ^r. ^^r.
Ri^ = = 50.2 kQ
286

Kxh = 50.2 12.90 = 10.3 kQ

II

12 QO
Vth = -Q^ (18) = 3.68 V

As a check, we calculate Ic for Pdcimax) = 1050:

_ 1050(3.68 - 0.65) _
""^
^^<'"''^' ~ 10.3 + 1051(3) ~ ^-""^

Our dc design is therefore relatively insensitive to the range of transistors

we might expect.
A more accurate value for the mid-frequency gain can now be formu-
lated. With /3o(min) = 350, wehaveg^^i = g;;^2 = 38.9 m^, and r^i = r^2
8.4 An example of multistage amplifier design 325

= 350/38.9 = 9.00 kl2. Therefore

Av.(.id) = 38.9(5||10)38.9(9||10.3||10)-^-^M^^^

= 14,820
We see that we have plenty of gain, almost 50% more than necessary.
The low-frequency requirements can always be met by selecting suffi-
ciently large capacitors, and we therefore turn to what may be the real
problem in this design, o)h .

The lowest value of o)h will occur when the gain is a maximum, because
the Miller effect predominates in common-emitter amplifiers. use We
i3o(max) = 1400, gm(m^) = 38.9 HiU, and r^ = 1400/38.9 = 36.0 kQ. The
high-frequency equivalent circuit requires values for r^ C^ and C^ , , . We
select r^ = 50 Q for both stages, and turn to the 2N5088 data sheets in
Appendix A for typical values of C^ and C^. With Vcb = 4.35 V, we find
^n == ^ob = 2 pF. Also, at /c = 1 mA, Vce = 5 V, the value given iorfj is
300 MHz, so that

38.9 X 103 ,, ^ ^
^-= -2 = l«-epF
2.(300)

The calculations upon which o)h depends may now be carried out. For the
we again make use of Eq. (1),
first stage,

R, = RL^ Rs'il + gmRL)

by calculating

H£i = 10 10.3 (36 + 0.05) = 4.45

II II
kl2

R/i = 36 [0.05 + (0.5 10.3)] = 0.519 kl2

II II

R^^ = 4.45 + 0.519(1 + 38.9 x 4.45) = 94.8 kQ

so that

r^i = R^iC^i = 94.8 X 2 = 189.6 ns

Next,
T^i = H^iC^i = K/iC^i = 0.519 X 18.6 = 9.66 ns

The second-stage calculations are

Ri2 = 10||5 = 3.33 kl2

H/a = 36 II
[0.05 + (10 1| 10.3)] = 4.49 kQ

R^2 = 3.33 + 4.49(1 + 38.9 x 3.33) = 589 kl2

r^2 = R^.2C^2 = 589 X 2 = 1179 ns

r^2 = R.2C^2 = R:2C^2 = 4.49 X 18.6 = 83.4 ns

326 Multistage amplifiers

Therefore

7 = 189.6 + 9.66 + 1179 -h 83.4 = 1462 ns

and

coh = — = 0.684 Mrad/s

T

We can see that we have failed in meeting the specification for ojh •

Some redesign is required, and the calculations above show clearly that
the culprit is the Miller effect in the second stage, r^2 • To increase cj// to 1
Mrad/s,we need to reduce t to 1000 ns, about % of its previous value.
However, we saw above that we had approximately % times the necessary
gain; therefore a trade-off between gain and bandwidth is indicated. A
simple way to do this is to decrease Rc2 We try a reduction from 10 to 5
•

kfi:

Rc2 = 5 kQ
Ri2 = 2.5 kQ
H;2 = 4.49 kQ
A slight change in C^2 occurs since Vcb2 is now the larger value, 18
- (5 + 3)(1)- 0.65 = 9.35 V. We find

C,2 = 1.6pF

This decrease helps. Next, we find that fj has increased slightly to 320
MHz, and therefore

C. ""^
= ^M_^_
27r(320)
1.6 = 17.7 pF
^

R^2 = 2.5 + 4.49(1 + 38.9 x 2.5) = 443 kQ

r^2 = 443(1.6) = 709.1ns

T = 189.6 + 9.66 + 709.1 + 79.5 = 998 ns

Thus

coh = — = 1.012 Mrad/s

r

and we come in just under the wire.

The mid-frequency gain must now be recalculated:

AvHmid) = 38.9 (5 5) 38.9 (9 II

10.3 II
10) -^^^^^i^jj^
II

= 11,100
8.4 An example of multistage amplifier design 327

This is also within the specifications. Letting Rc2 be one-half its previous
value has resulted in A v^^^id) dropping 25% below its former value, while
the bandwidth increased 48 % The relatively large improvement in band-
.

width has resulted from our clever decision to change Hc2? because it not
only reduced the gain but C^2 ^s well.
Approximating o)^ from the values of r^j t^2 ^ttI ^^^ t-k2 ^^ the case of
, ? ?

a CE-CE amplifier is again seen to be a very useful technique, for it gives

considerable insight into the necessary redesign process.
The design is completed with the selection of values for the five large
capacitors. We may place the corner frequency for one of these capacitors,
typically C^i or 0^2 just below oj^ = 1000 rad/s, and then let the remain-
,

ing corners be near oi = 100. Let us try instead to minimize the size of C^i
and C£2 by. selecting wcEi = wc£2 = 400 rad/s, and then letting coci = o^ci
= wc3 = 200 rad/s. This should keep o)^ well below 1000 rad/s, even
though the sum of the corners is 1400 rad/s. We can then choose the first
commercial-sized capacitor values larger than our design values. We have

0,^^ = 200 = ^ rn r. ^^^?^f^ o mi ^1 = ^.944 /xF

Ci[0.5 + (10.3 9)]
ii

1000
(^C2 = 200 = ^ rin + TTTT^TTTT^V^ ^2 = 0.338 /xF
C2[10 (10.31 9)]

1000
'-- = '«0 = C3 = 0.5,F
-Q(^T^
The equivalent resistance Rgqi seen by C^i depends on the value of jSq For .

/3o(max) we have

^*«--^'"'-^
^eql = 3
1401
= 25^8 »„,
while /3o(min) gives

9M0.5||10.3) ^^3^
^eql - 3 ,^^^_^^^,

The largest value (worst case) of C^i needed is therefore

Similarly, we calculate Req2 for /3o(max):

36+ (10-31110)
^eq2 = 3 ~ ^y.UlZ (PO(max))
1401
328 Multistage amplifiers

18 V O A 18 V

10 k^^ * 50.2 kn^ 5kn> 0.5 mF

50.2 kn
^e ^f
1 fxF 0.5 mF
soon
I
^AAr-
He- 2N5088 f 2N5088

5 kn> K,

^.© m
12.9 12.9 kr2

3kfi< 100- 3kn 100

liF' mF

Fig. S.S The final design of an amplifier that meets the requirements |Ay5(jnid)
> 10,000, 03L < 1000 rad/s, and co^ > 1 Mrad/s.

which is the worst-case condition, and then

1
Cfo
'^^
— 86.1 AtF
29.0(400)

We therefore select the commercial sizes:

Ci = 1 /iF

C2 = 0.5 i[zF

C3 = 0.5 mF
Cfi = 100 /zF
C£2 = 100 /xF

The final design is shown in Fig. 8.8, and data from a CAD simulation of
this circuit appear in Table 8.1. The "calculated" results are either those

Table 8. 1 CAD Analysis of CE-CE Amplifier Design

CAD Calculated

Parameter specification ^q = 350 jSq = 1400 /Sq = 350 i^o

= 1400

Ays(mid) ^ 10,000 11,101 15,805 11,101 15,805

o)L <103 rad/s 700 rad/s 681 rad/s 1,149 rad/s 1,162 rad/s
(jiH >1 Mrad/s 1,374 krad/s 1,020 krad/s 1,393 krad/s 1,008 krad/s
8.5 The design of a broadband amplifier 329

found in the design procedure above or those requested in Problem D8.4

and Problem 22. At any rate, the calculated values for o)^ and w^ are ap-
proximate.

D8.4 (a) For the capacitor values show^n in the circuit of Fig. 8.8, what

are the five half-power frequencies obtained when each of the five large
capacitors acts alone with the others being short-circuited, assuming jSq
= 1400? (b) How does their sum compare with the CAD
value for co^?

Answers, 111; 118; 200; 345; 388; 1162 vs. 681 rad/s

8.5 The design of a broadband amplifier

Many applications in the high-frequency band (HF band, 3 to 30 MHz)
and very-high-frequency band (VHF band, 30 to 300 MHz) call for ampli-
fiers that have an upper half-power frequency in that region of the fre-
quency spectrum, as well as a large bandwidth. These amplifiers are often
components in a system that also requires them to have a high input impe-
dance. In our final multistage design example, we shall therefore try to
meet the following set of specifications:

|Ay,(n,id)| > 50

Rin ^ 120 kfi (at mid-frequencies)

o)H ^ 100 Mrad/s

R, = 300 fi

Rl = 5kQ
The large value of input resistance that is required tells us that the input
stage should be a bipolar transistor in the common-collector mode, or an
FET that is operated common-drain or common-source. However, 120 kQ
is larger than typical values of R^ needed for good operating-point stabil-
ity of the bipolar transistor, and it therefore appears that the FET is pref-
erable. We shall try a CS-CB cascode arrangement. The FETprovides
high Hin and the cascode arrangement avoids a large Miller-effect capaci-
tance, while the C-B stage should deliver the necessary mid-frequency
gain. The proposed circuit is shown in Fig. 8.9a. Note that we are planning
on a direct-coupled arrangement in order to avoid using two elements, a
large coupling capacitor between stages, and the emitter-resistor. For the
FET, we assume that there is an n-channel JFET available with these
330 Multistage amplifiers

characteristics:

/ncc = 20 mA
Vp = - 2 V
C,s = 5 pF
Cg, = 2pF
while the bipolar transistor is a 2N5088.
We first make a rough estimate of the gain required in each stage in
order to select suitable values of g^ specify the operating points, and then
,

design the bias circuitry. The mid-frequency equivalent circuit appears in

Fig. 8.9b. The input impedance to the C-B stage is approximately l/g^2>
so we have the gain

|^ys(mid)| = gm2(^L2)gml(^D
gm2
1
= gm2(^L2)gml
gm2

Fig. 8. 9 (a) A proposed circuit configuration for a high-frequency broadband ampli

fier. (b) The mid-frequency equivalent circuit.

5kn? K

(a)

300 n

+
^
Sml^n

F^2 KcS 5kn^ v^

IT 1 - e_, r„T
Srrtl^TTl

R',.

(b)
8.5 The design of a broadband amplifier 331

or

The effective load R12 = Rc2 5 cannot be greater than 5 kl2, g^i cannot
II

be greater than 2/dss/| Vp\ = 20 mO, and their product must be greater
than the minimum gain, 50. Let us try g^i = 18 mO, just below the 20-
mO maximum value. The JFET operating point is then found:

/d =
^ (Vas + 2)2 (mA)

gmi = ^^ (Vgs + 2) = 18 mO

Vgs = -0.2 V
/d = 16.2 mA
To bias the gate at -0.2 V with respect to the source, we select a self-
biasing scheme using a source resistor whose value is

^<j<;
^^
— .. ^ - = 12.3 12
16.2

This low value portends poor operating-point stability for the JFET if
there is a wide variation among transistors. We
assume that we can pay
for uniformity in Iqss ^^^ ^p? ^^ least for this input stage.
Selecting an 18-V power supply, Vq^ = ^cc = 18 V, we now refer to
the dc-equivalent circuit of Fig. 8.10a. We assume a low value of V^s in
order to keep the emitter of the second stage at a reasonably low potential.
We also need V^s ^ -0.2 + 2 = 1.8V for saturated operation. Suppose
Vqs = 2 V, and therefore the voltage from drain to ground is 2.2 V.
A convenient value for g^2 is 38.9 mO, and then /^ = 1 mA. now We
see that

18 — 22

Since the input resistance must be equal to or greater than 120 kQ, we may
select Rb = 150 kfl, thus completing the design of the first stage.
To bias the second stage at /c = 1 mA and, say, Vce = 5 V, we use jSjc
= 350, Vbe = 0.65 V, and have

= 50Ib = 50 = 143 m A
/hi
(^)
332 Multistage amplifiers

18V

16.2 mA
^1
Rss< 0.2 y
V18 V

ia)

0.0389 F,

5 kfi < F.

Fig. 8.10 (a) The dc equivalent of the cascode amphfier circuit of Fig. 8.9a. (b) The
high-frequency equivalent circuit.

Since Vbe is 0.65 V,

2.2 + 0.65
R, = = 20.4 kfi
0.140

18 - 2.2 - 0.65
R, = = 105.9 kQ
0.143

18 - 5 - 2.2
Rr. = = 10.8 kQ

Let us now obtain an accurate value for lAv^^mid)! (min)- Using r.^2
= 350/38.9 = 9 kfi and neglecting r^, we find the input resistance to the
second stage, which is also the load for the first stage:

RlI = ^in2 = ^ir2 9110.0257 = 25.6 fi

gm2
8.5 The design of a broadband amplifier 333

and then
150
Avsimid) = -38.9(10.8||5)(18)(1.04||0.0256)
150.3

= -59.7 or I^Vs(mid) = 59.7

This is satisfactory. Since JRjn is 150 kfi, we have also met that require-
ment.
We now turn to the high-frequency response. The equivalent circuit is
8. 10b. We choose fio = /3o(max) = 1400, since this will lead to
shown in Fig.
the minimum a?//. We find r^2 is 36 ktl and use typical values for
C^2 (18.7 pF) and C^2 (2 pF) that we have used in previous examples; r^2 is
assumed tg be 100 12. For the JFET C-S stage,

i^/i = 0.3 150 = 0.299

II
kl2

i?£i = 1.04 0.0256 = 0.0250

II
kfi (neglecting r^a)

Tg, = Rg,Cg, = R/iCg, = 0.299 X 5 = 1.497 ns

Rgd = RlI + ^/l(l + gml^Ll)

= 0.0250 + 0.299(1 + 18 x 0.0250) = 0.459 kQ

Tgd = RgdCgd = 0.459 X 2 = 0.918 ns

Calculations for the C-B stage should include the effect of r^2 ; these ex-
pressions are available as Eqs. (35) and (36) in Chapter 7:

^/2 + ^x2
R.2 = r ir2
1 + gm2^s'j
s2

and

^x2(^02^L2 - ^x2)
R^2 = ^x2 + Rt
^L2
rx2 + r^2 + (^02 + 1)^^/2

We find
^;2 = Rci = 1.04 kO

Rl2 = Hc2||Hl2 = 10.811 5 = 3.42 kl2

Therefore

1.04 + 0.1
R^2 = 36 0.0275 kQ
1 + 38.9 X 1.04

r^2 = R^2C^2 = 0.0275 x 18.7 = 0.514 ns

o64: Multistage amplifiers

^^2 = H^2C^2 = 3.84 X 2 = 7.676 ns

Adding, we have
T = 1.497 + 0.918 + 0.514 + 7.676 = 10.606 ns

and

coh = — = 94.3 Mrad/s

r

Although this estimate is below the required value of 100 Mrad/s, our
analyses are always conservative, and we are probably within require-
ments. Our alternatives are to do a slight redesign, or to make an accurate
check by CAD. In this case, an analysis by SPICE2 leads to the values
l^vs(mid) = 59.9 and ooh = 128.6 Mrad/s. Both these values are obtained
I

with ^0 = 1400 and r^2 = 100 Q.

Before leaving the high-frequency range, we might also find the input
capacitance of our cascode amplifier. From Section 7.4 we have

inl Cgsl + ^Miller(l) " ^gsl ^" ^gdl (1 + gml^Ll

or

Cini = 5 + 2(1 + 18 X 0.0250) = 7.90 pF

This is a low value, although
it is not insignificant. It should be kept in

mind as a part of the load that the amplifier offers to the source.
Wehave met all the high- and mid-frequency specifications, and only
the low-frequency design remains. This is saved to make an exciting Prob-
lem 23 at the end of the chapter.

D8.5 At the operating point Ic = I mA, Vce = 5 V, assume that the

particular transistor used for the second stage in the amplifier of Fig. 8.9a
has an unusually low value of i^o, 100. Find Tg^i, jg^j, r^2? ^^^ ^/x2 and
estimate w//. Assume all other values are as designed.

Answers. 1.497 ns; 0.915 ns; 0.509 ns; 7.675 ns; 94.3 Mrad/s

Problems
1. The amplifier in Fig. 8.1a is modified by increasing the positive sup-
ply voltage from 18 to 24 V, changing ^21 from 58 to 39 kfl, changing
JR22 from 58 to 100 kQ, and reducing Rc2 to 5 kfi. Assume r^ = and
calculate (a) Av,(^id), (b) Z,-, (c) Z^.
Problems 335

> 15 V

6kr2

Fig. 8.11 See Problems 2, 7, and 15.

2. ForTl = /^oi = 200. For T2, iSdc2 = i^02 = 250.

in Fig. 8.11, let/^dd
For both, n = Vq = 0.65 V. At mid-frequencies, find (a) the signal-
1,
source current, (b) the load current, (c) the load voltage, (d) the dc
battery current.
3. (a) Calculate the mid-frequency voltage gain Avs(mi6) for the two-
stage CS-CS amplifier shown in Fig. 8.12. Both transistors have Vj
= 2 V and /^ = 6 mA when Vqs = 3 V. (b) Increase Rdi and R02
until Tl and T2 are both at the edge of the pinch-off region and recal-
culate A y,(n,id).

Fig. 8.12 See Problems 3, 8, and 18.

>25 V
lOk^^ 180 kn^ 15kft
180kn^ 1 1^
1 fxF

VA^) 20 k^ 20 kn
336 Multistage amplifiers

vi^^) 40 k^

Fig. 8.13 See Problems 4, 9, and 19.

4. In the multistage amplifier of Fig. 8.13, let (Sq = 240 and r^ = 8 kl2
for the bipolar transistor, while g^ = 6 m^ for the JFET. Find the
mid-frequency values of (a) Avi, (b) Ay^, (c) A/, (d) Ap.
5. Parameter values for a CE-CE-CC three-stage amplifier are R^
= 1 kfi, Rbi = 25 kfi, r^i = 4 kQ, g^i = 60 mU, Rci = 5 kfi, R^s
= 20 kfi, r,2 = 6 kl], g^2 = 40 mU, flc2 = 4 kfl, Rbs = 40 kfi, r,3
= 3kQ,g^3 = 50mU,RE3 = 2kQ,andEz. = 3 kQ. (a) FindAv,(„,id).
(b)FindZ,3.
6. The combination of two transistors coupled together as shown in Fig.
8.14 is called a Darlington pair or a Darlington transistor. It is used
here as a C-E stage, (a) Draw the mid-frequency equivalent circuit,
(b) Show that Zj = HB||[r^i + ^^2(1^01 + 1)], a large value, (c) Show
that V,/V, = -{[/3o2(0oi + 1) + ^oi]/Ki + rMPoi + 1)]}
(Rc\\Rl), also a large value.

Fig. 8.14 See Problem 6.

->Vcc
 . .

Problems 337

7. For the two-stage CE-CE amplifier of Fig. 8.11, select o)ti = 600
Mrad/s, C^i = 2 pF, r^i = 50 fi, 0^72 = 700 Mrad/s, C^2 = 1-8 pF,
and r^2 = 40 0. Estimate co//.
8. The two-stage CS-CS amplifier of Fig. 8.12 uses transistors for which
Vj^ = 2 V and /d = 6 mA when Vqs = 3 V. Estimate co// if C^d =1-2
pF and Cg, = 4.5 pF.
9. The CE-CG amplifier of Fig. 8.13 has r, = 80 12, /3o = 240, r^
= 8 kfi, C^ = 60 pF, and C^ = 4 pF for the bipolar transistor, while
gm = ^ mO, Cg, = 4.5 pF, and C^a = 0.4 pF for the FET. Determine
a value for co//

10. Figure 8.15 shows the low -frequency equivalent circuit of a certain
CS-CG cascode amplifier. Assume interelectrode capacitances of Cg^i
= 5 pF; Cgdi = 1.5 pF, Cg,2 = 6 pF, and Cgd2 = 2 pF. (a) Draw the
high-frequency equivalent circuit, (b) Estimate co/^. (c) Find A y^^mid) •

11 Element values in the high-frequency equivalent circuit of a CS-CD

two-stage amplifier are Rg = I kfi, Rpi = 49 kl2, Cg^j = 3 pF, Cg^i
= 0.8pF,g^i = 10mO,RDi = 5kQ,RB2 = 49kQ,Cg,2 = 3pF,Cg^2
= 0.8 pF, g^2 = 10 mO, Rss2 = 2 kQ, and Rl = 4 kfi. (a) Find
^vs(mid)- (b) Estimate co// by analytical methods, (c) Find o)h by a
CAD program.
12. Interelectrode capacitance values for the three-stage CE-CE-CC am-
Problem 5 are C^i = 60 pF, C^i = 3 pF, C^2 = 45 pF, C^2
plifier of
= 2 pF, C^3 = 35 pF, and C^3 = 2.5 pF. Estimate co/^.
13. Use the following parameters for the three-stage amplifier of Fig.
8.2a (resistances in kQ, capacitances in pF): R^ = I, Rgi = 30, r^i
= 0.05, r,i = 7.71, C,i = 25, C,i = 3, /3oi = 300, Rci = Rb2 = 20,
f,2 = 0.08, r,2 = 5.14, C,2 = 35, C,2 = 2.5, /3o2 = 400, Rc2 = Rbs
= 10, r,3 = 0.1, r,3 = 4.28, C,, = 50, C^, = 1.5, ^03 = 500, and
Rc3 = Rl = ^' (a) Estimated)//, (b) Calculate A y^^n^jd)? including r^.
14. Estimate o)// for the two-stage amplifier shown in Fig. 8.4 if jSq is as-
sumed to be 1400, r^ = 36 kQ, and all other parameters of the

Fig. 8.15 See Problems 10 and 20.

0.5 juF

r^H.
338 Multistage amplifiers

high-frequency equivalent circuit are unchanged. How does this in-

crease in j8o affect co//?

15 Select reasonable values (not too big and not too small) for the five
capacitors shown in the CE-CE amplifier of Fig. 8.11 to provide a
lower half-power frequency of 20 Hz.
16. In Fig. 8.16, let Vq = 0.7 V and n = 1 for each transistor, while jSdd
= 250, i3oi = 220, 0dc2 = 350, and i3o2 = 320. (a) Find V, at mid-
frequencies, (b) Select standard values for Ci, C2, C3, C^i, and Ce2
so that 15 < /l < 30 Hz. (c) Check Parts (a) and (b) by CAD.
17. The CE-CE-CE amplifier of Fig. 8.2a contains the following ele-
ments in its low-frequency equivalent circuit (resistance in kQ, capac-
itance in /xF): Rs = 1, Rbi = 30, Ci = 4, r,i = 7.71, /3oi = 300, Cei
= Ce2 = Ce3 = 80, Rei = 4, Rci = ^^2 = 20, C2 = 2.5, r^2
= 5.14, /3o2 = 400, Re2 = 2, Hc2 = Rbs = 10, C3 = 2.5, r,3 = 4.28,
i(3o3
= 500, Re3 = 1, Rc3 = Al = 5, and C4 = 5. Calculate coci ooc2, ,

^C3» <^C4, ^C£i5 ^C£2> ^ud coc£3 ^ud estimate oii-

18 (a) Estimate the lower half-power frequency for the CS-CS amplifier
shown in Fig. 8.12. (b) Obtain frequency data by computer to deter-
mine an accurate value for fi .

19 (a) Estimate o)l for the CE-CG two-stage amplifier shown in Fig.
8.13. Use gmi = 30 mU, r^i = 8 kQ, and g^s = 6 mU. (b) Select new
capacitor values so that o^i = 500 rad/s and each capacitor is equally
effective in controlling oje .

20. (a) Estimate co^ for the amplifier shown in Fig. 8.15 and give upper
and lower bounds for your estimate, (b) Find Z^ and Z^ at mid-
frequencies.
21. Choose values for the five capacitors appearing in the CE-CE ampli-
fier of Fig. 8.1a to provide o)i = 700 rad/s. Use r^ = 9 kfl, gm
= 38.9 mU, and jSo = 350. Set the corner frequency corresponding to

Fig. 8.16 See Problem 16.

>10V

10kn>^o
lO/iVf'X^) 30 kn
 .

Problems 339

the smallest i^eq at 400 rad/s, the next larger at 150 rad/s, and the
remaining three all at the same frequency.
22. Show that the following calculated values in Table 8.1 at the end of
Section 8.4 are correct for jSq = 350: (a) w^ = 1149 rad/s, (b) o)h
= 1.393 Mrad/s.
23. Select values for Ci , Cgs , C, and C3 in the circuit shown in Fig. 8.9a if
0)1^ is to be approximately 10^ rad/s. Use Rgi = 150 kl2, Rss = 12.3 12,

Rd = = 105.9 kfl, H2 = 20.4 kfl. Re = 10.8 kl], g^i

1.04 kl2, jRi
= 18 m«, g^2 = 38.9 mW, r^2 = 9 kfi, and r^2 = 100 fi.
24. Design an amplifier to meet the following specifications using 2N5089
transistors and check your design with a CAD program: lAy^^^id)!
> 25,000, Rs = 100 Q,Rl = S kl2, oi^ < 500 rad/s, and co// > 2 x 10^
rad/s. Let r^. = 50 Q and use "typical" values for C^ and C^.

25. Design a two-stage CE-CE amplifier to provide Av^^^id)

|
I
> 200 and
/// > 3 MHz using 2N5088 transistors operating with /c = mA, Vce
1
= 5 V, i8o = 350, C^ = 18 pF, and C^ = 2 pF. Let R, = 300 Q and R^
= 5 kfi and neglect r^
26. Design an amplifier to have \Avs\ ^ 100 and R^^ > 10 kfl at mid-
frequencies, and Jh ^ 10 MHz for average transistors. The internal
resistance of the source is 300 Q and Ri = 5 kl2.
27. Design an output stage for the amplifier of Problem 26 above to re-
place the 5-kQ load. It must have an input resistance equal to 5 kfl and
an output resistance equal to or less than 100 fi. The upper 3-dB fre-
quency should be at least 5 MHz.
 9

The operational amplifier

In the past several hundred pages we have studied diodes, bipolar transis-
tors, field-effect transistors, and the design and analysis of basic amplifier
circuits, including input and output impedance and frequency effects. We
have also looked briefly at several special circuits, such as the basic rectifi-
ersand regulators, the current mirror, and the phase splitter. We are now^
ready to widen our field of view and study the external behavior of a sys-
tem of amplifiers without becoming too involved with the individual units
that compose it. The particular system we shall consider is the operational
amplifier.
The term operational amplifier or op amp was originally used to de-
scribe amplifiers that performed various mathematical operations in ana-
log computers. We shall show that the application of negative feedback
around a high-gain dc amplifier leads can add, subtract,
to circuits that
average, integrate, or differentiate, all of which are useful mathematical
operations. However, today's applications of operational amplifiers go far
beyond simple mathematical operations. Op amps are used in many con-
trol and instrumentation systems to perform a myriad of tasks as voltage
regulators, oscillators, logarithmic amplifiers, peak detectors, voltage
comparators, and preamplifiers with special frequency characteristics for
use in record-playing equipment.
The op amp has a very high gain, ranging from 10,000 to mor than a ^

million; a high input resistance, from 10^ to 10^^ fi; a low output resis-
tance, 1 to 1000 fl; and a bandwidth that extends from dc to an upper half-
power frequency that ranges from 100 kHz to several hundred megahertz.
There are a number of practical reasons for the appearance of the op
amp in so many new circuit designs. The main one is the significant im-
provement in performance over that obtainable with vacuum tubes in
early analog computers. Second, operational amplifiers containing about
30 transistors, 10 resistors, and a few diodes cost as little as 20 cents, even
in small quantities. Their small size and low power consumption allow
any number of them to be incorporated easily into complex systems. Their
good reliability and stability make them versatile and predictable build-
ing blocks.

340
9.1 The ideal operational amplifier 341

9.1 The ideal operational amplifier

Figure 9.1a shows the standard symbol for an operational amplifier.

There are two input terminals, one output terminal, and a ground termi-
nal, which is usually not shown explicitly. The terminal marked with the
minus sign is called the inverting input, because a signal applied between
that terminal and ground appears at the output with a 180° phase shift.
The terminal with the plus sign is the noninverting input; a signal applied
between that terminal and ground appears between the output terminal
and ground with 0° phase shift. Figure 9,1b shows a signal Vi applied be-
tween the inverting input and ground, a signal V2 between the noninvert-
ing input and ground, and the output u^. We use the lower-case v to indi-
cate instantaneous voltage, either ac or dc.
Many applications of operational amplifiers require the use of only one
input. Such an amplifier is termed single-ended. Either the inverting or
noninverting input can be used with the other having no signal applied.
This second (unused) input might have other circuit elements connected to
it or it might be grounded. Other applications require that signals be ap-

plied to both inputs so that the amplified difference of the two signals ap-
pears at the output. This configuration is called a differential amplifier or
a double-ended amplifier.
Figure 9.2a illustrates a simplified low-frequency equivalent circuit for
an operational amplifier. The voltage between the inverting and nonin-
verting input terminals is marked Vi where Vi = Vi - V2; Vi is the voltage
,

between the inverting input and ground, while V2 is that present between
the noninverting input and ground. The input resistance is represented by
Ri and the output resistance by R^ The amplification is supplied by the
.

dependent voltage source A(vi - V2) = Avi, where A is the open-loop

gain. It is real and positive. Note that the positive terminal of the depen-
dent source is connected to ground.

Fig. 9.1 (a) The standard symbol for an operational amplifier, (b) Two input volt-
ages, vi and t?2, and the output voltage v^ are defined with respect to ground.

I
(a) (h)
342 The operational amplifier

"§ c
^ '3

HM ^ 'a

S O

•13 c

O vi
«*-
«

i^ 8

c c
§ 0^
^
<
^ S^
CI.

3 a s

;^ cs o
S^
«= 2

^ g O
^1-3
< .12 o
2; "o

3 c

^ § I
9. 1 The ideal operational amplifier 343

In the next few sections we shall study several simple applications of the
op amp by simplifying the equivalent circuit of Fig. 9.2a to the so-called
ideal operational amplifier shown in Fig. 9.2b. Here we have let Ri
become infinite and set Ro equal to zero; we shall also let A approach
infinity.
Let us try out the equivalent circuit ofihe ideal op amp on the inverting
amplifier shown in Fig. 9.3a. The signal Vs is applied through Ri to the
inverting input, while the noninverting input is grounded. A feedback re-
sistor Rf is connected between input and output. The op amp is replaced
with its ideal equivalent circuit in Fig. 9.3fo, and we see that Vi - Vi since
V2 = 0. Then, with R^ = 0, we must have Vg = -Avi.
At the input,

Riii -\-
Vi

and therefore

Vs = Rih - -^ (1)

Applying KirchhofFs voltage law through R^ and the outside loop,

-V, -\-
Riii + Rfii + t^o = (2)

Solving Eq. (1) for ij , we have

h = t^S +

Using this result to eliminate ii in Eq. (2), we obtain

-t;, + t;, + {R, + Rf)U + ^)/^i =

Fig. 9.3 (a) An op amp is used as an inverting amplifier, (b) The op amp is replaced
by an equivalent circuit in which R^ = oo and Rg = 0.

(a) (b)
344 The operational amplifier

This is easily solved for the closed-loop gain v^ Iv^ :

^
1;, 1 + [1 + {RjlRi)]/A ^

As the gain A becomes very large, the fraction in the denominator ap-
proaches zero, and we have

""^
(4)
'5

Equation (4) implies that the gain of the circuit with feedback is fixed
by the ratio oi RftoRi. This is an important result. First, it shows that the
closed-loop gain is independent of the op amp's open-loop gain and any
variations it may have; that is, the gain depends only on two fixed resis-
tors. Second, any desired gain may be obtained; the accuracy is limited
only by the accuracy of the resistance ratio. This means that we can pick
an op amp "off the shelf" and fix its gain to our specific needs.
Let us summarize the characteristics of an ideal operational amplifier:

1. A-^ 00

2. Ri-^ 00
3. Ro-^0
4. o^L = and co// ~^ 0°

5. Characteristics are constant with time and temperature.

6. Vo = when Vi = V2

For the ideal op amp the relationship given in Eq. (4) becomes exact:

-!^ = -A. (ideal op amp) (5)

Vs Ri

may be obtained much more easily by using the concept of a

This result
"virtual ground" as it applies to an operational amplifier. As A ->• 00, f^ in
Fig. 9.4 must approach zero in order to have a finite output voltage Vo-
Thus, both inputs are at the same potential; since the noninverting input is
grounded, we find a 'Virtual ground" at the inverting input. For an ideal
op amp with Ri and A infinite, we see that not only is there no voltage
between the input terminals (u, = 0), but also that no current flows into
either input terminal (i, = 0).
Let us now use this virtual-ground concept to simplify the derivation of
Eq. (5). In Fig. 9.4, i, = 0, and thus flows through both R^ and Rf. Also,
t'l

Vi = 0, so

V, = Riii
9. 1 The ideal operational amplifier 345

Fig. 9.4 As A- 00, a virtual ground is found at the input and Vi

-* and i^ - 0.

and

V, -Rfh
By dividing,

Rf
(ideal op amp)
Ri

which is the same result we obtained before.

Even though this result was derived for the ideal op amp, the errors
incurred in applying it to a real device are only a few tenths of a percent in
most cases. For example, the effect of a finite value for A may be appreci-
ated by using both Eqs. (3) and (5) to calculate the closed-loop gain for an
inverting amplifier with Ri = 10kQ,i?y = 100 kO, and A = 10,000. From
Eq. (3),

-(10^/104)
= -9.989
1 + (105/104)
1 +
10,000

while Eq. (5) gives Vg/Vg = - 10. The error in this latter result is only
0.11%.
We might also check to see how good our virtual ground really is. If v^
= 1 V with A = 10,000, then Vi = - 10-4 V, or - 100 /xV. This is small
compared with both the output and with Vg = - 0.1 V.

D9.1 Let Ri = 20 kQ and Rj = 100 kQ for an inverting amplifier having

Hj = 00 and R^ = 0. Find an accurate value for the closed-loop gain if A
equals (a) 102, (b) 10^, (c) 10^.

Answers. -4.717; -4.9970; -4.999970

346 The operational amplifier

D9.2 Let Ri = 10 kfi and Rj = 80 kQ for an inverting amplifier having

Ri = 00, fi^ = 0, A = 105, and v, = lY. Find (a) Vo, (b) Vi, (c) ij (Fig.
9.4).

An5u;^r5. - 8 V; 80 /^V; 100 /xA

9.2 The noninverting amplifier

In instrumentation and control circuits v^^here a high input impedance and
a gain without phase reversal are required, the noninverting operational
amplifier is appropriate. This circuit is shov^^n in Fig. 9.5.
Let us first assume a virtual ground at the input terminals. Therefore Vi
= and ii = 0. It follows that Vi = V2 = Vg-, ii is the total current in both
Hi and Rj. Thus these two resistors form a voltage divider and

Vi = V2 = Vs =
Ri + Rf

so that

Vs
^1
Hi
"^ ^^ = 1 + ^
Hi
(ideal op amp) (6)

We see that we can obtain any value of gain greater than unity with no
phase reversal by selecting suitable values of Hi and Hy.
The source Vg sees a very high input impedance, since i^ is so small; a
load placed across the output terminals sees zero output impedance if we
assume that H^ is zero. We shall obtain more accurate values for both Hin
and Hout later in the chapter.
Now let us consider the case in which A is finite. Again we let i, = 0,
and we have

Hi
^^ = ^rrH7^^
Also,

Vo = -Avi = -A(i;i - Vg)

Therefore

*'"=
o
-^'^TTfl;*'"-'''
Solving for the closed-loop gain,

V.
'O
A Hi + Rf
(7)
 :

9.2 The noninverting amplifier 347

Fig. 9.5 The basic noninverting amplifier has the gain v^/Uj = 1 + (Ry/jRj).

As A approaches infinity, it is obvious that this gain approaches that given

byEq. (6).
The voltage follower is an important form of the noninverting opera-

tional amplifier that obtained by letting JRy = 0. When this substitution

is

is made in Eq. (7), we have a result that is independent of jRi

Vr
(8)
Vs 1 + (1/A)

Equation (7) also yields Eq. (8) when Ri 00. As A - 00 in Eq. (8),

= 1 (ideal op amp) (9)

Figure 9.6 shows a voltage follower in its barest form. Although jRi ap-
pears to be infinite, we shall see later that a dc path to ground is required
at every input.
We now have a circuit with unity gain and no phase shift (hence the
name voltage follower), very high input impedance, and very low output
impedance. Such an arrangement is useful for isolating two circuits so that
they do not interact with each other. This circuit is also known as a buffer
amplifier or isolation amplifier.

D9.3 LetH, = ooandH^ = for a noninverting amplifier, (a) Calculate

Vo/v, Ri = 100 kfi, Hy = 300 kQ, and A = oo. (b) Let R^ = 20 kfi, A
if

= 00, and Voivs = 10, and determine Rf. Find Vo/v^ if Ri = 10 kfl, JRy
= 200 kI2, and (c) A = 1000, (d) A = lO^.
Answers. 4; 180 kQ; 20.57; 20.96
 ,

348 The operational amplifier

Fig. 9.6 The voltage follower has unity gain, Vq Iv^ = 1, very high input impedance.
and very low output impedance.

D9.4 A voltage follower is designed to provide Vq = IV. Determine Vi

t;i,andt;2ifA = (a) 10^, (b) lO^.

Answers. 1, -0.01, 1.01; 1, -0.0001, 1.0001 V

9.3 The inverting amplifier

The inverting operational amplifier was first shown in Fig. 9.3a, and it is
drawn again as Fig. 9.7. If we assume that Ri and A are infinite while R^ is
zero, then once again

3l (ideal op amp) (10)

Hi

Now let us consider the input impedance offered to the ideal voltage
source Vg . With the virtual ground at the input, i;^ = 0, and it follows that

^in = ^1 (ideal op amp) (11)

Since R^ = 0, the Thevenin impedance as seen at the output terminals is

Rout = (ideal op amp) (12)

These results indicate why this circuitis such a popular and versatile

amplifier. Any values of closed-loop gain and input impedance can be ob-
tained by the appropriate selection of Ri and Rf.
The basic inverting amplifier of Fig. 9.7 may also be used as a constant-
current source. If we again consider Vi = 0, then the current to the right in
jRj is vJRi; this current also flows to the right in Rj, since i^ = 0. Thus

i = -^ (ideal op amp) (13)

9.3 The inverting amplifier 349

O
Fig. 9.7 Using an ideal op amp, the inverting amplifier is characterized by v^/Vg
= -RjlRi,Rir, = RuandRo = 0.

This completely independent of R^, and it therefore acts like a constant-

is

current source. The value of the current is proportional to Vg, and the cir-
cuit might therefore be used as a linear amplifier to cause a meter current
to be directly proportional to Vg or as the source supplying the deflection-
,

coil current for the sweep in a television set.

Many applications of the inverting op amp involve the summing of sev-
eral signals. One circuit that accomplishes this is the summer or summing
amplifier shown in Fig. 9.8 for the case of three input signals. If we again
let Vi = 0, then we see that the currents in Ri, R2, and R3 are Vgi/Ri,

Vs2lR2^ and 1^53/^3 respectively, while i = -v^/Rf. With i, = 0, we may

apply Kirchhoff's current law at the input and obtain

Vs2 Vs3_

R. R9

Thus

(ideal op amp) (14)

Ri

If Ri = R2 = Rs, then the summing is accomplished without scaling the

individual signals:

f. = 3l («si + Us2 + Ujs) (ideal op amp) (15)

Note that the input impedance to each source is given by the resistance in
that branch.
350 The operational amplifier

V/v

Fig. 9.8 This summing amplifier or summer has an output v^ = -Rf[{Vsi/Ri)

Subtraction and addition may be accomplished simultaneously through

the use of an inverting amplifier with unity gain for each signal to be
subtracted.

D9.5 Let jRi = 00, R^ = 0, Hi = 10 kQ, and R^ = 200 kQ in the circuit of

Fig. 9.7. If A = 00 and u, = 1 V, find (a) Hin, (b) i. (c) Find i if A = 100.

Answers. 10 kfi; 0.1 mA; 0.0835 mA

D9.6 Design an amplifier to carry out the following operations: (a) Vg
= -lOu,! - 100t;,2 - 5t?,3; (b) Vo = i?,i + 2t;,2 + 4u,3.
Answers. R^ = 100 kfi: 10 kfi, 1 kQ, 20 kQ; Rf = 100 kQ: 100 kQ, 50 kQ,
25 kfi, and unity-gain inverting

9.4 The differential amplifier

There are numerous instrumentation applications in which we wish to

measure the difference between two signals. For example, in a heat-flow
problem we may wish to measure the temperature difference between two
points and not the specific temperature of each point. This could be done
with two thermocouples and a differential amplifier. Or perhaps we
might want to compare a temperature with a standard, often done in pre-
cision temperature measurements.
Figure 9.9 shows a differential amplifier that is easily analyzed by
superposition. Let us first set ^^2 = and call the partial output that t;,!
produces Voi The parallel resistors to ground at the lower input have no
.

effect since t;, = 0, and we have an inverting amplifier for which

9.4 The differential amplifier 351

Vol = --^V,i

With Vs2 turned back on and v,i = 0, we see a voltage divider at the nonin-
verting input, and

RR.
V2 = Vs2
Rf2 + Ri

Therefore

R
Vo2=il^^
Ri / \ Rj2 +
/2

R2
Vs2

Combining these results,

Rn Rfi + Ri RIL
Vo = Vol + Vo2 = ~^~^sl + Vs2
R^ Rfo
V2
+ Ri

or

R '
" t/2
^..
-''
. ^y'A Us2 (16)
R, 1 + {RjiIRi} R2

In order to achieve v„ = with v^i = Vs2 , we put

Rfi _- Rf2
(IV)
Ri R:

Fig. 9.9 The output of the differential amplifier is Up = iRfilRi)(Vs2 - ^sl)

{Rf2lR2){Vs2 - Vsl) ioiRji/Ri = Rj2/R2-

-O .A
»352 The operational amplifier

Then,

- % _
^i^s2- /.> .,
Vsi)
\ _ ^/2
= -B—(^s2 - Vsi) (ideal op amp) (18)
ill ^2

The ratios Rji/Ri and RJ2IR2 should be exactly the same; otherwise, two
equal input signals will cause a nonzero output.
The input impedances offered to the two sources in Fig. 9.9 are not the
same. At the noninverting input, we must have

i^in2 = i^2 + Rf2 (19)

since the op amp draws no

input current. To find R^^i we again set ^52 ,

= 0, therefore causing v^ to be zero. Thus, the virtual ground at the op

amp input forces the condition Ui = 0, and

Rinl = Ri (20)

D9.7 A differential amplifier is to give an output fo = 3 (1:^2 - i^si). The

input impedance at each input is to be 10 kO. If the op amp has a large
open-loop gain, specify the value of (a) Ri, (b) flyi, (c) R2, (d) Rf^-

Answers. 10; 30; 2.5; 7.5 IcQ

9.5 Characteristics of a real operational amplifier

Up we have mainly considered the ideal operational ampli-

to this point,
fier with an open-loop gain approaching infinity, zero output impedance,
and infinite input impedance. These assumptions led us to the concept of
the virtual ground and a fairly simple analysis of several op-amp circuits.
Throughout the remainder of this chapter, we shall consider a real opera-
tional amplifier, beginning with the inspection of a typical manufactur-
er's data sheets.
There are many types of op amp commercially available to the circuit
designer, covering a wide range of performance characteristics (and
costs) Some have a very specialized nature, while others are designed to
.

be used in many different applications. Figure 9. 10 is the first page of data

for the Harris Semiconductor HA-2107 operational amplifier. The com-
plete data sheet is reproduced in Appendix A. Note from Fig. 9.10 that this
is a "general purpose operational amplifier" that can operate over a tem-

perature range from - 55° C to 125° C. The pin connections are shown for
a metal can encapsulation (TO-99) in the lower right corner of Fig. 9.10.
A square metal tab identifies Pin No. 8, and the pins are numbered in a
counterclockwise direction, as viewed from the top. The inverting input is
Pin 2, the noninverting input is Pin 3, the positive power supply connec-
tion is Pin 7, and the negative supply connection is Pin 4. This information
 y

9.5 Characteristics of a real operational amplifier 353

HARRIS
^.SEMICONDUCTOR
A DIVISION Of HARRIS INIERJYPE CORPORATION
HA-2107/2207/2307
Operational Amplifiers

FEATURES PACKAGES
CODE 2A
• LOW OFFSET VOLTAGE OVER TO-99
TEMPERATURE 3mV MAXIMUM

LOW BIAS CURRENT OVER

TEMPERATURE I OOnA MAXIMUM

• LOW OFFSET CURRENT OVER

TEMPERATURE 20nA MAXIMUM

• LOW OFFSET VOLTAGE

TEMPERATURE COEFFICIENT 3yV/oc

ML DIMENSIONS ARE IMNCHES

GENERAL DESCRIPTION TO-91

CODE 9W
—»4U»— 0)0
MGPLANI—
SCATING PLANE

=»
The HA-2107, HA-2207 and HA-2307 are high performance

general purpose operational amplifiers which are internally 3T

compensated for unity gain stability.

These amplifiers have input and output overload protection. |— no m\ » m m

Large common mode signals do not cause latch-up. The

HA-2107, HA-2207 and HA-2307 have guaranteed operat-
ing temperature ranges of -55°C to +125°C, -25°C to +85°C

and 0°C to +70°C respectively.

SCHEMATIC PIN OUTS

TO-99

(TOP VIEW)
TO-91

Fig. 9.10 The first sheet of specifications for the HA-2107 operational amplifier,
courtesy of Harris Semiconductor. See Appendix A for complete data sheets.
354 The operational amplifier

enables us to make connections to the external circuit. The leads are also
identified for the mini-DIP (dual in-line package) arrangement. A dot, a
notch, or a shorter lead indicates Pin 1; the pins again are numbered in a
counterclockwise direction as viewed from the top.
Figure 9.10 also gives a schematic diagram for the 2107 op amp, show-
ing the interior circuitry. Although this is of great interest to operational-
amplifier and linear integrated-circuit designers, it need not be mastered
by the likes of us. However, there are some points of interest in this sche-
matic. For example, we see that the op amp contains 22 transistors, 12
resistors, and one capacitor. Also, the noninverting and inverting inputs
are connected directly to the bases of pi and Q2, both of which are npn
bipolar transistors. This indicates that some dc biasing current is neces-
sary. Furthermore, since the inputs are direct-coupled, the op amp is ca-
pable of amplifying dc voltages and currents.
Figure 9.11 lists all the absolute maximum ratings and gives some elec-
trical characteristics of the 2107 op amp for various temperature condi-
tions. If the absolute maximum ratings are exceeded, damage to the inte-
grated circuit may be catastrophic. At the least, some degradation in
performance will likely occur. Notice that there is a limit to the tempera-
ture range and the input voltage.
As a comparison of the ideal and real operational amplifier, consider
the input resistance, the sixth listing under "Electrical Characteristics" in
Fig. 9.11. At 25°C, the 2107 op amp has a minimum R^^ of 1.5 Mfi and a
typical value of 4 Mfi. This is not infinite, but in comparison to a 1-kQ
resistance in the external circuit, it is very large. Also notice that an input
bias current no greater than 75 nA at 25°C is required to bias the bipolar
transistors Ql and Q2. The minimum bias current increases to 100 nA at
some point within the temperature range from - 55°C to 125° C.
The large signal voltage gain at 25°C with Ri = 2\dl and the supply
voltage Vs = ± 15 V is listed as 50,000 minimum and 160,000 typical.
Thus A is not infinite, but it is sufficiently high to make the closed-loop
gain essentially independent of any changes that might occur in the op
amp.
We see from Note 3 at the bottom of Fig. 9.11 that the given data are
valid for a supply voltage in the range from ± 5 V to ± 20 V. Thus, we
might connect - 15 V to Pin 4 and + 15 V to Pin 7.
There are many unfamiliar terms in these data sheets, but most of them
will be discussed later in the text.
As an example comparing an ideal, a fairly low-gain, and a real invert-
ing operational amplifier, consider Table 9.1. The low-gain example has
A = 10\ Ri = 50 kQ, and R^ = 100 fi. Corresponding values for the HA-
2107 op amp are A = 5 x 10\ Ri = 1.5Mfi, andfi, = 100 Q. The exact
values of f ^ Ivg have been calculated by expressions that are developed in
the next section, and we see that the gain differs from the ideal value by
9.5 Characteristics of a real operational amplifier 355

ABSOLUTE MAXIMUM RATINGS SPECIFICATIONS

HA-2107
HA-2207 HA-2307
Supply Voltage +22.0V +18.0V Operating Temperature Range

Power Dissipation (Note 1) 500mW HA-2107 -550Cto+1250C

Differential Input Voltage +30. OV HA-2207 -250c to+850C
HA-2307 0OCto+70OC
Input Voltage (Note 2) + 15.0V Storage Temperature Range -65OCto+150OC
Output Short Circuit Duration Indefinite Lead Temperature (Soldering 60 seconds) 300°C

ELECTRICAL CHARACTERISTICS

HA-2107
HA-2207 HA-2307
TEMPERATURE
PARAMETER (Note 7) MIN. TYP. MAX. MIN. TYP. MAX. UNITS
INPUT CHABACTERISTICS +25OC 0.7 2.0 2.0 7.5 mV
Offset Voltage
Full 3.0 10 mV

Average Offset Voltage yV/OC

Full 3.0 15 6.0 30
Temperature Coefficient
+25OC 30 75 70 250 nA
Bias Current
Full 100 300 nA

+25OC 1.5 10 3 50 nA
Offset Current
Full 20 70 nA

Offset Current TLowto+250C 0.02 0.2 0.02 0.6 nA/OC

Temperature Coefficient ^25°CtoTHjgh 0.01 0.1 0.01 0.3 nA/OC

Input Resistance +25OC 1.5 4 0.5 2 Mf2

Input Voltage Range (Note 4) Full ±15.0 ±12 V

TRANSFER CHARACTERISTICS
Large Signal Voltage Gain +25OC 50K 160K 25K 160K V/V
(Notes 5 & 6) Full 25K 15K V/V

Common Mode Rejection Ratio Full 80 96 70 90 dB

Output Voltage Swing

Ri = 10KQ Full ±12.0 ±14.0 ±12.0 ±14.0 V
<Note6)
Rl-2K^ Full ±10.0 ±13.0 ±10.0 ±13.0 V

POWER SUPPLY CHARACTERISTICS +25OC 1.8 3.0 1.8 3.0 mA

Supply Current (Note 4)
1250c 1.2 2.5 mA
Supply Voltage Rejection Ratio Full 80 96 70 96 dB

NOTES: 1 .
Derate TO-99 package at 6.8mW/°C for operation (4) Vq = +20.0V
ambient temperature above 75°C and 4.9mW/°C
above 50°C for the TO-91 package. (5) Rl = 2Kfi, Vqut =±10.0V
2. For supply voltages less than +15 OV, the absolute (6) Vc =+15.0V
maximum input voltage is equal to supply voltage.

3. These specifications apply for +5.0V<V2^+20.0V (7) Full

High -55°C to+125°C (HA-2107)
unless otherwise specified. -25°C to +85°C (HA-2207)
0°C to +70°C (HA-2307)

Fig. 9.11 Page 2 of the HA-2107 specifications gives maximum ratings and certain
electrical characteristics.
356 The operational amplifier

Table 9.1 A Comparison of the Closed-Loop Gain for Three Inverting Op Amps
with Various Ri and Rj if R^ = 10 kl2 '

VoIVs

Ideal Example HA-2107

Ri = oo Ri = 50 kl2 Ri = 1.5 M12
Ro = Ro = 100 12 Ro = 100 12
Bi % A = 00 A = 10^ A = 5 X 10^

lOkfi lOkfi -1 -0.999776 -0.999959

10kl2 100 kl2 -10 -9.98687 -9.99776
10kl2 1M12 -100 -98.793 -99.79503
10kl2 10M12 -1000 -891.82 - 980.051

lkl2 1 kl2 -1 -0.999776 -0.999956

lkl2 100 kl2 -100 -98.9694 -99.796
lkl2 10M12 -104 - 4925.4 -8318.38

the largestamount when the closed-loop gain is greatest. Still larger values
of A
and Ri for the HA-2107 op amp cause the error to be even less.
The values in Table 9.2 are presented to compare the real HA-2107 and
an ideal op amp in an inverting amplifier using a smaller load resistance
Rl = 2 kl2. "Typical" values of R, = 4 MQ and A = 160,000 are used.
With Ro assumed to be 100 Q, the real and ideal gains differ by less
than 1 % even at the highest closed-loop gain. The righthand column
,

Table 9.2 A Comparison of VglVg Values for an Inverting Amplifier

Using an Ideal Op Amp and the HA-2107 Op Amp; R^ = 2 kl2 and
Ri = 10 kl2

Vo/Vs

HA-2107
Ideal Ri= 4 M12
Ri = 00 A = 160,000
Ro =
«/ A = 00 Ro = 100 12 Ro = IkQ

10kl2 -1 -0.999987 -0.999980

100 kl2 -10 -9.99928 -9.99896
1M12 -100 -99.934 -99.905
10M12 1000 -993.458 -990.679
9.6 The real inverting amplifier 357

indicates slightly more error when the assumed value of Ro is increased to

1 IcQ.

In summary, Tables 9.1 and 9.2 show that for a typical set of values in
an inverting amplifier, the ideal op- amp assumption is really quite good.
In fact, the error, as compared to the ideal case, could easily be less than
the calibration error; it certainly could be cancelled by a slight adjustment
of the feedback resistor jRy.

D9.8 If theHA-2107 op amp is operated at 100° C ambient temperature,

find the maximum permissible power dissipation if the unit is encapsu-
lated in (a) a TO-99 package, (b) a TO-91 package.

Amwers. 330; 255 mW

The real inverting amplifier

In order to calculate the accurate values of closed-loop gain that appear in

the tables above, it is necessary to make an exact analysis of the complete

inverting- amplifier circuit. Figure 9.12a shows such an amplifier with a

load resistor R^ that must be included in the analysis if R^, is not zero. The
op amp is replaced with its equivalent circuit containing Ri, Rg, and the
dependent voltage source in Fig. 9.12b. We could now write three mesh
equations and then solve for Vg/Vg, but we can also save ourselves some
work by transforming both voltage sources into current sources, as shown
in Fig. 9.12c. Only two nodal equations are required with this approach.
At the Vi node, we equate the sum of the currents leaving the node to
zero:

-\- —^ + —^ + — — =
ill
1 ^1
ill Ri Rf

or

M^^i-i)-^"(-i) = ^^(-ir^ ^''^

At the output node.

Vo - Vi
^ AVj ^ ^o ^ ^o ^ Q
Rf Ro Ro Ri

and

(22)
''^T;--w)^4-k'-t^Ti:^''
358 The operational amplifier

^1

«.|^ ^Q «,^, A^ ^„

(fl) (^)

(C)

Fig. 9.12 (a) The inverting amplifier, including load H^ (b) The op amp is replaced
.

by an equivalent circuit that includes Ri and Rq . (a) The two voltage sources are re-
placed by current sources.

We can solve Eq. (22) for i?,, substitute into Eq. (21), and then solve for
the gain Vo/Vg. Or we can simply use Cramer's rule and determinants to
find Vq/Vs directly. Either way, the result is

^1
(23)

1 +
(-I^^IX-t^f)
R.
A -
R.

When the result is written in this form, it is apparent that the closed-loop

gain Vq/Vs is equal to - Rf/Ri in the limit as A becomes infinite, regardless

 .

9.6 The realinverting amplifier 359

oi the values oi Ri,Ro,SLndRi (we exclude Ri = 0, R^ = oo,andHz^ = as

choices that lead obviously to zero closed-loop gain)
If we set Ro = 0, then Vo Iv^ is not a function of the load resistance Ri^ As .

the ratio RqIRl increases, the closed-loop gain decreases and becomes
more dependent on the open-loop gain.
While we are obtaining exact expressions for the inverting amplifier of
Fig. 9.12a, we should also find its input and output impedance. The input
impedance, here the resistance Hin, is seen to the right of the source v^ in
Fig. 9.12a or h. It must be given by the ratio of v^ to the current in Ri :

t^c R^
{v, - Vi)IRi 1 - (vM)

We use Eqs. (22) and (23) first to find

Rl(i + 1^ + Ro.
Vi _ Ri \ Rj R
V.
^1 + «L +
Ri
Mfi
Ri / \
+ ^+M_^
Rf Rl I ^f
+ ^

We then obtain

\
1 + A Rl
+ 4lVi
Rj/y
+R^
Rf
+ 1A + a-
Rl/
^^
Rj^
R. = R

Ri / \ Rf Rl / Rj

(24)

As A becomes large, Ri^ approaches Ri, the value we obtained with our
initial approximate analysis.
The procedure for finding the output impedance requires us to set
Vs = and replace R^ with a 1-A current source, as shown in Fig. 9. 13. At
the left node.

Vi Vi

Rl Ri Rf
or
~

1 1 \ / 1
^ "
4ri Ri Rj) """{Rf,
At the right,

v„ - Vi

Rj ^ t ^ ^:
360 The operational amplifier

^1 A

Fig. 9.13 The output resistance of the inverting amplifier is Kout = t^^/l = v^

Thus
1 1
Vi + Vr zr- + ^r- = 1
R^

Solving for v^ , we find that

R|l+^
Hi
+ ARi
"out — (25)
1.^
Ri ^ Ri
1 +
^^
R.
^A-^^
H.

Note that Hout "^ as H^ -^ 0, regardless of the value of A, and also that
i^out
-^ as A - 00, regardless of the value of R^ .

For an inverting amplifier with Ri = 10 kQ, Hy = 100 kQ, Ri = 50 kfl,

Ro = 100 fi, Hi^ = 10 kfi, and A = 10^ (all given in the second line of
Table 9.1), we find that v^lVg = - 9.98687, as given in the table, and also
that Hin = 10.01011 kfl and Rout = 0.12983 Q. Thus, R^^ = Ri and l?out
= 0.

D9.9 An inverting amplifier is constructed with Ri = 20 kfl, Rf = 200

kfi, Rl = 5kQ,A = 5000, R^ = 25 kfi, and R, = 500 0. Find (a) u^/t;,, (b)

^in, (c) Rout-

Answers. - 9.96; 9.86 kfi; 1.893 fi

9.7 The real voltage follower

The voltage follower was shown in Fig. 9.6 and discussed briefly at
first
that time. We found that
has a very high input impedance so that it does
it

not load the circuit that drives it, a very low output impedance so that it
appears as a nearly ideal voltage source to the circuit following it, and a
gain of unity. For these reasons, we also called it a buffer or an isolation
amplifier.
9. 7 The real voltage follower 361

Let us now consider a voltage follower with an external load resistance

Ri that is not infinite and a feedback resistor Rf that need not be zero. The
circuit shown in Fig. 9. 14fl. A nonzero Rj is sometimes desirable for bal-
is

ancing the effects of the input biasing currents, a point we consider in the
next section. In Fig. 9.14Z? the op amp is replaced by its equivalent circuit
containing Ri, R^, and the dependent voltage source Avi Any resistance .

Rg in series with the source Vg is usually much smaller than Ri and is there-
fore neglected.
Our object is to analyze this circuit and obtain accurate expressions for
the voltage gain Vo/Vg, the input resistance fijn seen by Vs, and the
Thevenin output resistance Rout presented to Ri^ Having the complete ex- .

pressions, we may then consider the effects of certain conditions, such as

Rj = 0, Ro'= 0, and so forth.
We write two mesh equations in terms of the mesh currents ii and i^ :

-V, + Riii + RAi + R,{ii - ij - A{-Riii) =

or

(Ri + Hy + R, + ARi)U - RJ, = V, (26)

and

A{-Riii) -H R,{i, - ii) + R^io =

or

-{AR, + R,)i, + {R, + RL)i, = (27)

If we solve Eq. (27) for i, and then eliminate i^ in Eq. (26), we have
.
^ VsJARj + Rq)
' (H, + Ry + R, + AR,){R, + Rl) - Ro{AR, + HJ

Fig. 9.14 (a) A voltage follower may include Rf ^ and i^^ :^ oo. (b) The op amp is

replaced by its equivalent circuit.

R,^v.

(a) (b)
 . ,

362 The operational amplifier

Since v„ = H/,«o, the gain becomes

Vo , RLiARi + Ro)
V, (Ri + Rf + Ro + ARi){R„ + fif,) - R„{ARi + R„)
(28)

Dividing numerator and denominator by Ri{ARi + R^), we obtain a

somewhat neater expression:

= ^'"^
ll
i^fi^^V^^^'-^
Rl/\Ro + ARi
Note that VolVg -^ I sls A ^ oo.
Let us apply this result to two examples. In each, we shall let R^ = 2 kQ
and Rj = 10 kfi. The first represents a fairly poor op amp with A = 10^, fi,
= 100 kfi, andR^ = 1 kQ. Using Eq. (29), wefindu^/u, = 0.99984, which
is unity on almost anyone's voltmeter. For the second example, we use

some data for the HA-2107 op amp: A = 160,000, H, = 4 Mfi, and R^

= 100 Q. We now obtain VglVg = 0.9999934, even closer to our mythical
ideal.
The input resistance is given by

^in - —r-
H
This is readily obtained from Eqs. (26) and (27) by solving the latter for i^
substituting this result into the former, and finding

^ {Rj ^ Rf -^ Rq -^ AR,){R, + fij - RpjAR, + flj

Ro + Rl

(30)

This may be rearranged to give the slightly simpler result:

R,, = {AR, + R^)--^-— + R, + Rj (31)

As either A or R, becomes infinite, so does Rjn

For the first of our examples, we find Hjn = 667 MQ, while the HA-2107
op amp gives fljn = 609,500 MQ, both essentially open circuits compared
to almost anything.
We now consider the output resistance. Figure 9.15 shows the follower
with Vs = and Ri replaced by a 1-A current source. Around the left

mesh,

Riii + RfU + Ro{ii + 1) - A(-fl,f,) =

9. 7 The real voltage follower 363

A/W

Fig. 9.15 The output resistance of the voltage follower of Fig. 9.14a is i^out = ^o^^
= Vn-

or

(Ri + Rj + R, ¥ ARi)ii = -Ho

so that

-R.
it
= (32)
Ri(A + 1) + Hy + Ro

Now, i?out is the effective resistance offered to the 1-A source, and

i^out = -^ = 1^0= -ii{Ri + Rf)

Using ii from Eq. (32), we have

^ fio(fii + i^y)
°"* (33)
R,(A + 1) + Ry + H,

or

RAl + ^ Ri
"out ~
A + 1 + Afi,
+ ^«
R,
(34)

We note that Rout -* asA -> oo orH^ - 0. As JR^ - oo, R^^, - RJ(A + 1).
For the example with A = 10^, we find Rout = 0.110 fi; the HA-2107 op
amp gives an even smaller value, Hout = 0.00063 12.
We therefore may conclude that R^^, is indeed very large, Rout is negligi-
bly small, and the gain is unity for the voltage follower.
364 The operational amplifier

D9.10 A voltage follower uses Hy = 20 kQ, R^ = I kQ, and an op amp

with Ri = 50 kfi, A = 1000, Sindli^ = 2 kQ. Calculate (a) u^/t;,, (b) R^^,
(c)Hout.

Answers. 0.996; 16.74 Mfi; 2.80 Q

9.8 Offset and drift

In this section we shall consider some of those characteristics of an opera-

tional amplifier that cause it to be less than ideal. look first at discrep- We
ancies in the dc behavior, saving frequency response, transient response,
and stability for the following chapter.
The op amp almost never used in an open-loop situation because the
is

open-loop gain A is so large that a very small input signal will produce an
output that is saturated and no longer a function of the input. This is
shown as a plot of output voltage Vq versus input voltage Vi = Vi - f 2 in
Fig. 9.16a for a certain op amp saturating at u^ = ± 13 V whenever the
input exceeds 0.13 mV
in magnitude. The open-loop gain is given by the
negative of the slope of the line passing through the origin; here, A
= 13/(0.13 X 10-3) = 100,000. This op amp only amplifies when the
input voltage is in the range 1?^ < 0.13 mV. The value at which v^
1 |

saturates depends on the supply voltage and is typically 1 or 2 V less than

the supply voltage. Here, the supply is probably ± 15 V.
A real operational- amplifier open-loop transfer curve seldom passes
through the origin; Fig. 9.16b is more typical. Note that zero output oc-
curs when Vi = 0.7 mV. We define the input offset voltage V^s as that
value of Vi required to cause Vo to equal zero. For the particular op amp
illustrated in Fig. 9.16^, V,, = 0.7 mV. If A = 100,000, then amplifica-
tion occurs only when Vi lies in the range 0.7 - 0.13 < Vi < 0.7 0.13 -I-

mV, or 0.57 < Vi < 0.83 mV. As the curve shows, when Uf = Oort)i = V2,
the output is saturated. Although this sketch applies to a particular unit

Fig. 9.16 (a) The output voltage of an op amp saturates when the magnitude of the
input is too large, (b) This op amp has an input offset voltage of +0.7 mV.

V. (V)

13

7 V: (mV)

13--

(fl) (b)
9.8 Offset and drift 365

forwhich V^s > 0, negative values are equally likely. Data on the HA-
2107 op amp indicate a typical value for V^s of 0.7 mV, and a maxi-
| \

mum value of 2 mV
at 25° C; over the complete temperature range, the
maximum value increases to 3 mV.
It is obvious that some provisions must be made to cancel the effects of
the input offset voltage. That is, we need to have Vq = when i;^ = 0.
Most op amps have two terminals marked "balance" or "offset null" to
which a simple external circuit may be connected to set Vq = when the
inputs are tied together. For example, the second page of data on the Ana-
log Devices AD547, given in Appendix A, includes the pin configuration
shown in Fig. 9.17. The ends of a 10-kQ potentiometer are connected to
the "offset null" pins, Nos. 1 and 5, and the movable arm is connected to
the negative supply voltage at pin No. 4.
There are no provisions for nulling the output on the HA-2107 op amp,
and suitable circuitry must be provided at the input terminals. One
method of doing this is illustrated in Fig. 9.18. Here, the input is balanced
by applying an adjustable voltage to the inverting input through a resis-
tance R^. This is a high resistance in order to avoid affecting the ratio
Rf/Ri The two ends
. of the potentiometer are connected to the positive
and negative supply voltages. A similar circuit may be used for a nonin-
verting amplifier.
The offset voltage may change with temperature, with time, and with a
changingsupply voltage. Thus an adjustment setting t;^ = Owhenui = V2
may not be valid as conditions change. The drift of the input offset voltage
or the input offset voltage drift with temperature is often given in the data

Fig. 9.17 Many op amps have two terminals at which a simple external circuit may
be connected to set Uo = when ui = V2.

PIN CONFIGURATION

NONINVERTING
INPUT

TOP VIEW
366 The operational amplifier

«/
AAA ,„,

"*

+ ^v.
-Ws D ^^
=-
Ry
^1
l^ +

Fig. 9.18 The effect of the input offset voltage may be nullified by providing an ad-
justable voltage at one input.

sheets as a temperature coefficient. For the HA-2107 op amp, the typical

value is 3 /xV/°C; a maximum
value of 15 /xV/°C is listed in Fig. 9.11.
These are reasonably low values. Op amps that do not list a temperature
coefficient will usually have values that are larger. Special units may be
obtained with temperature coefficients as low as 0.1 /xV/°C.
Now let us look at the bias currents. We define the input bias current as
the average of the dc bias currents required at the two inputs. This is given
for the HA-2107 op amp in Fig. 9. 11 as 30 nA typical and 75 nA maximum
at 25° C. Over the complete temperature range, the maximum value in-
creases to 100 nA. Data are also provided for the input offset current, the
difference in the two bias currents necessary to produce zero output volt-
age. Figure 9.11 gives a typical value of 1.5 nA at 25°C. The input offset
current drift is given as a temperature coefficient, here 0.02 nA/°C below
25°C and 0.01 nA/°C above 25°C.
Even if the offset current is zero, the bias currents at the two inputs may
produce a nonzero input voltage if they flow through unequal resistances
in the external circuit. For example. Fig. 9.19 shows a circuit in which all
signal sources have been set equal to zero (superposition) At balance, Vo .

= 0, and the output is effectively grounded. Thus, Ibi flows through Ri

and Hy in parallel, while 752 flows through R2 If we have zero input offset
.

current, or I^i = Ib2^ ^^^^ri equal voltages will be produced at the two
inputs if

R2 = RiWRf (35)

This condition minimizes the unbalancing effect of the input bias cur-
rents. Smaller dc voltages are also produced by the bias currents if the
resistor Values are kept as small as is consistent with input impedance
requirements.
In order to put some of these concepts on a more quantitative basis, let
us consider Fig. 9.20, in which we account for an offset voltage V^s and
9.8 Offset and drift 367

/\AAr

Fig. 9.19 The voltage imbalance caused by the bias currents may be minimized by
setting ^2 = Rl\\Rf-

bias currents Igi 1^2 by sources external to an ideal op amp. No signal

and
sources are shown, and the output is due entirely to V^s hi ^^^ h2 , ? •

There are no restrictions on the value of R2 at this time. We shall use

superposition, considering the effect of the sources one at a time.
First, we set Ibi and 752 equal to zero. Since the op amp is ideal, Vi = Vi
- t)2 = 0. Also, there is no input current and therefore t)2 = 0. Thus the
circuit may be drawn as Fig. 9.21. Also, the same current, Vov^i^i + Rf),

Fig. 9.20 The effects of an input offset voltage v^g and input bias currents I^i and Ig2
are provided by three ideal sources.

VW

R
368 The operational amplifier

(Ri+Rf )
J^ A A
»

^ij /^

\>^ VoV

i i
Fig. 9.21 With/fii = 7^2 = 0, the output voltage is u^y = -V^siRi + Rf)IRi

flows through both Ri and R^, and therefore we may sum voltages around
the input mesh:

VoV
Vos + Ri + =
Ri + Rf
and

^1 + Rf
VoV =
T/
Vc (36)
^
Next, we set V^s and
equal to zero. It is then helpful to replace the
7^2
parallel jRi with its Thevenin equivalent, as shown
combination of Ibi and
in Fig. 9.22. Once again, t)2 = and therefore R2 may be ignored. We
now see an inverting amplifier, and

«oi = --^{-RJbi) = RflBl (37)

Fig. 9.22 If Vo, = and Igz = 0, then <j„i

= Rflgi
9.8 Offset and drift 369

we set V^s = and Ibi = 0, replace the parallel combination of

Finally,
J^2and Ib2 by its Thevenin equivalent, and obtain the circuit shown in Fig.
9.23. This is a noninverting amplifier, so we have

=
R^ -\- R
Vo2 '^(-R2Ib2) (38)
^1

Combining these three results gives

Ri + Rf
(39)
Ri

Let us use this result first to check a conclusion we reached earlier. We

consider only the effects of Ibi ^^^ ^b2 If ^os • = and Ibi = ^b2 = ^b ->
then

^0 = h «/ - -|^ («i + Rf)

To obtain zero output, we must have

"<-'- {Ri + Rf)

or

fio = = «.««' (40)

ifrV
as we found before.
Now let us see what Eq. (39) implies for an HA- 2 107 op amp with a
maximum V^J |
of 3 mV and a maximum input offset current Ibi ~ h2 |
1

Fig. 9.23 Letting V^, = and Ibi = 0, we find Vo2 = [{Ri + Rf)IRi]{- R2Ib2)'
370 The operational amplifier

of 20 nA. We shall select circuit values of Ri = 100 kQ, i?y = 1 MQ, and R2
= Ri\\Rj = 90.9 kQ. From Eq. (39),

or

Vo = -IIV,. + 1000(/5i - Ib2)

We thus see that V^s may contribute an output voltage w^ith a magnitude
of 33 mV, w^hile the offset current can give a magnitude of 20 mV. Al-
though these voltages might subtract, Murphy's law^ says they'll probably
add. Smaller resistance values w^ill reduce the 20-mV component.

D9.11 Use data sheets for the LM308 operational amplifier in Appendix
A to determine (a) the typical value of V^s at 25°C;the maximum value (b)
of Vos at 25°C; (c) the maximum
value of V^, for 0°C to 70°C; (d) the
maximum offset bias current at any temperature, (e) If Ri = 300 kO, Rf
= 2700 kQ, and R2 = Ri Rf, w^hat is the maximum possible value of Vq at
\\

any temperature that might be caused by offset voltage and current?

Answers. 2 mV; 7.5 mV; 10 mV; 1.5 nA; 104 mV

Problems
1. The inverting operational amplifier of Fig. 9.3a has jRi = 5 kQ, R^
= 40 kfi, Ri = 00, i?^ = 0, and A = 10,000. If V, = IV rms, deter-
mine the signal powder that is (a) dissipated in jRj (b) dissipated in Rj, ,

(c) supplied by V^, (d) supplied by the op amp.

2. Element values in the inverting amplifier of Fig. 9.3fl are Ri = 10 kl2
andHy = 100 kQ. The op amp is ideal, (a) Calculate i;^/!;,. (b) A40-kQ

resistor is now^ connected from the inverting input to ground. Find

Vol Vs.
3. (a) If the op 9.24 is ideal, calculate io/^s- (b) If Hj =
amp in Fig. ^,Ro
= 0, A = 1000, Ri = 10 kfi, and Rf = 100 kfi, find i^/i,.
4. Let Ri = 00 and Ro = for the op amp of Fig. 9.25. Find Volv^ if A
= 00.

5. Element values in the noninverting amplifier circuit of Fig. 9.5 are Ri

= 4.7 kfi and fiy = 47 kQ. Let u, = 1 V and A = 1000, and determine
{a)Vo, ih)Vi, (c)t;2, (d)i;i, (e)fi.
6. Let the voltage follower of Fig. 9.6 have Ri = 00, Ro = 0, and A
= 10^. Determine VolVg if a 10-kQ resistor is placed (a) in series with
Vg, (b) in parallel with Vg, (c) from the inverting input to ground, (d)
 .

Problems 371

wv

Fig. 9.24 See Problem 3.

from output to ground, (e) between output and inverting input (in
place of the short circuit)
7. Find VolVg, Ri^, and Rout for the network shown in Fig. 9.26 if both op
amps are considered to be ideal.
8. Find Vo/Vg for the circuit shown in Fig. 9.27 if the op amp is ideal and
Switch S is (a) closed, (b) open.
9. Ifthe op amp in Fig. 9.28 is ideal, express t;^ as a function of the four
input voltages.
10. (a) Find Vo Iv^ in terms of Ri R^ H^ and Rq for the circuit shown in
, , ,

Fig. 9.29. Assume the op amp is ideal, (b) If fii is set equal to 100 kl2 in
a standard inverting amplifier to obtain a high value for Hjn, what

Fig. 9.25 See Problem 4.

lOOkn
VNvV
372 The operational amplifier

30 m

Fig. 9.26 See Problem 7.

value would a single feedback resistor fiy have to be in order that Vq/Vs
= - 50? (c) Now select values for H^ R^ and Re none greater than
, , ,

100 IcQ, to achieve Vo/Vg = - 50 for the network shown.

11 The differential amplifier shown in Fig. 9.9 has Ri = 3.2 kQ, fiyi
= 80 kQ, jR2 = 1 kQ, and Rf2 = 25 kQ. Assume the op amp is ideal, let
Vsi = 0.2 V, and (a) sketch Vo vs. Vs2, (b) find Rjni. (c) find Rin2-

12. A differential amplifier includes an op amp for which we may assume

Ri = and R^ = 0. (a) What relationship must exist between Hj,
CO

JRyi , and Rj2 to give Vo =

i?2 , with Vsi = f ^2 1^ the open-loop gain of
the op amp is A? (b) Find t;^ as a function of Vsi and Vs2 if i^i = R2
= 10 kfi, i^yi = 100 kQ, A = 1000, and Vo = when t;,i = t?,2.
13. A differential amplifier similar to that shown in Fig. 9.9 gives 1;^ =
whent;,! = u,2.If^i = 10 kfl, fl^i = 50 kQ, /?2 = 4 kfi, t;,i = 2V, i;,2

Fig. 9.27 See Problem 8.

Problems 373

120kn
VsAr

Fig. 9.28 See Problem 9.

= 3 V, and the op amp is ideal, find the current magnitude in each of

the four resistors.
14. Refer to the performance curves in the data sheets for the HA-2107 op
amp in Appendix A for the supply voltage of Vs = ± 15 V at 25° C
and use the current-limiting graph to prepare a curve of output cur-
rent swing as a function of load resistance Ri .

15. Use data on the LM308 op amp in Appendix A to determine (a) Aj^jn ^^
25°C, (b) A^in for 0° < T < 70°C, (c) Atypical at 25°C, (d) the factor
by which A increases at 25°C as the supply voltage goes from ± 5 V to
±18V.

Fig. 9.29 See Problem 10.

374 The operational amplifier

MAr

Fig. 9.30 See Problem 18.

16. The inverting amplifier of Fig. 9.12a has Hj = 10 kfi, Hy 200 kQ,
Rl = 5 kQ, Ri = 100 kfi, and A = 10^. Calculate t;,/t;,, R andRout
if R, equals (a) 100 fi, (b) 2000 Q.
17. An op amp with Ri = 200 kfi and Rq = 1 kQ is used in an inverting
amplifier with fii = 5kfi,Hy = lOOkfi, andHz. = 2.5 kfi. What value

of A is (a) v^/Vs = - 19.9; (b)

required to give 5.1 kQ; (c) Hout R^^ =
= IQ?
18. The op amp of Fig. 9.30 is an ancient vacuum-tube contraption hav-
ing Ri = 200 kfi, A = 100, and R^ = 500 fi. Find v^/v, if R2 equals (a)
0, (b) 20 kfi.

19. A voltage follower (Fig. 9.14a) operates with Rj = 20 kQ and Rl = 4

kQ. If Ri = 50 kQ and Ro = 1 kQ, what range of values for the open-

loop gain will ensure (a) 0.999 < Vo/v, < 1? (b) R^^, > 100 MQ?
20. Find Vo for the follower shown in Fig. 9.31 if (a) the op amp is ideal.
Repeat if i^^ = 1 kQ, A = 1000, and Ri equals (b) 00, (c) 100 kQ.

Fig. 9.31 See Problem 20.

VW-
 .

Problems 375

Fig. 9.32 See Problem 21.

21 If H, =• ex, H^ = 500 Q, and A = 10^ for the op amp in Fig. 9.32, find
Vo in terms of igA and i^g

22. The circuit of Fig. 9.19 contains Ri = 20 kQ and Rj = 180 kl2. (a)

What is the optimum value for op amp is an LM308, what

jR2^ If the
is the maximum output voltage magnitude that might occur because
of (b) only voltage offset? (c) only bias current offset? (d) both?
23. The AD547J op amp, for which data may be found in Appendix A, is

advertised as an "ultra low drift" unit. If this op amp

used in a cir- is

cuit for which Ri = 30 kfi and Rf = 120 kQ, (a) what should be the
value of ^2? What is the maximum output voltage magnitude that
might occur because of (b) voltage offset alone? (c) bias current offset
alone? (d) both? (e) What change might occur in Vo if the temperature
increased 50 °C?
 1

Applications of operational
amplifiers

In this chapter we shall continue our study of operational amplifiers by

looking at several useful circuits built around the op amp. The first several
are said to be dc applications, such as voltage reference supplies, or bridge
amplifiers. We
then conclude our investigation by looking at op- amp be-
havior with frequency and for signals that may change rapidly with time.

10.1 Reference voltage sources

Many measurement and instrumentation problems require the establish-
ment of a fixed voltage reference with an accuracy of a fraction of a per-
cent, particularly in making precision measurements. The precision voltage
source is cell, designed to provide a reference voltage with
often a standard
an accuracy one part in a million under strict laboratory condi-
as high as
tions where the temperature is maintained constant and the current
through the cell is essentially zero. Even a lower quality standard cell can
take hours to recover when an ordinary voltmeter is used to check its termi-
nal voltage. The current drawn by the meter causes the cell voltage to
change, and it is necessary to isolate the cell from the voltage measurement.
One circuit that accomplishes this is shown in Fig. 10.1. The voltage
follower has an input resistance ranging from 10^ or 10^^ for bipolar
input circuits to 10^^ fi for MOSFETs. This circuit also has a gain very

close to unity and an output resistance that can be less than a milliohm.
The circuit can easily supply currents of 1 mA or more to a load. As an
example, Eqs. (29), (31), and (34) of Chapter 9 can be used to show that a
circuit using an op amp for which /?, = 4 MQ, A = 10^, and Ro = 100 Q
will enable a 1-V standard cell to supply a voltage only 12 /xV less than 1 V
and a current only 12 nA less than 1 mA to a 1-kQ load. Since /?,„ = 3.64
X 10^^ ft, the current through the cell is Hmited to 1 V divided by fljn, or
2.75 pA, plus the necessary bias current, usually 50 to 100 nA for bipolar
transistors. Thus the cell current is essentially equal to the bias current.
Note also that the output voltage is independent of R^^ if i^out = 0. For this
example, Rout = 1 n^^-

376
10.1 Reference voltage sources 377

Fig. 10.1 A voltage follower may be used to isolate a standard cell from the load Rj^
and yet provide Vl = ^ref within a small fraction of a percent.

Figure 10.2 shows another circuit used as a voltage reference. This non-
inverting operational amplifier provides an output voltage,

Vo = .^]
RJ ref (1)

We see that R^or Ri could be a variable resistance or a decade resistance

box to make possible a range of output voltages. Again, the cell current is
essentially the input bias current, say 100 nA for bipolar inputs and negli-
FET input
gible for circuits.
A more common source of reference voltage is the Zener diode de-
scribed in Chapter This is a reliable and inexpensive device that finds
1 .

wide use. In the simple circuit shown in Fig. 10.3a, the voltage supply V^
and resistance R^ are selected to place the Zener diode at an operating
point safely in the breakdown section of its characteristic. The current /^ is
given closely by

V. - ViBR
Iv =
H.

Fig. 10.2 A voltage- reference circuit using a noninverting amplifier provides an out-
put voltage V^ = Vref(i + RffRl)'
 .

378 Applications of operational amplifiers

v=-v BR/?,

{a) (b)

(c)

Fig. 10.3 Three voltage- reference circuits using Zener diodes, (a) The sign of V^ is

reversed with respect to Vbr •

(^) No sign reversal occurs, (c) Once the Zener conducts,
its supply voltage is Vq rather than Vg

since little current is drawn through Ri and R^. The current / is

- - V,
/ = Vbr
Ri
and therefore

fi,
V„ = - -^ Vbr (2)

Note the reversal of polarity between Vbr and V^ This circuit may supply .

Vo to a wide range of loads at currents ranging from zero to the maximum

permissible output current for the op amp.
Figure 10. 3^? provides an output voltage with the same sign as Vbr?

Rf
V„= (1 +;r^)Vbr (3)
 ,

10.2 Voltage detectors and comparators 379

In either of these circuits, changes in Vs cause a shift in the operating

point of the diode, and therefore a sHght change in Vbr This is minimized
•

in the circuit of Fig. 10.3c. Here, Vs, R2, R3, and the diode Dl put the
Zener diode into breakdown initially, thus establishing a value of V^ given
by Eq. (3). The resistor Rsis now
used to drive the Zener diode from the
output Vo' If K is greater than the start-up value,
slightly
Vs ^3/(^2 + R3), then Dl becomes reverse-biased, the Zener diode is
driven from a more constant source, and its operating point is thus more
fixed.

DlO.l In Fig. 10.1 let Ri = 1 Mfi, H^ = 1 kl2, V^ef = 15 V, A = 1000,

and Rl =.750 12. Calculate (a) R^^i, (b) Hout, (c) V^.
Answers. 430 Mfi; 0.999 Q; 1.4965 V

D10.2 Element values for the circuit of Fig. 10.3fo are Rs = 2 kQ, Ri
= 10 kfi, and Rj = 40 kfi. Assume an ideal op amp. If the Zener diode has
a dynamic resistance Rz = 100 Q and it is modeled by Vbr = 6 + 100 /z,
find V, if Vs equals (a) 10 V, (b) 12 V, (c) 10 V, but Vbr = 6 + 10/z, (d)
12 V with Vbr = 6 + lO/z-

Answers. 30.95; 31.43; 30.10; 30.15 V

10.2 Voltage detectors and comparators

There are many applications for a device that can sense whether an input
voltage signal is larger or smaller than a specific reference voltage and

then provide an output voltage that essentially says yes or no. The input
voltage is an analog signal, in that it is the analog of some continuously
varying function, such as the signal provided by a thermocouple or a mi-
crophone. The output voltage has only two states, and is a digital signal.
We therefore are considering an analog-to-digital device.
A simple circuit that accomplishes this operation is the comparator,
shown in Fig. 10.4. There is no feedback around the op amp and the large
open-loop gain A causes the output to be at ± Vj^t whenever the input
voltage magnitude is greater than a fraction of a millivolt. If we neglect
the small input voltage range for which the output is not saturated (shown
in Fig. 9.16) and connect the signal to the inverting input and the refer-
ence voltage to the noninverting input, then Vo = - V^^t when Vs > V^gf
and Vo = Vsat when Vg < V^gf The signal and reference voltage sources
.

could be interchanged so that t)o = + V^^t for t;^ > V^ef if desired. The
reference voltage is often obtained with a Zener diode.
Note that several of our rules of thumb for an op amp do not hold for a
comparator. In particular, the input voltage Vi is not necessarily small.
380 Applications of operational amplifiers

ia)

Fig. 10.4 The comparator gives an output v^ Vsat when v^ > V^f ; Vo = + Vsat
when Us < Vref-

and the input current may switch suddenly from near zero to an input bias
current of 50 to 100 nA, and vice versa.
A different type of comparator is shown in Fig. 10.5. If we apply the
superposition theorem to this circuit and neglect any input current, then
the input voltage is

""' ^^
Vi = t;, ^ V.e, (4)
Rl + ^2 Rl + ^2
When Vi is positive, Vo = - Vjat , and when Vi is negative, f^ = + V^^^. . The
threshold voltage ^threshold is that value of the signal voltage Vg that causes
Vi to equal 0. From Eq. (4), it is

Rl
threshold
= -V,ref (5)

This circuit allows us to scale the reference voltage by changing Ri or R2.

Note also that the input impedance is now determined by these two resistors.

A scaled voltage comparator for which u^ = - Vjat when Vg >

Fig. 10.5 Vthreshold»
andUo = + VsatWhenu^ < Vthreshold; ^threshold = -'^ref(^l/-R2)-
10.3 Differential amplifiers 381

Fig. 10.6 This scaled comparator bottom clamps at u^ = 0. With Vg < Vthreshold^ ^o
= -»-^sat; ^OtVs > Vthreshold* ^o = 0; ^threshold = " ^ref (^l/^2)-

As an example, if we let Ri = 10 kQ, R2 = 100 kfi, V^ef = - 20 V, and

Vsat = ± 10 V, then Vo =
- 10 V when t;, > 2 V, and Vo = + 10 V for v,
< 2V.
Figure 10.6 is similar to Fig. 10.5 except that an ideal diode is connected
between the output and the inverting input. When Vg < V^hreshoid? ^o
= + Vsat? the diode is reverse-biased, and the circuit behaves exactly like
that of Fig. 10.5. When t;^ = Vthreshoid? the output heads toward - V^^l^; in
doing so, however, the diode becomes forward-biased, since Vi = 0. With
the diode forward-biased, Vo = Vi = 0, and we see that the output cannot
go negative. We say that it is clamped to zero with the ideal diode. Not
only does the forward-biased diode serve to connect the output to the in-
put {Vo = Vi = 0),we also have the equivalent of a typical negative feed-
back network with Ry = 0. Hence there is no gain.

D10.3 Letfii = 0.1Mfi,H2 = IMfi, V,ef = - 15 V, and V^at = ±12V

for the circuit of Fig. 10.5. Find v^ if t;, equals (a) 1 V, (b) 2 V, (c) - 1 V.

Answers. 12; - 12; 12 V

D10.4 In Fig. 10.6, leti^i = 0.1 Mfi, R2 = 1 MQ, V^ef = 15 V, and K^t
= ± 12 V. The diode is reversed. Find Vo if v^ equals (a) - 2 V, (b) V,
(c) 2 V.

Answers. 0; - 12; - 12 V

10.3 Differential amplifiers

We took a preliminary look at the differential amplifier in Section 9.4,

and we now consider some of its imperfections and their consequences.
382 Applications of operational amplifiers

The basic circuit is repeated as Fig. 10.7. We concluded before that

{Vs2 - Vsi) (6)
^1 R9
when the resistor ratios were chosen such that R,iji/Ri = Rf2lR2' Under
these conditions there should be no output when Vsi = Vs2 , regardless of
the magnitude of these two voltages (assuming they fall within the limits
imposed by the specifications). In practice, however, we have seen that
there generally an output voltage when t;i
is t?2 0, and that the input = =
offset voltage is the input voltage magnitude required to obtain u^ = 0.
Let us now define several new terms that deal with this same problem for
the differential amplifier. We call the average of i;i and V2 the common-
mode signal UcM •

t^CM = V2(i;i + 1^2) (7)

For the special case where t;i = V2,

t>CM = ui = t?2

There should be no output for such an input, but all practical amplifiers
have some small lack of symmetry in their transistors and resistors, not to
mention the presence of nonlinearities, and we find that Vqm does generate
an output Vo(CM) The ratio of the common-mode output to the common-
•

mode input is called the common-mode gain:

^o(CM)
CM - (8)
t^CM
For a good op amp, it is a very small number, although it may be greater
than unity. Note that this result implies that when uj = t;2 = 1 mV, there
will be an output, say Vo = 2 mV if Aqm = 2. Moreover, if i^i = V2 is
increased to 3 mV, the output increases to 6 mV.

Fig. 10.7 The differential amplifier. Both vi and V2 are referenced to ground.
10.3 Differential amplifiers 383

apparent in all our previous discussion of op amps that the input Vi

It is
= Vi V2, the output Vo and the open-loop gain A are really differential-
- ,

mode concepts. It is customary to define the ratio of the differential-mode

gain to the common-mode gain as the common-mode rejection ratio
CMRR:

CMRR = (9)
CM
This is often given in dB:

CMRRdB = 201og|A/AcMl (10)

For example, page 2 of the HA-2107 data sheets (Fig. 9.11) gives typical
and minimum values for the CMRRdB at any temperature as 96 and 80 dB
respectively. The typical value of 96 dB should be associated w^ith the typi-
cal value for A of 160,000. Therefore

160,000 ^ 160,000
^CM - - = 2.54
1096/20 63096
To see the effect of the common-mode signal, let us express the output in
terms of the differential input Vi - V2 and the common-mode input
(vi + V2)I2. Each input is subject to a different gain, so we have

AcM(t^i + V2)
Vo = A{V2 - Vi) ± (11)

Since |A/AcmI = CMRR, we may write

A(vi + V2)
A{V2 - Vi) ±
2 (CMRR)

or

1 V2 + Vi
Vo = A{V2 - Vi) 1 ± (12)
2 (CMRR) V2 - vi

As CMRR - 00, the output approaches the desired value, A{v2 - Vi). As
an example of the errors involved, let us consider several simple examples.
We first let t;i = - 1 mV, t;2 = lmV,A = 1000, and CMRR = 100. Thus
1
Vo = 1000(1 + l)(10-3) 1 ± 2V
2 X 100 1 + 1

This is the correct output, and there is no error. We now obtain the same

difference input with a nonzero common-mode signal: t;i = 9 mV and V2

= 11 mV. Thus, if we use the + sign,

1 11 + 9
Vo = 1000(11 - 9) (10 -3) 1 + 2.1V
2 X 100 11-9
384 Applications of operational amplifiers

and we see a 5 % error. If the CMRR increases to 1000, the error decreases
to 0.5%. Of course, percentage errors can be misleading. If Vi = v^
= lmV,withA = lOOO-andCMRR = 100, then Acm = A/CMRR = 10.
Equation (11) then gives

Vo = 1000(1 - l)(10-3) ± 10(1 + l)(10-3)/2 = ±10mV

whereas the correct output is zero. This would be an infinite percentage
error if we cared to calculate it.

DIG. 5A differential amplifier has a differential gain of 86 dB and a

CMRRdB of 95 dB. Find the magnitude of the differential-mode output
t)o(DM) and the common-mode output i?o(cm) i^ (a) ^i = l-^ M^, i;2 = 2 /iV;
(b) t;i = - 1.6 p.V, 1^2 = 2 /iV; (c) t;i = 10.6 pN V2 = 11 />tV. ,

Answers. 7981, 0.639; 71,800, 0.071; 7981, 3.83 /xV

10.4 Bridge amplifiers

The most common application of the dc-coupled differential amplifier is

in amplifying the output of a transducer bridge, in which one of the four

resistive elements in the bridge is a transducer such as a strain gauge in
which R changes with elongation, or a thermistor in which R changes
with temperature. In either of these applications there is a large common-
mode signal, and the small difference signal must be detected in its pres-
ence. A typical strain gauge may provide a maximum differential output
of 25 mV for a common-mode voltage of 5 V.
Figure 10.8 shows a bridge circuit containing a differential amplifier
and three equal resistors of R ohms, as well as one resistor R + Ai? where
AR is proportional to the strain or elongation in the case of a strain gauge,
or to temperature in the case of a thermistor in a temperature bridge. The

Fig. 10.8 A differential amplifier is used as a bridge amplifier.

 '

10.4 Bridge amplifiers 385

value of R is usually several hundred ohms, whereas the differential am-

plifier inputs have much higher input impedances, Ri for the inverting
and ^2 + ^/2 for the noninverting input. If we assume that the currents in
Ri and R2 are negligible in comparison with the bridge currents, then
voltage division leads to

R Vs "*

«.. = Vs
^ + R 2

and
R
Vs. = Vs
^ + {R + AR)

Therefore

- = Vs
R r 1
^s2 Vsi
_2R + AR 2_
= 1^^ Ll + iAR/2R)
- 1

We now let

'= R (13

and therefore

1 1 + (6/2)
Vs2 - = Vs
V,i
J 1 + (6/2) 1 + (6/2)

or

^s2 ^^^ - " T ^M + (6/2)

We may take the differential amplifier gain as K:

V, R/2.
K (14)
Vs2 - Vsi R.

and then

1 lr^, ^
(15)

If 6 <?: 1, we may use the simpler but approximate result

v„ = -ikKV,5 (16)

Under these conditions the op-amp output is a linear function of the

change of resistance and thus of the change in elongation or temperature.
If larger fractional changes are involved, Eq. (15) must be used.
 6

386 Applications of operational amplifiers

Another circuit that is sometimes useful is the half-bridge amplifier

shown in Fig. 10.9. Only one fixed resistor R is used with the transducer
R + AH, and the voltage supply uses both ± Vs The half-bridge output is .

connected directly to the inverting terminal of the op amp, while the non-
inverting input is grounded. Since Vi = 0, the half-bridge output is effec-
tively grounded and it is the current i that reflects the change in resistance.
The current i is obtained by adding the currents flowing through R and R
+ AR:
V. 1
t = 1 -
R R + AH R 1 + 6

Thus
V.
t = (17)
H VI + 6

where d is again AR/R. If 6 <^ 1, then Eq. (17) simplifies to

t = —
This current also flows through Rj , and therefore

Vo = -iRf
since Vi = 0. We can now express Vo in terms of the fractional change in
resistance:

(18)

Again we have an output that is approximately a linear function of d.

Fig. 10.9 A half-bridge current amplifier has an output

Rf AR
R R ^

R+AR
10.4 Bridge amplifiers 387

Compared with the full-bridge circuit and differential amplifier, this

circuit has advantages and disadvantages. One advantage is that the volt-
age Vs applied to the half bridge is not limited by the common-mode volt-
age limit of the op amp, since the half-bridge output is at ground poten-
tial. Larger supply voltages lead to larger signals and increased sensitivity.

Thus smaller changes in resistance can be detected. The major disadvan-

tage of the half-bridge circuit is that any variations or noise in the supply
voltage cannot be differentiated from the desired signal. In the full-bridge
circuit, these noise signals are just a common-mode
signal for which the
differential amplifier should have goodThus the half-bridge
rejection.
circuit must be carefully constructed to reduce noise and power supply
ripple. All wiring should be kept short and it should be well shielded.
As a last example of bridge amplifiers, let us consider the wide deviation
bridge shown in Fig. 10.10. We shall show that this circuit provides an
output that a linear function of d even when 8 is large.
is

The is similar to a differential amplifier itself, with the trans-

circuit
ducer replacing one of the feedback resistors. Again we assume that Vi =
and the amplifier draws no input current. We
therefore have Vi = V2, and
we obtain V2 by voltage division:
Rj
V2 = V, = Vi
Ri + Rf
The voltage across the upper jRi is Vs ~ t?i, so that

Rf V,
I =
R Ri + Rf/ Ri -H Rf

Fig. 10.10 The output of a wide deviation bridge

R
Vo= - Vsd
Ri + Rf
is a linear function of 6, even for large 8.

«/l +6)
—^A^^-
1' 'J
388 Applications of operational amplifiers

The voltage across the transducer is Vi - Vo = iRf{l + 5), and we may

solve for Vq :

or

VsR}8

This an exact expression, assuming an ideal op amp, and not an approxi-

is

mate result, as Eqs. (16) and (18) were. Thus the op- amp output is a linear
function of the change in resistance, even for large changes. This is useful
for strain gauges incorporating semiconductor elements that have high
sensitivity, and for thermistors.
It is necessary that the two Ri resistors be well matched, and also that
the resistance of the transducer be exactly Rj when the bridge is balanced.

D10.6 Element values in Fig. 10.8 are Hi = 25 kfi, = 250 kQ, Hg

= 10 kO, Rj2 = 100 kQ, R = 250 Q, and Vs = 10 V. Find v^ if AR/R
%
equals (a) 10 -3, (b)10-2, (c) 10 -i.

Answers. -25.0mV; - 249 mV; -2.38 V

10.5 Frequency dependence of open-loop gain

Many pages ago in Chapters 7 and 8 we looked at the frequency response
of single-stageand multistage amplifiers. In the process we learned how to
calculate or estimate upper and lower half-power frequencies. We also
discovered the significance of corner frequencies in establishing the fre-
quency behavior. Now we shall recall some of those results as we investi-
gate the frequency response of an op amp. Only the high-frequency per-
formance is necessary, for these amplifiers are dc-coupled, and o)i = 0.
An op amp contains several stages, usually two or three; for bipolar
transistors these usually consist of common-emitter and emitter-follower
circuits, although an occasional common-base stage is found in a cascode
arrangement. Some of these stages are connected as differential amplifi-
ers, having two inputs, the inverting and noninverting. For example, the
input stage for the HA-2107 op amp is a common-collector-common-base
differential amplifier. The common-collector stage provides a large fijn.
Each stage has a different high-frequency response, contributing several
corner or break frequencies to the gain function. The corner frequencies of
greatest interest appear as factors in the denominator (poles), although
numerator factors (zeros) also appear, usually with break frequencies well
above the frequency range of interest.
10.5 Frequency dependence of open-loop gain 389

Each one of the poles starts a decrease of 20 dB per decade in the magni-
tude of the open-loop gain, and each zero causes an increase of 20 dB per
decade. If the pole and zero frequencies were all well separated, it would
be possible to see these slopes and changes in slope, and to identify all the
corner frequencies from a plot of |A(;cj)|dB vs. co. Often, however, the
poles are close enough together that they interact, and a curve of open-
loop gain vs. obtained that is similar to one of those appearing
frequency is

in Fig. 10.11. Curve {a) apparently has all its poles at frequencies greater
than 10^ rad/s. At the frequency for which A ^b = 0, or the magnitude of |
|

the open-loop gain is unity, the slope of the curve is approaching - 60 dB

per decade in this case.
Curve {h)\n Fig. 10.11 has one pole at a much lower frequency, about
100 rad/s. At this frequency the amplitude begins to decrease at 20 dB per
decade, staying at a fairly constant slope up to about 10^ rad/s. At dB the
slope isapparently between - 40 and - 60 dB per decade.
The corner at 100 rad/s is, of course, a surprising characteristic of the
/itg/i-frequency response, and it is not typical of any CE stage that we have
looked at before, even one with a severe Miller effect. This pole is actually
introduced internally into the op amp, usually by artificially increasing C^^
in a high-gain common-emitter stage. We shall see in the following two
sections that most op amps have a tendency to oscillate unless certain spe-
cific preventive measures are taken. One such method is to introduce a
low-frequency pole in the open-loop gain. This pole is either provided ex-
ternally by the user or internally by the manufacturer. The process of pre-
venting oscillations by the addition of capacitance is called compensation.
Curve 10.11 is for an uncompensated op amp, and we can be
(a) in Fig.
sure that have to have capacitance added externally to secure an
it will
open-loop gain curve with a much lower upper half-power frequency, al-
though not necessarily as low as 100 rad/s. Curve (b) applies to an

Fig. 10.11 Open-loop gain \A\^ is plotted in decibels against co on a logarithmic

frequency scale for a typical (a) uncompensated op amp; (b) internally compensated

op amp.

120

100 N\ (a)

\ \
5 lope of
-60 dB/dec
80
\ ; 1

(b)
\
60

40 \ \ \

20
—— — 0_dB
--^
^^ CO (rad/s)
-20
(log)
1 10 100 10^ 10^ 10^ 10^ 10^ II
390 Applications of operational amplifiers

internally compensated op amp. Of the three op amps whose data sheets

appear in Appendix A (LM308, HA-2107, and AD547), two are internally
compensated and one requires compensation to be provided externally.
We shall see in the next section that a much wider mid-frequency re-
gion, a much greater upper half-power frequency, and a much greater
bandwidth can be obtained for the closed-loop gain after negative feed-
back is applied around the amplifier.
The open-loop phase characteristic must also be considered whenever
feedback is to be applied and the involuntary construction of an oscillator
becomes possible. We recall from Chapter 7 that each pole, or corner fre-
quency in the denominator of the gain function, introduces a factor of the
form [1 /(co/coj)], where coj is the frequency of the pole. As a; proceeds
-I-

from zero to infinity, the phase angle thus decreases 90°. A zero contrib-
utes a total phase angle increase of 90°.
A typical op amp shows a phase angle change of - 270° from very low
to very high frequencies; the open-loop phase curves for the two op amps
of Fig. 10.11 are shown in Fig. 10.12. Curve (a) of Fig. 10.12 applies to
the uncompensated amplifier, and Curve (b) is for the internally compen-
sated unit. Note that the angle scale frequency scale
is linear, although the
remains logarithmic. Also, the angle is that of the open-loop gain A, and
180° must be added to it (or subtracted from it, take your choice) when
the signal is applied to the inverting input.

D10.7 A and answer the following questions: (a)

Refer to Appendix
Which amps described must be compensated externally?
of the three op
(b) What isfn for the HA-2107? (c) At what frequency is A jb = for the | |

AD547?
Answers. LM308; 8 Hz; 0.9 MHz (curves) or 1 MHz (specs)

Fig. 10.12 The open-loop phase angle of A is plotted against co on a logarithmic fre-

quency scale for the (a) uncompensated and (b) internally compensated amplifier of
Fig. 10.11.

Loi'A

I 10 100 103 10^ 10= 10^ 10^ 108

n°

\ N (log)

-90°
V \(a)

ib7
N \
loU V V

V^
\ ^^ >

270°
10.6 Closed-loop frequency response 391

10.6 Closed-loop frequency response

In Section 10.5 we discussed the open-loop frequency response of an oper-
ational amplifier and showed that it reflected the presence of several RC
networks within the op amp and the corner frequencies they produced.
These RC combinations cause the output to fall, in the limit, at a rate of
20, 40, or 60 dB per decade, or perhaps at an even greater rate. This sec-
tion deals with the closed-loop frequency response.
Most operational amplifiers are used in circuits that provide some nega-
tive feedback around the amplifier. In contrast, most oscillators depend
on positive feedback to establish and maintain the oscillations. The dis-
tinction between negative and positive feedback, however, becomes a lit-
tle fuzzy as frequency increases and phase shift is present between the in-
put and output of the operational amplifier, or sometimes in the feedback
path between output and input. Thus a 180° phase shift in the op amp at
some frequency can turn negative feedback into positive feedback, and an
inverting operational amplifier into an oscillator.
Other values of phase shift in the open-loop gain of the op amp are also
possible, of course. For example, let us assume a basic inverting amplifier
with the usual resistance Rj between the output and the inverting input.
Fig. 10.13. We assume ideal conditions in that H^ = oo and R^ = 0, but
we let A = A I
I
^
The voltage gain V^ I V^ is then the ratio of two sinusoi-
.

dal steady-state signal quantities.

At first glance, we might feel that there must be 0° phase shift through a
resistive feedback path. However, would cause a paradox when we
this
closed the loop. That is, there certainly is a phase shift + 180° (180° </>

since V^ = - AVj) between V^ and V^ through the op amp. With jRy in

place, a part of V^ is returned to the input and this must produce the same
Vi we started with. Thus a phase shift of - - 180° must occur some-
</>

where in the circuit. The answer, of course, is that the signal fed back
combines with V^ to produce Vj and the addition or subtraction of two
,

Fig. 10.13 A basic inverting amplifier for which A = Vq/Vi = |

A |/0. The currents
and voltages are sinusoidal steady-state quantities.
392 Applications of operational amplifiers

phasors with different amplitudes and different phase angles can produce
a wide range of resultant phasor amplitudes and angles.
In Chapter 9 we obtained Eq. (3) for the inverting amplifier,

Vo -Rf/Ri
1 + {RfIR,
^ ^

We now write it in terms of sinusoidal steady-state quantities,

V^ ^ -RflRi
(20)
V,
+ .1 +
(«//fli)
1
A\i±

Let us now consider a simple example in which the open-loop gain A

has a phase shift of -90°. Specifically, we take A = 10 /- 90° , a very
small gain magnitude for an op amp, but one that enables us to see the
effects of the phase shift more easily, li Ri = 10 ktt, i^y = 50 kQ, and V^
= 1/0^" V, then Eq. (20) gives

'
1 +
10/- 90°

and

Note the required 90° phase shift and magnitude ratio of 10 between out-
put and input. If A had a larger magnitude, say A = 10^ /- 90° then we ,

should obtain V^ = -4.999 999 /- 0.0344° V, very close to the ideal

value, -5/0° V.
One additional informative result from the example above (where A
= 10 /- 90° ) is the value of the current / in both R and the feedback resis-
j

tor fiy. It is

/ = Xl^ = X.^ =
Rf Ri
' - Of 9f^°
10,000
= 86.2/- 25.3°
^
^ M
We note that this current is not in phase with either V^ V, or V^ even , , ,

though there are apparently no circuit elements external to the op amp

that can cause a phase shift. The phase shift is once again seen to result
from the addition and subtraction of out-of-phase quantities.
 ,

10.6 Closed-loop frequency response 393

Let us now inspect the frequency behavior of the closed-loop gain for an
inverting amplifier. We use Eq. (20). At low or mid-frequencies where
I
A I is we have V^/V^ = -Rf/Ri. This is the value of the closed-
large,
loop gain at dc, and we now let G represent the closed-loop gain Vq/Vs, so
that

Gldc = -RflRi = - Go
where Gq is the magnitude of the closed-loop gain at dc when A is large.
Equation (20) therefore becomes

G =
^%^ (21)

A
The open-loop gain A a complicated function of co, since it might con-
is

tain as many as six poles and several zeros. In order to make our point as
simply as possible, let us consider an op amp that is internally compen-
sated like that shown as Curve (b) in Fig. 10.11. There is one dominant
pole at a relatively low frequency, and the remaining poles (and zeros) are
at muchhigher frequencies. We thus approximate A by using only the
lowest corner frequency coi

where Aq is the value of A at dc. If we let x = w/a)i , we have

A = .r^^^
1 + jx

This may be used for A in Eq. (21):

G = -Go
(1 + Go)(l + jx)
^ ^

We now multiply throughout by Aq and separate the real and imaginary

parts of the denominator:

GoAo
G =
(1 + Go + Ao) + (1 + Go)ix
The upper half-power frequency occurs when the real and imaginary
parts of the denominator are equal. Then,

= -^ = ^ + ^0 + ^0
JC
^0)1 1 + Go
394 Applications of operational amplifiers

or

1 + Ge + A(
0)H = COi (22)
1 + Go

This is the accurate result for our assumed form of A, but a simpler ap-
proximate form is obtained by keeping only the largest terms of the nu-
merator and denominator:

. Ao
(23)

The magic number is the ratio of open-loop to closed-loop gain, Aq/Gq.

This is the factor by which negative feedback has reduced the gain. Now
we see that it is by which negative feedback has increased
also the factor
o)h ' We have a result similar to that we obtained several times in Chapters
7 and 8: The gain-bandwidth product tends to remain constant.
This result stands out clearly when we plot curves of gain vs. frequency.
Figure 10. 14 shows open-loop gain \A\^ and closed-loop gain G ^b vs. co |
|

for the internally compensated op amp of Fig. 10. 11 We see an open-loop .

gain at dc Ao(dB) = 120dB,Ao = 10^, and an upper half-power frequency

^H{A) = 100 rad/s. Negative feedback is then added with Rj/Ri = 200.
Thus the closed-loop gain magnitude at low frequencies is Gq = 200,
Go(dB) = 46 dB; the new upper half-power frequency is co//(G)
= (Ao/Go)coh(a) = (10^/200)100 = 5 x 10 ^ rad/s. If Gq is made smaller,
^HiG) becomes correspondingly larger.

DIG. 8 The open-loop gain of an inverting operational amplifier is A

= 100/[1 + / (co/10)], Ri = 00, and Ro = 0. Let Rj/Ri = 5 and find \A\
and G if CO equals (a) 0, (b) 10, (c) 200 rad/s.
I
I

Answers. 100, 4.72; 70.7, 4.71; 4.99, 3.12

Fig. 10.14 The open-loop gain-bandwidth product, 10^ x 100, is equal to the
closed-loop gain-bandwidth product, 200 (5 x 10^).

cj (rad/s)
^'°^^
10 100 10^ lO"* lO"^ 10^ 10^ 10^
10.7 Stability and compensation 395

10.7 Stability and compensation

The possibility of oscillations occurring negative feedback is ap- when
plied to an operational amplifier has been mentioned several times be-
fore. The condition under which oscillations arise is termed instability,
while stability is the desirable situation for an inverting amplifier or a
voltage follower.
There are numerous analysis techniques by which the stability of a cir-
cuit can be investigated. We shall not go into details on any of them be-
cause a thorough study requires more writing for the authors and more
reading for the students than is really required for a happy and productive
life. Instead, let us just outline several methods so that we shall know what

to look for in a later course in system theory, automatic control, or feed-

back theory. The third technique we look at is easy to apply, and we shall
use it as a predictor of instability.
One method uses plots of gain magnitude and angle vs. frequency. The
gain, however, is neither the open-loop nor the closed-loop gain, but a
quantity called the loop gain. For most practical op amp circuits, the loop
gain is closely equal to the ratio of the open-loop to the closed-loop gain.
In decibels it would be the difference, A ^b - G dB Thus, for the in- |
| I |
•

verting amplifier discussed in Fig. 10.14, the open-loop gain at low fre-
quencies is 120 dB, the closed-loop gain is 46 dB, and the loop gain is 74
dB. The phase angle of the loop gain is the difference of the phase angles of
A and G. In a study of feedback, the loop gain T is found by writing the
closed-loop gain in the form

^ "^
(24)
1 - T
At low frequencies for an inverting amplifier, G is real and negative, A is
real and positive, and the loop gain T is real and negative.
Instability threatens as the denominator of Eq. (24) approaches zero.
This is investigated by preparing plots of T| and vs. co and paying par- | ^
ticular attention to the point at which /T = 0°. Here the magnitude of T
should be safely less than unity, or TJdB < 0. For example, if T| = 2
| |

when /T = 0°, then an oscillatory unstable condition would be reached

when the amplifier was turned on and T passed through unity in its ini-
|
\

tial increase from zero.

A second technique for investigating stability also requires use of the
loop gain T. Here we visualize a phasor diagram of the complex phasor T
for every value of oj from to oo. The actual plot made is only of the locus
of the tip of T for < CO < 00. The conjugate plot for - oo < co < is then
added to the sketch, and instability is indicated if the locus encircles the
point 1 -I- /O. The locus is known as a Nyquist plot and the stability condi-
tion is called the Nyquist criterion.
 -

396 Applications of operational amplifiers

We shall use a simpler approximate technique that does not involve the
loop gain T. It requires only a plot of open-loop gain magnitude | A I^b vs.
CO and a knowledge of^the low-frequency closed-loop gain magnitude
|Go|dB- Figure 10.15 shows two sketches of the open-loop gain vs. fre-
quency, one for an uncompensated op amp and one for a compensated
unit. The value of Gq |dB is indicated. Stability is indicated by the differ-
|

ence in slope of the horizontal line marked Gq as arid the open-loop gain |
|

curve at their intersection. A difference in slope of more than 40 dB per

decade predicts an unstable system, while a slope difference less than 40
dB per decade indicates a stable system. For added safety from oscillation,
the 40-dB-per-decade number should be reduced to 34 dB per decade. As
the slope difference approaches 40 dB per decade, it is found that the
closed-loop gain begins to show a peak in the gain vs. frequency character-
istic in the neighborhood of the frequency at which the intersection oc-
curs. A small peak may be helpful in increasing the bandwidth by a few
percent, but a large peak produces distortion in pulses and other rapidly
changing waveforms.
We note from Fig. 10.15 that the compensated op amp gives a stable
system, while the uncompensated amplifier is unstable. Both open-loop
gain curves decrease at 60 dB per decade for sufficiently high frequencies,
and the reason for compensation is now evident. It is necessary to intro-
duce a low-frequency corner frequency so that the gain drops at a 20 dB
per decade rate up to the intersection at A.
A few moments of serious thought should also show us that the instabil-
ity problem is severest for a voltage follower where Gq dB = 0. As a mat- |
|

ter of fact, if the Gq dB curve in Fig. 10. 15 were lowered to

|
|
dB, it looks
like it would intersect the compensated amplifier curve at a point where
the difference in slope is approximately 60 dB per decade; hence instabil-
ity would result. In that case, it would become necessary to reduce the

Fig.10.15 At the intersection marked A, the difference in slopes is less than 40 dB per
decade and the system is stable. At B, the difference is greater than 40 dB per decade
and the amplifier is unstable.

MIdBl

120-
Uncompensated
-20dB/dec
100 -
\^
80- ^\
Compensated ^n<^
.-20dB/dec\
\
60- \^ \
40 J
Isolde ^^^\ V— V

20-
J-
^^ -60dB/dec

-70 " OJ (lo

10.8 Differentiators and integrators 397

frequency of the lowest- frequency pole by using a larger capacitor for

compensation. Internally compensated op amps are available that are
guaranteed to be stable only down to a specified minimum closed-loop
gain, usually 5 or 10 (14 or 20 dB) They are not intended for use as voltage
.

followers unless additional external compensation is added.

An op amp such as the LM308 that requires external compensation of-
ten gives specifications for two different values of added capacitance. For
example, the performance curves for the LM308 on the third page of those
data sheets in Appendix A show the addition of a capacitance Cf between
Pins 1 and 8. If Cy = 3 pF, fn = 20 Hz; if Cy = 30 pF, then/n = 1 Hz.
The curves also show that the slope is greater than 20 db per decade at
dB when Cy = 3 pF. Instability might therefore result if the unit is used as
a voltage follower.
The procedure of compensating an operational amplifier by adding ca-
pacitance and shifting one pole to a very low frequency is called dominant-
pole compensation. Other methods are also used, such as lag compensa-
tion, lead compensation, and pole-zero compensation. Each requires
more elements and a more careful selection of element values than does
the dominant-pole method. Each also provides a better high-frequency
response for the open-loop gain.

DIG. 9 For the LM308 op amp with a compensating capacitance Cy

= 3pF, (a)find|A|dBand/Aat/ = 1 MHz. (b) At what/is |A |dB = 0?
(c) At what/ is /A = 180°?

Answers. 14 dB, 140°; 3 MHz; 3 MHz

10.8 Differentiators and integrators

Specific applications of the op amps that we have investigated include

summers, subtractors, comparators, and buffers, not to mention inverting
and noninverting amplifiers. In this section we shall look at differentiators
and integrators, two circuits that have important applications in analog
computers, wave-shaping circuits, and instrumentation systems. Other
important circuits that we shall not have time to consider are clamps, trig-
gers, oscillators, rectifiers, voltage regulators, and logarithmic amplifiers
and multipliers.
Both the differentiator and the integrator represent more traditional
uses for an operational amplifier —
performing the mathematical opera-
tions of differentiation and integration. Their circuits are obtained by
generalizing the basic inverting amplifier circuit. Consider the differenti-
ator shown in Fig. 10.16. Here the resistor Ri is replaced by a capacitor
Ci Let us assume an op amp with R. = oo, H^ = 0, and open-loop gain A.
.
398 Applications of operational amplifiers

There is no input current to the op amp, so

and

-Avi or v.= -^t;„

EHminating t;, , we have

dvs dvp 1 /v
+ C -^ """
dt .(1) dt R,\A
or

1
"-^^- (25)
«'^'(i)^
Now let us simplify the right side of Eq. (25) by assuming that \A\ 1. »
We can therefore discard VqIA, since it is much smaller than Vo in magni-
tude. We next assume that A | |
is sufficiently large so that

n
RfCA-
dv,
«: V, (26)
dt

This produces the desired result:

(27)

We should investigate the validity of the inequality marked Eq. (26).

One way to do this is to assume that all the voltages (and currents) are
sinusoids. If u^ = V^ sin wf, then dvoldt = o:V^ cos o:t, and the maximum
amplitudes are V^ and wV^ respectively. Our inequality is now
i^yCicoV, « \A\V^

Fig. 10.16 The basic op amp differentiator for which v^ = ~ RfCi dvoldt.

VW 1

'("
1
,

' ' +

p j 1
 ,

10.8 Differentiators and integrators 399

or

\A\ » RyCiw (28)

Ifwe are using large element values, such as Ry = 1 Mfi and Cj = 1 /xF,
with \A\ = 10^, then we should probably limit the highest-frequency
component of our signal to 10^ rad/s, an audio frequency.
The differentiator may also be analyzed by treating it as an inverting
amplifier operating in the sinusoidal steady state. Let us resurrect Eq. (3)
from Chapter 9,

^= ZM^ (H, = co,R, = 0)

A
which applies when R^ = oo and R^ = 0. We now extend this result to the
sinusoidal steady state by taking v^ and v^ as the phasors Vq and V^ and ,

replacing Rf and Hj by the impedances Zy and Zj

A
It follows that the open-loop gain A and the closed-loop gain G are both

complex functions of frequency.

For our differentiator, Zy = R^ and Zi = l/(/a;Ci). Therefore Zy/Zi
= jo)CiRf and

-joiCiRj
(30)
^ 1 + jo^C.R^
^

Let us first apply Eq. (30) to the region in which |

A |
:$> 1. Thus

G = -|^ = -/coCii^y (31)

We might have inferred this result from Eq. (27), since differentiation in
the time domain is equivalent to multiplication by
/cj in the frequency do-
main.
Equation (31) indicates one of the troubles that may arise using differ-
entiators in practice. The gain magnitude is proportional to frequency.
Therefore relatively small high-frequency noise components, such as tele-
vision snow or hi-fi hiss, may represent objectionably large components of
the output. Under severe conditions, they might even mask the output
completely.
400 Applications of operational amplifiers

120

100
/ l-4ldB

l<^l dB
1

80

60

40
NX
y
V \

20

\^ cj (rad/s)
(log)
1 10 100 10' 10" 1
35 1 06 10^

Tig.10.17 A dB (solid line) and G ^b (dashed

I
I
|
|
line) are shown for a differentiator
having RjCi = 1 and a;// = 10 for A.

Another problem that can arise with a differentiator may be illustrated

by an example. Let us take Ri = 00, R^ = 0, RjCi = 1, and an internally
compensated op amp with an upper half-power frequency cj// = 10 and a
low-frequency (dc) gain of 10 ^ A = 10^/(1 + /O.lco). Using Eq. (30), the
closed-loop gain is

]0) -/lO^cj
G =
105 +
1 + /o; (1 + /co)(l -H /O.lco)
1 +
105/(1 + /O.lco)

or

-/lO^co
G = (32)
(100,001 - 0.1co2) -h /l.lco

We now use this equation to find G | |

or |
G | ^b at various values of co. The
results are plotted in Fig. 10. 17. The solid curve shows A as vs. co, with a |
|

corner at co = 10 and a slope of - 20 dB per decade at higher frequencies.

The dashed curve gives |G|dB vs. co. When \A\ :§> 1, we see the linear
increase with co, predicted by Eq. (31). Of course, the plot is |G|dB vs.
log CO, but this is also a straight line having a slope of 20 dB per decade. -I-

As \A\ or |A|dB begin to decrease with frequency, Eq. (31) ceases to be

valid and we must use results obtained from Eq. (32) above.
Two characteristics of this dashed curve should be noted. First, for
sufficiently large co (here co »
10^), \G\ = \A\. This occurs because
the inequality of Eq. (28) is no longer satisfied. Treating this expression as
an equality, then, we would expect the two curves to merge somewhere
beyond co = \A\/{RjCi). In this case, RfC^ = 1 and |A| =
10.8 Differentiators and integrators 401

lO^/Vl + 0.01cj2, which leads to

10^
0)
VI + 0.01a;2

for which the solution is co = 1000. The curves appear to join around o)
= 3000 rad/s.
The second important characteristic is the large peak that occurs at o)
= 1000. Not only does this accentuate any desired signals or undesired
noise in this frequency range, it also is a warning that instability lurks
nearby.
There are several methods by which the differentiator circuit may be
modified to improve its stability. One such improvement is shown in Fig.
10.18a. A resistor Ri has been added in series with Ci so that when A | |
is

large,

V, Zi Ri + (IZ/coCi) 1 + /coCiHi

At low frequencies where o) <$: l/CiRi,

G = -/coCji^y (co «: 1/CiRi)

This circuit gives the same closed-loop gain as does our original differenti-
ator. At high frequencies with co ::$> l/i^jCi,

--If (co :$> l/CiRi)

which is a constant value. Thus the curve of | G|dB vs. co appears as the
dashed line in Fig. 10.18Z?, drawn for R^C^ = 1, KiCj = 0.01, and A

Fig. 10.18 (a) The addition of Ri to the basic differentiator circuit ensures a stable
circuit, (b) Differentiation occurs only for co < 100 rad/s, where the slope of |
G | jJb vs.
a; is 20 dB per decade.

MIdB Ci = l

IGldB
^^1 Ci =0.01
,\A\ dB A = 10^/(1 +
100

80 X
60 \G\ \
40
dB

\ \
20
/ \
1
/

10 100 103 10^ 10^ 10^ 10^

\ CO (rad/s)

^^°^^

(a) (h)
402 Applications of operational amplifiers

= 10^/(1 +
There is no longer any peak or possibility of instabil-
/O-lcj).
ity. and a slope of + 20 dB per decade are found only
Differentiator action
up to about 100 rad/s, however. For large cj, G I^b = 1^ IdB- |

Figure 10. 19a shows a second stable differentiator circuit with Hy paral-
leled by Cy. At low frequencies (w <K lIRfCj), this circuit behaves like the
basic differentiator of Fig. 10.16, since Cy has little effect. At high fre-
quencies, Cy causes a reduction in Zy and the closed-loop gain. The net
result is a curve of G jb that shows a good range for satisfactory differen-
|
|

tiation and no instabilities. The curves in Fig. lO.lOZ? are drawn for RfCj
= 0.001, i^yCi = 1, and A = 10^/(1 + /O.lco).
It is possible to design a differentiator with all four external elements,

jRi Ci Ry, and Cf, and to obtain a response curve for the closed-loop gain
, ,

that is a combination of those appearing in Figs. 10.18Z? and lO.lQfc.

The last circuit that we shall study is the integrator, shown in Fig.
10.20. In terms of instantaneous voltages and currents for an op amp with
Ri = oo and Ro = 0, we have
1 f^ 1 r* 1
Vi - Vo = -7:r \ idt = -— \
-—{Vs - Vi)dt
UyJ_oo ^yJ-ca-ttl

Looking at the left member of this equation, we now neglect f, in compar-

ison with Vo Also, in the integrand on the right, we neglect
. Vi as being
much smaller than Vs With these approximations. .

1
dt (33)
RiCi
Note that the output is the negative integral of the input voltage. If the
range of integration is from ^o to t, then an initial voltage Vo(to) must be

Fig. 10.19 (a) A

capacitor Cf in parallel with the feedback resistor Rj results in a
stable differentiator, (b) The open- and closed-loop gains are shown for RfCi = 1,

RfCf = 0.001, and A = 10^/(1 + /O.lw).

I I I

l^ldB
120
R^Cf = 0.00\
\A\,
100 A = 10^/(1 +/0.1a;)

80

60 -\G\,

40
^
20
_^ CO (rad/s)
^'"^^^
I 10 100 10-' 10** 10^ 10^ 10^

ia) ib)
10.8 Differentiators and integrators 403

Fig. 10,20 For this op-amp integrator,

1
Vn = v,dt
RjC,

for sufficiently large \A\.

added to the integral. This may also be done in practice by using addi-
tional circuit elements to discharge Cy and then to charge it to the desired
value.
We can obtain additional information from the sinusoidal steady state.
Starting with Eq. (29),

V. -Z//Zi
<=-Te 1 +
1 + (Zj/Z,)

weletZi = HjandZy = l/(/coCy), so that Zy/Zi = l/{jo)CfRi), Then

-l/(;ajC/Ri) -1
G = (34)
1 + -; JOiCfRi + — -^

Now we must satisfy the condition,

|A| » |1 + /coCyRil (35)

in order to have
-1
G =
jo)CfRi

or

1
G =
(x) CjRi
Since integration in the timedomain corresponds to division by ;co in the
frequency domain, we again see an integration if A is large. Inequality | |

(35) becomes harder to satisfy as co increases.

404 Applications of operational amplifiers

Let us illustrate this by one example. We let i^^Cy = 10 ~^ and A

= 10V(1 -f /O.lco). Equation (34) becomes

1
G =
/10-4co + (1 + /10-4a;)(l + ;0.1co)10-4

or

-10
G =
- 10-5^2 +
1 /i.iOOlo;

Plots of I
A I dB and |
G
in Fig. 10.21; we see from the slope of
| ^b are shown
I
G I
accurate for frequency components from
dB that the integration is

about 10 to 10,000 rad/s. The low-frequency performance improves as the

product of CfRi and the dc open-loop gain of the op amp increases. The
high-frequency limit is extended as the upper half-power frequency and
dc gain of jthe op- amp increase.
One problem in a practical integrator is caused by the input offset volt-
age and input bias current, both of which provide a constant input signal.
When integrated, this produces an increasing output voltage magnitude
that will certainly cause errors, and may lead to saturation. The cure is
usually found by integrating over only a finite interval. That is, Cy is ini-
tially discharged, then set to a specified initial voltage if desired, and fi-
nally allowed to integrate and charge up for a period of time during which
the offset voltage and bias current cannot introduce any appreciable error.

Fig. 10.21 Open-loop gain A I^b and closed-loop gain |

\G\^ are plotted against w
for an integrator with RyCi = lO'^andA = 104/(1 + /O.loj).

CO (rad/s)

10 100 10^ 10^ 10^ 10^ 10^ ^'°s)

0.1 1
Problems 405

DIO.IO For the differentiator of Fig. 10.16, let C^ = 100 pF, Rf

= 20 kQ, and V, = 2^° V. If A = 1000/(1 + /a;), find VJ at co equals |

(a) 1 rad/s, (b) 1 krad/s, (c) 1 Mrad/s.

Answers. 3.996 /xV; 2.83 mV; 1.790 mV

DIG. 11 An integrator is constructed with Ri = 20 kQ, Cy = 100 pF, and
A = 1000/(1 + ;w). Find G if co equals (a) 1 rad/s, (b) 100 rad/s, (c) 10
krad/s.

Answers. -706 /-45.r ; -9.98 /- 89.4° ; -0.0998 /- 91.1°

Problems
1. The circuit of Fig. 10.1 contains a standard cell with Vref
= 1.01830 V. The op amp has A = 5 x 10^, H^ = 2 Mfi, and R^
= 200 fi. Find the voltage across Ri^ if Ri^ equals (a) 10 kfi, (b) 100 0.
(c) What is the voltage across the terminals of the standard cell if it

has an internal resistance of 5 12 and the bias current for the op amp is
30 nA?
2. The voltage-reference circuit of Fig. 10.3a uses an ideal op amp and a
Zener diode that may be modeled by Vbr = 15 V in series with Hz
= 10 12 and an ideal diode. If Vs = 30 V, (a) select Rs so that Iz
= 3 mA, (b) let Ri = jRy = 10 kl2 and determine V^, (c) find V^ if Vs
decreases to 20 V.
3. The circuit of Fig. 10.3c contains an ideal op amp and resistances Hi
= 5 kl2 and Hy = 8 kl2. Let Vs = 10 V and let diode Dl have a voltage
drop of 0.7 V in the forward direction. Diode Dl and the Zener diode
have negligible resistance. If Vbr = 5 V, (a) neglect R^ and select R^
and H3 so that the initial current through the Zener diode is 5 mA and
that supplied by V^ is 6 mA. (b) Select Rs so that the Zener current is 2
mA during normal operations, (c) Using these values, determine Vq.
4. Calculate V^ for the scaled voltage comparator shown in Fig. 10.22 if
the op amp saturates at ± 12 V but is otherwise ideal, and V^i equals
(a) 1 V, (b) 2 V, (c) 3 V.
5. In the comparator of Fig. 10.4, let v^ = 2 sin 10^ V and let Vref be
replaced by the sinusoidal voltage u^f = 2 sin 20^ V. Sketch Vo{t),
< t < 0.27r s, if y^at = ± 15 V.
6. A simple voltage comparator, such as that shown in Fig. 10.4, is oper-
ating with Vref = 3 V and with an op amp having R^ = 100 kl2, R^
= 1 kl2, A = 1000, and H^ = 4 kl2. Plot a curve of V^ vs. V, if V^at
= ±10V.
7. A sinusoidal voltage v^ = 2 sin 500f V is applied at the input of the
 .

406 Applications of operational amplifiers

Fig. 10.22 See Problem 4.

comparator shown in Fig. 10.4. Assume an ideal op amp with Vg^t

= ± 12 V, and plot f ^ vs. t if the reference voltage is (a) +1 V, (b)
-IV, (c)i;,/2, (d)t;,.

8. The common-mode and differential-mode inputs to a differential am-

plifier are Vqm = 200 /xV and Udm = 50 /zV respectively. Let A
= 10^ and AcM = 3. Assume Vo(cm) and ^^(dm) add. Find (a)
CMRRdB, (b) vi, (c) V2, (d) Voicu), (e) i^o(dm), (f) v^.

9. A differential amplifier has A = 5000 and a CMRRdB of 60 dB. Let Vo

= ^o(CM) + ^o(DM) = 2 V. Construct a graph of t;2 vs. t^i showing the
locus of all possible inputs that provide this output. Assume that V2
> Vi and the outputs add, and maintain |i;2| ^ 5 V.
10. A simple voltage follower, such as that shown in Fig. 9.6, uses an op
amp for which A = 1000, Ri = oo, and Ro = 0. Find v^/Vg if (a)
CMRR = 00, (b) A CM = 2 (find both possible answers).
11 The gain of the op amp used in a differential amplifier is A = 2 x 10^
and CMRRdB = 80 dB. Assume that Vo = Vo(cm) + ^o(dm) and find
t^o(DM),t;o(CM),andt;oif (a)t?i = i?2 = 10/xV, (b)i;i = -ua = 10 /zV,
(c) vi = 10 mV and V2 = 0, (d) Ui = and V2 = 10 /xV.
12. In the half-bridge amplifier shown in Fig. 10.9, R = 400 Q, Rf
= 20 kfi, and Vs = ±12 V. The op amp is ideal. Find Vo if (a) AR/R
= lO-Mh)AR/R = 10-3 and Vs = ± 12.1 V, (c) AR/fl = lO'^and
the upper voltage supply increases to 12.1 V while the lower remains
at - 12 V.
13. Values for the bridge circuit of Fig. 10.10 are fii = 200 Q, Rf
= 600 Q, and Vs = 20 V. The op amp is ideal. Find Vo if (a) 6 = 10-2,
(b) 6 = 10-2 and Vs increases to 20.1 V.

14. Find Vo for a bridge amplifier similar to that of Fig. 10.8 except that
the transducer appears as the lower right element in the bridge. As-
sume an ideal op amp.
Problems 407

15. LetRi = R2 = 10kfi,Ryi = Rf2 = 50kl],fl = 250 0, and Vs = 12 V

in the bridge amplifier of Fig. 10.8. Assume that the op amp is ideal.
Find Vsi Vs2, Vo, and the voltage across Rf2 if (a) 6 = 0, (b) 6 = 10 ~^,
,

(c)6 = -10-3.
16. The open-loop gain of an uncompensated op amp is given by A
= 105(1 + ;10-'^co)/[(l + ;10-4aj)(l + /10-5cj)(l + / 10 "6(0)2]. Plot
curves of |
A | jb and /A vs. co, 10^ < co < 10^ rad/s, using a logarithmic
frequency scale.

17. If again magnitude is|A| = (1 + co^)-!, w^hat is the slope in decibels

per decade at o; = 2? [Hint: Slope in decibels per decade equals
d\A\^/d (log 0^).]

18. A curve of A jb vs. co on a logarithmic frequency scale is represented

|
|

by asymptotes (straight lines). It is a constant 120 dB up to co

its

= 10^, w^here it begins to drop at 20 dB per decade. At co = 10^, the

slope magnitude increases to 40 dB per decade. At co = 10^, it in-
creases to 60 dB per decade, (a) At what frequency does the asymp-
totic curve pass through dB? (b) What is the true value of A ^b at co |
|

= 10^? (c) What is the gain angle at co = 10 ^P

19. An inverting amplifier is constructed with Rj = 5kl}andRy = 45kl2.
Assume an open-loop gain expression for the op amp (an inferior type
used only for problems) of A = 100/(1 + /O.lco), and let K^ be infinite
and Ro be zero, (a) Find G at a; = 10. (b) Find co// for the closed-loop
system.
20. A voltage follower (with Rf = 0) is constructed with the op amp of
Problem 19. Find (a) A for co = 10, (b) G for co = 10, (c) co^ for the
follower.
21. Anoninvertingamplifier is constructed withal = 5kQ,Rf = 45 kQ,
and the op amp of Problem 19. Find (a) A at co = 10, (b) G at co = 10,
(c) 03 H for the noninverting amplifier.

22. Sketch curves ofA jb and G jb vs. co, using a logarithmic frequency
|
|
|
|

an inverting amplifier with Ri = 10 kQ, Hy = 100 kfl, and

scale, for
an op amp modeled by A = 1000/(1 + ;0.02co),Hi = oo,andjRo = 0.
23. Assume that an op amp has an open-loop response of A
= 105/(1 + /10-3co)3 with Ri = oo and R^ = 0. (a) At what fre-
quency is A = 1? (b) At what frequency is the angle of A = - 180°?
I
I

(c) If this op amp is used in a voltage follower, at what frequency is /G

= 90°?
24. If T = -250/[(l + /co)(l + /O.Olco) 2] is the loop gain of an inverting
amplifier, (a) plot T|dB vs. co, 50 < co < 150, using a linear frequency
|

scale, (b) Using the same frequency scale, plot iJ[ vs. co. (c) By an in-
spection of these two curves, state whether the amplifier is stable or
not.
 .

40$ Applications of operational amplifiers

25. The loop gain of an inverting amplifier is given by the function T

= - 5/(1 + /O.Olw)^. (a) Plot- a Nyquist diagram for T, showing the
locus of the complex quantity T = T^^^ + /^imag^ using Treai as the
abscissa and Tj^ag as the ordinate, (b) Is the amplifier stable? (c)
What value of the constant in the numerator of T defines the border-
line between stability and instability?

26. Use the method illustrated in Fig. 10.15 to investigate the stability of
an inverting amplifier having a low-frequency gain of 20 dB and an
open-loop gain specified by the following asymptotes: 100 dB con-
stant, < CO < 100; - 20 dB per decade, 100 < w < 10^; - 60 dB per
decade, o) > 10^. What value of Gq would provide reasonable gain
and ensure stability?
27. An op amp has an open-loop gain function
10'
A =
1 + 1 +
100 105

used in an inverting amplifier with Hj = 1 kfl and Rj = 125 kQ.

It is
Plot G dB vs. CO on a logarithmic frequency scale and try to discover a
I I

peak in the response.

28. Elements used in the differentiator of Fig. 10.16 are Ci = 1 jjlF, Rj

= lMfi,A = 10"^, Ri = oo,andi?o = 0. (a) Show that the voltages i;,
= t;^ = for f < and u, = - l.OOOlf, t;, = 1 - ^-io,ooh for ^ >
equation in Eq. (25). (b) Sketch v^ and - RjCi
satisfy the differential
dvjdt on the same time axis. How accurate is the differentiation?
29. A differentiator circuit similar to Fig. 10.16 uses Cj = 100 pF, Rf
= 10 kft, and an op amp whose gain is approximated by A = 10^/
(1 + /O.Olco). If Ri = 00 and Ro = 0, (a) in what frequency range is

differentiation accurate? (b) What is the frequency of the peak differ-

entiator output?

Fig. 10.23 See Problem 33

Problems 409

1 un

^(0 ©'^4 1 uF

Fig. 10.24 See Problem 34.

30. The improved differentiator circuit of Fig. 10.19 uses passive elements
Ci = 100 pF, Rj = 10 kfi, and Cy = 100 pF. If the op amp is repre-
sented by A = 10^/(1 + /O.Olco), (a) sketch a curve of G |dB vs. oj, 10^ |

< CO < 10^. (b) Identify the range of satisfactory differentiation.

31. Element values in the integrator circuit of Fig. 10.20 are Cy = 1 nF,
Ri = 10 kl2, and A = 10V(1 + /O.Oloj) for the op amp. (a) Sketch
I
G|dB vs. CO, 1 < CO < 10"^ rad/s. (b) Specify the range over which
integration is reasonably accurate.
32. In the example for which |A|dB and |G|dB vs. co are shown in Fig.
10.21, make a single change in the conditions by letting A = 10^/
(1 + /O. Ico) and plot new curves of A jb and ^b |
|
|
G |
•

33 If both op amps in Fig. 10.23 are ideal, show that Vo and Vg are related
by

dt^
2^ dt
= V,

34. Assume an ideal op amp in the circuit of Fig. 10.24 and determine
Vo{t) as a function of Vs(t).
 Appendixes

A. Manufacturers' data sheets 413

B. Answers to odd-numbered problems 441

Manufacturers' data sheets 413

LM308 operational amplifier

general description features
The LM308 is a precision operational annplifier Maximum input bias current of 7.0 nA
featuring input currents nearly a thousand times
Offset current less than 1.0 nA
lower than industry standards like the LM709C. In

fact, its performance approaches that of high Supply current of only 300 fiA, even in satura-
tion
quality FET amplifiers. The circuit is directly
interchangeable with the LM301A in low fre- Guaranteed drift characteristics
quency and incorporates the same protec-
circuits
tive features which make its application nearly
foolproof. The low current error of the LM308 makes pos-
sible many designs that are not practical with con-
The device operates with supply voltages from ventional amplifiers. In fact, it operates from
±2V to ± 15V and has sufficient supply rejection to 10 Mn source resistances, introducing less error
use unregulated supplies. Although the circuit is than devices like the 709C with 10 kH sources.
designed to work with the standard compensation Integrators with worst case drifts less than
for the LM301A, an alternate compensation 1 mV/sec and analog time delays in excess of one
scheme can be used to make it particularly insen- hour can be made using capacitors no larger than
sitive to power supply noise and to make supply 1 /iF. The device is well suited for use with piezo-
bypass capacitors unnecessary. Power consump- electric, electrostatic or other capacitive trans-
tion is extremely low, so the amplifiers are ideally ducers, in addition to low frequency active filters
suited for battery powered applications. with small capacitor values.

schematic diagram and compensation circuits

Standard Compensation Circuit

Alternate* Frequency Compensation

typical applications

Temperature Compensated Logarithmic Converter Fast Summing Amplifier

414 Appendix A

absolute maximum ratings^

Supply Voltage ±18V
Power Dissipation (Note 1 ) 500 mW
Differential Input Current (Note 2) ±10 mA
Input Voltage (Note 3) ±15V
Output Short-Circuit Duration Indefinite
Operating Temperature Range 0°C to 70°C
Storage Temperature Range -65°C to 1 50°C
Lead Temperature (Soldering, 60 sec) 300°C

electrical characteristics (Note 4)

PARAMETER CONDITIONS MIN TYP MAX UNITS

Input Offset Voltage Ta = 25°C 2.0 7.5 mV

Input Offset Current Ta = 25°C 0.2 1 nA

Input Bias Current Ta = 25°C 1.5 7 nA

Input Resistance Ta = 25°C 10 40 Mfi

Supply Current Ta = 25°C, Vs = ±15V 0.3 0.8 mA

Large Signal Voltage Ta = 25°C, Vs = ±15V
Gain VouT = *10V, Rl> lOkii 25 300 V/mV

Input Offset Voltage 10 mV

Average Temperature
Coefficient of Input
Offset Voltage 6.0 30 pV/°C

Input Offset Current 1.5 nA

Average Temperature
Coefficient of Input
Offset Current 2.0 10 pA/°C

Input Bias Current 10 nA

Large Signal Voltage Vs = ±15V, VouT = *10V

Gain Rl> lOkii 15 V/mV

Output Voltage Swing Vs = ±15V, Rl= 10 kn ±13 ±14 V

Input Voltage Range Vs = ±15V ±14 V

Common Mode 80 100 dB

Rejection Ratio

Supply Voltage 80 96 dB
Rejection Ratio

Nott 1: The maximum junction temperature of the LM308 is 85°C. For operating at elevated temperatures, de vices in the
TO-5 package must be derated based on a thermal resistance of 150°C/W, junction to ambient, or AS^C/W, junci ton to case,

Note 2: The inputs are shunted with back-to-back diodes for overvoltage protection. Therefore, excessive current vtrill flow if a
differential input voltage in excess of IV is applied between the inputs unless some limiting resistance is used.
Note 3: For supply voltages less than ±15V, the absolute maximum input voltage is equal to the supply voltage.
Not* 4: These specifications apply for ±5V < Vs < ±15V and 0°C < T^ < 70° C, unless otherwise specified.
 " i <

Manufacturers' data sheets 415

typical performance curves

Input Currents Offset Error Drift Error

25°C
= ftH
»
=3 =
0"C<Ia </0"C
mm E
= :::
E
.
:
'
ij

Ta =

«.^ Bl \S
...
/
^
—— Zl E e;; :: ^ =
—> y'
=
ii: MAXIMUM id 1 MM ^
il
h

0.25
<>
^
4

1
...

1 1 III
-

/
^
—-H &nT\
llll
T '

j
7=^

a.20 "*
h^ FSET
.MAXIMUM
J —^ II
t 10
1

TYPICAL:!
^- g ::!. = E|

^ —-
:

... 1 1 !

|'"|"i4tf
0.15 — --
Ml
'

1
"TYPIC ;i'

010 H

1 1 _J
10 20 30 40 50 .60 70 80 100K 1M 10M 100M 100K 1M 10M

TEMPERATURE CC) INPUT RESISTANCE U2) INPUT RESISTANCE {SH

Input Noise Voltage Power Supply Rejection Closed Loop Output Impedance

= : . ill - — -
i ^ !^
H
r /
"
^ R M
-
--
^\ /

/ \

IIE Yl Av = 1,Cf 30 pF

s- :fl s=100 K - ::: ::

Av = ioOO Cf

:rs = oi : ^: Av=l600.Cf = 30pF

//
:|
- - - — 1 1

'

t 1 OUT
Vs = i15V
= ii mA
1
100 IK 10K IK 10K 100K 1M IK 10K 100K 1M 10M

FREQUENCY (Hz) FREQUENCY (Hz) FREQUENCY (Hz)

Voltage Gain Output Swing Supply Current

120 "^ V = i 5V
350 0"C-

Ta = )°C
: Ta 70^
f 300
^^
-- ^^
—
— Ta = 25°C

— ^ •^ ^*l
—
'

Ta = 70°C
- z 250

^ ^-
1
1 l\
*
oc

^ 200
<=' 70°C "Ta^ 25 C 1

,
1 o
Ta
i 150
S:
Cf =
f =1 )OHz 5 100

50

5 10 15 20 2 4 6 8 10 15

SUPPLY VOLTAGE (tV) OUTPUT CURRENT (tmA) SUPPLY VOLTAGE (±V)

Open Loop Large Signal Voltage Follower

Frequency Response Frequency Response Pulse Response

1 111 ^B ^ Ta = 25 C
"Vs N,V ^"^
. . C =3pf// V >- t15V

t - •H —
\A i '

\,V -CsMOOpF—>
! 1
1 - 1
= 3pF
'r- INPUT
\JrV v^ '
-//
y^ \ I ^OUTPUT
g
N^
«
i"^
^,
= .upr,
V f
= 30
A y
.PHASE - — -_
N. \
v^ -
V
\
f
A=" C
1

^v \
Cs-lOOprx^-
'',
S
\ s= *15V
CfOOpF
Cf = JUp y
1
y^
s 4'
,

<
_J \ 1 1

10 100 IK 10K 100K 1M 10M 10K 100K 20 40 60 80 100 120140160

FREQUENCY Wz) FREQUENCY (Hz) TIME (>ii)

416 Appendix A

definition of terms
Input Offset Voltage: That voltage which myst be voltage to the change in input current on either
applied between the input terminals through two input with the other grounded.
equal resistances to obtain zero output voltage.
Supply Current: The current required from the
Input Offset Current: The difference in the cur- power supply to operate the amplifier with no
rents into the two input terminals when the out- load and the output at zero.
put is at zero.
Output Voltage Swing: The peak output voltage
Input Voltage Range: The range of voltages on the swing, referred to zero, that can be obtained with-
input terminals for which the offset specifications out clipping.
apply.
The ratio of the output
Large-Signal Voltage Gain:
Input Bias Current: The average of the two input voltage swingchange in input voltage
to the
currents. required to drive the output from zero to this
Common Mode Rejection Ratio: The ratio of the voltage.
input voltage range to the peak-to-peak change in
Power Supply Rejection: The ratio of the change
input offset voltage over this range. power
in input offset voltage to the change in

Input Resistance: The ratio of the change in input supply voltages producing it.

connection diagrams

Dual-ln-Line Package

NC 1
U '14 NC

COMP 2^ 13 NC

GUARD 3^ 12 COMP

—
INPUT

INPUT
4

5
-h^
— 4>T-
11

10
V*

OUTPUT

GUARD 6 — i NC

NOTE: Pin 4 c
V- 7 I NC

TOP VIEW
NOTE: Pin 4 connected to bonom of p«cki9e

TOP VIEW to bottom of (

TOP VIEW

physical dimensions

"-1
m ra ra RR mm
m n m m f
f

3 m )
T U U
u u u u LJ LJ LJ
m
LiJ LJ

d± MS IN I.I
MAX _L
^-- t

.-PI
^IfW Ul {U _t

Order Number LM308(H) Order Number LM308(N) Order Number LM308(D)

Manufactured under one or mote of the follo-mg US patents 3083262. 3189758. 3231797, 3303356. 3317671. 3323071, 3381071. 3408542, 3421025, J426423. 3440498. 3518750. 3519897. 3557431. 3560765
3566218. 3571630. 3575609. 3579059. 3593069. 3597640. 3607469. 3617859 3631312. 3633052. 3638131. 3648071. 3651565. 3693248

National Semiconductor Corporation

2900 SerDiconduclor Dnve. Santa Clara. California 95051. (4081 732-5000/TWX (910) 339-9240

National Semiconductor GmbH

8080 Fuerstenfeldbruck. Industnestrasse 10. West Germany, Tele I08l 1371. 1372. 1373. 1374 1484/Telex 527-649

National Semiconductor (UK) Ltd.

 Manufacturers' data sheets
417

ANALOG Ultra Low Drift

DEVICES BIFET Operational Amplifier

FEATURES
Ultra Low Drift (1)uV/°C-AD547L)
Low Offset Voltage (0.25mV-AD547L)
Low Input Bias Currents {25pA-AD547L, K)
Low Quiescent Current (1.5mA)
Low Noise (2/iV p-p)
High Open Loop Gain (108dB-AD547K, L, S)

PRODUCT DESCRIPTION PRODUCT HIGHLIGHTS

The AD547 is a monolithic, FET input operational amplifier 1. Advanced laser wafer trimming techniques reduce offset
combining the very low input bias current advantages of a voltage drift to IfiV/ C max and reduce offset voltage to
6IFET op amp with offset and drift performance previous- only 0.25mV max on the AD547L.
ly available only from high quality bipolar amplifiers.
2. Analog Devices BIFET processing provides 25pA max
The exclusive Analog Devices laser wafer trim process trims (lOpA typical) bias currents specified after 5 minutes of
both the input offset voltage and offset voltage drift to levels warm-up.
far lower than any competing BIFET amplifier (ImV, 5juV/°C-
3. Low voltage noise, high open loop gain and outstanding
AD547JH, 0.25mV, l/uV/°C-AD547LH). offset performance make the AD547 a true precision
In addition to superior low drift performance, the AD547 BIFET amplifier.
offers the lowest guaranteed input bias currents of any BIFET
4. The low quiescent supply current, typically 1.1mA, en-
amplifier with 50pA max for the J grade and 25pA max for
ables the AD547 to bring a new level of precision to appli-
the L grade. Since Analog Devices, unlike most other manu- cations where low power consumption is essential.
facturers, specifies input bias current with the amplifiers
warmed-up, our BIFET amplifiers are specified under actual 5. A further benefit on the AD547's low power consumption
operating conditions. and low offset voltage drift is a minimal warm-up drift after
power is applied (typically 7/iV shift for the AD547L).
The AD547 is especially designed for use in applications,
such as instrumentation signal conditioning and analog
computation, that require a high degree of precision at low
cost.

The AD547 is offered in three commercial versions, J, K and

L specified from to +70°C and one military version, the S,
specified from -55°C to +125°C. All grades are packaged in
hermetically sealed TO-99 cans. The S grade is available
screened to MIL-STD-883, Level B.

Information furnished by Analog Devices is believed to be accurate Route 1 Industrial Park; P.O. Box 280; Norwood, Mass. 02062
and reliable. However, no responsibility is assunned by Analog
Devices
for its use; nor for any infringements of patents or other rights Tel:617/329-4700 TWX: 710/394-6577
of third
parties which may result from its use. No license is granted
by implica- West Coast Mid-West Texas
tion or otherwise under any patent or patent rights of Analog
Devices. 714/842-1717 312/653-5000 214/231-5094
 '

418 Appendix A

SPECIFICATIONS (typical @ +25.°C and Vs = ±15V dc unless otherwise specified)

MODEL AD547J ADS47K AD547L AD547SH (AD547SH/883B)^

OPEN LOOP GAIN^
Vo„j = ±10V.RL>2kn 100,000 min 250,000 min ••

• • ••
T^ = min to max 100.000 min 250,000 min

OUTPUT CHARACTERISTICS
•
Voltage @ Rl = 2kn, T^ = min to max ±10Vmin(±12V typ)
•
Voltage ® Rl = lOkfi, T^ = min to max ±12Vmin(±13V typ)
Short Circuit Current 25mA
FREQUENCY RESPONSE
l.OMHz •
Unity Gain. Small Signal
• «
Full Power Response 50kHz
• *
Slew Rate. Unity Gain 3.0V/MS
••
INPUT OFFSET VOLTAGE^ l.OmV max 0.5mV max 0.25mV max
vs. Temperature 5mV/°C max 2^V/°C max iMV/'Cmax 5mV/°C max
vs. Supply, Ta = min to max 200mVA^ max lOO^V/V max •• ••

INPUT BIAS CURRENT

Either Input* 50pA max (lOpA typ) 25pAmax (lOpA typ)
••
Input Offset Current 5pA 2pA
INPUT IMPEDANCE
•
Differential 10»2n||6pF
10l2n||6pF •
Common Mode
INPUT VOLTAGE RANGE
Differential* ±20V
Common Mode ±10Vmin(±12V typ)
••
Common Mode Rejection, Vys, = ±10V 76dB min 80dB mm ••

POWER SUPPLY
Rated Performance ±15V
Operating ±(5 to 18)V
Quiescent Current 1.5mA max (l.lnlAtyp)

VOLTAGE NOISE • • ••
0.1-lOHz 2pV p-p typ 4^V p-p max
lOHz 70nV/VHz"
lOOHz 45nV/VHr
IkHz 30nV/v/H7
lOkHz 25nV/VHz'
TEMPERATURE RANGE
Operating, Rated Performance to +70°C -55°Cto+125°C
Storage -dS^Cto+lSO'C

NOTES
'The AD547SH is offered screened to MIL-STD-883, Level B. * Defined as the maximum safe voltage between inputs, such that
*Open Loop Gain isspecified with Vqs hoth nulled and unnulled. neither exceeds ± lOV from ground.
* Input Offset Voltage specifications are guaranteed after S minutes
of operation at T^ = +25°C. •Specifications same as AD547J.
* input Offset Voltage Drift is specified with the offset voltage ••Specifications same as AD547K.
unnulled. Nulling will induce an additional 3MV/°C,'mV of
Specifications subject to change without notice.
nulled offset.
'Bias Current specifications are guaranteed maximuin at either
input after 5 minutes of operation at Ty^ = +25° C. For higher
temperatures, the current doubles every 10° C.
PIN CONFIGURATION
OUTUNE DIMENSIONS
Dimensions shown in inches and (mm).

230 TYP (5 84)

336 18 SO)
370 (9 40)
'F
306 (7 75)
366 (9 00)

04 MAX
(1 02 MAX)

SEATING PLANE

TO-99 TOP VIEW

 Manufacturers' data sheets 419

Typical Characteristics

/
y /

\FREQUENCY

m
1

S
H 10
// 116
- IkHi
VOLT SUPPLIES

J
ZB'C

1
f

}
y ^^ y
/

SUPPLY VOLTAGE - tV SUPPLY VOLTAGE - ±V LOAD RESISTANCE - »

Figure 1. Input Voltage Range vs. Figure 2. Output Voltage Swing vs. Figure 3. Output Voltage Swing vs.
Supply Voltage Supply Voltage Resistive Load
2.0 20 1

1
•
--
i / 5 lOnA -
— —

y/
/
/
s ...
y iio
•

8 1 --^ !

Jf

/
c I lOOpA
— 5

i _^ K.L.S
1

r:^'
1

6 10 IB 20 S 10 IS
-66 -26 26 70 96 126
SUPPLY VOLTAGE - tVolO POWER SUPPLY VOLTAGE - ±V
TEMPERATURE - °C
Figure 4. Quiescent Current vs.
Figure Input Bias Current
5. vs. Figure6. Input Bias Current vs.
Supply Voltage Supply Voltage Temperature
3.0

Rl-2k

15

-I
25'C
V$-t1BV
/
/
z
10 t 1.6
9
( s

-^ S
^_,

COMMON MODE VOLTAGE - V

+10 Z 26
TEMPERATURE -
66
'C
Figure 7. Input Bias Current vs.

CMV Figure 8. Input Offset Voltage Turn Figure 9. Open Loop Gain vs.

On Drift vs. Time Temperature

\ \
/^
^^^
^\ N

\
\
y
!ioo
26-C
RL-2kn
1

r
z
GAIN -
PHASE -
MARGIN
WITH NO LOAD

^ 6 10 16
FREQUENCY - Hi SUPPLY VOLTAGE - tV FREQUENCY - Hi
Figure. 10 Open Loop Frequency Figure 1 1. Open Loop Voltage Figure 12. Power Supply Rejection
Response Gain vs. Supply Voltage vs. Frequency
 -

420 Appendix A

10m V//^V/^"'V

10m v\

10k 100k
FREQUENCY - Hz OUTPUT SETTLING TIME

Figure 13. Common Mode Rejection Figure 14. Large Signal Frequency Figure Output Settling Time vs.
15.
vs. Frequency Response Output Swing and Error (Circuit of
Figure 20)
(WHEREVER JOHNSON NOISE IS GREATER THAN
AMPLIFIER NOISE, AMPLIFIER NOISE CAN BE
CONSIDERED NEGLIGIBLE FOR APPLICATION!

RESISTOR JOHNSON NOISE

Ik 10k 10S
10k 100k 106 107 io8 io» lOO
FREQUENCY -Hz FREQUENCY - Hz
SOURCE IMPEDANCE -n
Figure 16. Total Harmonic Distortion Figure 17. Input Noise Voltage Figure 18. Total Input Noise vs.
vs. Frequency Spectral Density Source Resistance
SCOPE PROBE 20pF OR LESS s^OPE VERTICAL
IMV/OIV
Viw - Vqut
-wv V"''o« = i
,

a. Unity Gain Follower b. Follower with Gain = 10

Figure 19. T.H.D. Test Circuits Figure 20. Settling Time Test Circuit

Figure 21a. Unity Gain Follower Figure 21b. Unity Gain Follow/er Figure 21c. Unity Gain Follower
Pulse Response (Large Signal) Pulse Response (Small Signal)

V>-^ooi

Figure 22a. Unity Gain Inverter Figure 22b. Unity Gain Inverter Figure 22c. Unity Gain Inverter
Pulse Response (Small Signal)
 Manufacturers' data sheets 421

APPLICATION NOTES In view of this fact the circuit of Figure 24 is recommended

The AD547 was designed for high performance op-amp appli- for the most critical applications. The current in the ADS 90 is

cations that require true dc precision. To capitalize on all of proportional to absolute temperature. This current through
the performances available from the AD 547 there are some the isn resistor generates a small drift proportional to the
practical error sources that should be considered in using this setting of the null potentiometer. This drift just cancels the
precision BIFET. drift induced by nulling. This circuit will typically remove all

The bias currents of JFET input amplifiers double with every

but ±O.S/LtV/°C per mV of nulled offset. For best results the
ISn resistor should be connected directly to the V- pin of
10°C increase in chip temperature. Therefore, minimizing the
the ADS47. This prevents any signal from coupling into the
junction temperature of the chip will result in extending the
null terminals via changing currents in the supply rails.
performance limits of the device.

Heat dissipation due to power consumption is the main

INPUT PROTECTION
1.
The ADS47 is guaranteed for a maximum safe input potential
contributor to self-heating and can be minimized by
equal to the power supply potential. The input stage design
reducing the power supplies to the lowest level allowed
also allows for differential input voltages of up to ±0.S volts
by the application.
while maintaining the full differential input resistance of
2. The effects of output loading should be carefully con- lO'^fi. This makes the ADS47 suitable for voltage com-
sidered. Greaterpower dissipation increases bias currents
parators directly connected to a high impedance source.
and decreases open loop gain.
Many instrumentation situations, such as flame detectors in
gas chromatographs, involve measurement of low level cur-

^^^ rents from high-voltage sources. In such applications, a sensor

V
B^-
may
INPUTS
^a\vA' fault condition apply a very high potential to the input

•^ of the current-to-voltage converting amplifier. This possibility

necessitates some form of input protection. Many electro-

GUARD 1
O^
^
r

6
OUT

SAME PATTERN SHOULD BE

meter type devices, especially CMOS designs, can require
elaborate zener protection schemes which often compromise

o 8© >>V^
LAID OUT ON BOTH SIDES
OF P.C. BOARD
overall performance. The AD547 requires input protection
only if the source is not current-limited and, as such, is
similar to many JFET-input designs. (The failure would be due
(BOTTOM VIEW) to overheating from excess current rather than voltage break-
down.) If this is the case, a resistor in series with the affected
Figure 23. Board Layout for Guarding Inputs with input terminal is required so that the maximum overload cur-
TO-99 Package rent is 1.0mA (for example, lOOkfi for a 100 volt overload).
This simple scheme will cause no significant reduction in
GUARDING performance and give complete overload protection. Figure
The low input bias current (25pA) and low noise character- 2S shows proper connections.
istics of the AD547 make it suitable for electrometer appli-
cations such as photo diode preamplifiers and picoampere
current-to-voltage converters. The use of guarding techniques
in printed circuit board layout and construction is critical
for achieving the ultimate in low leakage performance avail-
able from AD547. The input guarding scheme shown in AD5901
Figure 23 will minimize leakage as much as possible; the guard
ring is connected to a low impedance potential at the same
level as the inputs. High impedance signal lines should not be
extended for any unnecessary length on a printed circuit;
to minimize noise and leakage, they must be carried in rigid
shielded cables.
Figure 24. Offset Nulling Circuit
OFFSET NULLING
The AD547 has low initial offset voltage to compliment its

excellent drift performance. Even so, in some applications it

isnecessary to null out even this low offset voltage. Precision

bipolar amplifiers such as the ADS 10 or AD OP-07 ideally
have zero drift when their offset is nulled to zero, this is not
the case for FET input amplifiers. A BIFET amplifier will
Rp TYPICALLY lOOkfi TO IMfi
typically exhibit a change of 3/iV/°C in drift for each mV of
FOR TRANSIENTS LESS THAN SECOND
offset voltage nulled.
3E^I"""- 1mA
Rp=,-;^ FOR CONTINUOUS OVERLOADS
1

lOO^A

Figure 25. Input Protection

 422 Appendix A

A PRECISION INSTRUMENTATION AMPLIFIER

The instrumentation amplifier of Figure 26 utilizes the "out-
standing characteristics of the AD547 to provide high per- VooT - - IV LOGio I1/I2

formance at a reasonable cost. OH-1VLOGioViA^2

The low drift, low bias currents and high open loop gain pro-
vide both high accuracy and linearity. The input amplifiers Al
and A2 are AD547Ls selected for their low offset charac-
teristics (0.25mV of offset voltage and l/iV/°C drift) and
low bias currents (25pA max). The use of the AD547Ls at
the input guarantees a maximum input offset voltage drift
of 2juV/°C with an input offset voltage of 0.5mV max
untrimmed. A3 is an AD741JH and A4 is an AD547J. These
serve two unrelated but critical purposes, A4 is the output <^RTC TEL labs
+3500ppm 081
amplifier and A3 is an active data guard.
NOTES
CIRCUIT SHOWN FOR NEGATIVE V OR I|n.
FOR POSITIVE INPUTS. Q1 = PNP, AND Va = -15V.

Figure 27. Log- Ratio Amplifier

The conversion between current (or voltage) input and log

output accomplished by the base emitter junctions of the
is

dual transistor Ql. Assuming Ql has /3> 100, which is the case
for the specified transistor, the base-emitter voltage on side 1

is to a close approximation:

NMV- VBEA = kT/qlnIi/Isi

R8 REFERENCE
lOkn This circuit is arranged to take the difference of the Vg^'s of

NOTES QIA and QIB, thus producing an output voltage proportional

Rs AND Rg are t^%, t10ppm/°C
R3 AND R4 ARE 11%. iSOppm/'C. to the log of the ratio of the inputs:
R5. R6, R7, R8 ARE A MATCHED NETWORK.
±0.01%. i2ppmAC TRACKING TC
Vout = -K(Vbea-Vbeb) = -(^)- Il/Isi-lnl2/Is2)
Figure 26. Precision FET Input Instrumentation Amplifier VouT = -KkT/qlnIi/l2
The scaling constant, K by Rl and Rj^ to about 16,
is sei"
USING THE AD547 IN LOG AMPLIFIER APPLICATIONS
to produce IV change in output voltage per decade difference
Log amplifiers or log ratio amplifiers are useful in applications
in input signals. Rye is a special resistor with a +3 500ppm/ C
requiring compression of wide-range analog input data, linear-
temperature coefficient, which makes K inversely proportional
ization of transducers having exponential outputs, and analog
to temperature, compensating for the "T" in kT/q. The log-
computing, ranging from simple translation of natural rela-
ratio transfer characteristic is therefore independent of tem-
tionships in log form (e.g., computing absorbance as the log-
perature.
ratio of input currents), to the use of logarithms in facilitating
analog computation of terms involving arbitrary exponents This particular log ratio circuit is free from the dynamic prob-
and multi-term products and ratios. lems that plague many other log circuits. The -3dB bandwidth
is 50kHz over the top 3 decades, lOOnA to 100/iA, and de-
The picoamp level input current and low offset voltage of the
creases smoothly at lower input levels. This circuit needs no
AD547 make it suitable for wide dynamic range log ampli-
additional frequency compensation for stable operation from
fiers. Figure 27 is a schematic of a log ratio circuit employing
input current sources, such as photodiodes, that may have
the AD547 that can achieve less than 1% conformance error
lOOpF of shunt capacitance. For larger input capacitances a
over 5 decades of current input, InA to lOO/iA. For voltage
20pF integration capacitor around each amplifier will provide
inputs, the dynamic range is typically 50mV' to lOV for 1%
a smoother frequency response.
error, limited on the low end by the amplifier's input offset
voltage. This log ratio amplifier can be readily adjusted for optimum
accuracy by following this simple procedure. First, apply VI =
V2 = -lO.OOV and adjust "Balance" for Vqut = O.OOV. Next
apply VI = -lO.OOV, V2 = -l.OOV and adjust gain for Vqut =
+ 1.00V. Repeat this procedure until gain and balance readings
are within 2mV of ideal values.
 Manufacturers' data sheets 423

FD600
HIGH CONDUCTANCE, ULTRA-FAST PLANAR EPITAXIAL DIODE

GENERAL DESCRIPTION - The FD600 is a silicon planar epitaxial diode^ that provides low capacitance,

high conductance, and fast reverse recovery. With these features, the device is ideally suited for

applications such as core devices, avalanche circuitry, logarithmic amplifiers for pulse applications

and for any critical circuit requiring high conductance and low internal power dissipation without
sacrifice of speed capabilities.

MAXIMUM RATINGS (25°C) (Note 1)

WIV Working Inverse Voltage 50 Volts

Average Rectified Current 200 mA

^o

*f
Recurrent Peak Forward Current 900 mA
ij(surge) Peak Forward Surge Current Pulse Width of 1 second 1 Amp
ij(surge) Peak Forward Surge Current Pulse Width of 1 /jtsec 4 Amps
P Power Dissipation 500 mW
P Power Dissipation 170 mWat 125°C
Operating Temperature -65°C to +150°C
Storage Temperature, Ambient -65°C to +175°C

ELECTRICAL CHARACTERISTICS (25* C Free Air Temperature unless otherwise noted)

FACT Characteristic Min. Max. Units Test Conditions
Symlx)l
Subgroup

*^F
la Forward Voltage 0.87 1.00
^F
200 mA
^F
lb Forward Voltage 0.82 0.92
V 100 mA
Vp lb Forward Voltage 0.76 0.86
V 50 mA
^F
lb Forward Voltage 0.66 0.74
h 10 mA
^F lb Forward Voltage 0.54 0.62
V 1 mA
Ir la Reverse Current 0.1 mA Vr -50 V
Reverse Current (150°C) mA -50 V
^ la 100
^R
BV la Breakdown Voltage 75
^ 5 mA
^r la Reverse Recovery Time 4.0 m/Ltsec = 10-200 mA
(Note 2)
RL 100

Vr la Reverse Recovery Time 6.0 m^sec

'r
= 200-400 mA
(Note 2)
RL 100

^o
la Capacitance 2.5 ^x^li
^R V f = IMc
(Note 3)
AVF/°C Change of Forward Voltage -1.8mV/°C Typical
per Degree Change in Temperature

Copyright 1965 by Fairchild Semiconductor, a division of Fairchild Camera and Instrument Corporation
NOTES:
(1) The maximum ratings are limiting values above which life or satisfactory performance may be impaired.
(2) Recovery to 0.1 !„.

(3) Capacitance as measured on Boonton Electronic Corporation Model No. 75-AS8 Capacitance Bridge or equivalent
(4) Leads are tinned. Gold plate with nickel strike may be obtained when specified.

Fs^VIRCMIL-D
> MIOHWAV . MN HAFMi. CAUrORNIA • (4I() 471 MOO • TWX: 4IS-4»;'«I00 • C«aLC: rAIIISCMCO
SEMICONDUCTOR

MANUFACTURED UNDER ONE OR MORE OF THE FOLLOWING U. S. PATENTS: 2981877. 302SS89. 3064167, 31083S9. 3117260 OTHER PATENTS PENDING.
 11 . ^ - 1

424 Appendix A

FAIRCHILD DIODE FD600 TYPICAL ELECTRICAL CHARACTERISTICS

FORWARD VOLTAGE VERSUS FORWARD CURRENT VERSUS CAPACITANCE VERSUS

FORWARD CURRENT
=: — n^
TEMPERATURE COEFFICIENT
—— w
REVERSE VOLTAGE

y \ s, V
— T

Sa — \ A 125
.

^
__ ^MAXIMUM
-
w>
w % V
J^ 10

^m^ H —— -
\
—
^-\
,

t 75
5 10
—
—
f*'

— — ^ V .MINIMUM.
~

^ ^^
1 05

>^
25

— — 001 V V
2 4 6 8 05 10 15 20 2 5 30 3 5 «0 8 12 16

TC - TEMPERATURE COEFFICIENT - mV/"C - REVERSE VOLTAGE - VOLTS

Vf - FORWARD VOLTAGE - VOLTS Vr

REVERSE VOLTAGE VERSUS REVERSE CURRENT VERSUS DYNAMIC IMPEDANCE VERSUS

REVERSE CURRENT AMBIENT TEMPERATURE FORWARD CURRENT
I

25 c
y/ III ^
y ^^
1
^
\ 1 1

^
1 1

0.1
"^ V, 50V=

%
A/ 2^^ I.C - 1

w
t*» dc
005 y^
^ v
^
1

^^
1

y ^L
z
> ^> ^
— ^g^
T< TYPICAL
hr'

^ ^ JJV ^ L -
;
y'
^
'
-J^--=— ^"^
'*m.
"I^
^
0002
^k
0001
10 20 30 40 50 60 25 50 75 100 125 150 10 10 100 IK
^ L
lOK

Vr - REVERSE VOLTAGE - VOLTS T^ - AMBIENT TEMPERATURE - 'C Rq - DYNAMIC IMPEDANCE - OHMS

AVERAGE RECTIFIED CURRENT REVERSE RECOVERY TIME

POWER DERATING CURVE VERSUS AMBIENT TEMPERATURE VERSUS FORWARD CURRENT (I. = U)

1
600
<
E
• u

^^
200
^
\ \ ^
l_

^^
z
i 30
< 400 '"
i
5
5 300 \ i
^ 120 \ 20

\ S 80
\
S 100 \ * 40 \ 10

a.

25 SO 75 100 125
\ 150 25 SO 75 100
\
125 150 100 200 300 40

A - AMBIENT TEMPERATURE - *C - AMBIENT TEMPERATURE - 'C FORWARD CURRENT^REVERSE CURRENT - mA

A
 Manufacturers' data sheets
425

HARRIS
^.SEMICONDUCTOR
A DIVISION OF HARRIS INJERTYPE CORPORATION
HA-2107/2207/2307
Operational Amplifiers

FEATURES PACKAGES
CODE 2A
• LOW OFFSET VOLTAGE OVER TO-99
TEMPERATURE * 3m V MAXIMUM

• LOW BIAS CURRENT OVER

TEMPERATURE lOOnA MAXIMUM

• LOW OFFSET CURRENT OVER

TEMPERATURE 20nA MAXIMUM

• LOW OFFSET VOLTAGE

TEMPERATURE COEFFICIENT 3yV/0C
ALL DIMENSIONS ARE IN INCHES
ALL DIMENSIONS 010 UNLESS

GENERAL DESCRIPTION OTHERWISE SHOWN TO-91

CODE 9W
SEATING PLANE
»>|Ua— 010

The HA-2107, HA-2207 and HA-2307 are high performance ^

general purpose operational amplifiers which are internally

compensated for unity gain stability. rn

These amplifiers have input and output overload protection.

Large common mode signals do not cause latch-up. The

HA-2107, HA-2207 and HA-2307 have guaranteed operat-
,_L
ing temperature ranges of -55°C to +125°C, -25°C to +85°C

and 0°C to +70°C respectively.

'
SCHEMATIC PIN OUTS

TO-99

(TOP VIEW)
I ,c TO-91
 426 Appendix A

ABSOLUTE MAXIMUM RATINGS SPECIFICATJONS

HA-2107*
HA-2207 HA-2307
Supply Voltage ±22. OV ±18. OV Operating Temperature Range
Power Dissipation (Note 1) 500mW HA-2107 -550Cto+1250C
Differential Input Voltage tso.ov HA-2207 -250c to+850C
HA-2307 0°Cto+70OC
Input Voltage (Note 2) + 15. OV Storage Temperature Range -65°Cto+150°C
Output Short Circuit Duration Indefinite Lead Temperature (Soldering 60 seconds) SOQOC

ELECTRICAL CHARACTERISTICS

HA-2107
HA-2207 HA-2307
TEMPERATURE
PARAMETER (Note 7) MIN. TYP. MAX. MIN. TYP. MAX. UNITS
INPUT CHARACTERISTICS +25OC 0.7 2.0 2.0 7.5 mV
Offset Voltage
Full 3.0 10 mV

Average Offset Voltage PV/OC

Full 3.0 15 6.0 30
Temperature Coefficient
+25OC 30 75 70 250 nA
Bias Current
Full 100 300 nA

+25OC 1.5 10 3 50 nA
Offset Current
Full 20 70 nA

Offset Current TLowto+250C 0.02 0.2 0.02 0.6 nA/OC

Temperature Coefficient -25°CtoTH,gh 0.01 0.1 0.01 0.3 nA/OC

Input Resistance +25OC 1.5 4 0.5 2 MS7

Input Voltage Range (Note 4) Full ±15.0 ±12 V

TRANSFER CHARACTERISTICS
Large Signal Voltage Gain +25OC 50K 160K 25K 160K v/v
(Notes 5 8(6) Full 25K 15K v/v

Common Mode Rejection Ratio Full 80 96 70 90 dB

Output Voltage Swing

Ri = lOK^ Full ±12.0 ±14.0 ±12.0 ±14.0 V
= (Note 6)
±13.0 ±10.0 ±13.0 V
RL 2Kfi Full ±10.0

POWER SUPPLY CHARACTERISTICS +25OC 1.8 3,0 1.8 3.0 mA

Supply Current (Note 4) 1250c 1.2 2.5 mA

Supply Voltage Rejection Ratio Full 80 96 70 96 dB

NOTES; 1 . Derate TO-99 package at 6.8mW/°C for operatior\ (4) Vc = +20. OV

ambient temperature above 75°C and 4.9m\/\//°C
above 50°C for the TO-91 package (5) Rl - 2Kfi. Vqut = ±10.0V

2. For supply voltages less than + 15.0V, the absolute (6) V< 15.0V
maximum input voltage is equal to supply voltage.

3. These specifications apply for +5 OV<Vg <+ 20 OV <7' f'^'l^'^Low 'o^H.gh -55°C +125°C (HA-2107
to

unless otherwise specified. -25°C +85°C (HA-2207

to
0°Cto+70°C (HA-2307
 — 1

Manufacturers' data sheets 427

TYPICAL
PERFORMANCE CURVES
SUPPLY CURRENT VOLTAGE GAIN INPUT CURRENT

25 120 50

20
^r-
1

c
— 110
'

A-^5°^
—
40

30
BIAS^ *^
k;;
^^
^
,,,
"T^y^- 00
^ 10
EK 1

V
-^ ^•i^ r. CD
03
^— Ta = 125°C
___ 1

=
o.
=
3
k

^ OFFSET
*

0.5 2
•
^_
1

5 10 15 20 10 15 20 75 -50 -25 25 50 75 100 12S

Supply Voltage i+V) Supply Voltage (+V) Temperature (°C)

CURRENT LIMITING INPUT NOISE VOLTAGE INPUT NOISE CURRENT

15.0 T
--10 10
Vs=±l 5.0V
s.
> V
N >
10.0 ^, 1
s

\
10- 7S
\
'
Ta= 1250c T A= 25°C ^.
5.0
V
s, *

's bN '"
10
-16
10
26 -
5 10 15 20 25 30 10 100 Ik 10k 100k 10 100 Ik 10k II

Output Current (±mA) Frequency (Hz) Frequency (Hz)

OPEN LOOP LARGE SIGNAL VOLTAGE FOLLOWER

120

100

80
FREQUENCY RESPONSE

\
Ta
vs
=

=
25°C
±15.C V
>+1 12
— FREQUENCY RESPONSE

-,
,
Ta= 25OC
Vs=+15.0V

>
10

4
— L
PULSE RESPONSE
~^

r
— "*"

60 \ \ .E
2 \ INPUT -(
-1
/•
\
1

J 8 c? > UTP UT
40 S, -2 V
I

!i 20 ^ \
CO

I
*

-*
u. \ ^
k _

_
\ >
\
-6

-8
N^ Ta
V<; =
= 25°C
115.0V

20
1 10 100 IK 10K 100K 1M
\
10M IK
1
10K 100K
-10
10 20 30 40 50 60 70
uu 80

Frequency (Hz) Frequency (Hz) Time (yS)

 ,

428 Appendix A

GUARANTEED PERFORMANCE CURVES (continued)

full operating temperature range (HA-2107: -550C to +1250C; HA-2207: -250C to +850C;
HA-2307: 0OCto+70OC)

INPUT VOLTAGE RANGE OUTPUT SWING VOLTAGE GAIN

20 100 I

> 94
t'16
y "^^^

3=12
s\V .
f<
/^ ^ 1 * -^
> ^>
Vf
y /^
<^1X^.
^
c
CO

CD
82 ^^- 5k5^
^

/^
— > 76
4
/^
70
S 10 IS 20 5 10 15 10 15

Supply Voltage (+V) Supply Voltage (+V) Supply Voltage (+V)

DEFINITIONS

INPUT OFFSET VOLTAGE-That voltage which VOLTAGE GAIN-The ratio of the change in out-
must be applied between the input terminals put voltage to the change in input voltage pro-
through two equal resistances to force the output ducing It.

voltage to zero.
UNITY GAIN BANDWIDTH-The frequency at
INPUT OFFSET CURRENT-The difference m the which the voltage gam of the amplifier is unity.
currents into the two input terminals when the
output IS at zero voltage POWER SUPPLY REJECTION RATIO-The ratio
change m input offset voltage to the change
of the
INPUT BIAS CURRENT-The average of the cur in power supply voltage producing it.

rents flowing into the input terminals when the

output IS at zero voltage. TRANSIENT RESPONSE-The closed loop step
function response of the amplifier under small
INPUT COMMON MODE VOLTAGE-The average signal conditions
referred to ground of the voltages at the two input
terminals. GAIN BANDWIDTH PRODUCT-The product of
the gam and the bandwidth at a given gam.
COMMON MODE RANGE-The range of voltages
which IS exceeded at either input terminal will SLEW RATE (Rating Limiting)-The rate at which
cause the amplifier to cease operating. the output Will move between full scale stops,
measured m
terms of volts-per unit time. This limit
COMMON MODE REJECTION RATIO-The ratio to an ideal step function response is due to the
of a specified range of input common mode voltage nonlinear behavior m an amplifier due to its
to the peak to-peak change m input offset voltage limited ability to produce large, rapid changes m
over this range. output voltage (slewing). ..restricting it to rates of
change of voltage lower than might be predicted
OUTPUT VOLTAGE SWING-The peak symmetri- by observing the small signal frequency response.
cal output voltage swing, referred to ground, that
can be obtained without clipping. SETTLING TIME— Time required for output wave-
form to remain within 0.1 percent of final value.
INPUT RESISTANCE-The ratio of the change m
input voltage to the change m input current.

OUTPUT RESISTANCE-The ratio of the change

in output voltage to the change in output current.
 Manufacturers' data sheets 429

SYMMETRICAL NCHANNEL FIELD-EFFECT TRANSISTOR

FOR YHF AMPLIFIER AND MIXER APPLICATIONS
• Low Noise Figure: < 2.5 db at 100 Mc TYPE 2N3823

• Low Crss: ^ 2 pf

• High Yfs/Ciss Ratio (High-Frequency Figure-of-Merit)

• Cross Modulation Minimized by Square-Law Transfer Characteristic

mechanical data NCHANNEL EPITAXIAL PLANAR SILKON FIELD-EFFEa TRANSISTOR

THE ACTIVE ELEMENTS ARE

130
bl&»
l»5
178
-GATE
/-4-CA$l ELECTRICALLY INSULATED FROM
THE CASE ^
DIA DIA
ALL JEDEC T0-72t
All DIMENSIONS ARE DIMENSIONS AND NOTES
IN INCHES
UNLESS OTHEHWISE ARE APPLICABLE
SPECIFIED

'^TO-72 outline is same as TO-18 except for oddition of a fourth lead.

absolute maximum ratings at 2S'*C free-air temperature (unless otherwise noted)

Drain-Gate Voltage 30 v
Drain-Source Voltage 30 v
Reverse Gate-Source Voltage —30 v
Gate Current 10 ma
Continuous Device Dissipation at (or belov^) 25*C Free-Air Temperature (See Note 1) ... 300 mw
Storage Temperature Range —65*C to + 200*C
Lead Temperature ^6 Inch from Case for 10 Seconds 300*C
electrical characteristics at 25°C free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS^ MIN MAX UNIT
V(BR)GSS Gate-Source Breakdown Voltage JG = -1 fia, Vds-0 -30 V

Vss = -20y, Vds-0 -0.5 no

'gss Gate Cutoff Current
Vgs = -20v, Vds = 0, Ta = 150*C -0.5 /xo

loss Zero-Gate-Voltage Drain Current Vds=15v, Vss = 0, See Note 2 4 20 ma

Vgs Gate-Source Voltage Vds-^15v, Id = 400 /JLQ -1 -7.5 V

VsSloff) Gate-Source Cutoff Voltage Vds = 15v, Id = 0.5 no -8 V

Small-Signal Common-Source Vds = 15v, Vss = 0, = kc,

f I
IXfsl 3500 6500 /xmho
Forward Transfer Admittance See Note 2

Small-Signal Common-Source Vds==15v, Vgs = 0, f = 1 kc.

l/osl 35 jjLmho
Output Admittance See Note 2

Common-Source Short-Circuit Vds=15v,

Ci„ 6 Pf
Input Capacitance
Vss = 0,
Common-Source Short-Circuit
Crs, 2 Pf
Reverse Transfer Capacitance f =lMc
Small-Signal Common-Source
lyfsl
Fonward Transfer Admittance
Vds=15v, 3200 fjumho

Small-Signal Common-Source
ReiXi,)
Input Conductance
Vss = 0, 800 /xmho

Small-Signal Common-Source
Re(y«)
Output Conductance
f = 200 Mc 200 /xmho

NOTES: Derate linearly to 17S°C free-air temperature at the rote of 2 mw/C*.

Texas Instruments
1.

These parometers must be measured using pulse techniques. PW = <

2. 100 mset. Duty Cycle 10%.
INCORPORATED
Indicates JEDEC registered dota. SED4ICONDUCTOR-COMPONENT8 DIVISION
f The
POST OFFICE BOX 30I2 • DALLAS 22. TEXAS
fourth load (cose) is connected to the source for all measurements.
 :

430 Appendix A

TYPE 2N3823
N-CHANNEL EPITAXIAL PLANAR SILICON FIELD-EFFECT TRANSISTOR

* operating characteristics at 25*'C free-air temperature

PARAMETER TEST CONDITIONS^ MAX UNIT

NF Common-Source Spot Noise Figure Vds = 15v, Vss-0,f-100Mc, U = ] ku 2.5 db

TYPICAL CHARACTERISTICS^

COMMON-SOURCE
SPOT NOISE FIGURE EQUIVALENT INPUT NOISE VOLTAGE
vs -V vs
FREQUENCY FREQUENCY
T I mini
1 m ^ =E m =TOF Ffl
Vds=15v
5
0.4 p EE
1
Vds=15v
Rg= 1 kO ^GS =
Ta = 25
0.1
ss Ta = 25 °C
H = s
tW E— z
^- ,,

0.04
' '1
1
^
1^
I
3
s
'''.

2 0.01
- == : =
1g
:

X 0.004
: t z: : i:
'
'"
1 1

0.001
1 Mc 10 Mc 100 Mc Gc lOcps 100 cps kc 10 kc 100 kc
f — Frequency f — Frequency
FIGURE 1 FIGURE 2

SMALL-SIGNAL COMMON-SOURCE
FORWARD TRANSFER ADMITTANCE

DRAIN CURRENT
5000
1

Vds=15v
4000 -" f = 1 kc
1

- Ta = 25»C
See Note 2
3000 /
1
/

J
Device havin gjfl t
2000 i
"
1
D«jS* 4 m3
)e vice havi "ig
III

/ D5S*16ma
1000 \l ^' |[

.r
—
0.01
a 'W 0.1 1 10
.1
100
Iq — Drain Current — ma
^ Texas Instruments
INCORPORATCO FIGURE 3

NOTE 2: Thtse porameleri mutt bt meosurMl using pulse techniques. PW = 100 msec. Duty Cycle < 10%.

*lndicotes JEDEC registered dato. TEXAS INSTRUMENTS RESERVES THE RIGHT TO MAKE CHANGES AT ANY TIME
tjhe fourth lead (case) is connected to the source for ail measurements. IN ORDER TO IMPROVE DESIGN AND TO SUPPLY THE BEST PRODUCT POSSIBLE.
 Manufacturers' data sheets 431

TYPE 2N3823
N-CHANNEL EPITAXIAL PIANAR SILICON FIELD-EFFECT TRANSISTOR
TYPICAL CHARACTERISTICS t

SMALL-SIGNAL COMMON-SOURCE FORWARD TRANSFER ADMITTANCE

v$
GATE-SOURCE VOLTAGE
owu
1

Vds=15v
f= kc
1

See Note 2

7000

i
1

i^ Ta = -55 »c^V
Admittan

Transfer

V^^"
\\
\
Forward
25*'C--^S.
^-*—

Common-Source

\ \ x\
Small-Signal

— ^"^
\\
^
--""^
—
—— T. - inn®
"-'^ r
'a

ly^jl
Ta = 150«'C1 Ta = 150^C-^V

1000
N\\\
W^ Device having Device having ^^
\u losS^^Tia lDSS***16ma ^
at Ta = 25 ''C
\\\ at Ta = 25°C

\\\
-2 -3 -4
V
IW
-5

Vqs — Gate-Source Voltage — v

NOTE 2: Thej« pofameferj must be meoiured uw.o puli« tethniquas. PW = 100 mjM, Duty C/tIa < 10%
Texas Instruments
*Th9 fourth lead (<a$e) h connected to the source
INCORPOMATKD
8EMICOr«OUCTOR-COMPONENTS DIVISION
Jor oil meo^uremenli.
POST OFFICE BOX SOU • DALLAS 22. TEXAS
 1 — v

432 Appendix A

TYPE 2N3823 NCHANNEL EPITAXIAL PLANAR SILICON FIELDEFFEa TRANSISTOR

GATE CUTOFF CURRENT >
"

SMALL-SIGNAL COMMON-SOURCE
TYPICAL CHARACTERISTICS t INPUT ADMITTANCE
vs
FREE-AIR TEMPERATURE
FREQUENCY
-100
1 =^ i^^ ^^ ^g 10 \~ 10
= Vds = u^
1

^^ \
\\\
jrj
•10
= :Vgs = -2 Ov,

^oc
^== VgS-0
Ta-25 °C
1
\
8 ^^Ql
y" 11
A __!f
J

>s
= -10 V 1 A "- «>

^f
^
4 — C.ss
4^2.
-0.1
^ lm(y„) :
/
c.„ = —
lm(y
s)
—
u
^4^
/
^X
y ^
2

-0.01 Ji
25 50 75 100 125 150 175 200
-H 1 Re(y,s)

Ta — Free -Air Temperature — "C 10

f
40
— Frequency — Mc
100 400 1000

FIGURE 5
FIGURE 6
SMALL-SIGNAL SOURCE COMMON SMALL-SIGNAL COMMON-SOURCE REVERSE
FORWARD TRANSFER ADMITTANCE
TRANSFER ADMITTANCE
vs
FREQUENCY
'^ ^ FREQUENCY
1 1 1 II 1 E 5
E Vds^ 15 V
1 1 1
i--•^evyfj
-Rp/v ^
Vds=15v Vgs = u
4 ~ Vgs = — Ta = 25°C -

3
3 — Im^
•\/ \ 3'il
Crss -lm(y,,)
CO
2 Im^v. \ -i

S 2 7
/

]
/ _C /
J ~"
1
n
J^.
^'' f* ,
^t

r 10 40 100
..

400
^ 'W •-Re(y rs)
1000
10 40 100 400 1000
Frequency - Mc
— Frequency Mc
FIGURE 7
FIGURE 8
SMALL-SIGNAL COMMON-SOURCE
OUTPUT ADMITTANCE COMMON-SOURCE SHORT-CIRCUIT INPUT AND
vs REVERSE-TRANSFER CAPACITANCES
FREQUENCY vs
-»

_
— GATE-SOURCE VOLTAGE
Vds 5 V 5
= Mc
Vgs-0
""°
4 - Ta - / J 4 3
f

-T ^
1

- 25° c- — C.ss
_-lm(y.s)
CO

O N > _ lm(yj -

3
lm(yos)y
3 ^_ ;
1 ^ s^ =
£;» (Vds 5v)
c.ss
CO

2 r '* t
/r

-^
'V C,ss (Vos-15v)_—
2

J
(Vds=5v)_ _
lm(y„J 1
I U U Crss
1
/ c-OSS = 1
=:
'

U 1 <-r$s (Vds
^ _1_J
.^ Re(y,,)
Coss*C,„+0.4pf
1

10 40 100 400 1000 -8 -12 -16 -20

f — Frequency Mc
Vgs-
-4
Gate-Source Voltcige —
FIGURE 9
FIGURE 10
^The fourth lead (case) is connected to the source for oil measurements.
Manufacturers' data sheets 433

COMMERCIAL
HEWLETT M PACKARD LIGHT EMITTING
5082-4487
COMPONENTS 5082-4488
DIODES

Features (3,30)

• LOW COST - BROAD APPLICATION

t
0.20 (5.08)
7^ PLASTIC

0.16 (4.06)

JT
• LOW PROFILE - 0.18" LENS HEIGHT
TYPICAL

HIGH DENSITY PACKAGING (14.0)

• LONG LIFE - SOLID STATE RELIABILITY

LOW POWER REOUIREMENTS -

II
(3.05)
20mA @ 1.6V

• HIGH LIGHT OUTPUT - O.Smcd TYPICAL .025 (0.64)

.015 (0,38)

---^ .025(0.64)
CATHODE
.015 (0.38)

5082-4487/4488

Description
The 5082-4487 an(d 5082-4488 are Gallium Arseni(de Phosphide Light Emitting Diodes for High Volume/
Low Cost Applications such as indicators for calculators, cameras, appliances, automobile instrument
panels, and many other commercial uses.

The 5082-4487 isa clear lens, low domed T-1 LED lamp, and hasa typical light output of 0.8mcd at 20mA.

The 5082-4488 is a clear lens, low domed T-1 LED lamp, and has a guaranteed minimum light output of
0.3mcd at 20mA.

Maximum Ratings at Ta=25°C

DC Power Dissipation [Derate linearly from 50*^0 at 1.6mW/°C] lOOmW
DC Forward Current 50mW
Peak Forward Current [ 1 /usee pulse width, 300pps] 1Amp
Operating and Storage Temperature Range -55°C to +100°C
Lead Soldering Temperature 230°C for 7 sec.
434 Appendix A

Electrical/Optical Characteristics at Ta=25°C

5082-4487 5082-4488
Symbol Parameters Units Test Conditions
Min. Typ. Max. Min. Typ. Max.

'. Luminous Intensity 0.8 0.3 0.8 mcd Ip = 20mA

Xpk Wavelength 655 655 nm Measurement at

Peak

^ Speed of Response 10 10 ns

c Capacitance 100 100 pF Vp = 0, f = 1 MHz

Vf Forward Voltage 1.6 2.0 1.6 2.0 V If =20mA

BVr Reverse Breakdown 3 10 3 10 V Ir = lOO/iA

Voltage

2 50

2 25
1
1
2.00 i

- I- 1 75

L.y — ;
-I 1 50

ff+-H+»-fftMi»f 1 25

y:
1 00

75

50

Vf
hFORWARD VOLTAGE VOLTS
25

10

If
20

FORWARD CURRENT
30 40

ii.A
50

Figure 1. Typical Forward Current Versus Figure 2. Typical Luminous Intensity Versus
Voltage Characteristic. Forward Current.

30° 20° 10° ( 10° 20° 30°

^».^-
40°
^f^ >
•

r- t^'Tf \:
50° 7\n V- /K -/

60»

70°

80° -t- ^^^ »^^\"-\ '•'///' ^ z^^^^ •'

( f ^^^^^•..2.^k''.:7:^^^" '.

- v-3^1i/-r^--
Figure 3. Typical Relative Luminous Intensity
Versus Angular Displacement
 C

Manufacturers' data sheets 435

2n5088 (SILICON)
MOTOROLA
2n5089 Semiconductors
BOX 599 PHOENIX. ARIZONA 85001

NPN silicon annular transistors designed for

CASE 29(1)
(TO-92) low-level, low-noise amplifier applications.

MAXIMUM RATINGS
Rating Symbol 2N5088 2N5089 Unit

Collector-Emitter Voltage V 30 25 Vdc

CEO
Collector-Base Voltage 35 30 Vdc
^CB
Emitter-Base Voltage 4.5 Vdc
^EB
Collector Current 50 mAdc
^C
Total Device Dissipation @T = 25°
^D
310 mW
Derate above 25° C 2.81 mW/'C
Operating and Storage Junction -55 to +135 "C
^J- ^stg
Temperature Range

THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit

Thermal Resistance, Junction 0.357 °C/mW

to Ambient
^JA
 436 Appendix A

2N5088, 2N5089
ELECTRICAL CHARACTERISTICS
motorola
Characteristic
(Ta = 25*C
Scmic€>n€iuct«>r r>rt>€luct9 Inc
unless otherwise noted)

Symbol Min Typ Max

%
Unit

OFF CHARACTERISTICS
Collector-Emitter Breakdown Voltage Vdc
1.0 mAdc, I =0) 2N5088
=^CEO -
(I 30
^ =
^ 2N5089 25

Collector-Base Breakdown Voltage Vdc

= 100 MAdc, I = 0) 2N5088
«^CBO -
(I 35
2N5089 30
Collector Cutoff Current nAdc
(V^g = 20 Vdc, Ig = 0) 2N5088
^CBO - 50
(V^g = 15 Vdc, Ig =0) 2N5089 50

Emitter Cutoff Current nAdc

'ebo
50

100

ON CHARACTERISTICS
DC Current Gain
= 100 MAdc, V
^FE
(I = 5. Vdc) 2N5088 300 900
2N5089 400 - 1200
(I = 1.0 mAdc, V = 5.0 Vdc) 2N5088 350
^ ^^ 2N5089 450
(I_ = 10 nnAdc, V_„ = 5. Vdc) 2N5088 300
^ "-^
2N5089 400
Collector-Emitter Saturation Voltage Vdc
^CE(sat)
(U = 10 mAdc, I„ = 1.0 mAdc) - - 0.5

Base-Emitter On VolUge Vdc

^BE(on)
(I^ = 10 mAdc, V^g =5.0 Vdc) - -
0.8

DYNAMIC CHARACTERISTICS
Current-Gain - Bandwidth Product
^T
MHz
(I^ = 500 MAdc, V^g = 5. Vdc, f = 20 MHz 50 175 -

Collector- Base Capacitance PF

^cb
(V^g = 5. Vdc , Ij. = 0. f - 100 kHz. emitter guarded)
-
1.8 4.0

Emitter- Base Capacitance bf

^eb
(Vgg = 0.5 Vdc, I^ = 0, f - 100 kHz, collector guarded) - 4.0 10

Small-Signal Current Gain -

=1.0 mAdc. V
^e - 1400
(I = 5. Vdc, f = 1. kHz) 2N5088 350
^ ^^ 2N5089 450 1800

Noise Figure NF dB
(I = 100 MAdc, V =5.0 Vdc, R = 10 k ohms. 2N5088 - 3.0
2N5089 - 2.0
f= 10 HZ to 15. 7 kHz

NOISE FIGURE
Vet = 5.0 Vdc. Ta = 25 'C
FIGURE 1- FREQUENCY EFFECTS FIGURE 2 - SOURCE RESISTANCE EFFECTS

"^
\ Rs- optimum source resistance
fv

8.0
^, \
\ =
y \ 11
Ic =
=
IJO
mA, Rs

= 3.0kn
2 Okfl

5'mA,Rs
Z 6.0
k \ ^ •rfT
lc
1 111 1 1 1 1 1 ii

= 01mA,Rs = lOkJJ
\ V--
1
c

c = IOmA Rs=100kn

I
«)
V \ -M ft" *^
\ < ..._ __ _
Tfs s - — - .
2.0 s
^s^'"
''^
T ... --
1^
+ t-
MM TI '

t
t
11 J,. 1L_ i it rj

0.01 0.02 0.03 0.05 1 2 3 5 10 20 30 50 10 01 2 3 5 10 2 3 5 10 20 30 50 10

f, FREQUENCY (kHz) Rs, SOURCE RESISTANCE (kfi)

 " .

Manufacturers' data sheets 437

h PARAMETERS
2N5088, 2N5089 (continued) Vet = 10 Vdc. f = 1.0 kHz. Ta = aS^C
(For Figures 3. 4. 5. 6. 8)

This group of graphs illustrates the relationship of the "h" parameters for this series of transistors. To obtain these curves. 4
unitswere selected and identified by number —
the same units were used to develop curves on each graph.

FIGURE 3 -INPUT IMPEDANCE FIGURE 4 - VOLTAGE FEEDBACK RATIO

-
^ ^5
~"
I

=^ ------4 v^>
\^ ^^^
^''s
s. s \,
^ T
1

^ S/s
" ^
^

^
^ I ^ ^UNIT #1 . \
^>
•^^N.
^S"s 5>. VX ^
^.> ^v^
1

^ ^s
s
^
— .

:-C^ v^ N __. ^
^^^
^>
>. ^
•v
V
Sv
IIL• IT XL1
p-

4
•
__^ ^^feH s N,
V s,,

S; ^.r
.^ >«
s.
V Ul
\-s

V "^ sj''^-- s S3 ^..\ ,

— . s^ij
5
«k

s N ^. Ns
<^ V ^ /
t f
^
1

^s
>^
i

— — "t sm H^ i ^ ..

IT _^ _
0.1 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7,0 10 0.1 02 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10

Ic. COLLECTOR CURRENT (mA) Ic, COLLECTOR CURRENT (mA)

FIGURE 5 -CURRENT GAIN FIGURE 6- OUTPUT ADMinANCE

2000
T
UNIT #1
-^ .,
1000
^ — 2
^^ —— ""

|700 ^
^^ •-*1
^^
.3 ^™" "~
-
1
s
^ ^
^ f^
^
4 ~

J 300
r^
'^
^
200
^
100
0.1 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 10 0.5 0.7 1.0 2.0

Ic. COLLECTOR CURRENT (mA) Ic. COLLECTOR CURRENT (mA)

FIGURE 7 -EFFECT OF VOLTAGE FIGURE 8 -DETERMINANT

\ 20 2.0
o II
^
1

^1.75 u ^IT#l — -.. 1

^
^
1.0
— ~ -^ 2- ^ 5 =—
5 h £5 0.7 'A ^ ^
<X
1.5
^^
.

g 0.5
\
'

^ -'•T
t
21.25 k
m
i
03 "'
nO*
3
^ ^v ^^
*«
^

^^ *-*^
-he—
~i
j=
J
0.2

_
,„^
•^

— _ ^ "1"^
" 4

- = .,
• 0.1
^—-
^
1

K j^ 0.0/ — A
5
25
0.9
^" £
•
0.05
.^—
§ 0.8
<] 0.03
I
" 0.7
1

0.02 _i
2.0 3.0 5.0 7.0 10 20 0.1 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10

VcE. COLLECTOR-EMIHER VOLTAGE (VULTS) Ic. COLLECTOR CURRENT (mA)

MOTOROLA Semlc€>n€luct€>r Pr€>€§uct9 Inc.

(g)
 - . " ' 1

438 Appendi xA

ir^j MOTOROLA Semicon€tucior Products Inc.

2NS;088, 2N5089 (continued) figure 9 -DC current gain

1 1 1

-Vci-LOV
g 2.0 1
w' ',«„ ^ _ ,^^_ -
_
1

J _
— -• _^ _ _ , . . .. . ^. -. _ . . . , _^ „
-••
1

--=

sc
3
.^ —— - -• - — -- " "
Ta=125»C

"— ^
_
—
_ —
—
—. .i.
—
--.
1.0
_ «. ^s "
^ -- _i:
— -^^
.

=-=^ — ^25»C- — — j — —
ec 07
,
.

^K — " _ ^ ^ ^i^ « - —— — — - - —
.1^
.. • B
— < >
,

_ - -^
" ^r '
I
^^ .* ""^ "" '

Jo. ..« .
- r- — *"
-55»C

a%
0.01 0.02 0.03 0.05 0.07 0.1 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10

Ic. COLLECTOR CURRENT (mA)

HGURE 10 - COLLECTOR SATURATION REGION

l.U
n -1

T
Ta = +25»C

i" lc = 0.1 mA .1.0 nA ).0 mA 10

1..
I
S5

? 0.4
1
^
o I
\VV
\ V ^
g 0.2
V ^N i
^
L.

^ --- !!
— ^ -
'
j^
— — —-- -
" ~™ --- """" = = .

_^ _

I 2 3 5 7 1.0 2 3 5 7 10 2 3
1

« 7 1 00 21X) 3(X) 500 700 lOOC

I|. BASE CURRENT (^)

FIGURE 11 - CURRENT GAIN - BANDWIDTH PRODUCT FIGURE 12 -CAPACITANCE

_1000 1
'
! 10
— — ~ —
Ta =
1

800 +25»C-
I
7.0 1
A~ lb" L
§ 600
^ "^ -^ 5 s I ::;
v« = X 5.0
--
^
o 400
^'
A ::;
4.0
^
" "^ ^
/« ==
5 ov -1 . ^'^
i 300
//
f/"
4 t'
J 3.0 **
^
200
/V - . Cl kx*
•*^
7
^
) 2.0
^-
*i
//
100
i
^
I __ _ __ _; _ 10 _J -.
03 10 7.0 10 0.1 0.2 0.3 0.5 0.7 10 2.0 3.0 5.0 7.0 10
01 0.2 0.5 0.7 2.0 3.0 5.0

Ic. COLLECTOR CURRENT (mA) REVERSE VOLTAGE (VOLTS)

 Manufacturers' data sheets 439

NPN Silicon Planar SPRflGUE

THE MARK OF RELIABILITY

TYPE 2N5376 AND 2N5377 PREMIUM PERFORMANCE

ECONOLINE® TRANSISTORS
For Industrial Small-Signal, Low-Noise, Low-Power
Audio Frequency Applications

_J ox
^^ Mr
ABSOLUTE MAXIMUM RATINGS
at 25 C Free-Air Temperature (3) LEADS
0017
(unless otherwise noted)
;S'<|fll
Collector-Base Voltage 60V
Collector-Emitter Voltage (See Note 1 ) 30V (31 LEADS
SPACED 90* ON
Emitter-Base Voltage 5V TO-ie PIN CIRCLE

Total Dissipation at
Collector Current
25 C Free-Air Temperature (See Note 2) .... 360mW
500mA 2
Junction Temperature, Operating + 150 C NOTE I LE»0 DlAMETE" IS COXTROLLEO IN THE ?ONe
BE'aEEm O'O »NO0 250 fpOm tmeSEiTinc
Lead Temperature V]6 Inch from Case for 10 Seconds 260 C Plane between OJSOANOENDOf LEaO *
MAX OF 0021 15 MELD

Storage Temperature Range — 55 C to -}- 150 C

PACKAGE BR

ELECTRICAL CHARACTERISTICS: at Ta = 25 C (unless otherwise noted)

2N5376 2N5377
Parameter Symbol Test Conditions Min. Max. Min. Max. Units

Collector-Base V(BR)CBO Ic = IOmA, Ie - 60 — 60 — V

Breakdown Voltage
Collector-Emitter V(BR)CEO Ic = 10mA, Ib = 30 — 30 — V
Breakdown Voltage (See note 3)
Emitter-Base V(BR)EBO Ie = IOOmAJc = 5 — 5 — V
Breakdown Voltage
Collector Cut-off 'CBO Vcb = 30V, JE = — 10 — 10 nA
Current
Static Forward Hfe Ic - 10)uA, VcE = 5V 100 500 40 200 —
Current Transfer ic = mA, VcE = 5V
1 120 600 100 500 —
Ratio Ic = 10mA, VcE = 5V 150 — 120 — —
(See Note 3)
Collector-Emitter VcE(SAT) Ic = 10mA, Ib = 1mA — 0.20 — 0.20 V
Saturation Voltage
Base-Emitter Vbe(SAT) Ic = 10mA, Ib = 1mA 0.65 0.80 0.65 0.80 V
Saturation Voltage

Notes:
1. This value applies when the base-emitter diode is open-circuited.
SEMICONDUCTOR DIVISION
2. Derate linearly to 1 50 C free air temperature at the rate of 2.88 mW ^C. SPRAGUE ELECTRIC COMPANY
3. Pulse test: Pulse wid»h = 300 ^<sec, duty cycle <2%.
Pembroke Rood, CONCORD, N. H. 0330)
 440 Appendix '^

ELECTRICAL CHARACTERISTICS • Cont. TYPE 2N5376 AND 2N5377

2N5376 2N5377
Parameter Symbol Test Conditions Min. Max. Min. Max. Units
Small-Signal h,b Ic = 1mA, VcE = 5V 20 32 20 32 ohms
Short-Circuit Input f = IKhz
Resistance
Small-Signal hob Ic = mA, VcE
1 = 5V 0.05 0.2 0.05 0.2 Mmhos
Open-Circuit Output f = IKhz
Conductance
Small-Signal hfe Ic = 1 mA, VcE = 5V 120 1000 100 900
Common-Emitter f = 1 Khz
Forward Current
Transfer Ratio
Common-Base Ccb Vce = lOV — 8 — 8 PF
Open-Circuit Collector f = IMHz, Ie = (Note 1)
Capacitance
Small-Signal |hfe| Vce = 5V, Ic = 500mA 3 15 3 15 —
Common-Emitter Forward f = 10 MHz
Current transfer Ratio
Wideband Noise Figure NF Ic =
IOmA, Vce = 5V, — 2.0 — 3.0 dB
Rg =
10 Ki.',
Bandwidth = lOHz to 15.7 kHz
Notes:
1. Measurement employs a three-terminal capacitance bridge incorpoi ating a guard circuit. The emitter terminal should be connected to the
guard terminal of the bridge.

24

-1

CD
20
/
i
/
O
16 y -.,:

/' ^ '/
f
m
z

pM
12
a
-)
/ /
o /
8 ,^ >
y rf ,y ;;^
/
LU •

^ ^-
o
z
4

~ J = =:::
•
=:
::
1'
^
=::: =
1 1
=4--
50 100 500 1000 5000 10.000 10 50 100 500 1000 5000 10,000
COLLECTOR CURRENT. Iq . IN MICROAMPERES COLLECTOR CURRENT Ic JN MICROAMPERES ,

DI^C ArO A-4S50 owe VO /I -4 $3*

TYPE 2N5376 ECONOLINE TRANSISTORS TYPE 2N5377

SPOT NOISE FIGURE AT 25 C WITH SPOT NOISE FIGURE AT 25 C WITH
Rg = lOK, Vce = 5 V Rg = lOK, VcE = 5 V

20 1

^
s^

""- 3
O
-I
lu
12 ^
i
-*
• ,

:"
2z 4- 1 y{
^
o? 'r^
-^ ^ =^L i
r-1
z -^
~ =
R»I0K 1 p - i.-= Rg = IOk
1 ^ _j _ _^^
10 50 100 500 l(
50 lOO 500 1000

COLLECTOR CURRENT 1^ '^ MICROAMPERES COLLECTOR CURRENT Iq. IN MICROAMPERES

,
0»rc VO A-4»$S
Dirf no A-4»Sl

TYPE 2N5376 TYPE 2N5377

WIDEBAND (lOHzto 15.7kHz) NOISE WIDEBAND (lOHzto 15.7kHz) NOISE

FIGURE AT 25 C WITH Vce - 5 V FIGURE AT 25 C WITH Vce - 5 V

 A

Answers to odd-numbered problems 441

Chapter 1

1. (a)'1.050 (b)5.00fA (c) 0.926 m

3. 766 pA, 23.7 mV, 1.53°C
5. (a) 3.23 mA/(K)3 (b) 0.726 V and 0.647 V (c) (nk/q) [In (Id/K)
- 3(1 + In T)] - 1.961 mV/°C
(d)
7. 1 point each curve: (0.919 V, 1 mA), ( - 0.081 V, 1 mA)
9. (a) 4.74 mA (b) 4.64 mA
11. (a) 0.305 V (b) 0.753 fxA (c) 8.56 mA
13. (a) 73.2 mA
(b) 25 mA
(c) 1.667 V

15. (a) 0.708 V (b) 0.542 V (c)-4V (d) - 10.24 V (e) -11.18 V
17. (a) 0.437 V (b) 58.3 U (c) 4.44 fi (d) 0.4370 < Vd < 0.4378 V
(e) 4.386 < r < 4.505 Q
19. 46.9 fi
21. 25.6 cos UOirt ^A; 379 + 25.6 cos UOirt iik
23. io = 3.91 X 10-3 + (t;,/26.4) A
25. (a) Vs = 1: Do = 0, t;« = 1 (b) Vs = 1: t^D = 0.7, v^ = 0.3
(c) 34.3 fi
27. (a) 1.552 fi (b) 0.0525 Q (c) 118.2 Q
29. (a) - 11.33 A (b) - 8 V (c) Reverse (d) - 2 A
31. JR = 40 fi, 14 < /s < 21.4 mA; or R = 50 12, 10.6 < /§ < 17 mA
33. 1 point: (5 Mrad/s, 4.64 /- 31.7^ fi)

35. (a) 2.14 pF

68.7 kHz increase
(b)
37. (a) 194.6 pF
(b) 212.4 pF (c) 155.5 pF (d) -6.53 x lO-i^F/^C
39. 1.904 pF, 0.218 /xH
41. (a) 2 points: (0, 100 V), (5 ms, 0) (b) t;^(av) = 39.3 V, t;sin(av)
= 31.8
V (c) 2 points: (0, 50 V), (2.18 ms, 0)

43. (a) 57 V (b) 820 V (c) 3.33%

45. (a) 138.9 /xF (b) 34.7 /xF (c) 86.8 /xF
47. transformer, 1000 /xF in parallel with 1.5 kQ, 0.28%
10: 1
49. 3.3 kO; 30.08 < Vl ^ 30.20 V; 1.007 < /^^ < 6.015 mA; 3.05 < |/o|
< 8.02 mA
51 (a) 5082-4487 in series with 632 12
. (b) reversed LEDs in parallel, 632
12 in series
442 Appendix B

Chapter 2
1. 39.6 /xA, 3.96 mA, 0.65 V, 8.85 V, 8.2 V, 35.1 mW
3. (a) 120 fiA (b) 6 mA
(c) - 6.12 (d) 0.7 V mA (e) 8 V (f) 8.7
V 0.084 mW
(g) 4.284 mW (h) 52.284 mW (i)

5. (a) Both active (b) Tl saturated, T2 active (c) 4.802, 4.351,

73.650, 0.510, 0.639, 62.500, 0.108, 3.038 mW
7. (a) BE, F; CB, R; active (b) BE, R; CB, R: cut-off (c) BE, F; CB,
F; saturated (d) BE, F; CB, R; active
9. (a) saturated (b) active
11. (Measure slopes of straight lines) (a) 90 Q (b) 150 Q (c) 210 Q
13. (a) 64.00 mW
(b) 4.74 mW
15. (a) n (b) 4.47, - 1.491 (c) 8.89 mA (d) -0.879 V
17. (a) 2 mA, -0.1 /xA, -1.9999 mA, -0.5 V, -2.5 V, 5 V, 5.5 V,
10.00005 mW
(b) - 2 mA, 0.1 jlxA, 1.9999 mA, 0.5 V, 2.5 V, -5V,
-5.5 V, 10.00005 mW
(c) p, A = S, B = D, C = G

19. (a) 5 mA, - 2 nA, = - 5 mA, 6 V, - 1 V, - 3 V, 7 V, = 30 mW

(b) - 5 mA, 2 nA, = 5 mA, - 6 V, 1 V, 3 V, - 7 V, = 30 mW
(c) A = B = D, C = G
S,
21. (a) 1 mA, - 1 mA, - 2 V, 3 V, 3 (b) - mW 1 mA, 1 mA, 2 V, - 3
V, 3 mW (c) 1 mA, - 1 mA, 2 V, 3 V, 3 mW (d) - 1 mA, 1 mA,
-2V, -3 V, 3mW
23. (a) Tl ohmic, T2 saturated, h > (b) Tl ohmic, T2 saturated. Id
> (c) Tl saturated, T2 saturated, Id > (d) Tl saturated, T2
ohmic, Id> (e) Tl cut-off, T2 ?, h =
25. (a) 556, 455 Q (b) 1111, 909 Q (c) 1667, 1364 fi (d) 370, 303 Q
(e) 0.379, 0.290
27. (a) 800 Q (b) 32 Q (c) 0.949 and 11.86 mm
29. (a) 482 fi (b) 1482 Q (c) 1690 ppm/°C, 800 ppm/°C

Chapter 3
1. (a) 30.0 mA (b) 2.78 mA
(c) 0.695 V

3. (a) 1.372 mW (b) 9.139 mW

(c) 10.51 mW
5. (a) - 19.61 nA (b) -0.834 (c) 1.701mA mA
7. (a) 33.3 fi, 1.2 kfi, 0.56 V (b) 18.6 mA, - 18.9 mA, 0.62 V
9. (a) Ic = IcEO + (Vce/Ro) (b) 1 point: (0.1 V, 3 /xA)
11. 2.136 19.38 /xA, 3.97 V
mA,
13. 1.923 0.603 V
mA,
15. 10.39 kfi and 747 fi
17. (a) - 140.0 and 144.0 mA, - 800 and 804 mA (b) - 1.429 mA and
- 250 /xA
19. (a) 1.984 mA, 3.03 V (b) 217 kQ (c) 0.849 mA
21. Re = 15kfi, Kb = 3.26 Mfi
 A

Answers to odd-numbered problems 443

23. 4.13 1.240 V, 10.93 V

mA, -
25. (a) 6 V - 0.745 V (c) 11.21
(b) mA
27. (a) mA,
2.25 1.75 V (b) 250 kQ (c) 424 kQ

29. (a) -4.5 V, 18 (b) mA

- 1.146 V (c)

31. 3.66 V, Ikfi, 9V

33. (a) 11.52 mA, 6.72 V (b) 4.5 mA, 16.35 V
35. (a) 3.63 V, 8.29 mA, 3.43 V (b) 28.41 + 137.30 + 0.92 + 1.38
= 201.16 - 33.14 mW
(c) 8.43 m(5

37. 5.54 mA, 6.16 V

39. (a) -8.5 mA, - 100 M, -3V, -0.8 V (b) -11mA, - 100 M,
-9V, -0.8 V (c) -4.5 mA, - 100 /iA, - 2 V, -0.8 V
41. 8*mA, 8V
43. 7.1mA, 11.3 V

Chapter 4
(a) 1.000 mA, 10.00 M, 5.00 V and 1.031 mA, 2.06 /xA, 4.39 V
(b) 0.999 mA, 9.99 M, 5.02 V and 1.128 mA, 2.26 fxA, 2.45 V
(a) 1.878 mA, 3.27 V (b) 2.03 mA, 1.651 V (c) Re = 5 kQ, Re
= 4.64 kQ, and fig = 27.0 kl2 OK
5. 116.1 kQ, 35.7 kl2, 15 kQ, 5 kfi, 25 V OK
7. (a) 0.815 5.24 V
mA, (b) Ri: 10.1%, fig: 9.0%, Re: 10.9%, Re:
0% (c) Ri: 3.35 V, R2: 3.55 V, Re: 3.64 V, Re: 3.77 V
9. 4.90, 14.71, 4.675, 2.825, 187.5 kO
11. 4.27 and 38 kfi OK
13. 50 and 3.80 kfi OK
15. a) 500 mW at 25°C, 25°C,
150°C (b) 0.250°C/mW (c) 96.5°C
17. a) -95°C, -15°C (b) - 120°C, -40°C (c) 46.7°C, 82.2°C
19. a) 12.5°C/W (b) 9.5°C/W (c) 2 (d) 2.63 W W
21. a) Re = 3.16 kQ, Re = 3.15 kQ, Hi = 22.2 kQ, R2 = 13.95 kQ OK
b) -50.9°C, 128.7°C
23. 52 kQ, 103 kQ, 16.8 kQ, 6 V OK
25. a) 12.24 V, 28.5 kQ, 3.92 kQ, 3.50 kQ (b) -1.097 mA
27. a)8.14kQ, 4kQ (b) 0.942 m
29. a) 3.16 mA (b) -2.99/xA/°C
31. a) 1.855 mA, 5.80 V (b) 2.22 mA
33. a) 1.596 mA, 7.23 V (b) 7.2%
35. a) 3.98 and 2.31 mA, 7.61 and 4.45 V (b) 12 V, 0.284 kQ OK
37. a) 2.26 mA (b) R2 = 60.6 kQ (c) R2 = 36.6 kQ
39. a) Rd = 66.6 kQ, Rss = 16.74 kQ, R^ = 316 kQ, fig = 100 kQ OK
b)99.1kQ
41. a) 3 V (b) 5 V
444 Appendix B

43. R2 = Rss = 1.083 kl]

00, OK
45. (a) 1.458 mA, - 1.292^V, 4.96 V, 31.9 mW (b) 500 kQ (c) 50 kfi
(d) 7.5 kl2

Chapter 5
1. Av = -gm(RL\\rd)(RB\Ml[Rs + {Rb\K)]
3. (a) 1.8 mA (b) - 510 cos 500^ mV (c) 6 - 0.510 cos 500t V
5. 56.1 cos 104^ mV
7. 9.98 - ;24.4 Q
9. (a) -29.3 (b) -255
11. (a) 77.6 (b) 151.3
13. (a) 1.075 mA, 32.2 mU, 2.80 kQ, - 436 (b) 13.76 kQ (c) 1979 kQ
15. (a) 887 kfi (b) 1.184 MQ
(c) 488 kQ

17. (a) 9.8 pF (b) 15.6 pF (c) 27.7 pF

19. (a) 16.7 pF (b) 70.4 pF (c) 60.9 pF

21. 131.5 - /438Q

23. (a) 38.9 mO, 5.14 kfi, 74.8 pF, 2.5 Mrad/s (b) 4 pF, 200, 800 Mrad/s,
93.3 pF, 4 Mrad/s
25. (a) Td = 25 MQ, g^ = 32.4 /xO, r^ = 1.388 Mfi (b) r^ = 250 kQ, g^
= 3.24 mU, r^ = 19.73 kQ
27. (a) Ic = 64.8/yc£^ (mA) (b) Ic = 9.62/Vce^ (mA)
29. (a) 45.2 Q, 2.99 kQ, 65.0 pF, 3.98 pF, 44.9 mU, 7.40 kQ (b) 5 Mrad/s
(c) Increase T, decrease Ic increase Vce
,

31. (a) -60.8 (b) -88.9

33. (a) r, = 8.8 kQ, r^ = 24.4 kQ, g^ = 65.9 m^, n = 1.181 (b) 387
35. 90.1 /xQ, 9.01 X 10-3, -0.910, 9.10 /xO
37. 6.4 + 0.16 cos 1200fmA
39. 872 Q
41. 483 Q
43. (a) Cg, = 3.4 pF, C^d = 1.4 pF, g^ = 4.7 mU, r^ = 20 kQ, C^ = 0.4
pF (b) 2.5 pF, 1.3 pF, 2.35 mU, 25 kQ, 0.4 pF
mU, 1 kQ
45. 5.95 pF, 0.02 pF, 1.57 pF, 2.86 kQ, 12.0 /- 34.9°
47. (a) - 1.096, 2265 (g^ in mU, 3.44 mU (4.5, 3.3)
mU) (b) 4.40
49. (a) AH: 3.75 mA, 7.5 mU (b) JFET: 9.72 m^, 17.84 pF, 3.54 pF;
MOSFETs: 9.72 mU, 10 pF, 2.5 pF

Chapter 6
1. (a) -124.5, -84.5, -43.8, 5450, 2.11 kQ, 6 kQ (b) -129.8,
- 117.3, - 203, 26,400, 9.40 kQ, 6 kQ
3. -54.6, -47.0, -167.9, 9170, 6.15 kQ, 5 kQ
Answers to odd-numbered problems 445

5. -206, 15,310
7, Re = Re = G kfi, Ri = 195 kQ, R2 = 137 kfi, Vcc = 18 V OK
9. 25 kfi, 4 kfi, 32.4 mO OK
11. 32, 20, 3, 2.7 kfi
13. (a) -365 (b) -7.68
15. 124.6, 40.1, 0.492, 61.3, 23.7 fi, 6 kfi
17. He = «£ = 5 kfi, Ri = 47.3 kfi, ^2 = 30 kfi OK
19. 0.990, 0.944, 3.45, 3.41, 20.9 kfi, 32.9 fi

21. He = 5 kfi, Ri = 234 kfi, R2 = 178 kfi OK

23. (a) -21.1 (b) 0.236 /xA, 65.8 nA, 0.1974 M, 0.1316 mA, 0.263 mA
25. (a) -19.75 1.635 kfi (b) (c) -21.6
27. (a)* - 16.43
(b) 147.0 kfi (c) - 17.25
29. 1 Mfi, 2.04 kfi, 55.8 fi OK
31. 1 Mfi, 2.02 kfi, 39.6 fi
33. 185.2 fi, 8.25, 6.50, 0.306, 2.52, 3 kfi
35. Rd = 5kfi,Rss = 500fi,Hi = Mfi, R2 = 33.1 kfi, V^d = 15
1 V OK
37. 255 kfi, 0.786, 0.783, 40.1, 31.5, 185.2 fi
39. Ri = 100 kfi, Rss = 4.96 kfi
41. (a) 1.961 kfi, 2.61 kfi, -48.2 (b) 1.891 kfi, 2.70 kfi, -49.4
43. 1 point: (2 x 10 -3, 1.942 kfi)

Chapter 7
1. (a)6.02dB (b)26.0dB (c) 43.0 dB (d) 46.0 dB (e) sketch
3. Asymptotes: |A/|dB = 20 log [Hpi/(Hpi + Rp2)l |A;|dB = 20 log
[(Hpi) Cs co]; corner at ool = ll[{Rpi + Rp2)Cs]
5. (a) 37.0 dB (b) 19.91 dB (c) - 3.01 dB (d) - 40.0 dB
(e) A = 100/[(1 + /co)(l + /O.Olo;)]; 40 dB, 20 dB, 0, -40 dB
7. (a) Proof (b) 6.20 Mrad/s
9. (a) = 50.2 Mrad/s (b) -21.5 (c) = 50.4 Mrad/s, -21.4
11. lpointeach:(a)(2ma, 198.6Mrad/s) (b) (2 mU, 3.31) (c) (2 mH,

657 Mrad/s)
13. (a) ;11 mU (b) - ;9 mU (c) 3.54 + ;5.31 mO, - 2.62 - ;3.92 mU
15. = 361 Mrad/s
17. (a) 0.766 (b) = 343 Mrad/s
19. 340 - ;601 fi
21. (a) -64.4, 5.19 Mrad/s, 334 Mrad/s (b)^^: -64.6, 5.17, 334; g^:
-70.4, 4.81, 338; Re: -68.1, 4.94, 336 (c) to increase |Av,(^id)|,
increase g^; to increase o)h, decrease g^; to increase Av5(mid) Io^h? |
i^i-

crease g^
23. (a) Emitter 1 to ground: R^, g^V„ C,(2), r,(2), R, + V,; Emitter 2
to ground:g^V,, R^ Rl; El to E2: C, (b) r. = [Ri (1/gn.) || Ik.||
H,||r,]2C„ 7, = [RL + (Ri||l/g,||rJ|H,||r,)(l + gmR^C, (c)
-3.21, = 91.8 Mrad/s
^^" Appendix B

25. Proof
27. = 145Mrad/s
29. (a)= 386 Mrad/s (b) = 361 Mrad/s
31. (a) 25, 25, 50, 10 rad/s
(b) 0.577, 0.846
33. (a) 0.993 183 < o)^ < 249 rad/s (203.54 exact)
(b)
35. 195 < Oil < 234 rad/s (202.49 exact)
37. (a) 26.1, 13.9, 577, 5 rad/s (b) = 577 rad/s
39. (a) 58.8, 6.25, 622 rad/s (b) 622 < o)l < 687 rad/s (666 exact)
41. (a) 39.6, 6.7, 771, 6.7 rad/s (b) 771 < co^, < 817 rad/s (801 exact)
43. 85, 5, 10 /xF
45. (a) 80.1, 8.0, 7.8 rad/s (b) 80 < cu^. < 96 rad/s (84.96 exact)
47. (a)5, 40/iF (b) 93.96 rad/s, exact

Chapter 8
1. 11,310 (b)6.87kQ
(a) (c) 5 kQ

3. 1879 (b) 2626

(a)
5. (a) 15,660 (b) 43.0 fi
7. = 0.986 Mrad/s (1.005 Mrad/s, exact)
9. = 4.57 Mrad/s (4.635 Mrad/s, exact)
11. (a) -41.4 (b) = 20.9 Mrad/s (c) 21.31 Mrad/s

13. (a) = 0.310 Mrad/s (b) -5,820,000

15. Ci = 20, C2 = 7.5, C3 = 8, Cei = Ce2 = 400 fiF {f^ = 17.43 Hz,
exact)
17. 35.0, 16.6, 30.8, 20, 437, 337, 687,687 < cjjr < 1564 rad/s
19. (a) 506
<(^L< 760 rad/s (581 exact) (b) C^ = 1, C2 = 5, C3 = 0.5,

Cei = 200, C = 0.02 ^^F (246 rad/s exact)

21. Ci = 2.5, C2 = 1.5, C3 = 2, Cei = 100, Cei = 150 /xF (co^^ = 492
rad/s exact)
23. Ci = 0.01, Css = 20, C = 0.01, C3 = 0.1 /xF (co^^ = 1733 rad/s, two
zeros in numerator)
25. Rn = fli2 = 56.7kl], ^21 = ^22 = 26.4 kfi, i^£i = ^£2 = 5 kfi, Hci
= Rc2 = 0.5 kfi (Ay,(n,id) = 302, /h = 4.04 MHz, exact)
27. Common-collector, 2N5089, Ic = 1 mA, Vce = 5 V, Vcc = 20 V, Re
= 1 kQ, Hi = 61.3 kQ, R2 = 5.51 kfi, C„ = 1.5 pF, C^ = 18.6 pF

Chapter 9
1. (a) 0.19968 mW (b) 1.5974 mW (c) 0.19984 mW (d) 1.5973
mW
3. (a) -1 (b) -0.990
5. (a) 10.880 V (b) - 10.880 mV (c) 1 V (d) 0.989 V (e) - 0.210
mA
Answers to odd-numbered problems 447

7. -45, 00,0
9. Vo = -6va - 4i;5 + 2.75vc + 5,5vd
11. (a) straight line, Vo = 25t;2 - 5 (b) 3.2 kQ (c) 26 kfi
13. 50 50 /xA, 125 /xA, 125 ^A
/iA,
15. (a)25,000 (b) 15,000 (c) 300,000 (d) 1.41
17. (a) 6033 (b) 1408 (c) 21,480

19. (a) A > 1748 (b) A > 2498

21. t;, = 99,989 (i,A + iss)

23. (a)24kfi (b)5mV (c) 0.6 /xV (d) 5.0006 mV (e) |At5j = 1.25
mV
Chapter 10
1. (a) 1.018 298 V (b) 1.018 294 V (c) 1.018 300 V

3. (a) R2 = 717 Q, R3 = 5.7 kfi (b) 4 kl2 (c) 13 V

5. <t < 7r/30, Vo = 15 V; 7r/30 < t < tt/IO, v^ ^ - 15 V; tt/IO < t
< 7r/6, Vo = 15 V; 7r/6 < f < 7r/5, t;^ = - 15 V
7. (a) < f < 7r/3000, u^ = 12 V; 7r/3000 < t < 7r/600, t?^ = - 12;
7r/600 < t < - 7r/3000 < t < 77r/3000, Vo
137r/3000, Vo = 12 (b)
= - 12; 77r/3000 = 12 (c) < ^ < 7r/500, v^
< t < ll7r/3000, t;^
= - 12; 7r/500 < t < 7r/250, Vo = 12 (d) Vo = ± 12 V (constant)
9. Straight line through ( - 5.0054, - 5) and (5.0046, 5) V
11. (a) 0, 20 /xV, 20 /xV (b) - 0.4 V, 0, - 0.4 V (c) - 0.2 V, 10 /xV,
- 0.19999 V (d) 0.2 V, 10 /xV, 0.20001 V
13. (a) -0.15 V (b) -0.15075 V
15. (a) 6, 6, 0, 5 V (b) 6, 5.9970, - 0.01499, 4.9975 V (c) 6, 6.0030,

0.01501, 5.0025 V
17. - 32 dB per decade.
19. (a) -8.15 /- 5.19° (b) 110 rad/s
21. (a) 70.7 /- 45° (b) 9.05 /- 5.19° (c) 110 rad/s

23. (a) 46.4 krad/s (b) 1732 rad/s (c) 182.6 krad/s
25. (a) 2 points: co = 20 (-3.91, 2.63), o) = 100 (1.25, 1.25) (b) Yes
(c) -8
27. 2 points: (2 x 10^ rad/s, 42.55 dB), (2 x 10^, 20.49 dB); Peak: 48.34
dB at 6.44 x 10^ rad/s
29. (a) OK for o^ < 10^ (b) 3.17 Mrad/s
31. (a) 1 point: (10^ rad/s, 19.17 dB) (b) 30 < co < 3 x 10^ rad/s
33. Proof
Index

ac equivalent circuits for amplifiers, operational, see Operational

see Amplifier amplifier
ac model, see Diode; JFET; npn single-stage, high-frequency
• bipolar transistor, etc. CB, 271-273
Active region, 52 CC, 273-276
AD547, 365, 390, 417-422 CD, 265-266
AFC, 38 CE, 267-270, 293-298
Aluminum, 3 CG, 263-265
Ambient temperature, 132-136 CS, 256-261
Amplifier single-stage, low-frequency
broadband, 329-334 CB, 289-291
bridge, 384-388 CC, 291-292
buffer, 347 CD, 281
cascode, 312-313, 321-322, 329-334 CE, 282-289, 293-298
differential, 341, 350-352, 381-384 CG, 280-281
differentiator, 397-402 CS, 277-280
double-ended, 341 single-ended, 341
feedback, see Operational amplifier single-stage, mid-frequency
half-bridge, 386-387 CB, 219-223, 226
integrator, 402-405 CC, 223-226
inverting operational amplifier, CD, 236-239
343-345, 348-350, 357-360 CE, 208-215, 215-219, 226,
isolation, 347 239-242
multistage CG, 234-236, 238
analysis, 307-313 CS, 227-234, 238
CE-CB, 321-322 source follower, see Common-drain
CE-CE, 307-310, 313, 322-329 configuration
CE-CE-CE, 310-312 summer, 349-350
CS-CB, 312-313, 329-334 voltage follower, 347-348, 396
design, 334 Analog Devices, see AD547
high-frequency analysis, 313-318, Analysis, graphical, 7-8, 11-12,
325-326, 333-334 106-109
low-frequency analysis, 319-322, Antimony, 3
327-329 Asymptotic diagram or plot, 250-256,
mid-frequency analysis, 307-313 269, 287, 298
noninverting operational amplifier, Attenuation ratio, 21
346-347 Attenuator, signal, 16-24

449
450 Index

Automatic frequency control, 38 depletion, 25, 166

Avalanche breakdown, 4-5, 9-10, diffusion, 27, 37, 166, 176, 178,
70, 377 182-184
Average powder dissipation (Pd), diode, 25-27, 37-38
132-134 input, 261-263, 270, 334
interelectrode
bipolar transistor, 166, 172-184,
Bandwidth, 249-250, 293, 313
210
of op amp, 340, 390, 396
FET, 191-197
Base, 48, 49
junction, 25-27, 37-38, 166, 172
Base-collector junction, 49
Miller-effect, 261-263, 270, 325, 389
Base spreading resistance, 166, 174,
Capacitor (s)
•178-179
blocking, 165
Beta, see Short-circuit current gain
by-pass, 137, 151
Beta cutoff frequency (J^ or a;^),
coupling, 165
175-178
dc-blocking, 165
Beyond pinchoff , see Saturation region
Cascode amplifier, 312-313, 321-322,
Bias
329-334
current, 354, 366-370, 404
Case, temperature, 133
fixed, 142-144, 149
Cathode-ray oscilloscope, 249
line, 145-147
CE, see Common-emitter configuration
self-, 144-147, 149
Cell, standard, 376
see also Forward bias; Reverse bias
Channel, 57-61
Bias line, 145-147, 232-234
Characteristics, see Data sheets;
Bipolar transistor, see Transistor,
Diode; JFET; npn bipolar
bipolar
transistor, etc.
Blocking capacitor, 165
operational amplifier, 352-357
Boron, 3
Charge on electron, 5
Breakdown
Chip, 48, 120
avalanche, 4-5, 9-10, 70, 377
Clamping, 381
Zener, 4-5, 9-10, 377
Closed-loop gain, 344, 354, 390-396,
Break frequency, 252, 254, 257-261,
399-400. See also Operational
269, 278, 287, 291, 388-390
amplifier
Bridge amplifier, 384-388
Collector, 48-49
Bridge- type rectifier, 29-30
Collector-base
Broadband amplifier, 210, 329-334
capacitance, 166
Buffer amplifier, 347
junction, 48-49
Built-in potential, 26, 173
Common-base configuration
Bulk resistance, 27
dc design, 136-137
By-pass capacitor, 137, 151
high-frequency analysis, 271-273
low-frequency analysis, 289-291
CAD (computer-aided design), 250, mid-frequency analysis, 219-223,
278, 319, 328, 334 226
Capacitance Common-base output capacitance (C,./,

collector-base, 166, 173 or 173

C,fc),
common-base output (C^/, or C^h), Common-collector configuration
173 dc design, 136-137
Index 451

Common-collector configuration (cont.) internal, 390, 397, 400

high-frequency analysis, 273-276 lag, lead, 397
low-frequency analysis, 291-292 pole-zero, 397
mid-frequency analysis, 223-226 Complementary transistors, 53, 63
Common-drain configuration Computer-aided design, see CAD
dc design, 151-152 Computer analysis, see CAD
high-frequency analysis, 265-266 Conductance, dynamic, see Dynamic
low-frequency analysis, 281 conductance
mid-frequency analysis, 236-239 Conductivity, 2-3, 57
Common-emitter configuration, 51, Conductor, 2
164, 293-298 metallic, 2
dc design, 120-131, 216 Contact, ohmic, 3, 4, 27, 64
high-frequency analysis, 267-270, Contact resistance, 27
293-296 CORNAP (Cornell Network Analysis
high-frequency design, 296-298 Program), 250
^-parameters, 183-186, 239-242 Corner frequency, 252, 254, 257-261,
low-frequency analysis, 282-289 269, 278, 287, 291, 388-390,
low-frequency design, 296-298 394
mid-frequency analysis, 208-215, Coupling
238, 239-242 capacitor, 165
mid-frequency design, 215-219 direct, 388
operating point Crystal, 2-3
analysis, 120-123, 126, 128 CS, see Common-source configuration
design, 123-131 Current
Common-gate configuration electron, 48-50
dc design, 151-152 forward, 3, 49
high-frequency analysis, 263-265 gate leakage, 62, 66, 68, 100
low-frequency analysis, 280-281 IEEE standard reference direction
mid-frequency analysis, 234-235, for, 50-51, 54, 73
238 input bias, 366-370, 404
Common-mode input offset, 366-369
gain, 382-384 mirror, 141
rejection ratio (CMRR), 382-384 reverse saturation, 4-5, 52, 62
signal, 382-384 surface leakage, 4
Common-source configuration, 62-63 Current gain
dc design, 141-151 CB, 221
high-frequency analysis, 256-261 CC, 225
input characteristics, 62 CD, 236
low-frequency analysis, 277-280 CE, 212, 241
mid-frequency analysis, 227-231 CG, 235
mid-frequency design, 231-234, 238 CS, 229
output characteristics, 62-63 short-circuit forward (hoi), 183
y-parameters, 190-195 small-signal, short-circuit (jSq),

Comparator, voltage, 379-381 167-169, 175-177

Compensation, 389-397 Current limiting, 64
dominant pole, 397 Current mirror, 140-141
external, 390, 397 Cutoff region, 52
452 Index

Data sheets, see Appendix A var actor, 38

dc-blocking capacitor, 165 Zener, 4, 34-36, 377-379
dc model, see Diode model; JFET; Diode model
npn bipolar transistor, etc. applications, 16-24
Decade, 250-251 dc, 7-16
Decibel, 251 high-frequency, 24-27
Degree kelvin, 5 ideal, 9
Depletion low-frequency, 12-16
capacitance, 25 nonlinear, 5, 8, 9, 11
layer, 25, 66 piecewise-linear, 9-12, 17, 23
region, 25, 58-61, 66 Dominant pole, 393, 397
see also Transistor, depletion-mode Doping, 3, 26, 50
Derating Double-ended amplifier, 341
curve, 134-135 Double-subscript notation, 51
factor, 134-136 Drain characteristics, 98, 108
Differential amplifier, 341, 350-352, Drain-to-source saturation current
381-384 (loss). 61-62, 99, 142
Differentiating amplifier, 397-402 Drift, 364-366
Differentiator, 397-402 Dynamic conductance, 13-14
Diffusion, capacitance, 27, 37, 166, Dynamic resistance, 13-14, 15-19, 22,
182-184 27, 178-179
Digital signal, 379
Diode
Early voltage (V^), 170
applications, 27-38
ECAP (Electronic Circuit Analysis
breakdown, 4-5, 9
Program), 250
capacitance, 25-27
characteristic, 3-12, 423-424
ECAP II, 250

Electron, 2-3, 24, 25, 49-50

clamping, 381
charge, 5
current-limiting, 64
current, 3-4, 49-50
data sheets, 423-424, 433-434
Electronic
dynamic conductance (g), 13-16
circuit analysis program, 250
dynamic resistance (r), 13-19, 22
tuning, 38
equation, Shockley, 5, 13, 17
Emitter, 48-50
ideal, 9, 10, 27, 381
current, control of, 120-131
symbol, 9
follower, see Common-collector
integrated circuit, 120, 138-140
configuration
junction, 3, 4, 25
resistor, use of, 120-131
light-emitting (LED), 37, 433-434
Emitter-base junction, 49, 128-129
load line, 17
Enhancement-mode, see Transistor,
operating point, 12
enhancement-mode
rectifiers, 28-30
Equivalent circuits for amplifiers, see
reverse-biased, 4
Amplifier, single-stage
reverse saturation current (/q), 4-5
Schottky barrier, 37-38
semiconductor, 1-38 Fairchild Semiconductor Corp., 14-16,
LED, 37 423-424
Schottky barrier, 37-38 FD600 data sheets, 14-19, 22-23,
symbol, 3, 9 423-424
Index 453

Feedback voltage (Avi), 210

negative, 121, 127, 340, 390, 391, voltage (Avs). 211
394-395 Gain-bandwidth product, 176-178,
stability,395-397 261, 270, 276, 394
positive, 391 Gate, 57, 58, 65
resistor, 343, 387 leakage current, 62, 66, 68, 100
Feedback amplifier, see Operational Graphical analysis, 7-8, 11-12, 106-
amplifier 109, 144-147, 149-151
FET (Field-effect transistor), see Ground, virtual, 344
Transistor, field-effect
Fixed bias, 142-144, 149
HA-2107, 352-357, 362-363, 365-366,
FM 383, 388, 390, 425-428
radio, 38
Half-power frequency, 249-250,
tuner, 312
254-256
Forward bias
Half-wave rectifier, 28-29
diode, 3, 4, 26
Harris Semiconductor, see HA-2107
transistor, 49-54
Heat sink, 133
Forward current, 3, 49
Hewlett-Packard Co., 37, 433-434
Forward resistance (Rq), 9
Frequency
HF band, 329
Hi-fi system, 2
beta cut-off (J^ or co^), 174-177
High-frequency model, see Diode
break, see Break frequency
model; JFET; npn bipolar
corner, see Break frequency
transistor, etc.
domain, 403
Hiss, 399
gain-bandwidth product, 175-178,
Hole, 3, 24, 27, 49-51
261, 270, 276, 394
current, 3-4, 53
half-power, 249-250, 254-256
h-parameter(s), 162, 183-187, 239-242
lower half-power or 3-dB,
model, 162, 183-187, 239-242
249-250
Hybrid parameters, see /i-parameters
resonant, 38
Hybrid- TT model
upper half-power or 3-dB, 249-250,
for bipolar transistor, 162-184
340, 393, 400
for FET, 187-197
Full-wave rectifier, 29-30

IC, see Integrated circuit

Gain Ideal diode, see Diode, ideal
closed-loop (G), 344, 390-396, IEEE standard reference direction for
399-400 currents, 50-51,54, 73
common-mode, 382-384 IGFET (insulated-gate, field-effect
current (A/), 212 transistor), 55, 56, 64-74
loop, 395-396 dc circuit design, 141-152
open-loop (A), 341, 344, 364, dc models, 97-106
388-397, 399 depletion-mode, 64-69, 97-102,
power (Ap), 212 141-148
small-signal, short-circuit, current enhancement-mode, 64, 69-74,
(/3o), 167-169, 174-178 102-106, 148-151, 188-189
stability, 395-397 n-channel depletion-mode, 64-68,
voltage (Ay), 164 97-102, 141-148
454 Index

IGFET (cont.) Integrated circuit (IC), 37, 48, 74-76,

n-channel enhancement-mode, 69-72, 138-141
102-106, 148-151 current mirror, 140-141
output characteristics, 65-67, 71, diode, 138-141
74, 103-105 monolithic, 37, 138
p-channel depletion-mode, 68, 101 resistors, 74-76
p-channel enhancement-mode, 72, Integrator, 402-405
105 Inter electrode capacitance, see
small-signal, high-frequency model, Capacitance, interelectrode
190-195, 195-197 Intrinsic silicon, 2
small-signal, low-frequency model, Inverting amplifier, 343-345, 348-350,
187-190, 195-197 357-360
symbols, 68, 69, 71,73 ideal, 343-345
transfer characteristic, 102-106 Inverting input, 341
106-109 Isolation amplifier, 347-348
Illumination (radiant energy), 2
Impurities in semiconductors, 3 JFET (junction field-effect transistor),
n-type, 3 55-64, 73
p-type, 3 dc circuit design, 141-148
Incremental signal, 12, 15 dc models, 97-102
Input admittance, short-circuit (t/n), input characteristic, 62
191 n-channel, 55-63
Input capacitance, see Miller-effect output characteristics, 62, 65
capacitance p-channel, 63-64
Input characteristics, see JFET; npn small-signal, high-frequency model,
bipolar transistor, etc. 190-195
Input impedance (Zj), 212 small-signal, low-frequency model,
CB, 221 187-190, 195-197
CC, 223 symbols, 63, 65, 73
CD, 236 transfer characteristic, 98-102, 146
CE, 212, 240 Junction
CG, 235 capacitance, 25-27, 166, 173
CS, 228 collector-base, 48-49
op amp, see Operational amplifier, diode, 3-4, 25
input resistance emitter-base, 48
short-circuit (^n), 183 p-n, 4
Input rectifying, 37
bias current, 366 semiconductor, 3-4, 25, 48
inverting, 341 temperature, 131-136
offset current, 366 transistor, 48-55
offset voltage, 364-366, 404 Junction field-effect transistor, see JFET
noninverting, 341
Input resistance, 340-341, 348, 354, Kelvin degree, 5
359, 362 Kirchhoffs current law, 51, 86
Input load line, see Load line
Instability, 395-397 Large-scale integration (LSI), 74
Insulated- gate field-effect transistor, Leakage current
see IGFET gate, 62, 66, 68, 100
Insulator, 2, 25 surface, 4
 —

Index 455

Light, 2 FET, dc, 97-109

Light-emitting diode (LED), 37 /i-parameter, 162, 183-187, 239-242
Linear model hybrid-TT, 162-184, 188-197
bipolar transistor, 84-97, 162-186 ideal op amp, 341-345
npn transistor, 84-97, 162-187 integrated circuit, diode, 138-140
pnp transistor, 84-97, 162-187 linear, see Linear model
Linear regression, 16 nonlinear, see Nonlinear model
LM308, 390, 397, 413-414 operational amplifier, 341-342
Load line, 17, 106-109 t/-parameter, 191-195
input, bipolar, 106-107 Monolithic resistors, 74-76
field effect, 107-109, 144, 149 Monolithic transistor, 48
Load resistance, 165 MOSFET (metal — silicon-dioxide
309
effective, 223, silicon field-effect transistor),
Loop gain, 395-396 55, 56, 64-74
Lower half-power or 3-dB frequency, dc circuit design, 141-152
249-250 dc models, 97-106
CE-CE, 319-321, 327-329 depletion-mode, 64-69, 97-102
CE-CB, 321-322 enhancement-mode, 64, 69-74,
multistage amplifier, 319-334 102-106, 148-151, 188-189
277-298
single-stage amplifier, n -channel depletion-mode, 64-68,
Low-frequency model, see Diode 97-102, 141-148
model; JFET; npn bipolar n -channel enhancement-mode, 69-
transistor, etc. 72, 102-106, 148-151
Low-pass filter, 31 output characteristics, 65-67, 71, 74,
LSI, see Large-scale integration 103-105
p -channel depletion-mode, 68, 101
Majority carriers, 49 p-channel enhancement-mode, 72,
Maximum 105
junction temperature, 131-136 small-signal, high-frequencv model,
power dissipation, 132-136 190-195, 195-197
Medium-scale integration (MSI), 74 small-signal, low-frequencv model,
Metallic conductor, 2 187-190, 195-197
Metal — silicon-dioxide— silicon field- symbols, 68, 69, 71, 73
effect transistor, see MOSFET transfer characteristic, 102-106,
Microphone, 379 106-109
Mid-frequencies, defined, 210, 249 Motorola Semiconductor Products,
Mid-frequency equivalent circuits for Inc., see 2N5088 and 2N5089
amplifiers, see Amplifier, MSI, see Medium-scale integration
single-stage Multistage amplifier, see Amplifier,
Miller-effect capacitance, 261-263, 270, multistage
325, 389
Mirror, current, 140-141 National Semiconductor Inc., see
Model LM308
bipolar transistor, ac, 162-187 n -channel, 55, 64
bipolar transistor, dc, 84-92 Negative feedback, see Feedback,
classification of, 8, 85 negative
diode, ac, 12-16, 24-27 Neudeck, G. W., 70
diode, dc, 7-12, 14-16 No-load condition, 33
FET, ac, 186-197 Noninverting amplifier, 346-348, 377
456 Index

Noninverting input, 341 Operating point, 12, 92

Nonlinear model effect on (Sq, 168-169
diode, 5, 8-9, 11 effect on Cg, and Cg^, 193-197
FET, 97-102 effect on C^, 174-178, 184
IGFET, depletion-mode, 97-102 effect on C^, 173-174, 184
IGFET, enhancement-mode, 102- effect on g,„, 168, 184
106, 106-109 effect on ^-parameters, 186
JFET, 97-102 effect on r^, 169-170
MOSFET, depletion-mode, 97-102 effect on r^, 168, 184, 186
MOSFET, enhancement-mode, 102- effect on r^, 179, 184
106, 106-109 effect on (/-parameters, 193-195, 197
npn bipolar transistor, 48-52 effects, tabulated, 184, 197
active region, 52 stable, design for, 120-131, 141-151
cutoff region, 52 Operating- point model, see Diode
dc circuit design, 120-137 model; JFET; npn bipolar
dc models, 84-97 transistor, etc.
input characteristics, 51-52 CB, 136-137
output characteristics, 51-52 CC, 136-137
saturation region, 52 CD, 151-152
small-signal, high-frequency model, CG, 151-152
166, 172-184 CE
small-signal, low-frequency model, analysis, 120-123, 126, 128
163-165, 165-172, 183-187 design, 123-131
symbol, 50-51, 73 CS, 141-151
n-type impurity, 3 Operational amplifier (op amp), 340-404
Nyquist criterion, 395-396 AD547, 365, 390, 417-422
Nyquist plot, 395 applications, 376-404
bias current, 354, 366-370
bandwidth, 340, 390, 396
Ohmic contact, 3, 4, 27, 64 characteristics, 352-357
Op amp, see Operational amplifier closed-loop gain (G), 344, 355-357,
Open-circuit 390-396, 399-400
CE output admittance (/i,,,,), 169, 239 common-mode
CE reverse voltage gain, (/ir^.), 239 gain, 382-384
output admittance, (/i22)' l^^ 382-384
rejection ratio,
reverse voltage gain (^12), 183 signal,382-384
Open-circuit time constants comparator, 379-381
CB, 271-273 compensation, 389-397
CC, 273-276 dominant pole, 397
CD, 265-266 external, 390, 397
CD-CS, 316-318 internal, 390, 397, 400
CE, 267-271 lag-lead, 397
CE-CE, 313-316 pole-zero, 397
CG, 263-265 dc coupling, 388
CS, 259-261 350-352,
differential amplifier.
CS-CB, 333-334 381-384
Open-loop gain (A), 341, 344, 364, drift, 364-366

388-397, 399 gain, see Open-loop gain; Closed-

frequency response, 388-397 loop gain
Index 457

Operational amplifier (cont.) Oscilloscope, cathode-ray, 249

HA-2107, 352-357, 362-363, 365- Output admittance
366, 383, 388, 390, 425-428 open-circuit (/i22)' 1^3
ideal,341-345, 356, 367 open-circuit CE {h^g), 169-170,
equivalent circuit, 341 185-187, 239
inverting amplifier, 343-345 short-circuit (1/22)5 191
noninverting amplifier, 346-347 Output capacitance, common-base
voltage follower, 347, 396-397 {Ccb or Cob), 173
input bias current, 366-370, 404 Output characteristics, see JFET; npn
input offset current, 366-369 bipolar transistor, etc.
drift, 366 Output impedance (Z^)
input offset voltage, 364-366, 404 CB, 222
drift, 365-366 CC, 226
input resistance, 340, 341, 348, 354, CD, 237
359, 362 CE, 212, 241
instability, 395-398, 401-402 CG, 235
integrator, 402-404 CS, 229
inverting amplifier, 343-345, 348- op-amp, 340, 341, 348, 359-360
350, 357-360 Output resistance (r^), 163-170, 172,
frequency response, 392-397 178-180, 184
ideal, 343-345
input resistance, 359
output resistance, 359-360 p -channel, 55, 63, 68
inverting input, 341 Phase, 390-392, 395
LM308, 390, 397, 413-414 for pole, 390
loop gain, 395-396 for zero, 390
noninverting amplifier, 346-348, 377 Phasor, 174, 395
noninverting input, 341 Phosphorus, 3
offset- voltage {VJ, 364-370 Physics, solid-state, 48
open loop gain (A), 341, 344, 364, Piecewise-linear model, 8, 9-12, 18-19
388-397, 399 Pierret, R.F.,70
oscillation, 389-391, 395 Pinch-off,58-59
phase, 390-392 voltage, 59, 142
saturation, 364-365, 379 Pinch resistor, 64
single-ended, 341 p-n junction, 3
stability, 395-397, 401-402 pnp bipolar transistors, 49, 53-55
summing amplifier, 349-350 active region, 54
symbol, 341 cutoff region, 54
uncompensated, 389, 396 dc models, 89
upper half-power frequency, 340, input characteristics, 54-55
388, 393, 400 output characteristics, 54-55
virtual ground, 344 saturation region, 54
voltage follower small-signal, high-frequency model,
ideal, 347-348 166, 172-184
input resistance, 362 small-signal, low-frequency model,
output resistance, 362-363 163-165, 165-172, 181-187
real, 360-363 symbol, 54, 73
Oscillations Pole, 388-390, 393-397
spurious, 389-391, 395 compensation, 397
 )

458 Index

Pole {cont. monolithic, 74-76

dominant, 393, 397 pinch, 64
phase, 390 Resonant frequency, 38
Positive feedback, 391 Reverse
Potential, built-in, 26, 173 bias, 4
Power dissipation, maximum, 132-136 diode, 4
Power supplies, 30-37 transistor, 49-52, 57-59, 65-66
Power gain (Ap), 212, 241 current, 4
CB, 222 saturation current, 4-5, 52, 62
CC, 225 voltage, 4
CD, 236 Ripple voltage, 31-37
CE, 212, 241
CG, 235 Saturation, 61
CS, 229 current, 94-95
Preliminary design, 123-124 current, reverse, 4-5, 52, 62
p-type impurity, 3 op amp, 364-365, 379
region, 61, 95
Schottky barrier diode, 37
Q point (quiescent point), see
Self-bias, 144-147, 149
Operating point
Semiconductor, 1-3
impurities in, 2-3
Radiant energy, 2 junction, 3-4, 25, 49
RCA, 135, 206 material, 1, 25
Rectifier see also Diode
bridge-type, 29-30 Sheet resistance, lA-1^
diode, 28-30 Shockley diode equation, 5, 13, 17
full-wave, 29-30 Short-circuit
half-wave, 28-29 admittance parameters, 191-195
Reference voltage source, 376-379 current gain, small-signal
(/3o),
167-
Regulation, 33-34 169, 174-178
Rejection ratio, common-mode, 383- forward current gain (/i2i), 183
384 forward transfer admittance (^21)^
Resistance 191
base spreading, 166, 174, 179, 184 input admittance (t/n), 191
bulk, 27 input impedance (^n), 183
channel, 57 output impedance (1/22). 191
contact, 27 reverse transfer admittance (t/12), 191
dynamic, 13-14, 17-18, 22, 26 Si, see Silicon
input, 340-341, 348, 354, 359, 362 Signal
load, 165, 212 attenuator, 16-24
output (r^), 163-169, 172, 178-180, common-mode, 382-384
184 incremental, 12, 15
pinch, 64 subscript convention for, 12-13, 20,
sheet, 74-75 164, 174
temperature coefficient of, 75 total instantaneous, 13
thermal, 132-136 Silicon, 2, 26, 64, 74, 129
Resistor Silicon dioxide, 64, 65
feedback, 343, 387 Silicon gate, 64
Index 459

Single-ended amplifier, 341 effect on conductivity, 2

Single-stage amplifier, see Amplifier, effect on C^ and C^, 182-184
single-stage effect on dynamic resistance, 13-14
Small-signal model, see Diode model, effect ong^, 181-184
low-frequency; JFET; npn effect onK and Vj, 148, 195-197
bipolar transistor; Operational effect onr^, 184

amplifier, etc. effect onr^, 182-184

SNAP (Symbolic Network Analysis effect onresistance, 75-76
Program), 250 effect onVfif, 128-129
Solid-state theory, 2, 48 effect onVbi, 26
SOLVE, 11, 278 effect onVp and loss, 142, 195-197
Source-follower, see Common-drain effects, tabulated, 184, 197
Configuration junction, 131-136
Source resistor, use of, 144-147, maximum junction, 131-136
149-151 standard, 5
SPICE (Simulation Program with Inte- Texas Instruments, Inc., see 2N3823
grated Circuit Emphasis), 250 Thermal equivalent circuit, 133
SPICE2, 250 Thermal resistance ((9), 132-136
Sprague Electric Co., see 2N5376 and Thermal voltage, 6
2N5377 Thermistor, 384, 388
Spreading resistance, see Base spreading Thermocouple, 379
resistance Thevenin impedance, 212
Stability, gain, 395-397 Threshold voltage, 70, 102, 380
Stable operating point, design for, Time
120-131, 141-151 delay, 249
Standard cell, 376 domain, 403
Standard reference direction for Transconductance (gm), 166-168
currents, IEEE, 50-51, 54, 73 Transducer, 384
Standard temperature, 5 Transfer admittance
Strain gauge, 384, 388 short-circuit forward (t/21), 191
Subscript convention short-circuit reverse (t/12), 191
dc, 13 Transfer characteristic, 98, 101, 103,
signal, 13 105, 109, 146
total instantaneous quantity, 13 Transformer, 28-30
Substrate, 65-66, 69, 72, 74-76 Transistor
Summing amplifier, 349-350 active region model, 84-90
Supply voltage, 92, 354, 376-377, 386 bipolar, 48-55, 84-97, 162-184,
Surface leakage current, 4 184-187
Symbols, 73, 341. See also name of case temperature, 132-136
device classification of, 55-56
cutoff model, 90-91
Television, 38, 249 Darlington, 336
Temperature data sheets, see Appendix A
ambient, 132-136 depletion-mode, 56, 64-69
case, 133 n -channel, 64-69
coefficient of resistance, 75 p -channel, 64-69
effect on (Sq, 181-184 enhancement-mode, 56, 64, 69-74
effect on (3^^ and Iceo^ 129 field-effect, 55-74
460 Index

Transistor (cont.) input resistance, 362

heat sink, 133-136 instability, 396
junction, 49 output resistance, 362-363
saturation model, 90-91 real, 360-363
unipolar, 55 Voltage gain (Ay), 164
see also IGFET; JFET; MOSFET; open-loop (A), 341, 344, 364, 388-
npn bipolar transistor; pnp 397, 399
bipolar transistors Voltage gain {Ayi)
Transition region, see Depletion region CB, 219
Tuning, electronic, 38 CC, 225
TV, 38, 249 CD, 236
2N3823 data sheets, 142-144, 429-432 CE, 210, 241
2N5088, 2N5089 data sheets, 132, 134, CE-CE, 307-310
186, 435-438 CE-CE-CE, 310-312
2N5376, 2N5377 data sheets, 124-125, CG, 235
127-128,130-131,439-440 CS, 228
Two-port network, 191, 239-242 CS-CB, 313
Voltage gain (Ay^)
UHF band, 329 CB, 221
Unipolar transistor, 55 CC, 225
Upper half-power frequency, 249-250, CD, 236
340, 393, 400 CE, 211, 241
multistage amplifier, 313-318 CG, 235
single-stage amplifier, 249-250 CS, 228
Voltage gain, CE open-circuit reverse
Varactor diode, 38 (hre), 184-187, 239
Very large-scale integration (VLSI), 74 Voltage gain, open-circuit reverse
VHF band, 329 {hi2), 184
Virtual ground, 344 Voltage reference convention, 51
Voltage Voltage regulator, 34-37
pinch-off, 59, 66, 100, 142
reverse, 4
ripple,31-37 Worst-case conditions, 129-130
saturation, 94
supply, 92, 354, 376-377, 386
t/-parameters, 191
thermal, 6
model, 162, 190-195
threshold, 70, 102, 380
Voltage comparator, 379-381
Voltage detector, 379-381 Zener breakdown, 4-5, 9-10, 34, 377
Voltage follower Zener diode, 4-5, 34-36, 377, 379
ideal, 347-348 Zero, 266, 388-390, 393
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M''p#
JOHN WILEY & SONS, ik\\
INC.
New York • Chichester • Brisbane /
Toronto • Singapore