4CS015

Lecture 4: Arithmetic Logic Units

Prepared by: Uttam Acharya

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 1. Today
• What is an ALU?
1. Today • Function Unit
2.What is ALU?
• Instruction Decoder
• Output Multiplexor
• Turning our adder into a subtractor

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 2. What is ALU?
ALU

2.What is ALU?
2.1 Arithmetic
Logic Unit
Diagram
2.2 The ALU

Fig: CPU

Fig: Motherboard
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 2. What is ALU?
• Performs set of arithmetic operations and set of logic
operations
2.What is ALU? • Multi operation combinational logic circuit.
2.1 Arithmetic
Logic Unit
• It has a number of selection lines to select particular
Diagram operation in the unit.
2.2 The ALU

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 2.1 Arithmetic Logic Unit diagram
2.What is ALU?
2.1 Arithmetic
Logic Unit
Diagram
2.2 The ALU Value 1 = 4

ALU Result = 9

Value 2 = 5

Operation = ADD
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 2.2 The ALU
Switch
• A function unit containing the Function Unit
2.What is ALU?
2.1 Arithmetic logic blocks that simultaneously 1 bit ALU
1 bit

Logic Unit carry out each operation 1 bit Logic (Output)

Diagram
2.2 The ALU Ctrl
• A controller that selects the required
output according to the instruction
Instr
• The instruction is a binary ‘word’
• A ‘switch’ that obeys the controller
which connect the output to the
required function
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 3.1 ALU Arithmetic and Logic
3.1 ALU Functions
Arithmetic and
Logic Functions • Output examples
3.2 ALU Decoder
and Output
• AND Output
1 bit
Selection • OR 1 bit
ALU
Logic AND
3.3 ALU
Instruction
• NOT OR
NOT
Decoder • XOR XOR
• Addition Ctrl Addition
Subtraction
• The controller “decodes”
the instruction to select the
required output Instr

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3.1 ALU 3.2 ALU Decoder & Output Selection
Arithmetic and
Logic Functions
3.2 ALU • Controller takes an instruction
Decoder and
Output • Logic is used so that only one of the logic operation
Selection outputs reaches the result output.
3.3 ALU
Instruction Output to ‘switch’
Decoder

Binary
Instruction Decoder

Ctrl

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3.1 ALU 3.3. ALU Instruction Decoder
Arithmetic and
Logic Functions • The decoder is a combinatorial Instruction Output
3.2 ALU logic circuit(CLC) Inst1 Inst2 ctrl1 ctrl2 ctrl3 ctrl4
Decoder and • The circuit in which, at any time output 0 0 1 0 0 0
Output
Selection is only depends upon inputs only is 0 1 0 1 0 0

3.3 ALU called CLC 1 0 0 0 1 0

1 1 0 0 0 1
Instruction
Decoder
• It converts binary information from
‘n’ i/p lines to a maximum of 2n o/p lines
• Multiple output
lines, ctrl1 to clrl4
• Only one of the output lines is ‘on’ for each
instruction
• ‘n’ instruction lines = 2n control lines.
Hence size of decoder is n* 2n
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3.1 ALU 3.3 ALU Instruction Decoder (Contd.)
Arithmetic and
Logic Functions
3.2 ALU
Decoder and
• From the truth table, we can design a logic Inst
Output circuit. 1
Inst
ctrl
1
2
Selection • Boolean expression for o/p is: ctrl
3.3 ALU 2
Instruction ctrl1=Inst1’Inst2’, ctrl2=Inst1’Inst2,
Decoder ctrl
ctrl3=Inst1Inst2’ and ctrl4=Inst1Inst2 3

• The arithmetic and logic function section ctrl

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performs all operations at the same time
• So we use the controller to select
the output we want
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 4. ALU Output Multiplexor

Lines from ALU logic Block

4. ALU Output
Multiplexor
• If we have a collection of
5. Half Adder AND gates, connected to an OR gate,
(HA) we have Output
6.Full Adder a logic circuit for the multiplexer
(FA)
• Many to one
• Selects the outputs with the help of
decoder outputs
Control lines
from decoder
Lines form Decoder output

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 5. Half Adder (HA)
4. ALU Output
Multiplexor
• Two bit adder circuit x s
HA
5. Half Adder • Number of inputs = 2 (x and y ‘say’) y c
(HA) • Number of outputs= 2 (sum and carry)
6.Full Adder
For example:
(FA)
0 0 1 1 Input Output

+0 +1 +0 +1 x y Sum(s) Carry(c)
0 0 0 0
0 1 1 10
0 1 1 0
1 0 1 0
sum 1 1 0 1
carry

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 5. Half Adder (Contd…)
4. ALU Output
Multiplexor
• Boolean expression for • Logic diagram
5. Half Adder half adder output from
(HA) truth table is as; (x⊕y)
6.Full Adder x
Sum(s)= Sum
(FA) y
x’y+xy’
=(x⊕y)
Carry(c)=xy xy
Carry

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 6. Full Adder (FA)
4. ALU Output
Multiplexor
• Three bit adder circuit • Block diagram
5. Half Adder • Number of input= 3(x,y
(HA) and cin ) s x s
x
6.Full Adder • Number of output =2(sum HA-1
c y
HA-2
c
(FA) and carry) y

• FA can be constructed cin

using two HA and OR

gate

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 6.1 Logic circuit diagram of FA
6.Full Adder
(FA)
6.1 Logic x⊕y (x⊕y⊕ cin)
x
circuit diagram
y
of FA
(x⊕y) cin
xy

xy
cin

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 7. ALU Components: Contd.
Function Unit/ALU Logic
Multiplexer(MUX)
Operations Multiplexor
7. ALU A AND
Components: B
Contd. OR

8.Multi Bit
XOR Output
ALU
9.Subtraction
Full Adder Addition
Circuit
Carry in Carry out
Inst1 ctrl1
Inst2
ctrl2
ctrl3
ctrl4

Decoder Decoder 16
 8. Multi Bit ALU Carry out(C)

A2
7. ALU • Connect multiple single R2
B2
Components: bit ALUs together Carry out to carry
Contd. in

8.Multi Bit • The ‘carry out’ of each ALU A1 R1

ALU links to ‘carry in’ of next ALU B1 Carry out to carry
9.Subtraction in
• Final result is CR2R1R0 A0
R0
B0

Instruction
s Carry in

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 9. Subtraction

8.Multi Bit • Subtraction can be done by adding A to the 2’s complement form
ALU of B.
9.Subtraction • S = A+(2’s Complement of B)
10. Add/
Subtract Circuit =A+(1’s complement of B+1)
=A+(B’+1)
• The rule to convert B to –B in 2’s complement form is:
• Invert each bit (using NOT gates).
• Add 1.

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 10. Add / Subtract Circuit
9.Subtraction • Both addition and subtraction circuits
10. Add/ can be combined into a single circuit
Subtract
Circuit by using Controlled Inversion.
11. Controlled • A Control input determines whether
Inversion
the circuit adds or subtracts.

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 11. Controlled Inversion
10. Add/ • Consider the following truth table:
Subtract Circuit • Input Control will be the CONTROL.
11. Controlled • Input B is the Data.
Inversion
12.Circuit for
Add/ Subtract
Unit Input Control Input B Output F
0 0 0
Output F=B=
0 1 1 B
1 0 1 Output F=B’
1 1 0 NOT B

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 11. Controlled Inversion (Contd.)
10. Add/ • When Control = 0
Subtract Circuit • Then
11. Controlled
Inversion • When Control = 1
12.Circuit for • Then
Add/ Subtract
Unit
• This is the truth table for XOR

Control Input B Output F

0 0 0
0 1 1
1 0 1
1 1 0
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 12. Circuit for Add / Subtract Unit
11. Controlled
Inversion Input Input B Output F
Control Output
12.Circuit for

4-bit adder
F=B= B
Add/ 0 0 0
Subtract Unit 0 1 1 Output
13. Control of F=B’
the Add/ 1 0 1
NOT B
Subtract Unit 1 1 0

0/1

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 13. Control of the Add / Subtract Unit
12.Circuit for • The Control determines the operation:
Add/ Subtract
Unit
• Control = 0 : Addition
13. Control of • Carry-in is 0 .
the Add/ • Output is A plus B plus 0.
Subtract Unit
14. Summary
• Control = 1 : Subtraction
• Carry-in is 1.
• Output is A plus ( inverse of B plus 1).
• which is A plus (-B).

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 14. Summary
• ALU
13. Control of • Functions, controlling and multiplexing.
the Add/
Subtract Unit
• Controlled inversion and subtraction.
14. Summary

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