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CENG250 03 B Exercises

This document contains exercises from a digital logic course. The first exercise provides a circuit and asks the student to (1) find the Boolean function, (2) simplify the function, and (3) evaluate complexity reduction. The second exercise provides a Boolean expression and asks the student to (1) draw the gate diagram, (2) simplify the expression, (3) draw the simplified diagram, and (4) evaluate reduction. The document provides guidance and space for the student to show their work.

Uploaded by

Zeinab Farhat
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© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
21 views

CENG250 03 B Exercises

This document contains exercises from a digital logic course. The first exercise provides a circuit and asks the student to (1) find the Boolean function, (2) simplify the function, and (3) evaluate complexity reduction. The second exercise provides a Boolean expression and asks the student to (1) draw the gate diagram, (2) simplify the expression, (3) draw the simplified diagram, and (4) evaluate reduction. The document provides guidance and space for the student to show their work.

Uploaded by

Zeinab Farhat
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Exercises – 03

Digital Logic I
CENG250
Chapter 02 Exercises

Dr. Ahmad Kobeissi


Exercise – 01
• Consider the following circuit:
a) Find the Boolean function of the output Q

b) Simplify Q (to a minimum SOP) & draw the simplified expression

c) Evaluate the complexity reduction after simplification:


• Consider number of gates, literals, and inputs only

Dr. Ahmad Kobeissi 2


Exercise – 01
A.B A.B+(B+C).B.C

• Consider the following circuit: B+C


a) Find the Boolean function of the output Q
Q = A.B + (B + C).B.C (B+C).B.C
B.C

b) Simplify Q (to a minimum SOP) & draw the simplified expression

c) Evaluate the complexity reduction after simplification:


• Consider number of gates, literals, and inputs only

Dr. Ahmad Kobeissi 3


Exercise – 01
A.B A.B+(B+C).B.C

• Consider the following circuit: B+C


a) Find the Boolean function of the output Q
Q = A.B + (B + C).B.C (B+C).B.C
B.C

b) Simplify Q (to a minimum SOP) & draw the simplified expression


Q = A.B + B.B.C + C.B.C
Q = A.B + B.C (Idempotency)

c) Evaluate the complexity reduction after simplification:


• Consider number of gates, literals, and inputs only

Dr. Ahmad Kobeissi 4


Exercise – 01
A.B A.B+(B+C).B.C

• Consider the following circuit: B+C


a) Find the Boolean function of the output Q
Q = A.B + (B + C).B.C (B+C).B.C
B.C

b) Simplify Q (to a minimum SOP) & draw the simplified expression


Q = A.B + B.B.C + C.B.C
Q = A.B + B.C (Idempotency)

c) Evaluate the complexity reduction after simplification:


• Consider number of gates, literals, and inputs only Gates Literals Inputs
Before 5 6 10
After 3 4 6
Dr. Ahmad Kobeissi 5
Exercise – 02
• Consider the Boolean expression:
• F= A.B.C’ + A’.C’.D + A.B’.C’ + B.C’.D + A’.D
a. Draw the gate circuit diagram that corresponds to F
• Assume that all inputs are available both un-complemented and
complemented, and logic gates may have any number of inputs
b. Simplify F using Boolean algebra to the minimum SOP
c. Draw a simplified gate circuit based on new simplified
expression of F
d. Evaluate the reduction in digital design

Dr. Ahmad Kobeissi 6


Exercise – 02
• Consider the Boolean expression:
• F= A.B.C’ + A’.C’.D + A.B’.C’ + B.C’.D + A’.D
a. Draw the gate circuit diagram that corresponds to F

Dr. Ahmad Kobeissi 7


Exercise – 02
• Consider the Boolean expression:
• F= A.B.C’ + A’.C’.D + A.B’.C’ + B.C’.D + A’.D
a. Draw the gate circuit diagram that corresponds to F

Dr. Ahmad Kobeissi 8


Exercise – 02
• Consider the Boolean expression:
• F= A.B.C’ + A’.C’.D + A.B’.C’ + B.C’.D + A’.D
b. Simplify F using Boolean algebra to the minimum SOP

Dr. Ahmad Kobeissi 9


Exercise – 02
• Consider the Boolean expression:
• F= A.B.C’ + A’.C’.D + A.B’.C’ + B.C’.D + A’.D
b. Simplify F using Boolean algebra to the minimum SOP
F= A.B.C’ + A’.C’.D + A.B’.C’ + B.C’.D + A’.D
F= A.C’.(B + B’) + A’.D.(C’ + 1) + B.C’.D
F= A.C’ + A’.D + B.C’.D
F= A.C’ + A’.D (Consensus)

Dr. Ahmad Kobeissi 10


Exercise – 02
• Consider the Boolean expression:
• F= A.C’ + A’.D
c. Draw a simplified gate circuit based on new simplified
expression of F:

Dr. Ahmad Kobeissi 11


Exercise – 02
• Consider the Boolean expression:
• F= A.C’ + A’.D
c. Draw a simplified gate circuit based on new simplified
expression of F:

Dr. Ahmad Kobeissi 12


Exercise – 02
• Consider the Boolean expression:
• F= A.C’ + A’.D
d. Evaluate the reduction in digital design:
• Before simplification:
• Gates: _, Level: _, Terms: _, Literals: _, Inputs: _
• After simplification:
• Gates: _, Level: _, Terms: _, Literals: _, Inputs: _

Dr. Ahmad Kobeissi 13


Exercise – 02
• Consider the Boolean expression:
• F= A.C’ + A’.D
d. Evaluate the reduction in digital design:
• Before simplification:
• Gates: 6, Level: 2, Terms: 5, Literals: 14, Inputs: 19
• After simplification:
• Gates: 3, Level: 2, Terms: 2, Literals: 4, Inputs: 6

Dr. Ahmad Kobeissi 14


The End

Dr. Ahmad Kobeissi 15

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