Microprocessor 8086+extra
Microprocessor 8086+extra
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Microprocessors are essential components of modern computing devices,
varying in their processing power and capabilities. Here's a brief overview of 4-
bit, 8-bit, 16-bit, 32-bit, and 64-bit microprocessors:
By memory banking.
Memory Banking:
Here we shall consider an 8086 processor which can hold 1MB of memory due to its 20
address lines ( 220 = 1MB ) [ Refer introduction tutorials ]. So this 1MB memory is divided
into two parts ( two banks ), where one bank consists of all even addresses and the other
bank consists of odd addresses.
As the 16-bit data is stored in 2 locations, lower byte in lower address and upper byte in
next consecutive address location.
The data stored here is 1345H. This is representation of data in hexadecimal form. So
whenever the processor needs to fetch this , it first gives the address to the address bus
and fetches 45H and then it gives the next address, then it fetches 13H. So overall a 16-
bit processor needs 2 cycles to perform a 16-bit operation, which is completely a wrong
concept. This thing led to memory banking.
If the memory can be divided into two parts, with some algorithm, two 8-bit datas can
be fetched in one cycle.
As Even bank starts from 00000H and goes up to FFFFEH , it stores the lower byte so also
known as lower bank. Odd bank locations start from 00001H and go upto FFFFFH , this
stores higher byte , thus also known as Higher bank in 8086.
How does banking work?
There are totally 20 address lines in 8086, that can access the locations. Each location is
decided by these 20 address lines ( A 0 , A1 ……. A19 ).
If observed, for every consecutive location starting from even location, there is only
change in address ( A0 is only different ).
For Eg:
Locations 0H and 1H are consecutive and have the same address except A 0.
Locations 3H and 4H are consecutive but their addresses don’t have that similarity.
Aligned data:
Locations 0H and 1H is the example of aligned data. 8086 can fetch this type of data in
one cycle.
Misaligned data:
Locations 3H and 4H are the example of misaligned data, 8086 needs 2 cycles to fetch this
type of data.
Now we would learn how we can access 16-bit aligned data in one cycle.
If A0 address line is discarded, 8086 sends a 19-bit address, there are two locations, one
location in higher bank and other location in lower with the same address, in this way
8086 can fetch 16 bit data in one cycle. But if A0 is always discarded, 8086 can only
perform 16-bit operations, and cannot perform 8-bit operations.
So we need that
8086 can be able to select lower bank only for 8-bit operations.
8086 can be able to select higher bank only for 8-bit operations.
8086 can be able to select both banks at single time for 16-bit operations.
Then BHE, comes into picture. It stands for bus high enable or bank high enable, and it is
pronounced as BHE bar.
BHE bar is connected to the active low of the higher bank and A0 is connected to the
active low of lower bank.
Whenever A0 = 0, lower bank is selected
And if A0 = 1, lower bank is not selected
A0 has nothing to do with higher bank
Whenever BHE = 0, higher bank is selected
BHE A0 Mode
0 0 Both the banks are selected and 8086 performs 16-bit operations.
Higher bank is selected and 8086 performs 8-bit operations with higher bank memory
0 1 only.
Lower bank is selected and 8086 performs 8-bit operations with Lower bank memory
1 0 only.